spi.h 1.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263
  1. /**
  2. * @file spi.h
  3. * @author chenjun (chenjun@radareye.com.cn)
  4. * @brief
  5. * @version 0.1
  6. * @date 2022-04-06
  7. *
  8. * @copyright Copyright (c) 2022
  9. *
  10. */
  11. #ifndef __SPI_H__
  12. #define __SPI_H__
  13. #include "n32g45x.h"
  14. #ifndef NULL
  15. #define NULL ((void*)0)
  16. #endif
  17. #define SPI_2 SPI2
  18. #define SPI_2_CLK RCC_APB1_PERIPH_SPI2
  19. #define SPI_2_GPIO GPIOB
  20. #define SPI_2_GPIO_CLK RCC_APB2_PERIPH_GPIOB
  21. #define SPI_2_PIN_NSS GPIO_PIN_12
  22. #define SPI_2_PIN_SCK GPIO_PIN_13
  23. #define SPI_2_PIN_MISO GPIO_PIN_14
  24. #define SPI_2_PIN_MOSI GPIO_PIN_15
  25. #define SPI_2_DMA DMA1
  26. #define SPI_2_DMA_CLK RCC_AHB_PERIPH_DMA1
  27. #define SPI_2_Rx_DMA_Channel DMA1_CH4
  28. #define SPI_2_Rx_DMA_FLAG DMA1_FLAG_TC4
  29. #define SPI_2_Tx_DMA_Channel DMA1_CH5
  30. #define SPI_2_Tx_DMA_FLAG DMA1_FLAG_TC5
  31. #define SPI_MASTER_DR_Base 0x4001300C
  32. #define SPI_SLAVE_DR_Base 0x4000380C
  33. /**
  34. * @brief Chip Select pin low
  35. */
  36. #define SPI_2_CS_LOW() GPIO_ResetBits(SPI_2_GPIO, SPI_2_PIN_NSS)
  37. /**
  38. * @brief Chip Select pin high
  39. */
  40. #define SPI_2_CS_HIGH() GPIO_SetBits(SPI_2_GPIO, SPI_2_PIN_NSS)
  41. #define SPI_CS_LOW() SPI_2_CS_LOW()
  42. #define SPI_CS_HIGH() SPI_2_CS_HIGH()
  43. void spi_init(void);
  44. void spi_write_read(SPI_Module *SPIx, uint8_t *ptdata, uint8_t *prdata, uint16_t len);
  45. #endif /*__SPI_H__*/