SEGGER_RTT_Conf.h 25 KB

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  1. /*********************************************************************
  2. * SEGGER Microcontroller GmbH *
  3. * The Embedded Experts *
  4. **********************************************************************
  5. * *
  6. * (c) 1995 - 2020 SEGGER Microcontroller GmbH *
  7. * *
  8. * www.segger.com Support: support@segger.com *
  9. * *
  10. **********************************************************************
  11. * *
  12. * SEGGER RTT * Real Time Transfer for embedded targets *
  13. * *
  14. **********************************************************************
  15. * *
  16. * All rights reserved. *
  17. * *
  18. * SEGGER strongly recommends to not make any changes *
  19. * to or modify the source code of this software in order to stay *
  20. * compatible with the RTT protocol and J-Link. *
  21. * *
  22. * Redistribution and use in source and binary forms, with or *
  23. * without modification, are permitted provided that the following *
  24. * condition is met: *
  25. * *
  26. * o Redistributions of source code must retain the above copyright *
  27. * notice, this condition and the following disclaimer. *
  28. * *
  29. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND *
  30. * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, *
  31. * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF *
  32. * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE *
  33. * DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR *
  34. * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR *
  35. * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT *
  36. * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; *
  37. * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF *
  38. * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT *
  39. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE *
  40. * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH *
  41. * DAMAGE. *
  42. * *
  43. **********************************************************************
  44. ---------------------------END-OF-HEADER------------------------------
  45. File : SEGGER_RTT_Conf.h
  46. Purpose : Implementation of SEGGER real-time transfer (RTT) which
  47. allows real-time communication on targets which support
  48. debugger memory accesses while the CPU is running.
  49. Revision: $Rev: 24316 $
  50. */
  51. #ifndef SEGGER_RTT_CONF_H
  52. #define SEGGER_RTT_CONF_H
  53. #ifdef __IAR_SYSTEMS_ICC__
  54. #include <intrinsics.h>
  55. #endif
  56. /*********************************************************************
  57. *
  58. * Defines, configurable
  59. *
  60. **********************************************************************
  61. */
  62. #define SEGGER_RTT_SECTION ".noncacheable.bss"
  63. #define SEGGER_RTT_BUFFER_SECTION ".noncacheable.bss"
  64. //
  65. // Take in and set to correct values for Cortex-A systems with CPU cache
  66. //
  67. //#define SEGGER_RTT_CPU_CACHE_LINE_SIZE (32) // Largest cache line size (in bytes) in the current system
  68. //#define SEGGER_RTT_UNCACHED_OFF (0xF8000000) // Address alias where RTT CB and buffers can be accessed uncached
  69. //
  70. // Most common case:
  71. // Up-channel 0: RTT
  72. // Up-channel 1: SystemView
  73. //
  74. #ifndef SEGGER_RTT_MAX_NUM_UP_BUFFERS
  75. #define SEGGER_RTT_MAX_NUM_UP_BUFFERS (3) // Max. number of up-buffers (T->H) available on this target (Default: 3)
  76. #endif
  77. //
  78. // Most common case:
  79. // Down-channel 0: RTT
  80. // Down-channel 1: SystemView
  81. //
  82. #ifndef SEGGER_RTT_MAX_NUM_DOWN_BUFFERS
  83. #define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (3) // Max. number of down-buffers (H->T) available on this target (Default: 3)
  84. #endif
  85. #ifndef BUFFER_SIZE_UP
  86. #define BUFFER_SIZE_UP (1024) // Size of the buffer for terminal output of target, up to host (Default: 1k)
  87. #endif
  88. #ifndef BUFFER_SIZE_DOWN
  89. #define BUFFER_SIZE_DOWN (16) // Size of the buffer for terminal input to target from host (Usually keyboard input) (Default: 16)
  90. #endif
  91. #ifndef SEGGER_RTT_PRINTF_BUFFER_SIZE
  92. #define SEGGER_RTT_PRINTF_BUFFER_SIZE (64u) // Size of buffer for RTT printf to bulk-send chars via RTT (Default: 64)
  93. #endif
  94. #ifndef SEGGER_RTT_MODE_DEFAULT
  95. #define SEGGER_RTT_MODE_DEFAULT SEGGER_RTT_MODE_NO_BLOCK_SKIP // Mode for pre-initialized terminal channel (buffer 0)
  96. #endif
  97. /*********************************************************************
  98. *
  99. * RTT memcpy configuration
  100. *
  101. * memcpy() is good for large amounts of data,
  102. * but the overhead is big for small amounts, which are usually stored via RTT.
  103. * With SEGGER_RTT_MEMCPY_USE_BYTELOOP a simple byte loop can be used instead.
  104. *
  105. * SEGGER_RTT_MEMCPY() can be used to replace standard memcpy() in RTT functions.
  106. * This is may be required with memory access restrictions,
  107. * such as on Cortex-A devices with MMU.
  108. */
  109. #ifndef SEGGER_RTT_MEMCPY_USE_BYTELOOP
  110. #define SEGGER_RTT_MEMCPY_USE_BYTELOOP 0 // 0: Use memcpy/SEGGER_RTT_MEMCPY, 1: Use a simple byte-loop
  111. #endif
  112. //
  113. // Example definition of SEGGER_RTT_MEMCPY to external memcpy with GCC toolchains and Cortex-A targets
  114. //
  115. //#if ((defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)) && (defined (__ARM_ARCH_7A__))
  116. // #define SEGGER_RTT_MEMCPY(pDest, pSrc, NumBytes) SEGGER_memcpy((pDest), (pSrc), (NumBytes))
  117. //#endif
  118. //
  119. // Target is not allowed to perform other RTT operations while string still has not been stored completely.
  120. // Otherwise we would probably end up with a mixed string in the buffer.
  121. // If using RTT from within interrupts, multiple tasks or multi processors, define the SEGGER_RTT_LOCK() and SEGGER_RTT_UNLOCK() function here.
  122. //
  123. // SEGGER_RTT_MAX_INTERRUPT_PRIORITY can be used in the sample lock routines on Cortex-M3/4.
  124. // Make sure to mask all interrupts which can send RTT data, i.e. generate SystemView events, or cause task switches.
  125. // When high-priority interrupts must not be masked while sending RTT data, SEGGER_RTT_MAX_INTERRUPT_PRIORITY needs to be adjusted accordingly.
  126. // (Higher priority = lower priority number)
  127. // Default value for embOS: 128u
  128. // Default configuration in FreeRTOS: configMAX_SYSCALL_INTERRUPT_PRIORITY: ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
  129. // In case of doubt mask all interrupts: 1 << (8 - BASEPRI_PRIO_BITS) i.e. 1 << 5 when 3 bits are implemented in NVIC
  130. // or define SEGGER_RTT_LOCK() to completely disable interrupts.
  131. //
  132. #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY
  133. #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) // Interrupt priority to lock on SEGGER_RTT_LOCK on Cortex-M3/4 (Default: 0x20)
  134. #endif
  135. /*********************************************************************
  136. *
  137. * RTT lock configuration for SEGGER Embedded Studio,
  138. * Rowley CrossStudio and GCC
  139. */
  140. #if ((defined(__SES_ARM) || defined(__SES_RISCV) || defined(__CROSSWORKS_ARM) || defined(__GNUC__) || defined(__clang__)) && !defined (__CC_ARM) && !defined(WIN32))
  141. #if (defined(__ARM_ARCH_6M__) || defined(__ARM_ARCH_8M_BASE__))
  142. #define SEGGER_RTT_LOCK() { \
  143. unsigned int _SEGGER_RTT__LockState; \
  144. __asm volatile ("mrs %0, primask \n\t" \
  145. "movs r1, #1 \n\t" \
  146. "msr primask, r1 \n\t" \
  147. : "=r" (_SEGGER_RTT__LockState) \
  148. : \
  149. : "r1", "cc" \
  150. );
  151. #define SEGGER_RTT_UNLOCK() __asm volatile ("msr primask, %0 \n\t" \
  152. : \
  153. : "r" (_SEGGER_RTT__LockState) \
  154. : \
  155. ); \
  156. }
  157. #elif (defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__))
  158. #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY
  159. #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20)
  160. #endif
  161. #define SEGGER_RTT_LOCK() { \
  162. unsigned int _SEGGER_RTT__LockState; \
  163. __asm volatile ("mrs %0, basepri \n\t" \
  164. "mov r1, %1 \n\t" \
  165. "msr basepri, r1 \n\t" \
  166. : "=r" (_SEGGER_RTT__LockState) \
  167. : "i"(SEGGER_RTT_MAX_INTERRUPT_PRIORITY) \
  168. : "r1", "cc" \
  169. );
  170. #define SEGGER_RTT_UNLOCK() __asm volatile ("msr basepri, %0 \n\t" \
  171. : \
  172. : "r" (_SEGGER_RTT__LockState) \
  173. : \
  174. ); \
  175. }
  176. #elif (defined(__ARM_ARCH_7A__) || defined(__ARM_ARCH_7R__))
  177. #define SEGGER_RTT_LOCK() { \
  178. unsigned int _SEGGER_RTT__LockState; \
  179. __asm volatile ("mrs r1, CPSR \n\t" \
  180. "mov %0, r1 \n\t" \
  181. "orr r1, r1, #0xC0 \n\t" \
  182. "msr CPSR_c, r1 \n\t" \
  183. : "=r" (_SEGGER_RTT__LockState) \
  184. : \
  185. : "r1", "cc" \
  186. );
  187. #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \
  188. "mrs r1, CPSR \n\t" \
  189. "bic r1, r1, #0xC0 \n\t" \
  190. "and r0, r0, #0xC0 \n\t" \
  191. "orr r1, r1, r0 \n\t" \
  192. "msr CPSR_c, r1 \n\t" \
  193. : \
  194. : "r" (_SEGGER_RTT__LockState) \
  195. : "r0", "r1", "cc" \
  196. ); \
  197. }
  198. #elif defined(__riscv) || defined(__riscv_xlen)
  199. #define SEGGER_RTT_LOCK() { \
  200. unsigned int _SEGGER_RTT__LockState; \
  201. __asm volatile ("csrr %0, mstatus \n\t" \
  202. "csrci mstatus, 8 \n\t" \
  203. "andi %0, %0, 8 \n\t" \
  204. : "=r" (_SEGGER_RTT__LockState) \
  205. : \
  206. : \
  207. );
  208. #define SEGGER_RTT_UNLOCK() __asm volatile ("csrr a1, mstatus \n\t" \
  209. "or %0, %0, a1 \n\t" \
  210. "csrs mstatus, %0 \n\t" \
  211. : \
  212. : "r" (_SEGGER_RTT__LockState) \
  213. : "a1" \
  214. ); \
  215. }
  216. #else
  217. #define SEGGER_RTT_LOCK()
  218. #define SEGGER_RTT_UNLOCK()
  219. #endif
  220. #endif
  221. /*********************************************************************
  222. *
  223. * RTT lock configuration for IAR EWARM
  224. */
  225. #ifdef __ICCARM__
  226. #if (defined (__ARM6M__) && (__CORE__ == __ARM6M__)) || \
  227. (defined (__ARM8M_BASELINE__) && (__CORE__ == __ARM8M_BASELINE__))
  228. #define SEGGER_RTT_LOCK() { \
  229. unsigned int _SEGGER_RTT__LockState; \
  230. _SEGGER_RTT__LockState = __get_PRIMASK(); \
  231. __set_PRIMASK(1);
  232. #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \
  233. }
  234. #elif (defined (__ARM7EM__) && (__CORE__ == __ARM7EM__)) || \
  235. (defined (__ARM7M__) && (__CORE__ == __ARM7M__)) || \
  236. (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) || \
  237. (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__))
  238. #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY
  239. #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20)
  240. #endif
  241. #define SEGGER_RTT_LOCK() { \
  242. unsigned int _SEGGER_RTT__LockState; \
  243. _SEGGER_RTT__LockState = __get_BASEPRI(); \
  244. __set_BASEPRI(SEGGER_RTT_MAX_INTERRUPT_PRIORITY);
  245. #define SEGGER_RTT_UNLOCK() __set_BASEPRI(_SEGGER_RTT__LockState); \
  246. }
  247. #elif (defined (__ARM7A__) && (__CORE__ == __ARM7A__)) || \
  248. (defined (__ARM7R__) && (__CORE__ == __ARM7R__))
  249. #define SEGGER_RTT_LOCK() { \
  250. unsigned int _SEGGER_RTT__LockState; \
  251. __asm volatile ("mrs r1, CPSR \n\t" \
  252. "mov %0, r1 \n\t" \
  253. "orr r1, r1, #0xC0 \n\t" \
  254. "msr CPSR_c, r1 \n\t" \
  255. : "=r" (_SEGGER_RTT__LockState) \
  256. : \
  257. : "r1", "cc" \
  258. );
  259. #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \
  260. "mrs r1, CPSR \n\t" \
  261. "bic r1, r1, #0xC0 \n\t" \
  262. "and r0, r0, #0xC0 \n\t" \
  263. "orr r1, r1, r0 \n\t" \
  264. "msr CPSR_c, r1 \n\t" \
  265. : \
  266. : "r" (_SEGGER_RTT__LockState) \
  267. : "r0", "r1", "cc" \
  268. ); \
  269. }
  270. #endif
  271. #endif
  272. /*********************************************************************
  273. *
  274. * RTT lock configuration for IAR RX
  275. */
  276. #ifdef __ICCRX__
  277. #define SEGGER_RTT_LOCK() { \
  278. unsigned long _SEGGER_RTT__LockState; \
  279. _SEGGER_RTT__LockState = __get_interrupt_state(); \
  280. __disable_interrupt();
  281. #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \
  282. }
  283. #endif
  284. /*********************************************************************
  285. *
  286. * RTT lock configuration for IAR RL78
  287. */
  288. #ifdef __ICCRL78__
  289. #define SEGGER_RTT_LOCK() { \
  290. __istate_t _SEGGER_RTT__LockState; \
  291. _SEGGER_RTT__LockState = __get_interrupt_state(); \
  292. __disable_interrupt();
  293. #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \
  294. }
  295. #endif
  296. /*********************************************************************
  297. *
  298. * RTT lock configuration for KEIL ARM
  299. */
  300. #ifdef __CC_ARM
  301. #if (defined __TARGET_ARCH_6S_M)
  302. #define SEGGER_RTT_LOCK() { \
  303. unsigned int _SEGGER_RTT__LockState; \
  304. register unsigned char _SEGGER_RTT__PRIMASK __asm( "primask"); \
  305. _SEGGER_RTT__LockState = _SEGGER_RTT__PRIMASK; \
  306. _SEGGER_RTT__PRIMASK = 1u; \
  307. __schedule_barrier();
  308. #define SEGGER_RTT_UNLOCK() _SEGGER_RTT__PRIMASK = _SEGGER_RTT__LockState; \
  309. __schedule_barrier(); \
  310. }
  311. #elif (defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M))
  312. #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY
  313. #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20)
  314. #endif
  315. #define SEGGER_RTT_LOCK() { \
  316. unsigned int _SEGGER_RTT__LockState; \
  317. register unsigned char BASEPRI __asm( "basepri"); \
  318. _SEGGER_RTT__LockState = BASEPRI; \
  319. BASEPRI = SEGGER_RTT_MAX_INTERRUPT_PRIORITY; \
  320. __schedule_barrier();
  321. #define SEGGER_RTT_UNLOCK() BASEPRI = _SEGGER_RTT__LockState; \
  322. __schedule_barrier(); \
  323. }
  324. #endif
  325. #endif
  326. /*********************************************************************
  327. *
  328. * RTT lock configuration for TI ARM
  329. */
  330. #ifdef __TI_ARM__
  331. #if defined (__TI_ARM_V6M0__)
  332. #define SEGGER_RTT_LOCK() { \
  333. unsigned int _SEGGER_RTT__LockState; \
  334. _SEGGER_RTT__LockState = __get_PRIMASK(); \
  335. __set_PRIMASK(1);
  336. #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \
  337. }
  338. #elif (defined (__TI_ARM_V7M3__) || defined (__TI_ARM_V7M4__))
  339. #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY
  340. #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20)
  341. #endif
  342. #define SEGGER_RTT_LOCK() { \
  343. unsigned int _SEGGER_RTT__LockState; \
  344. _SEGGER_RTT__LockState = _set_interrupt_priority(SEGGER_RTT_MAX_INTERRUPT_PRIORITY);
  345. #define SEGGER_RTT_UNLOCK() _set_interrupt_priority(_SEGGER_RTT__LockState); \
  346. }
  347. #endif
  348. #endif
  349. /*********************************************************************
  350. *
  351. * RTT lock configuration for CCRX
  352. */
  353. #ifdef __RX
  354. #include <machine.h>
  355. #define SEGGER_RTT_LOCK() { \
  356. unsigned long _SEGGER_RTT__LockState; \
  357. _SEGGER_RTT__LockState = get_psw() & 0x010000; \
  358. clrpsw_i();
  359. #define SEGGER_RTT_UNLOCK() set_psw(get_psw() | _SEGGER_RTT__LockState); \
  360. }
  361. #endif
  362. /*********************************************************************
  363. *
  364. * RTT lock configuration for embOS Simulation on Windows
  365. * (Can also be used for generic RTT locking with embOS)
  366. */
  367. #if defined(WIN32) || defined(SEGGER_RTT_LOCK_EMBOS)
  368. void OS_SIM_EnterCriticalSection(void);
  369. void OS_SIM_LeaveCriticalSection(void);
  370. #define SEGGER_RTT_LOCK() { \
  371. OS_SIM_EnterCriticalSection();
  372. #define SEGGER_RTT_UNLOCK() OS_SIM_LeaveCriticalSection(); \
  373. }
  374. #endif
  375. /*********************************************************************
  376. *
  377. * RTT lock configuration fallback
  378. */
  379. #ifndef SEGGER_RTT_LOCK
  380. #define SEGGER_RTT_LOCK() // Lock RTT (nestable) (i.e. disable interrupts)
  381. #endif
  382. #ifndef SEGGER_RTT_UNLOCK
  383. #define SEGGER_RTT_UNLOCK() // Unlock RTT (nestable) (i.e. enable previous interrupt lock state)
  384. #endif
  385. #endif
  386. /*************************** End of file ****************************/