1、找到为什么偶尔debug失败的原因-->跟cfg文件息息相关 链接文件

2、adc 序列加dma测试成功 数学库移植完成 sd卡库移植(未测)
3、后续可以考虑照搬hpm的cmakelist的格式，主要是还没找到合适的方法，所有初始化后期确定后可以全部移入board和pinmux文件中。工程目录是现在不知道如何调节，现在所有的应用都分层在app目录下；
4、硬件上的驱动还差 内部flash（hpm6750没有），外部flash分区、sd卡测试、spiflash测试、

controller_yy_app/CMakeLists.txt

@@ -3,6 +3,10 @@
 
 cmake_minimum_required(VERSION 3.13)
 
+
+
+
+
 set(CUSTOM_GCC_LINKER_FILE ${CMAKE_CURRENT_SOURCE_DIR}/linkers/gcc/user_linker.ld)
 set(CUSTOM_SES_LINKER_FILE ${CMAKE_CURRENT_SOURCE_DIR}/linkers/segger/user_linker.icf)
 set(CUSTOM_IAR_LINKER_FILE ${CMAKE_CURRENT_SOURCE_DIR}/linkers/iar/user_linker.icf)
@@ -11,9 +15,16 @@ find_package(hpm-sdk REQUIRED HINTS $ENV{HPM_SDK_BASE})
 
 project(controlware_yy_app)
 # 添加hpm中间件
+set(SES_TOOLCHAIN_VARIANT "Andes")
+
 set(CONFIG_SDMMC 1)
 set(CONFIG_FATFS 1)
 
+set(RV_ARCH "rv32imafc")
+set(RV_ABI "ilp32f")
+set(CONFIG_HPM_MATH 1)
+set(CONFIG_HPM_MATH_DSP 1)
+set(HPM_MATH_DSP_SES_LIB "libdspf")
 
 add_subdirectory(middleware/)
 # add_subdirectory(controlware/)
@@ -48,6 +59,6 @@ sdk_app_src_glob(matrix/*.c)
 sdk_app_src_glob(hardware/*.c)
 sdk_app_src_glob(controlware/*.c)
 
-
+# sdk_compile_options("-O3")
 # 创建IDE PRO
 generate_ide_projects()

controller_yy_app/hardware/hard_inc/hard_sdio_sd.h

@@ -3,6 +3,36 @@
 #define  __HARD_SDIO_SD_H
 
 #include "hpm_sdmmc_sd.h"
+#define RUN_CORE HPM_CORE0
 
-
+#define SDCARD_SDXC_BASE                 (HPM_SDXC1)
+#define SDCARD_SUPPORT_3V3               (1)
+#define SDCARD_SUPPORT_1V8               (1)
+#define SDCARD_SUPPORT_4BIT              (1)
+#define SDCARD_SUPPORT_CARD_DETECTION    (1)
+#define SDCARD_SUPPORT_POWER_SWITCH      (0)
+#define SDCARD_SUPPORT_VOLTAGE_SWITCH    (1)
+#define SDCARD_SUPPORT_CARD_DETECTION    (1)
+#define SDCARD_CARD_DETECTION_USING_GPIO (0)
+#if defined(SDCARD_CARD_DETECTION_USING_GPIO) && (SDCARD_CARD_DETECTION_USING_GPIO == 1)
+#define SDCARD_CARD_DETECTION_GPIO       NULL
+#define SDCARD_CARD_DETECTION_GPIO_INDEX 0
+#define SDCARD_CARD_DETECTION_PIN_INDEX  0
+#endif
+#define EMMC_SDXC_BASE              (HPM_SDXC1)
+#define EMMC_SUPPORT_3V3            (1)
+#define EMMC_SUPPORT_1V8            (0)
+#define EMMC_SUPPORT_4BIT           (1)
+#define EMMC_SUPPORT_8BIT           (0)
+#define EMMC_SUPPORT_VOLTAGE_SWITCH (0)
+/* For eMMC device, it is recommended to use GPIO to switch voltage directly */
+#define EMMC_VOLTAGE_SWITCH_USING_GPIO (1)
+#if defined(EMMC_VOLTAGE_SWITCH_USING_GPIO) && (EMMC_VOLTAGE_SWITCH_USING_GPIO == 1)
+#define EMMC_VSEL_PIN IOC_PAD_PD29
+#endif
+void sdxc1_cd_pin(SDXC_Type *ptr, bool as_gpio);
+uint32_t sd1_configure_clock(SDXC_Type *ptr, uint32_t freq, bool need_inverse);
+void sdxc1_cmd_pin(SDXC_Type *ptr, bool open_drain, bool is_1v8);
+void sdxc1_clk_data_pins(SDXC_Type *ptr, uint32_t width, bool is_1v8);
+void sdxc1_vsel_pin(SDXC_Type *ptr, bool as_gpio);
 #endif

controller_yy_app/hardware/hard_inc/hard_system_delay.h

@@ -1,10 +1,10 @@
 #ifndef __HARD_SYSTEM_DELAY_H
 #define __HARD_SYSTEM_DELAY_H
 
-
-void system_delay_init(unsigned char SYSCLK);
-void system_delay_ms(unsigned short nms);
-void system_delay_us(unsigned int nus);
+#include <stdint.h>
+void system_delay_init(uint8_t SYSCLK);
+void system_delay_ms(uint32_t nms);
+void system_delay_us(uint32_t nus);
 void cpu_delay_test(void);
 
 #endif

controller_yy_app/hardware/hard_sdio_sd.c

@@ -1,10 +1,22 @@
 #include "board.h"
 #include "hpm_sdxc_drv.h"
 #include "hard_sdio_sd.h"
+#include "hard_system_delay.h"
 // 使用官方的SDMMC例程包
 // 修改时要修改初始化io 和时钟 在port文件内
 // 这里负责操作初始化IO 和 时钟的接口 注意在port文件填写对应的回调函数
-void sdxc_cd_pin(SDXC_Type *ptr, bool as_gpio)
+
+void sdxc1_vsel_pin(SDXC_Type *ptr, bool as_gpio)
+{
+    uint32_t vsel_pad_ctl = IOC_PAD_PAD_CTL_DS_SET(6) | IOC_PAD_PAD_CTL_PE_SET(1) | IOC_PAD_PAD_CTL_PS_SET(1);
+    if (ptr == HPM_SDXC1) {
+        uint32_t vsel_func_alt = as_gpio ? IOC_PD29_FUNC_CTL_GPIO_D_29 : IOC_PD29_FUNC_CTL_SDC1_VSEL;
+        HPM_IOC->PAD[IOC_PAD_PD29].FUNC_CTL = vsel_func_alt;
+        HPM_IOC->PAD[IOC_PAD_PD29].PAD_CTL = vsel_pad_ctl;
+    }
+}
+
+void sdxc1_cd_pin(SDXC_Type *ptr, bool as_gpio)
 {
     uint32_t cd_pad_ctl = IOC_PAD_PAD_CTL_DS_SET(6) | IOC_PAD_PAD_CTL_PE_SET(1) | IOC_PAD_PAD_CTL_PS_SET(1);
     if (ptr == HPM_SDXC1) {
@@ -15,7 +27,7 @@ void sdxc_cd_pin(SDXC_Type *ptr, bool as_gpio)
     }
 }
 
-uint32_t sd_configure_clock(SDXC_Type *ptr, uint32_t freq, bool need_inverse)
+uint32_t sd1_configure_clock(SDXC_Type *ptr, uint32_t freq, bool need_inverse)
 {
     uint32_t actual_freq = 0;
     do {
@@ -59,7 +71,7 @@ uint32_t sd_configure_clock(SDXC_Type *ptr, uint32_t freq, bool need_inverse)
     return actual_freq;
 }
 
-void sdxc_cmd_pin(SDXC_Type *ptr, bool open_drain, bool is_1v8)
+void sdxc1_cmd_pin(SDXC_Type *ptr, bool open_drain, bool is_1v8)
 {
     uint32_t cmd_func_ctl = IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17) | IOC_PAD_FUNC_CTL_LOOP_BACK_SET(1);
     uint32_t cmd_pad_ctl = IOC_PAD_PAD_CTL_MS_SET(is_1v8) | IOC_PAD_PAD_CTL_DS_SET(6) | IOC_PAD_PAD_CTL_PE_SET(1) |
@@ -75,7 +87,7 @@ void sdxc_cmd_pin(SDXC_Type *ptr, bool open_drain, bool is_1v8)
     }
 }
 
-void sdxc_clk_data_pins(SDXC_Type *ptr, uint32_t width, bool is_1v8)
+void sdxc1_clk_data_pins(SDXC_Type *ptr, uint32_t width, bool is_1v8)
 {
     uint32_t func_ctl = IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17);
     uint32_t pad_ctl = IOC_PAD_PAD_CTL_MS_SET(is_1v8) | IOC_PAD_PAD_CTL_DS_SET(6) | IOC_PAD_PAD_CTL_PE_SET(1) |

controller_yy_app/hardware/hard_system_delay.c

@@ -2,18 +2,18 @@
 #include "hard_system_delay.h"
 #include "hpm_clock_drv.h"
 #include "test.h"
-void system_delay_init(unsigned char SYSCLK)
+void system_delay_init(uint8_t SYSCLK)
 {
    ;// 使用的是cpu库延时 最大648M 64bit计数  可等us 将近1h
 }
 
-void system_delay_ms(unsigned short nms)
+void system_delay_ms(uint32_t nms)
 {
    clock_cpu_delay_ms(nms);
 }
 
 
-void system_delay_us(unsigned int nus)
+void system_delay_us(uint32_t nus)
 {
    clock_cpu_delay_us(nus);
 }

controller_yy_app/linkers/segger/user_linker.icf

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2024 HPMicro
+ * Copyright (c) 2021-2023 HPMicro
  * SPDX-License-Identifier: BSD-3-Clause
  */
 
@@ -12,14 +12,15 @@ define region BOOT_HEADER = [ from 0x80001000 size 0x2000 ];
 define region XPI0 = [from 0x80003000 size (_flash_size - 0x3000) ];   /* XPI0 */
 define region ILM   = [from 0x00000000 size 256k];        /* ILM */
 define region DLM   = [from 0x00080000 size 256k];        /* DLM */
-define region AXI_SRAM = [from 0x01080000 size 512k];    /* AXI SRAM0 */
-define region NONCACHEABLE_RAM = [from 0x01100000 size 256k];    /* AXI SRAM1 */
+define region AXI_SRAM = [from 0x01080000 size 768k];    /* AXI SRAM */
 define region SHARE_RAM = [from 0x0117C000 size 16k];
 define region AHB_SRAM = [from 0xF0300000 size 32k];
 define region APB_SRAM = [from 0xF40F0000 size 8k];
+define region SDRAM  = [from 0x40000000 size _extram_size - 4M];
+define region NONCACHEABLE_RAM = [from 0x40000000 + _extram_size - 4M size 4M];
 
 /* Blocks */
-define block vectors with fixed order       { section .vector_table, section .isr_vector };
+define block vectors with fixed order       { section .vector_table, section .isr_vector, section .isr_vector.* };
 define block ctors                          { section .ctors,     section .ctors.*, block with         alphabetical order { init_array } };
 define block dtors                          { section .dtors,     section .dtors.*, block with reverse alphabetical order { fini_array } };
 define block eh_frame                       { section .eh_frame,  section .eh_frame.* };
@@ -31,7 +32,7 @@ define block heap  with size = __HEAPSIZE__,  alignment = 8, /* fill =0x00, */ r
 define block stack with size = __STACKSIZE__, alignment = 16, /* fill =0xCD, */ readwrite access { };
 define block boot_header with fixed order                     { section .boot_header, section .fw_info_table, section .dc_info };
 define block cherryusb_usbh_class_info with alignment = 8     { section .usbh_class_info };
-define block framebuffer with alignment = 8                   { section .framebuffer };
+define block framebuffer with alignment = 8                   { section .framebuffer, section .framebuffer.* };
 define block rtthread_FSymTab                                 { section FSymTab };
 define block rtthread_VSymTab                                 { section VSymTab };
 define block rtthread_rti_fn with alphabetical order          { section .rti_fn* };
@@ -53,8 +54,8 @@ define exported symbol __share_mem_end__ = end of region SHARE_RAM + 1;
 define exported symbol _stack_safe = end of block stack + 1;
 define exported symbol _stack = end of block stack + 1;
 
-define exported symbol __usbh_class_info_start__ = start of block cherryusb_usbh_class_info;
-define exported symbol __usbh_class_info_end__ = end of block cherryusb_usbh_class_info + 1;
+define exported symbol __usbh_class_info_start__  = start of block cherryusb_usbh_class_info;
+define exported symbol __usbh_class_info_end__  = end of block cherryusb_usbh_class_info + 1;
 
 define exported symbol __fsymtab_start = start of block rtthread_FSymTab;
 define exported symbol __fsymtab_end = end of block rtthread_FSymTab + 1;
@@ -69,13 +70,13 @@ define exported symbol __rtmsymtab_start = start of block rtthread_RTMSymTab;
 define exported symbol __rtmsymtab_end = end of block rtthread_RTMSymTab + 1;
 
 /* Initialization */
-do not initialize                           { section .noncacheable, section .fast_ram };
+do not initialize                           { section .noncacheable, section .fast_ram };    // Legacy sections, kept for backwards compatibility
 do not initialize                           { section .non_init, section .non_init.*, section .*.non_init, section .*.non_init.* };
 do not initialize                           { section .no_init, section .no_init.*, section .*.no_init, section .*.no_init.* };   // Legacy sections, kept for backwards compatibility
 do not initialize                           { section .noinit, section .noinit.*, section .*.noinit, section .*.noinit.* };       // Legacy sections, used by some SDKs/HALs
-do not initialize                           { section .backup_sram};
+do not initialize                           { section .backup_sram, section .backup_sram.*};
 
-initialize by copy with packing=auto        { section .noncacheable.init, section .fast_ram.init };
+initialize by copy with packing=auto        { section .noncacheable.init, section .noncacheable.init.*, section .fast_ram.init, section .fast_ram.init.* };
 initialize by copy with packing=none        { section .data, section .data.*, section .*.data, section .*.data.* };               // Static data sections
 initialize by copy with packing=auto        { section .sdata, section .sdata.* };
 initialize by copy with packing=auto        { section .fast, section .fast.*, section .*.fast, section .*.fast.*, section .text.*nx* };               // "RAM Code" sections
@@ -101,7 +102,7 @@ place in XPI0 with minimum size order    {
                                            block cherryusb_usbh_class_info,
                                            readonly,                                // Catch-all for readonly data (e.g. .rodata, .srodata)
                                            readexec                                 // Catch-all for (readonly) executable code (e.g. .text)
-                                         };
+                                          };
 
 //
 // The GNU compiler creates these exception-related sections as writeable.
@@ -113,24 +114,24 @@ define access readonly { section .eh_frame, section .eh_frame.* };
 define access readonly { section .sdata.DW.* };
 
 place in ILM                              {
-                                           section .fast, section .fast.*, section .text.*nx*,    // "ramfunc" section
+                                           section .fast, section .fast.*, section .text.*nx*,     // "ramfunc" section
                                           };
 
-place in AXI_SRAM                         { block framebuffer };
+place in SDRAM                            { block framebuffer };
 
-place in AXI_SRAM                         {
+place in AXI_SRAM then SDRAM              {
                                             block tls,                                            // Thread-local-storage block
                                             readwrite,                                            // Catch-all for initialized/uninitialized data sections (e.g. .data, .noinit)
                                             zeroinit                                              // Catch-all for zero-initialized data sections (e.g. .bss)
                                           };
 
 
-place in NONCACHEABLE_RAM                 { section .noncacheable, section .noncacheable.init, section .noncacheable.bss };  // Noncacheable
-place in SHARE_RAM                        { section .sh_mem};                                     // Share memory
-place in AHB_SRAM                         { section .ahb_sram};                                   // AHB SRAM memory
-place in APB_SRAM                         { section .backup_sram};                                // Backup SRAM memory
-place in DLM                              { section .fast_ram.init, section .fast_ram, section .fast_ram.bss};   // Fast access memory
-place in DLM                              { block heap };                                         // Heap reserved block
+place in NONCACHEABLE_RAM                 { section .noncacheable.non_init, section .noncacheable.non_init.*, section .noncacheable.init, section .noncacheable.init.*, section .noncacheable.bss, section .noncacheable.bss.*, section .noncacheable };  // Noncacheable
+place in SHARE_RAM                        { section .sh_mem, section .sh_mem.*};                                     // Share memory
+place in AHB_SRAM                         { section .ahb_sram, section .ahb_sram.*};                                   // AHB SRAM memory
+place in APB_SRAM                         { section .backup_sram, section .backup_sram.*};                                // Backup SRAM memory
+place in DLM                              { section .fast_ram.init, section .fast_ram.init.*, section .fast_ram.non_init,  section .fast_ram.non_init.*, section .fast_ram.bss, section .fast_ram.bss.*, section .fast_ram };   // Fast access memory
+place in SDRAM                            { block heap };                                         // Heap reserved block
 place at end of DLM                       { block stack };                                        // Stack reserved block
 
 /* Keep */

controller_yy_app/middleware/hpm_sdmmc/port/hpm_sdmmc_port.c

@@ -7,7 +7,9 @@
 #include "hpm_common.h"
 #include "hpm_soc.h"
 #include "hpm_sdmmc_host.h"
-#include "board.h"
+// #include "board.h"
+#include "hard_sdio_sd.h"
+#include "hard_system_delay.h"
 
 uint32_t sdmmc_get_sys_addr(const sdmmc_host_t *host, uint32_t addr)
 {
@@ -22,15 +24,15 @@ ATTR_WEAK hpm_stat_t board_init_sd_host_params(sdmmc_host_t *host, SDMMCHOST_Typ
     sdmmc_io_init_apis_t *init_apis = &host->host_param.io_init_apis;
     hpm_sdmmc_extra_io_data_t *io_data = &host->host_param.io_data;
     param->base = base;
-    param->clock_init_func = board_sd_configure_clock;
-    param->hart_id = BOARD_RUNNING_CORE;
-    param->delay_ms = board_delay_ms;
+    param->clock_init_func = sd1_configure_clock;
+    param->hart_id = RUN_CORE;
+    param->delay_ms = system_delay_ms;
 
-    init_apis->cd_io_init = init_sdxc_cd_pin;
-    init_apis->cmd_io_init = init_sdxc_cmd_pin;
-    init_apis->clk_data_io_init = init_sdxc_clk_data_pins;
+    init_apis->cd_io_init = sdxc1_cd_pin;
+    init_apis->cmd_io_init = sdxc1_cmd_pin;
+    init_apis->clk_data_io_init = sdxc1_clk_data_pins;
 
-#if defined(BOARD_APP_SDCARD_SUPPORT_3V3) && (BOARD_APP_SDCARD_SUPPORT_3V3 == 1)
+#if defined(SDCARD_SUPPORT_3V3) && (SDCARD_SUPPORT_3V3 == 1)
     param->host_flags |= HPM_SDMMC_HOST_SUPPORT_3V3;
 #endif
     bool support_1v8 = false;
@@ -38,11 +40,11 @@ ATTR_WEAK hpm_stat_t board_init_sd_host_params(sdmmc_host_t *host, SDMMCHOST_Typ
     bool support_vsel = false;
     bool support_pwr = false;
     bool support_cd = false;
-#if defined(BOARD_APP_SDCARD_SUPPORT_1V8) && (BOARD_APP_SDCARD_SUPPORT_1V8 == 1)
+#if defined(SDCARD_SUPPORT_1V8) && (SDCARD_SUPPORT_1V8 == 1)
     param->host_flags |= HPM_SDMMC_HOST_SUPPORT_1V8;
     support_1v8 = true;
 #endif
-#if defined(BOARD_APP_SDCARD_SUPPORT_4BIT) && (BOARD_APP_SDCARD_SUPPORT_4BIT == 1)
+#if defined(SDCARD_SUPPORT_4BIT) && (SDCARD_SUPPORT_4BIT == 1)
     param->host_flags |= HPM_SDMMC_HOST_SUPPORT_4BIT;
     support_4bit = true;
 #endif
@@ -53,29 +55,29 @@ ATTR_WEAK hpm_stat_t board_init_sd_host_params(sdmmc_host_t *host, SDMMCHOST_Typ
         }
     }
 
-#if defined(BOARD_APP_SDCARD_SUPPORT_CARD_DETECTION) && (BOARD_APP_SDCARD_SUPPORT_CARD_DETECTION == 1)
+#if defined(SDCARD_SUPPORT_CARD_DETECTION) && (SDCARD_SUPPORT_CARD_DETECTION == 1)
     param->host_flags |= HPM_SDMMC_HOST_SUPPORT_CARD_DETECTION;
     support_cd = true;
-    init_apis->cd_io_init = init_sdxc_cd_pin;
+    init_apis->cd_io_init = sdxc1_cd_pin;
 #endif
 
-#if defined(BOARD_APP_SDCARD_SUPPORT_POWER_SWITCH) && (BOARD_APP_SDCARD_SUPPORT_POWER_SWITCH == 1)
+#if defined(SDCARD_SUPPORT_POWER_SWITCH) && (SDCARD_SUPPORT_POWER_SWITCH == 1)
     param->host_flags |= HPM_SDMMC_HOST_SUPPORT_POWER_SWITCH;
     support_pwr = true;
     init_apis->pwr_io_init = init_sdxc_pwr_pin;
 #endif
 
-#if defined(BOARD_APP_SDCARD_SUPPORT_VOLTAGE_SWITCH) && (BOARD_APP_SDCARD_SUPPORT_VOLTAGE_SWITCH == 1)
+#if defined(SDCARD_SUPPORT_VOLTAGE_SWITCH) && (SDCARD_SUPPORT_VOLTAGE_SWITCH == 1)
     param->host_flags |= HPM_SDMMC_HOST_SUPPORT_VOLTAGE_SWITCH;
     support_vsel = true;
-    init_apis->vsel_io_init = init_sdxc_vsel_pin;
+    init_apis->vsel_io_init = sdxc1_vsel_pin;
 #endif
 
     if (support_vsel) {
-#if defined(BOARD_APP_SDCARD_VOLTAGE_SWITCH_USING_GPIO) && (BOARD_APP_SDCARD_VOLTAGE_SWITCH_USING_GPIO == 1)
+#if defined(SDCARD_VOLTAGE_SWITCH_USING_GPIO) && (BSDCARD_VOLTAGE_SWITCH_USING_GPIO == 1)
         io_data->vsel_pin.use_gpio = true;
-        io_data->vsel_pin.gpio_pin = BOARD_APP_SDCARD_VSEL_PIN;
-#if defined(BOARD_APP_SDCARD_VOLTAGE_SWITCH_PIN_POL) && (BOARD_APP_SDCARD_VOLTAGE_SWITCH_PIN_POL == 1)
+        io_data->vsel_pin.gpio_pin = SDCARD_VSEL_PIN;
+#if defined(SDCARD_VOLTAGE_SWITCH_PIN_POL) && (SDCARD_VOLTAGE_SWITCH_PIN_POL == 1)
         io_data->vsel_pin.polarity = 1;
 #else
         io_data->vsel_pin.polarity = 0;
@@ -86,10 +88,10 @@ ATTR_WEAK hpm_stat_t board_init_sd_host_params(sdmmc_host_t *host, SDMMCHOST_Typ
 #endif
     }
     if (support_cd) {
-#if defined(BOARD_APP_SDCARD_CARD_DETECTION_USING_GPIO) && (BOARD_APP_SDCARD_CARD_DETECTION_USING_GPIO == 1)
+#if defined(SDCARD_CARD_DETECTION_USING_GPIO) && (SDCARD_CARD_DETECTION_USING_GPIO == 1)
         io_data->cd_pin.use_gpio = true;
-        io_data->cd_pin.gpio_pin = BOARD_APP_SDCARD_CARD_DETECTION_PIN;
-#if defined(BOARD_APP_SDCARD_CARD_DETECTION_PIN_POL) && (BOARD_APP_SDCARD_CARD_DETECTION_PIN_POL == 1)
+        io_data->cd_pin.gpio_pin = SDCARD_CARD_DETECTION_PIN;
+#if defined(SDCARD_CARD_DETECTION_PIN_POL) && (SDCARD_CARD_DETECTION_PIN_POL == 1)
         io_data->cd_pin.polarity = 1;
 #else
         io_data->cd_pin.polarity = 0;
@@ -101,10 +103,10 @@ ATTR_WEAK hpm_stat_t board_init_sd_host_params(sdmmc_host_t *host, SDMMCHOST_Typ
     }
 
     if (support_pwr) {
-#if defined(BOARD_APP_SDCARD_POWER_SWITCH_USING_GPIO) && (BOARD_APP_SDCARD_POWER_SWITCH_USING_GPIO == 1)
+#if defined(SDCARD_POWER_SWITCH_USING_GPIO) && (SDCARD_POWER_SWITCH_USING_GPIO == 1)
         io_data->pwr_pin.use_gpio = true;
-        io_data->pwr_pin.gpio_pin = BOARD_APP_SDCARD_POWER_SWITCH_PIN;
-#if defined(BOARD_APP_SDCARD_POWER_SWITCH_PIN_POL) && (BOARD_APP_SDCARD_POWER_SWITCH_PIN_POL == 1)
+        io_data->pwr_pin.gpio_pin = SDCARD_POWER_SWITCH_PIN;
+#if defined(SDCARD_POWER_SWITCH_PIN_POL) && (SDCARD_POWER_SWITCH_PIN_POL == 1)
         io_data->pwr_pin.polarity = true;
 #else
         io_data->pwr_pin.polarity = false;
@@ -126,20 +128,20 @@ ATTR_WEAK hpm_stat_t board_init_emmc_host_params(sdmmc_host_t *host, SDMMCHOST_T
 
     sdmmc_io_init_apis_t *init_apis = &host->host_param.io_init_apis;
     hpm_sdmmc_extra_io_data_t *io_data = &host->host_param.io_data;
-    param->base = BOARD_APP_EMMC_SDXC_BASE;
-    param->clock_init_func = board_sd_configure_clock;
-    param->hart_id = BOARD_RUNNING_CORE;
-    param->delay_ms = board_delay_ms;
-
-    init_apis->cd_io_init = init_sdxc_cd_pin;
-    init_apis->cmd_io_init = init_sdxc_cmd_pin;
-    init_apis->clk_data_io_init = init_sdxc_clk_data_pins;
-#if defined(BOARD_APP_EMMC_SUPPORT_DS) && (BOARD_APP_EMMC_SUPPORT_DS == 1)
+    param->base = EMMC_SDXC_BASE;
+    param->clock_init_func = sd1_configure_clock;
+    param->hart_id = RUN_CORE;
+    param->delay_ms = system_delay_ms;
+
+    init_apis->cd_io_init = sdxc1_cd_pin;
+    init_apis->cmd_io_init = sdxc1_cmd_pin;
+    init_apis->clk_data_io_init = sdxc1_clk_data_pins;
+#if defined(EMMC_SUPPORT_DS) && (EMMC_SUPPORT_DS == 1)
     init_apis->ds_io_init = init_sdxc_ds_pin;
     support_ds = true;
 #endif
 
-#if defined(BOARD_APP_EMMC_SUPPORT_3V3) && (BOARD_APP_EMMC_SUPPORT_3V3 == 1)
+#if defined(EMMC_SUPPORT_3V3) && (EMMC_SUPPORT_3V3 == 1)
     param->host_flags |= HPM_SDMMC_HOST_SUPPORT_3V3;
 #endif
     bool support_1v8 = false;
@@ -147,15 +149,15 @@ ATTR_WEAK hpm_stat_t board_init_emmc_host_params(sdmmc_host_t *host, SDMMCHOST_T
     bool support_8bit = false;
     bool support_vsel = false;
     bool support_pwr = false;
-#if defined(BOARD_APP_EMMC_SUPPORT_1V8) && (BOARD_APP_EMMC_SUPPORT_1V8 == 1)
+#if defined(EMMC_SUPPORT_1V8) && (EMMC_SUPPORT_1V8 == 1)
     param->host_flags |= HPM_SDMMC_HOST_SUPPORT_1V8;
     support_1v8 = true;
 #endif
-#if defined(BOARD_APP_EMMC_SUPPORT_4BIT) && (BOARD_APP_EMMC_SUPPORT_4BIT == 1)
+#if defined(EMMC_SUPPORT_4BIT) && (EMMC_SUPPORT_4BIT == 1)
     param->host_flags |= HPM_SDMMC_HOST_SUPPORT_4BIT;
     support_4bit = true;
 #endif
-#if defined(BOARD_APP_EMMC_SUPPORT_8BIT) && (BOARD_APP_EMMC_SUPPORT_8BIT == 1)
+#if defined(EMMC_SUPPORT_8BIT) && (EMMC_SUPPORT_8BIT == 1)
     param->host_flags |= HPM_SDMMC_HOST_SUPPORT_4BIT | HPM_SDMMC_HOST_SUPPORT_8BIT;
     support_8bit = true;
     support_4bit = true;
@@ -170,27 +172,27 @@ ATTR_WEAK hpm_stat_t board_init_emmc_host_params(sdmmc_host_t *host, SDMMCHOST_T
         param->host_flags |= HPM_SDMMC_HOST_SUPPORT_DDR;
     }
 
-#if defined(BOARD_APP_EMMC_SUPPORT_DS) && (BOARD_APP_EMMC_SUPPORT_DS == 1)
+#if defined(EMMC_SUPPORT_DS) && (EMMC_SUPPORT_DS == 1)
     param->host_flags |= HPM_SDMMC_HOST_SUPPORT_DATA_STROBE;
 #endif
 
-#if defined(BOARD_APP_EMMC_SUPPORT_POWER_SWITCH) && (BOARD_APP_EMMC_SUPPORT_POWER_SWITCH == 1)
+#if defined(EMMC_SUPPORT_POWER_SWITCH) && (EMMC_SUPPORT_POWER_SWITCH == 1)
     param->host_flags |= HPM_SDMMC_HOST_SUPPORT_POWER_SWITCH;
     support_pwr = true;
     init_apis->pwr_io_init = init_sdxc_pwr_pin;
 #endif
 
-#if defined(BOARD_APP_EMMC_SUPPORT_VOLTAGE_SWITCH) && (BOARD_APP_EMMC_SUPPORT_VOLTAGE_SWITCH == 1)
+#if defined(EMMC_SUPPORT_VOLTAGE_SWITCH) && (EMMC_SUPPORT_VOLTAGE_SWITCH == 1)
     param->host_flags |= HPM_SDMMC_HOST_SUPPORT_VOLTAGE_SWITCH;
     support_vsel = true;
     init_apis->vsel_io_init = init_sdxc_vsel_pin;
 #endif
 
     if (support_vsel) {
-#if defined(BOARD_APP_EMMC_VOLTAGE_SWITCH_USING_GPIO) && (BOARD_APP_EMMC_VOLTAGE_SWITCH_USING_GPIO == 1)
+#if defined(EMMC_VOLTAGE_SWITCH_USING_GPIO) && (EMMC_VOLTAGE_SWITCH_USING_GPIO == 1)
         io_data->vsel_pin.use_gpio = true;
-        io_data->vsel_pin.gpio_pin = BOARD_APP_EMMC_VSEL_PIN;
-#if defined(BOARD_APP_EMMC_VOLTAGE_SWITCH_PIN_POL) && (BOARD_APP_EMMC_VOLTAGE_SWITCH_PIN_POL == 1)
+        io_data->vsel_pin.gpio_pin = EMMC_VSEL_PIN;
+#if defined(EMMC_VOLTAGE_SWITCH_PIN_POL) && (EMMC_VOLTAGE_SWITCH_PIN_POL == 1)
         io_data->vsel_pin.polarity = 1;
 #else
         io_data->vsel_pin.polarity = 0;
@@ -201,10 +203,10 @@ ATTR_WEAK hpm_stat_t board_init_emmc_host_params(sdmmc_host_t *host, SDMMCHOST_T
 #endif
     }
     if (support_pwr) {
-#if defined(BOARD_APP_EMMC_POWER_SWITCH_USING_GPIO) && (BOARD_APP_EMMC_POWER_SWITCH_USING_GPIO == 1)
+#if defined(EMMC_POWER_SWITCH_USING_GPIO) && (EMMC_POWER_SWITCH_USING_GPIO == 1)
         io_data->pwr_pin.use_gpio = true;
-        io_data->pwr_pin.gpio_pin = BOARD_APP_EMMC_POWER_SWITCH_PIN;
-#if defined(BOARD_APP_EMMC_POWER_SWITCH_PIN_POL) && (BOARD_APP_EMMC_POWER_SWITCH_PIN_POL == 1)
+        io_data->pwr_pin.gpio_pin = EMMC_POWER_SWITCH_PIN;
+#if defined(EMMC_POWER_SWITCH_PIN_POL) && (EMMC_POWER_SWITCH_PIN_POL == 1)
         io_data->pwr_pin.polarity = true;
 #else
         io_data->pwr_pin.polarity = false;
@@ -217,64 +219,64 @@ ATTR_WEAK hpm_stat_t board_init_emmc_host_params(sdmmc_host_t *host, SDMMCHOST_T
     return status_success;
 }
 
-#if !defined(BOARD_APP_SDIO_SUPPORT_3V3) && defined(BOARD_APP_SDCARD_SUPPORT_3V3)
-#define BOARD_APP_SDIO_SUPPORT_3V3 BOARD_APP_SDCARD_SUPPORT_3V3
+#if !defined(SDIO_SUPPORT_3V3) && defined(SDCARD_SUPPORT_3V3)
+#define SDIO_SUPPORT_3V3 SDCARD_SUPPORT_3V3
 #endif
 
-#if !defined(BOARD_APP_SDIO_SUPPORT_1V8) && defined(BOARD_APP_SDCARD_SUPPORT_1V8)
-#define BOARD_APP_SDIO_SUPPORT_1V8 BOARD_APP_SDCARD_SUPPORT_1V8
+#if !defined(SDIO_SUPPORT_1V8) && defined(SDCARD_SUPPORT_1V8)
+#define SDIO_SUPPORT_1V8 SDCARD_SUPPORT_1V8
 #endif
 
-#if !defined(BOARD_APP_SDIO_SUPPORT_4BIT) && defined(BOARD_APP_SDCARD_SUPPORT_4BIT)
-#define BOARD_APP_SDIO_SUPPORT_4BIT BOARD_APP_SDCARD_SUPPORT_4BIT
+#if !defined(SDIO_SUPPORT_4BIT) && defined(SDCARD_SUPPORT_4BIT)
+#define SDIO_SUPPORT_4BIT SDCARD_SUPPORT_4BIT
 #endif
 
-#if !defined(BOARD_APP_SDIO_SUPPORT_CARD_DETECTION) && defined(BOARD_APP_SDCARD_SUPPORT_CARD_DETECTION)
-#define BOARD_APP_SDIO_SUPPORT_CARD_DETECTION BOARD_APP_SDCARD_SUPPORT_CARD_DETECTION
+#if !defined(SDIO_SUPPORT_CARD_DETECTION) && defined(SDCARD_SUPPORT_CARD_DETECTION)
+#define SDIO_SUPPORT_CARD_DETECTION SDCARD_SUPPORT_CARD_DETECTION
 #endif
 
-#if !defined(BOARD_APP_SDIO_SUPPORT_POWER_SWITCH) && defined(BOARD_APP_SDCARD_SUPPORT_POWER_SWITCH)
-#define BOARD_APP_SDIO_SUPPORT_POWER_SWITCH BOARD_APP_SDCARD_SUPPORT_POWER_SWITCH
+#if !defined(SDIO_SUPPORT_POWER_SWITCH) && defined(SDCARD_SUPPORT_POWER_SWITCH)
+#define SDIO_SUPPORT_POWER_SWITCH SDCARD_SUPPORT_POWER_SWITCH
 #endif
 
-#if !defined(BOARD_APP_SDIO_SUPPORT_VOLTAGE_SWITCH) && defined(BOARD_APP_SDCARD_SUPPORT_VOLTAGE_SWITCH)
-#define BOARD_APP_SDIO_SUPPORT_VOLTAGE_SWITCH BOARD_APP_SDCARD_SUPPORT_VOLTAGE_SWITCH
+#if !defined(SDIO_SUPPORT_VOLTAGE_SWITCH) && defined(SDCARD_SUPPORT_VOLTAGE_SWITCH)
+#define SDIO_SUPPORT_VOLTAGE_SWITCH SDCARD_SUPPORT_VOLTAGE_SWITCH
 #endif
 
-#if !defined(BOARD_APP_SDIO_VOLTAGE_SWITCH_USING_GPIO) && defined(BOARD_APP_SDCARD_VOLTAGE_SWITCH_USING_GPIO)
-#define BOARD_APP_SDIO_VOLTAGE_SWITCH_USING_GPIO BOARD_APP_SDCARD_VOLTAGE_SWITCH_USING_GPIO
+#if !defined(SDIO_VOLTAGE_SWITCH_USING_GPIO) && defined(SDCARD_VOLTAGE_SWITCH_USING_GPIO)
+#define SDIO_VOLTAGE_SWITCH_USING_GPIO SDCARD_VOLTAGE_SWITCH_USING_GPIO
 #endif
 
-#if !defined(BOARD_APP_SDIO_VSEL_PIN) && defined(BOARD_APP_SDCARD_VSEL_PIN)
-#define BOARD_APP_SDIO_VSEL_PIN BOARD_APP_SDCARD_VSEL_PIN
+#if !defined(SDIO_VSEL_PIN) && defined(SDCARD_VSEL_PIN)
+#define SDIO_VSEL_PIN SDCARD_VSEL_PIN
 #endif
 
-#if !defined(BOARD_APP_SDIO_VOLTAGE_SWITCH_PIN_POL) && defined(BOARD_APP_SDCARD_VOLTAGE_SWITCH_PIN_POL)
-#define BOARD_APP_SDIO_VOLTAGE_SWITCH_PIN_POL BOARD_APP_SDCARD_VOLTAGE_SWITCH_PIN_POL
+#if !defined(SDIO_VOLTAGE_SWITCH_PIN_POL) && defined(SDCARD_VOLTAGE_SWITCH_PIN_POL)
+#define SDIO_VOLTAGE_SWITCH_PIN_POL SDCARD_VOLTAGE_SWITCH_PIN_POL
 #endif
 
-#if !defined(BOARD_APP_SDIO_CARD_DETECTION_USING_GPIO) && defined(BOARD_APP_SDCARD_CARD_DETECTION_USING_GPIO)
-#define BOARD_APP_SDIO_CARD_DETECTION_USING_GPIO BOARD_APP_SDCARD_CARD_DETECTION_USING_GPIO
+#if !defined(SDIO_CARD_DETECTION_USING_GPIO) && defined(SDCARD_CARD_DETECTION_USING_GPIO)
+#define SDIO_CARD_DETECTION_USING_GPIO SDCARD_CARD_DETECTION_USING_GPIO
 #endif
 
-#if !defined(BOARD_APP_SDIO_CARD_DETECTION_PIN) && defined(BOARD_APP_SDCARD_CARD_DETECTION_PIN)
-#define BOARD_APP_SDIO_CARD_DETECTION_PIN BOARD_APP_SDCARD_CARD_DETECTION_PIN
+#if !defined(SDIO_CARD_DETECTION_PIN) && defined(SDCARD_CARD_DETECTION_PIN)
+#define SDIO_CARD_DETECTION_PIN SDCARD_CARD_DETECTION_PIN
 #endif
 
-#if !defined(BOARD_APP_SDIO_CARD_DETECTION_PIN_POL) && defined(BOARD_APP_SDCARD_CARD_DETECTION_PIN_POL)
-#define BOARD_APP_SDIO_CARD_DETECTION_PIN_POL BOARD_APP_SDCARD_CARD_DETECTION_PIN_POL
+#if !defined(SDIO_CARD_DETECTION_PIN_POL) && defined(SDCARD_CARD_DETECTION_PIN_POL)
+#define SDIO_CARD_DETECTION_PIN_POL SDCARD_CARD_DETECTION_PIN_POL
 #endif
 
-#if !defined(BOARD_APP_SDIO_POWER_SWITCH_USING_GPIO) && defined(BOARD_APP_SDCARD_POWER_SWITCH_USING_GPIO)
-#define BOARD_APP_SDIO_POWER_SWITCH_USING_GPIO BOARD_APP_SDCARD_POWER_SWITCH_USING_GPIO
+#if !defined(SDIO_POWER_SWITCH_USING_GPIO) && defined(SDCARD_POWER_SWITCH_USING_GPIO)
+#define SDIO_POWER_SWITCH_USING_GPIO SDCARD_POWER_SWITCH_USING_GPIO
 #endif
 
-#if !defined(BOARD_APP_SDIO_POWER_SWITCH_PIN_POL) && defined(BOARD_APP_SDCARD_POWER_SWITCH_PIN_POL)
-#define BOARD_APP_SDIO_POWER_SWITCH_PIN_POL BOARD_APP_SDCARD_POWER_SWITCH_PIN_POL
+#if !defined(SDIO_POWER_SWITCH_PIN_POL) && defined(SDCARD_POWER_SWITCH_PIN_POL)
+#define SDIO_POWER_SWITCH_PIN_POL SDCARD_POWER_SWITCH_PIN_POL
 #endif
 
-#if !defined(BOARD_APP_SDIO_POWER_SWITCH_PIN) && defined(BOARD_APP_SDCARD_POWER_SWITCH_PIN)
-#define BOARD_APP_SDIO_POWER_SWITCH_PIN BOARD_APP_SDCARD_POWER_SWITCH_PIN
+#if !defined(SDIO_POWER_SWITCH_PIN) && defined(SDCARD_POWER_SWITCH_PIN)
+#define SDIO_POWER_SWITCH_PIN SDCARD_POWER_SWITCH_PIN
 #endif
 
 
@@ -286,15 +288,15 @@ ATTR_WEAK hpm_stat_t board_init_sdio_host_params(sdmmc_host_t *host, SDMMCHOST_T
     sdmmc_io_init_apis_t *init_apis = &host->host_param.io_init_apis;
     hpm_sdmmc_extra_io_data_t *io_data = &host->host_param.io_data;
     param->base = base;
-    param->clock_init_func = board_sd_configure_clock;
-    param->hart_id = BOARD_RUNNING_CORE;
-    param->delay_ms = board_delay_ms;
+    param->clock_init_func = sd1_configure_clock;
+    param->hart_id = RUN_CORE;
+    param->delay_ms = system_delay_ms;
 
-    init_apis->cd_io_init = init_sdxc_cd_pin;
-    init_apis->cmd_io_init = init_sdxc_cmd_pin;
-    init_apis->clk_data_io_init = init_sdxc_clk_data_pins;
+    init_apis->cd_io_init = sdxc1_cd_pin;
+    init_apis->cmd_io_init = sdxc1_cmd_pin;
+    init_apis->clk_data_io_init = sdxc1_clk_data_pins;
 
-#if defined(BOARD_APP_SDIO_SUPPORT_3V3) && (BOARD_APP_SDIO_SUPPORT_3V3 == 1)
+#if defined(SDIO_SUPPORT_3V3) && (SDIO_SUPPORT_3V3 == 1)
     param->host_flags |= HPM_SDMMC_HOST_SUPPORT_3V3;
 #endif
     bool support_1v8 = false;
@@ -302,11 +304,11 @@ ATTR_WEAK hpm_stat_t board_init_sdio_host_params(sdmmc_host_t *host, SDMMCHOST_T
     bool support_vsel = false;
     bool support_pwr = false;
     bool support_cd = false;
-#if defined(BOARD_APP_SDIO_SUPPORT_1V8) && (BOARD_APP_SDIO_SUPPORT_1V8 == 1)
+#if defined(SDIO_SUPPORT_1V8) && (SDIO_SUPPORT_1V8 == 1)
     param->host_flags |= HPM_SDMMC_HOST_SUPPORT_1V8;
     support_1v8 = true;
 #endif
-#if defined(BOARD_APP_SDIO_SUPPORT_4BIT) && (BOARD_APP_SDIO_SUPPORT_4BIT == 1)
+#if defined(SDIO_SUPPORT_4BIT) && (SDIO_SUPPORT_4BIT == 1)
     param->host_flags |= HPM_SDMMC_HOST_SUPPORT_4BIT;
     support_4bit = true;
 #endif
@@ -317,29 +319,29 @@ ATTR_WEAK hpm_stat_t board_init_sdio_host_params(sdmmc_host_t *host, SDMMCHOST_T
         }
     }
 
-#if defined(BOARD_APP_SDIO_SUPPORT_CARD_DETECTION) && (BOARD_APP_SDIO_SUPPORT_CARD_DETECTION == 1)
+#if defined(SDIO_SUPPORT_CARD_DETECTION) && (SDIO_SUPPORT_CARD_DETECTION == 1)
     param->host_flags |= HPM_SDMMC_HOST_SUPPORT_CARD_DETECTION;
     support_cd = true;
-    init_apis->cd_io_init = init_sdxc_cd_pin;
+    init_apis->cd_io_init = sdxc1_cd_pin;
 #endif
 
-#if defined(BOARD_APP_SDIO_SUPPORT_POWER_SWITCH) && (BOARD_APP_SDIO_SUPPORT_POWER_SWITCH == 1)
+#if defined(SDIO_SUPPORT_POWER_SWITCH) && (SDIO_SUPPORT_POWER_SWITCH == 1)
     param->host_flags |= HPM_SDMMC_HOST_SUPPORT_POWER_SWITCH;
     support_pwr = true;
     init_apis->pwr_io_init = init_sdxc_pwr_pin;
 #endif
 
-#if defined(BOARD_APP_SDIO_SUPPORT_VOLTAGE_SWITCH) && (BOARD_APP_SDIO_SUPPORT_VOLTAGE_SWITCH == 1)
+#if defined(SDIO_SUPPORT_VOLTAGE_SWITCH) && (SDIO_SUPPORT_VOLTAGE_SWITCH == 1)
     param->host_flags |= HPM_SDMMC_HOST_SUPPORT_VOLTAGE_SWITCH;
     support_vsel = true;
-    init_apis->vsel_io_init = init_sdxc_vsel_pin;
+    init_apis->vsel_io_init = sdxc1_vsel_pin;
 #endif
 
     if (support_vsel) {
-#if defined(BOARD_APP_SDIO_VOLTAGE_SWITCH_USING_GPIO) && (BOARD_APP_SDIO_VOLTAGE_SWITCH_USING_GPIO == 1)
+#if defined(SDIO_VOLTAGE_SWITCH_USING_GPIO) && (SDIO_VOLTAGE_SWITCH_USING_GPIO == 1)
         io_data->vsel_pin.use_gpio = true;
-        io_data->vsel_pin.gpio_pin = BOARD_APP_SDIO_VSEL_PIN;
-#if defined(BOARD_APP_SDIO_VOLTAGE_SWITCH_PIN_POL) && (BOARD_APP_SDIO_VOLTAGE_SWITCH_PIN_POL == 1)
+        io_data->vsel_pin.gpio_pin = SDIO_VSEL_PIN;
+#if defined(SDIO_VOLTAGE_SWITCH_PIN_POL) && (SDIO_VOLTAGE_SWITCH_PIN_POL == 1)
         io_data->vsel_pin.polarity = 1;
 #else
         io_data->vsel_pin.polarity = 0;
@@ -350,10 +352,10 @@ ATTR_WEAK hpm_stat_t board_init_sdio_host_params(sdmmc_host_t *host, SDMMCHOST_T
 #endif
     }
     if (support_cd) {
-#if defined(BOARD_APP_SDIO_CARD_DETECTION_USING_GPIO) && (BOARD_APP_SDIO_CARD_DETECTION_USING_GPIO == 1)
+#if defined(SDIO_CARD_DETECTION_USING_GPIO) && (SDIO_CARD_DETECTION_USING_GPIO == 1)
         io_data->cd_pin.use_gpio = true;
-        io_data->cd_pin.gpio_pin = BOARD_APP_SDIO_CARD_DETECTION_PIN;
-#if defined(BOARD_APP_SDIO_CARD_DETECTION_PIN_POL) && (BOARD_APP_SDIO_CARD_DETECTION_PIN_POL == 1)
+        io_data->cd_pin.gpio_pin = SDIO_CARD_DETECTION_PIN;
+#if defined(SDIO_CARD_DETECTION_PIN_POL) && (SDIO_CARD_DETECTION_PIN_POL == 1)
         io_data->cd_pin.polarity = 1;
 #else
         io_data->cd_pin.polarity = 0;
@@ -365,10 +367,10 @@ ATTR_WEAK hpm_stat_t board_init_sdio_host_params(sdmmc_host_t *host, SDMMCHOST_T
     }
 
     if (support_pwr) {
-#if defined(BOARD_APP_SDIO_POWER_SWITCH_USING_GPIO) && (BOARD_APP_SDIO_POWER_SWITCH_USING_GPIO == 1)
+#if defined(SDIO_POWER_SWITCH_USING_GPIO) && (SDIO_POWER_SWITCH_USING_GPIO == 1)
         io_data->pwr_pin.use_gpio = true;
-        io_data->pwr_pin.gpio_pin = BOARD_APP_SDIO_POWER_SWITCH_PIN;
-#if defined(BOARD_APP_SDIO_POWER_SWITCH_PIN_POL) && (BOARD_APP_SDIO_POWER_SWITCH_PIN_POL == 1)
+        io_data->pwr_pin.gpio_pin = SDIO_POWER_SWITCH_PIN;
+#if defined(SDIO_POWER_SWITCH_PIN_POL) && (SDIO_POWER_SWITCH_PIN_POL == 1)
         io_data->pwr_pin.polarity = true;
 #else
         io_data->pwr_pin.polarity = false;

controller_yy_app/user_src/main.c

@@ -1,573 +1,93 @@
-///*
-// * Copyright (c) 2021 HPMicro
-// *
-// * SPDX-License-Identifier: BSD-3-Clause
-// *
-// */
-
-//#include <stdio.h>
-//#include "board.h"
-
-//#include "test.h"
-//#ifdef TEST_EN
-//#include "bsp_V8M_YY_led.h"
-//#include "bsp_V8M_YY_pwm.h"
-//#include "bsp_V8M_YY_adc.h"
-//#include "hard_system.h"
-//#include "hard_system_time.h"
-//#include "hard_system_delay.h"
-//#include "hard_system_timer.h"
-//#include "hard_imu_uart3.h"
-//#include "hard_rc_sbus.h"
-//#include "hard_can.h"
-//#include "hard_sbus_out.h"
-//#include "main.h"
-//#endif
-///*
-//1 手册：中断源优先级，有效值为 0 到 7。
-//2 注意：内存缓存问题 catch
-//  如果DMA要访问​ → 必须用非缓存宏
-//  如果多核要共享​ → 必须用非缓存宏
-//  如果频繁被中断更新​ → 建议用非缓存宏
-//  其他情况​ → 不用修饰，让编译器优化
-//3 注意配置顺序 IO-时钟-外设
-//4 XDMA，作为主设备连接到 AXI 系统总线  HDMA，作为主设备连接到 AHB 外设总线 
-//  当 XDMA 的 destination 为 DRAM 时，如果 burst 大于等于 16，那 destsize 必须为 64bit。
-//  DMAMUX 的输出 0∼7 连接到外设总线 DMA 控制器 HDMA，DMAMUX 的输出 8∼15 连接到系统总线 DMA 控制器 XDMA
-//  它们都连接在统一的 DMAMUX（DMA 多路复用器）
-//  DMAMUX将所有外设的 DMA 请求（Request）统一管理，然后根据你的配置分配给 HDMA 或 XDMA 的任意空闲通道
-//*/
-
-//static void test_hard(void)
-//{
-//  // v8m_yy_led_test();
-//    // v8m_yy_motor_pwm_test();
-//     v8m_yy_adc_test();
-//    // timer0_test();
-//    // cpu_delay_test();
-//    // timer1_test();
-//    // can2_test();
-//    // imu_uart3_test();
-//    // uart2_sbus_test();
-//    // system_test();
-//    // sbus_uart2_out_test();
-//}
-//int main(void)
-//{
-
-//    board_init();
-//    printf("hello world\n");
-
-//    test_hard();
-//    return 0;
-//}
-//// DMA 最大4k
-
 /*
- * Copyright (c) 2021-2024 HPMicro
+ * Copyright (c) 2021 HPMicro
  *
  * SPDX-License-Identifier: BSD-3-Clause
  *
  */
 
+#include <stdio.h>
 #include "board.h"
-#include "hpm_debug_console.h"
-#include "hpm_adc12_drv.h"
-#include "hpm_pwm_drv.h"
-#include "hpm_trgm_drv.h"
-#include "hpm_trgmmux_src.h"
-#define __ADC12_USE_SW_TRIG
-#ifndef APP_ADC12_CORE
-#define APP_ADC12_CORE BOARD_RUNNING_CORE
-#endif
-
-#define APP_ADC12_CH_SAMPLE_CYCLE            (20U)
-#define APP_ADC12_CH_WDOG_EVENT              (1 << BOARD_APP_ADC12_CH_1)
-
-#define APP_ADC12_SEQ_START_POS              (0U)
-#define APP_ADC12_SEQ_DMA_BUFF_LEN_IN_4BYTES (1024U)
-#define APP_ADC12_SEQ_IRQ_EVENT              adc12_event_seq_single_complete
-
-#define APP_ADC12_HW_TRIG_SRC_PWM_REFCH_A    (8U)
-#define APP_ADC12_HW_TRIG_SRC                BOARD_APP_ADC12_HW_TRIG_SRC
-#define APP_ADC12_HW_TRGM                    BOARD_APP_ADC12_HW_TRGM
-#define APP_ADC12_HW_TRGM_IN                 BOARD_APP_ADC12_HW_TRGM_IN
-#define APP_ADC12_HW_TRGM_OUT_SEQ            BOARD_APP_ADC12_HW_TRGM_OUT_SEQ
-#define APP_ADC12_HW_TRGM_OUT_PMT            BOARD_APP_ADC12_HW_TRGM_OUT_PMT
-
-#define APP_ADC12_PMT_TRIG_CH                BOARD_APP_ADC12_PMT_TRIG_CH
-#define APP_ADC12_PMT_DMA_BUFF_LEN_IN_4BYTES ADC_SOC_PMT_MAX_DMA_BUFF_LEN_IN_4BYTES
-#define APP_ADC12_PMT_IRQ_EVENT              adc12_event_trig_complete
 
-#ifndef APP_ADC12_TRIG_SRC_FREQUENCY
-#define APP_ADC12_TRIG_SRC_FREQUENCY         (20000U)
+#include "test.h"
+#ifdef TEST_EN
+#include "bsp_V8M_YY_led.h"
+#include "bsp_V8M_YY_pwm.h"
+ #include "bsp_V8M_YY_adc.h"
+#include "hard_system.h"
+#include "hard_system_time.h"
+#include "hard_system_delay.h"
+#include "hard_system_timer.h"
+#include "hard_imu_uart3.h"
+#include "hard_rc_sbus.h"
+#include "hard_can.h"
+#include "hard_sbus_out.h"
+#include "main.h"
+#include "hpm_math.h"
 #endif
-
-ATTR_PLACE_AT_NONCACHEABLE_WITH_ALIGNMENT(ADC_SOC_DMA_ADDR_ALIGNMENT) uint32_t seq_buff[APP_ADC12_SEQ_DMA_BUFF_LEN_IN_4BYTES];
-ATTR_PLACE_AT_NONCACHEABLE_WITH_ALIGNMENT(ADC_SOC_DMA_ADDR_ALIGNMENT) uint32_t pmt_buff[APP_ADC12_PMT_DMA_BUFF_LEN_IN_4BYTES];
-
-uint8_t seq_adc_channel[] = {BOARD_APP_ADC12_CH_1};
-uint8_t trig_adc_channel[] = {BOARD_APP_ADC12_CH_1};
-
-__IO uint8_t seq_complete_flag;
-__IO uint8_t trig_complete_flag;
-__IO uint32_t res_out_of_thr_flag;
-
-static uint8_t get_adc_conv_mode(void)
-{
-    uint8_t ch;
-
-    while (1) {
-        printf("1. Oneshot    mode\n");
-        printf("2. Period     mode\n");
-        printf("3. Sequence   mode\n");
-        printf("4. Preemption mode\n");
-
-        printf("Please enter one of ADC conversion modes above (e.g. 1 or 2 ...): ");
-        printf("%c\n", ch = getchar());
-        ch -= '0' + 1;
-        if (ch > adc12_conv_mode_preemption) {
-            printf("The ADC mode is not supported!\n");
-        } else {
-            return ch;
-        }
-    }
-}
-
-SDK_DECLARE_EXT_ISR_M(BOARD_APP_ADC12_IRQn, isr_adc12)
-void isr_adc12(void)
-{
-    uint32_t status;
-
-    status = adc12_get_status_flags(BOARD_APP_ADC12_BASE);
-
-    /* Clear status */
-    adc12_clear_status_flags(BOARD_APP_ADC12_BASE, status);
-
-    if (ADC12_INT_STS_SEQ_CVC_GET(status)) {
-        /* Set flag to read memory data */
-        seq_complete_flag = 1;
-    }
-
-    if (ADC12_INT_STS_TRIG_CMPT_GET(status)) {
-        /* Set flag to read memory data */
-        trig_complete_flag = 1;
-    }
-
-    if (ADC12_INT_STS_WDOG_GET(status) & APP_ADC12_CH_WDOG_EVENT) {
-        adc12_disable_interrupts(BOARD_APP_ADC12_BASE, APP_ADC12_CH_WDOG_EVENT);
-        res_out_of_thr_flag = ADC12_INT_STS_WDOG_GET(status) & APP_ADC12_CH_WDOG_EVENT;
-    }
-}
-
-hpm_stat_t process_seq_data(uint32_t *buff, uint32_t start_pos, uint32_t len)
-{
-    adc12_seq_dma_data_t *dma_data = (adc12_seq_dma_data_t *)buff;
-
-    if (ADC12_IS_SEQ_DMA_BUFF_LEN_INVLAID(len)) {
-        return status_invalid_argument;
-    }
-
-    for (uint32_t i = start_pos; i < start_pos + len; i++) {
-        printf("Sequence Mode - %s - ", BOARD_APP_ADC12_NAME);
-        printf("Cycle Bit: %02d - ",   dma_data[i].cycle_bit);
-        printf("Sequence Number:%02d - ", dma_data[i].seq_num);
-        printf("ADC Channel: %02d - ",  dma_data[i].adc_ch);
-        printf("Result: 0x%04x\n", dma_data[i].result);
-    }
-
-    return status_success;
-}
-
-hpm_stat_t process_pmt_data(uint32_t *buff, int32_t start_pos, uint32_t len)
-{
-    adc12_pmt_dma_data_t *dma_data = (adc12_pmt_dma_data_t *)buff;
-
-    if (ADC12_IS_PMT_DMA_BUFF_LEN_INVLAID(len)) {
-        return status_invalid_argument;
-    }
-
-    for (uint32_t i = start_pos; i < start_pos + len; i++) {
-        if (dma_data[i].cycle_bit) {
-            printf("Preemption Mode - %s - ", BOARD_APP_ADC12_NAME);
-            printf("Trigger Channel: %02d - ", dma_data[i].trig_ch);
-            printf("Cycle Bit: %02d - ", dma_data[i].cycle_bit);
-            printf("Sequence Number: %02d - ", dma_data[i].seq_num);
-            printf("ADC Channel: %02d - ", dma_data[i].adc_ch);
-            printf("Result: 0x%04x\n", dma_data[i].result);
-            dma_data[i].cycle_bit = 0;
-        } else {
-            printf("invalid data\n");
-        }
-    }
-
-    return status_success;
-}
-
-void init_trigger_source(PWM_Type *ptr)
-{
-    pwm_cmp_config_t pwm_cmp_cfg;
-    pwm_output_channel_t pwm_output_ch_cfg;
-
-    int mot_clock_freq;
-
-    mot_clock_freq = clock_get_frequency(BOARD_APP_ADC12_HW_TRIG_SRC_CLK_NAME);
-    /* reload value */
-    pwm_set_reload(ptr, 0, (mot_clock_freq/APP_ADC12_TRIG_SRC_FREQUENCY) - 1);
-
-    /* Set a comparator */
-    memset(&pwm_cmp_cfg, 0x00, sizeof(pwm_cmp_config_t));
-    pwm_cmp_cfg.enable_ex_cmp  = false;
-    pwm_cmp_cfg.mode           = pwm_cmp_mode_output_compare;
-    pwm_cmp_cfg.update_trigger = pwm_shadow_register_update_on_shlk;
-
-    /* Select comp8 and trigger at the middle of a pwm cycle */
-    pwm_cmp_cfg.cmp = ((mot_clock_freq/APP_ADC12_TRIG_SRC_FREQUENCY) - 1) >> 1;
-    pwm_config_cmp(ptr, APP_ADC12_HW_TRIG_SRC_PWM_REFCH_A, &pwm_cmp_cfg);
-
-    /* Issue a shadow lock */
-    pwm_issue_shadow_register_lock_event(APP_ADC12_HW_TRIG_SRC);
-
-    /* Set comparator channel to generate a trigger signal */
-    pwm_output_ch_cfg.cmp_start_index = APP_ADC12_HW_TRIG_SRC_PWM_REFCH_A;   /* start channel */
-    pwm_output_ch_cfg.cmp_end_index   = APP_ADC12_HW_TRIG_SRC_PWM_REFCH_A;   /* end channel */
-    pwm_output_ch_cfg.invert_output   = false;
-    pwm_config_output_channel(ptr, APP_ADC12_HW_TRIG_SRC_PWM_REFCH_A, &pwm_output_ch_cfg);
-
-	/* Start the comparator counter */
-    pwm_start_counter(ptr);
-}
-
-void init_trigger_mux(TRGM_Type *ptr, uint8_t input, uint8_t output)
-{
-    trgm_output_t trgm_output_cfg;
-
-    trgm_output_cfg.invert = false;
-    trgm_output_cfg.type = trgm_output_same_as_input;
-
-    trgm_output_cfg.input  = input;
-    trgm_output_config(ptr, output, &trgm_output_cfg);
-}
-
-void init_trigger_target(ADC12_Type *ptr, uint8_t trig_ch)
-{
-    adc12_pmt_config_t pmt_cfg;
-
-    pmt_cfg.trig_len = sizeof(trig_adc_channel);
-    pmt_cfg.trig_ch = trig_ch;
-
-    for (int i = 0; i < pmt_cfg.trig_len; i++) {
-        pmt_cfg.adc_ch[i] = trig_adc_channel[i];
-        pmt_cfg.inten[i] = false;
-    }
-
-    pmt_cfg.inten[pmt_cfg.trig_len - 1] = true;
-
-    adc12_set_pmt_config(ptr, &pmt_cfg);
-}
-
-hpm_stat_t init_common_config(adc12_conversion_mode_t conv_mode)
-{
-    adc12_config_t cfg;
-
-    /* initialize an ADC instance */
-    adc12_get_default_config(&cfg);
-
-    cfg.res            = adc12_res_12_bits;
-    cfg.conv_mode      = conv_mode;
-    cfg.diff_sel       = adc12_sample_signal_single_ended;
-    cfg.adc_clk_div    = adc12_clock_divider_3;
-    cfg.sel_sync_ahb   = (clk_adc_src_ahb0 == clock_get_source(BOARD_APP_ADC12_CLK_NAME)) ? true : false;
-
-    if (cfg.conv_mode == adc12_conv_mode_sequence ||
-        cfg.conv_mode == adc12_conv_mode_preemption) {
-        cfg.adc_ahb_en = true;
-    }
-
-    /* adc12 initialization */
-    if (adc12_init(BOARD_APP_ADC12_BASE, &cfg) == status_success) {
-        /* enable irq */
-        intc_m_enable_irq_with_priority(BOARD_APP_ADC12_IRQn, 1);
-        return status_success;
-    } else {
-        printf("%s initialization failed!\n", BOARD_APP_ADC12_NAME);
-        return status_fail;
-    }
-}
-
-void channel_result_out_of_threshold_handler(void)
-{
-    adc12_channel_threshold_t threshold;
-    uint32_t i = 31;
-
-    if (res_out_of_thr_flag) {
-        while (i--) {
-            if ((res_out_of_thr_flag >> i) & 0x01) {
-                adc12_get_channel_threshold(BOARD_APP_ADC12_BASE, i, &threshold);
-                printf("Warning - %s [channel %02d] - Sample voltage is out of the thresholds between 0x%04x and 0x%04x !\n", BOARD_APP_ADC12_NAME, i, threshold.thshdl, threshold.thshdh);
-            }
-        }
-
-        res_out_of_thr_flag = 0;
-        adc12_enable_interrupts(BOARD_APP_ADC12_BASE, APP_ADC12_CH_WDOG_EVENT);
-    }
-}
-
-void init_oneshot_config(void)
-{
-    adc12_channel_config_t ch_cfg;
-
-    /* get a default channel config */
-    adc12_get_channel_default_config(&ch_cfg);
-
-    /* initialize an ADC channel */
-    ch_cfg.ch           = BOARD_APP_ADC12_CH_1;
-    ch_cfg.diff_sel     = adc12_sample_signal_single_ended;
-    ch_cfg.sample_cycle = APP_ADC12_CH_SAMPLE_CYCLE;
-
-    adc12_init_channel(BOARD_APP_ADC12_BASE, &ch_cfg);
-
-    adc12_set_nonblocking_read(BOARD_APP_ADC12_BASE);
-}
-
-void oneshot_handler(void)
-{
-    uint16_t result;
-
-    if (adc12_get_oneshot_result(BOARD_APP_ADC12_BASE, BOARD_APP_ADC12_CH_1, &result) == status_success) {
-        if (adc12_is_nonblocking_mode(BOARD_APP_ADC12_BASE)) {
-            adc12_get_oneshot_result(BOARD_APP_ADC12_BASE, BOARD_APP_ADC12_CH_1, &result);
-        }
-        printf("Oneshot Mode - %s [channel %02d] - Result: 0x%04x\n", BOARD_APP_ADC12_NAME, BOARD_APP_ADC12_CH_1, result);
-    }
-}
-
-void init_period_config(void)
-{
-    adc12_channel_config_t ch_cfg;
-    adc12_prd_config_t prd_cfg;
-
-    /* get a default channel config */
-    adc12_get_channel_default_config(&ch_cfg);
-
-    /* initialize an ADC channel */
-    ch_cfg.ch           = BOARD_APP_ADC12_CH_1;
-    ch_cfg.diff_sel     = adc12_sample_signal_single_ended;
-    ch_cfg.sample_cycle = APP_ADC12_CH_SAMPLE_CYCLE;
-
-    adc12_init_channel(BOARD_APP_ADC12_BASE, &ch_cfg);
-
-    prd_cfg.ch           = BOARD_APP_ADC12_CH_1;
-    prd_cfg.prescale     = 22;    /* Set divider: 2^22 clocks */
-    prd_cfg.period_count = 5;     /* 104.86ms when AHB clock at 200MHz is ADC clock source */
-
-    adc12_set_prd_config(BOARD_APP_ADC12_BASE, &prd_cfg);
-}
-
-void period_handler(void)
-{
-    uint16_t result;
-
-    adc12_get_prd_result(BOARD_APP_ADC12_BASE, BOARD_APP_ADC12_CH_1, &result);
-    printf("Period Mode - %s [channel %02d] - Result: 0x%04x\n", BOARD_APP_ADC12_NAME, BOARD_APP_ADC12_CH_1, result);
-}
-
-void init_sequence_config(void)
-{
-    adc12_seq_config_t seq_cfg;
-    adc12_dma_config_t dma_cfg;
-    adc12_channel_config_t ch_cfg;
-
-    /* get a default channel config */
-    adc12_get_channel_default_config(&ch_cfg);
-
-    /* initialize an ADC channel */
-    ch_cfg.diff_sel     = adc12_sample_signal_single_ended;
-    ch_cfg.sample_cycle = APP_ADC12_CH_SAMPLE_CYCLE;
-
-    for (uint32_t i = 0; i < sizeof(seq_adc_channel); i++) {
-        ch_cfg.ch           = seq_adc_channel[i];
-        adc12_init_channel(BOARD_APP_ADC12_BASE, &ch_cfg);
-    }
-
-    /* Set a sequence config */
-    seq_cfg.seq_len    = sizeof(seq_adc_channel);
-    seq_cfg.restart_en = false;
-    seq_cfg.cont_en    = true;
-#ifndef __ADC12_USE_SW_TRIG
-    seq_cfg.hw_trig_en = true;
-    seq_cfg.sw_trig_en = false;
-#else
-    seq_cfg.hw_trig_en = false;
-    seq_cfg.sw_trig_en = true;
-#endif
-
-    for (int i = APP_ADC12_SEQ_START_POS; i < seq_cfg.seq_len; i++) {
-        seq_cfg.queue[i].seq_int_en = false;
-        seq_cfg.queue[i].ch = seq_adc_channel[i];
-    }
-
-     /* Enable the single complete interrupt for the last conversion */
-    seq_cfg.queue[seq_cfg.seq_len - 1].seq_int_en = true;
-
-    /* Initialize a sequence */
-    adc12_set_seq_config(BOARD_APP_ADC12_BASE, &seq_cfg);
-
-    /* Set a DMA config */
-    dma_cfg.start_addr         = (uint32_t *)core_local_mem_to_sys_address(APP_ADC12_CORE, (uint32_t)seq_buff);
-    dma_cfg.buff_len_in_4bytes = sizeof(seq_adc_channel);
-    dma_cfg.stop_en            = false;
-    dma_cfg.stop_pos           = 0;
-
-    /* Initialize DMA for the sequence mode */
-    adc12_init_seq_dma(BOARD_APP_ADC12_BASE, &dma_cfg);
-
-    /* Enable sequence complete interrupt */
-    adc12_enable_interrupts(BOARD_APP_ADC12_BASE, APP_ADC12_SEQ_IRQ_EVENT);
-
-#ifndef __ADC12_USE_SW_TRIG
-    /* Trigger mux initialization */
-    init_trigger_mux(APP_ADC12_HW_TRGM, APP_ADC12_HW_TRGM_IN, APP_ADC12_HW_TRGM_OUT_SEQ);
-
-    /* Trigger source initialization */
-    init_trigger_source(APP_ADC12_HW_TRIG_SRC);
-#endif
-}
-
-void sequence_handler(void)
-{
-#ifdef __ADC12_USE_SW_TRIG
-    /* SW trigger */
-    adc12_trigger_seq_by_sw(BOARD_APP_ADC12_BASE);
-#endif
-
-    while (seq_complete_flag == 0) {
-
-    }
-
-    /* Process data */
-    process_seq_data(seq_buff, APP_ADC12_SEQ_START_POS, sizeof(seq_adc_channel));
-
-    /* Clear the flag */
-    seq_complete_flag = 0;
-}
-
-void init_preemption_config(void)
-{
-    adc12_channel_config_t ch_cfg;
-
-    /* get a default channel config */
-    adc12_get_channel_default_config(&ch_cfg);
-
-    /* initialize an ADC channel */
-    ch_cfg.diff_sel     = adc12_sample_signal_single_ended;
-    ch_cfg.sample_cycle = APP_ADC12_CH_SAMPLE_CYCLE;
-
-    for (uint32_t i = 0; i < sizeof(trig_adc_channel); i++) {
-        ch_cfg.ch = trig_adc_channel[i];
-        adc12_init_channel(BOARD_APP_ADC12_BASE, &ch_cfg);
-    }
-
-    /* Trigger target initialization */
-    init_trigger_target(BOARD_APP_ADC12_BASE, APP_ADC12_PMT_TRIG_CH);
-
-    /* Set DMA start address for preemption mode */
-    adc12_init_pmt_dma(BOARD_APP_ADC12_BASE, core_local_mem_to_sys_address(APP_ADC12_CORE, (uint32_t)pmt_buff));
-
-    /* Enable trigger complete interrupt */
-    adc12_enable_interrupts(BOARD_APP_ADC12_BASE, APP_ADC12_PMT_IRQ_EVENT);
-
-#ifndef __ADC12_USE_SW_TRIG
-    /* Trigger mux initialization */
-    init_trigger_mux(APP_ADC12_HW_TRGM, APP_ADC12_HW_TRGM_IN, APP_ADC12_HW_TRGM_OUT_PMT);
-
-    /* Trigger source initialization */
-    init_trigger_source(APP_ADC12_HW_TRIG_SRC);
-#endif
-}
-
-void preemption_handler(void)
-{
-#ifdef __ADC12_USE_SW_TRIG
-    /* SW trigger */
-    adc12_trigger_pmt_by_sw(BOARD_APP_ADC12_BASE, APP_ADC12_PMT_TRIG_CH);
-#endif
-
-    /* Wait for a complete of conversion */
-    while (trig_complete_flag == 0) {
-
-    }
-
-    /* Process data */
-    process_pmt_data(pmt_buff, APP_ADC12_PMT_TRIG_CH * sizeof(adc12_pmt_dma_data_t), sizeof(trig_adc_channel));
-
-    /* Clear the flag */
-    trig_complete_flag = 0;
+/*
+1 手册：中断源优先级，有效值为 0 到 7。
+2 注意：内存缓存问题 catch
+  如果DMA要访问​ → 必须用非缓存宏
+  如果多核要共享​ → 必须用非缓存宏
+  如果频繁被中断更新​ → 建议用非缓存宏
+  其他情况​ → 不用修饰，让编译器优化
+3 注意配置顺序 IO-时钟-外设
+4 XDMA，作为主设备连接到 AXI 系统总线  HDMA，作为主设备连接到 AHB 外设总线 
+  当 XDMA 的 destination 为 DRAM 时，如果 burst 大于等于 16，那 destsize 必须为 64bit。
+  DMAMUX 的输出 0∼7 连接到外设总线 DMA 控制器 HDMA，DMAMUX 的输出 8∼15 连接到系统总线 DMA 控制器 XDMA
+  它们都连接在统一的 DMAMUX（DMA 多路复用器）
+  DMAMUX将所有外设的 DMA 请求（Request）统一管理，然后根据你的配置分配给 HDMA 或 XDMA 的任意空闲通道
+5 注意cfg文件和一些前置的工程配置文件，可能导致编译出错 运行出错 仿真不了 重点：链接文件、yaml、板级cfg文件
+*/
+uint64_t delta_time;
+#define PI (3.1415926f)
+void start_time(void)
+{
+    delta_time = hpm_csr_get_core_mcycle();
+}
+
+uint32_t get_end_time(void)
+{
+    delta_time = hpm_csr_get_core_mcycle() - delta_time;
+    return delta_time;
+}
+float theta ;
+float sin_theta;
+static void test_hard(void)
+{
+    // v8m_yy_led_test();
+    // v8m_yy_motor_pwm_test();
+    //  v8m_yy_adc_test();
+    // timer0_test();
+    // cpu_delay_test();
+    // timer1_test();
+    // can2_test();
+    // imu_uart3_test();
+    // uart2_sbus_test();
+    // system_test();
+    // sbus_uart2_out_test();
+    while(1)
+    {
+      theta += PI*0.1;
+      sin_theta = hpm_dsp_sin_f32(theta);
+      board_delay_ms(200);
+      printf("sin theta is %f\r\n", sin_theta);
+    }
+     
 }
-
 int main(void)
 {
-    uint8_t conv_mode;
-
-    /* Bsp initialization */
     board_init();
+    float i = 9.8f;
+   
+    sin_theta = hpm_dsp_sin_f32(theta);
+    
+   
+    printf("hello world %f\n", i);
+    printf("sin theta is %f\r\n", sin_theta);
 
-    /* ADC pin initialization */
-    board_init_adc12_pins();
-
-    /* ADC clock initialization */
-    board_init_adc_clock(BOARD_APP_ADC12_BASE, true);
-
-    printf("This is an ADC12 demo:\n");
-
-    while (1) {
-        /* Get a conversion mode from a console window */
-        conv_mode = get_adc_conv_mode();
-
-        /* ADC12 common initialization */
-        init_common_config(conv_mode);
-
-        /* ADC12 read patter and DMA initialization */
-        switch (conv_mode) {
-        case adc12_conv_mode_oneshot:
-            init_oneshot_config();
-            break;
-
-        case adc12_conv_mode_period:
-            init_period_config();
-            break;
-
-        case adc12_conv_mode_sequence:
-            init_sequence_config();
-            break;
-
-        case adc12_conv_mode_preemption:
-            init_preemption_config();
-            break;
-
-        default:
-            break;
-        }
-
-        /* Main loop */
-        while (1) {
-            channel_result_out_of_threshold_handler();
-
-            if (conv_mode == adc12_conv_mode_oneshot) {
-                oneshot_handler();
-            } else if (conv_mode == adc12_conv_mode_period) {
-                period_handler();
-            } else if (conv_mode == adc12_conv_mode_sequence) {
-                sequence_handler();
-            } else if (conv_mode == adc12_conv_mode_preemption) {
-                preemption_handler();
-            } else {
-                printf("Conversion mode is not supported!\n");
-            }
-
-            if (console_try_receive_byte() == ' ') {
-                break;
-            }
-        }
-    }
+    test_hard();
+    return 0;
 }
+//// DMA 最大4k
+

controller_yy_app/v8/v8m_yy/bsp_V8M_YY_adc.c

@@ -1,6 +1,5 @@
 #include "board.h"
 #include "hpm_adc12_drv.h"
-#include "hpm_dma_drv.h"
 #include "bsp_V8M_YY_adc.h"
 #include "test.h"
 // 一共28路adc被4个ad控制器使用  20 路给12位ad012 8路给16位ad
@@ -8,9 +7,13 @@
 // 经2026/03/13 测试 DMA+序列的转发模式对12位ad行不通 测试多次 分别试过ad012 且用官方例程跑过 此时 单次触发 周期触发都是可以的
 // 必须使用同一个ADC控制器 不然要配置多个dma控制 通道可以配置的不同 
 // 
+static const float vref_voltage = 3.30f;  /* HPM6750没有内部VREF电压 */
+#define ADC12_VALUE_MAX  (0xFFF)
+#define ADC_VOLTAGE_DIVIDER_RATIO    (22.0f)   /* 22:1分压 */
+
 #define AD_VALUE_AVERAGE_NUM 50 // 均值滤波长度
 
-#define AD_CHANNEL_NUM 1
+#define AD_CHANNEL_NUM 5
 
 #define ADC12_CORE BOARD_RUNNING_CORE // HPM_CORE0
 #define ADC12_SEQ_START_POS               0
@@ -27,19 +30,15 @@
 #define ADC12_CHANEL_6  // 没有内置vref
 
 /* ADC通道定义 */
-//static uint8_t adc_channels[AD_CHANNEL_NUM] = {
-//    ADC12_CHANEL_1,   /* 通道1: (飞控供电通道) */
-//    ADC12_CHANEL_2,   /* 通道2: (AD1INPUT) */
-//    ADC12_CHANEL_3,   /* 通道3: (AD2INPUT) */
-//    ADC12_CHANEL_4,   /* 通道4: (AD3INPUT) */
-//    ADC12_CHANEL_5,   /* 通道5: (AD4INPUT) */
-//};
-
-static __IO uint8_t seq_complete_flag1;
-
-static uint8_t adc_channels[] = {
+static uint8_t adc_channels[AD_CHANNEL_NUM] = {
+    ADC12_CHANEL_1,   /* 通道1: (飞控供电通道) */
+    ADC12_CHANEL_2,   /* 通道2: (AD1INPUT) */
+    ADC12_CHANEL_3,   /* 通道3: (AD2INPUT) */
+    ADC12_CHANEL_4,   /* 通道4: (AD3INPUT) */
     ADC12_CHANEL_5,   /* 通道5: (AD4INPUT) */
 };
+
+
 /* DMA缓冲区 - 使用非缓存区并确保对齐 */
 #define ADC_DMA_BUFFER_SIZE (AD_VALUE_AVERAGE_NUM * AD_CHANNEL_NUM)
 ATTR_PLACE_AT_NONCACHEABLE_WITH_ALIGNMENT(ADC_SOC_DMA_ADDR_ALIGNMENT)  static uint32_t adc_dma_buffer[ADC_DMA_BUFFER_SIZE];
@@ -49,24 +48,7 @@ static uint16_t adValueBuffer[AD_VALUE_AVERAGE_NUM][AD_CHANNEL_NUM];
 
 /* 电压计算结果 */
 static float adVoltage_BeforCalib[AD_CHANNEL_NUM] = {0.0f};
-hpm_stat_t process_seq_data(uint32_t *buff, uint32_t start_pos, uint32_t len)
-{
-    adc12_seq_dma_data_t *dma_data = (adc12_seq_dma_data_t *)buff;
-
-    if (ADC12_IS_SEQ_DMA_BUFF_LEN_INVLAID(len)) {
-        return status_invalid_argument;
-    }
-
-    for (uint32_t i = start_pos; i < start_pos + len; i++) {
-        printf("Sequence Mode - %s - ", BOARD_APP_ADC12_NAME);
-        printf("Cycle Bit: %02d - ",   dma_data[i].cycle_bit);
-        printf("Sequence Number:%02d - ", dma_data[i].seq_num);
-        printf("ADC Channel: %02d - ",  dma_data[i].adc_ch);
-        printf("Result: 0x%04x\n", dma_data[i].result);
-    }
 
-    return status_success;
-}
 /**
  * 从DMA缓冲区提取数据 
  */
@@ -79,7 +61,7 @@ static void extract_adc_from_dma(void)
         for (uint32_t ch = 0; ch < AD_CHANNEL_NUM; ch++) {
             idx = sample * AD_CHANNEL_NUM + ch;
             
-            ///* 检查cycle_bit有效性（同官方例程） */
+            ///* 检查cycle_bit有效性 这个只是检查本次adc搬运的数据是否是最新的，对于检测电压的均值滤波来说没有意义*/
             //if (dma_data[idx].cycle_bit == 0) {
             //    adValueBuffer[sample][ch] = 0xFFFF;  /* 无效数据标记 */
             //    continue;
@@ -89,11 +71,11 @@ static void extract_adc_from_dma(void)
                 printf("警告：通道不匹配 - 预期通道%d，实际通道%d\n", 
                        adc_channels[ch], dma_data[idx].adc_ch);
             }
-            printf("Sequence Mode - %s - ", "ADC12");
-            printf("Cycle Bit: %02d - ",   dma_data[idx].cycle_bit);
-            printf("Sequence Number:%02d - ", dma_data[idx].seq_num);
-            printf("ADC Channel: %02d - ",  dma_data[idx].adc_ch);
-            printf("Result: 0x%04x\n", dma_data[idx].result);
+            //printf("Sequence Mode - %s - ", "ADC12");
+            //printf("Cycle Bit: %02d - ",   dma_data[idx].cycle_bit);
+            //printf("Sequence Number:%02d - ", dma_data[idx].seq_num);
+            //printf("ADC Channel: %02d - ",  dma_data[idx].adc_ch);
+            //printf("Result: 0x%04x\n", dma_data[idx].result);
            
 
             /* 提取纯ADC结果 */
@@ -108,13 +90,13 @@ static void extract_adc_from_dma(void)
 }
 static void HPM_ADC0_IO_0_5_config(void)
 {
-    //HPM_IOC->PAD[IOC_PAD_PE14].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK; // 0
+    HPM_IOC->PAD[IOC_PAD_PE14].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK; // 0
 
-    //HPM_IOC->PAD[IOC_PAD_PE15].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK; // 1
+    HPM_IOC->PAD[IOC_PAD_PE15].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK; // 1
 
-    //HPM_IOC->PAD[IOC_PAD_PE18].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK; // 2
+    HPM_IOC->PAD[IOC_PAD_PE18].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK; // 2
 
-    //HPM_IOC->PAD[IOC_PAD_PE17].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK; // 3
+    HPM_IOC->PAD[IOC_PAD_PE17].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK; // 3
 
     HPM_IOC->PAD[IOC_PAD_PE21].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK; // 7
 }
@@ -139,13 +121,12 @@ static hpm_stat_t init_common_config(adc12_conversion_mode_t conv_mode)
     }
 
     /* adc12 initialization */
-    if (adc12_init(ADC12, &cfg) == status_success) {
-        /* enable irq */
-        intc_m_enable_irq_with_priority(ADC12_IRQ, 1);
-        return status_success;
-    } else {
-        return status_fail;
+    hpm_stat_t stat = adc12_init(ADC12, &cfg);
+    if (stat != status_success) {
+        printf("adc init fail\r\n");
+        
     }
+    return stat;
 }
 
 static void init_sequence_config(void)
@@ -169,7 +150,7 @@ static void init_sequence_config(void)
 
     /* Set a sequence config */
     seq_cfg.seq_len    = sizeof(adc_channels); // 序列长度
-    seq_cfg.restart_en = false; // 重启序列转换
+    seq_cfg.restart_en = true; // 重启序列转换
     seq_cfg.cont_en    = true; // adc通道持续转换 按照序列匹配的顺序
     seq_cfg.hw_trig_en = false;// 软件触发
     seq_cfg.sw_trig_en = true;
@@ -190,7 +171,7 @@ static void init_sequence_config(void)
     }
     /* Set a DMA config */
     dma_cfg.start_addr         = (uint32_t *)core_local_mem_to_sys_address(ADC12_CORE, (uint32_t)adc_dma_buffer);
-    dma_cfg.buff_len_in_4bytes = sizeof(adc_dma_buffer); // 设置dma传输的buffer
+    dma_cfg.buff_len_in_4bytes = ADC_DMA_BUFFER_SIZE; // 设置dma传输的buffer 最大4096
     dma_cfg.stop_en            = false; // 传输完成后不停止
     dma_cfg.stop_pos           = 0; // 传输停止位置
 
@@ -201,27 +182,9 @@ static void init_sequence_config(void)
       printf("adc12 dma config fail\r\n");
      
     }
-     /* Enable sequence complete interrupt */
-    adc12_enable_interrupts(ADC12, ADC12_IRQ);
 
 }
 
-SDK_DECLARE_EXT_ISR_M(ADC12_IRQ, isr_adc12)
-void isr_adc12(void)
-{
-    uint32_t status;
-
-    status = adc12_get_status_flags(ADC12);
-
-    /* Clear status */
-    adc12_clear_status_flags(ADC12, status);
-
-    if (ADC12_INT_STS_SEQ_CVC_GET(status)) {
-        /* Set flag to read memory data */
-        seq_complete_flag1 = 1;
-    }
-
-}
 /**
  * ADC初始化 
  */
@@ -241,13 +204,13 @@ void V8M_YY_ADC1_Init(void)
     }
     /* 3. 序列 DMA配置*/
     init_sequence_config();
-    
+    board_delay_ms(20);
     /* 4. 启动转换 */
-    //if(adc12_trigger_seq_by_sw(ADC12) != status_success)
-    //{
-    //  printf("seq trig fail\r\n");
+    if(adc12_trigger_seq_by_sw(ADC12) != status_success)
+    {
+      printf("seq soft trig fail\r\n");
 
-    //}
+    }
     
     printf("ADC初始化完成\n");
 }
@@ -260,8 +223,6 @@ void V8M_YY_ADC_UpdateVoltage(void)
     uint32_t valid_count[AD_CHANNEL_NUM] = {0};
     float adAverageValue[AD_CHANNEL_NUM] = {0.0f};
     
-    /*  停止ADC转换（如果需要更新稳定数据） */
-    // adc12_stop_continuous(ADC12);
     
     /* 从DMA缓冲区提取数据 */
     extract_adc_from_dma();
@@ -285,19 +246,12 @@ void V8M_YY_ADC_UpdateVoltage(void)
         }
     }
     
-    /* 使用内部参考电压校准 */
-    float vref_voltage = 1.2f;  /* HPM6750内部VREF电压 */
-    float vref_adc = adAverageValue[AD_CHANNEL_NUM - 1];  /* 最后一个通道是VREF */
-    
-    if (vref_adc > 100.0f) {  /* 确保有有效数据 */
-        float adc_to_volt = vref_voltage / vref_adc;
-        
-        /* 计算外部通道电压（22倍分压） */
-        for (int ch = 0; ch < AD_CHANNEL_NUM - 1; ch++) {
-            adVoltage_BeforCalib[ch] = adAverageValue[ch] * adc_to_volt * 22.0f;
-        }
+    /* 使用内部参考电压校准 没有内部参考电压*/
+
         
-        adVoltage_BeforCalib[AD_CHANNEL_NUM - 1] = vref_voltage;
+    /* 计算外部通道电压（22倍分压） */
+    for (int ch = 0; ch < AD_CHANNEL_NUM; ch++) {
+        adVoltage_BeforCalib[ch] = adAverageValue[ch] / ADC12_VALUE_MAX * vref_voltage * ADC_VOLTAGE_DIVIDER_RATIO;
     }
     
     /*  重新启动ADC转换 连续转换不需要重新启动*/
@@ -322,15 +276,15 @@ float V8M_YY_Voltage_GetVolt(V8M_YY_ADC_ChannelType voltageChannel)
     case V8M_YY_AD_CHANNEL_AD4INPUT:
         voltage = adVoltage_BeforCalib[voltageChannel];
         break;
-    case V8M_YY_AD_CHANNEL_ADVREF:
-         voltage = adVoltage_BeforCalib[voltageChannel];
-        break;
+    //case V8M_YY_AD_CHANNEL_ADVREF:
+    //     voltage = adVoltage_BeforCalib[voltageChannel];
+    //    break;
     default:
         break;
     }
     return voltage;
 }
-/* adc demo 2026/3/13 测试完成*/
+/* adc dma+序列 demo 2026/3/18 测试完成*/
 #ifdef ADC_TEST
 /**
  * @brief 简洁版打印所有ADC通道
@@ -368,51 +322,15 @@ static void debug_adc_config(void)
     // 读取ADC状态寄存器
     printf("ADC状态: 0x%x\n", ADC12->SEQ_DMA_CFG);
 }
-void sequence_handler(void)
-{
-
-    /* SW trigger */
-    adc12_trigger_seq_by_sw(ADC12);
-
-    while (seq_complete_flag1 == 0) {
-
-    }
-
-    /* Process data */
-    process_seq_data(adc_dma_buffer, 0, sizeof(adc_channels));
-
-    /* Clear the flag */
-    seq_complete_flag1 = 0;
-}
 
-//__IO uint32_t res_out_of_thr_flag;
-//void channel_result_out_of_threshold_handler(void)
-//{
-//    adc12_channel_threshold_t threshold;
-//    uint32_t i = 31;
-
-//    if (res_out_of_thr_flag) {
-//        while (i--) {
-//            if ((res_out_of_thr_flag >> i) & 0x01) {
-//                adc12_get_channel_threshold(HPM_ADC0, i, &threshold);
-//                printf("Warning - %s [channel %02d] - Sample voltage is out of the thresholds between 0x%04x and 0x%04x !\n", BOARD_APP_ADC12_NAME, i, threshold.thshdl, threshold.thshdh);
-//            }
-//        }
-
-//        res_out_of_thr_flag = 0;
-//        // adc12_enable_interrupts(HPM_ADC0, APP_ADC12_CH_WDOG_EVENT);
-//    }
-//}
 void v8m_yy_adc_test(void)
 {
   V8M_YY_ADC1_Init();
   debug_adc_config();
   while(1)
   {
-   
-      sequence_handler();
-     // V8M_YY_ADC_UpdateVoltage();
-     // V8M_YY_Voltage_PrintAllSimple();
+      V8M_YY_ADC_UpdateVoltage();
+      V8M_YY_Voltage_PrintAllSimple();
   }
  
 }

controller_yy_app/v8/v8m_yy/bsp_V8M_YY_adc.h

@@ -10,7 +10,7 @@ typedef enum
     V8M_YY_AD_CHANNEL_AD2INPUT = 2,
     V8M_YY_AD_CHANNEL_AD3INPUT = 3,
     V8M_YY_AD_CHANNEL_AD4INPUT = 4,
-    V8M_YY_AD_CHANNEL_ADVREF = 5,
+    // V8M_YY_AD_CHANNEL_ADVREF = 5, 没有内部校准
 } V8M_YY_ADC_ChannelType;
 
 void V8M_YY_ADC1_Init(void);

controller_yy_app_controller_yy_board_flash_sdram_xip_debug/CMakeCache.txt

@@ -254,7 +254,7 @@ CMAKE_STRIP:FILEPATH=D:/sdk_env/sdk_env-v1.8.0/toolchains/rv32imac_zicsr_zifence
 CMAKE_VERBOSE_MAKEFILE:BOOL=FALSE
 
 //No help, variable specified on the command line.
-CUSTOM_GCC_LINKER_FILE:UNINITIALIZED=D:/sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/HPM6750/toolchains/gcc/flash_sdram_xip.ld
+CUSTOM_GCC_LINKER_FILE:UNINITIALIZED=D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/linkers/gcc/user_linker.ld
 
 //No help, variable specified on the command line.
 HPM_BUILD_TYPE:UNINITIALIZED=flash_sdram_xip
@@ -404,7 +404,7 @@ CMAKE_MODULE_LINKER_FLAGS_RELWITHDEBINFO-ADVANCED:INTERNAL=1
 //ADVANCED property for variable: CMAKE_NM
 CMAKE_NM-ADVANCED:INTERNAL=1
 //number of local generators
-CMAKE_NUMBER_OF_MAKEFILES:INTERNAL=26
+CMAKE_NUMBER_OF_MAKEFILES:INTERNAL=27
 //ADVANCED property for variable: CMAKE_OBJCOPY
 CMAKE_OBJCOPY-ADVANCED:INTERNAL=1
 //ADVANCED property for variable: CMAKE_OBJDUMP

controller_yy_app_controller_yy_board_flash_sdram_xip_debug/CMakeFiles/TargetDirectories.txt

@@ -50,6 +50,8 @@ D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app_con
 D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app_controller_yy_board_flash_sdram_xip_debug/middleware/hpm_sdmmc/lib/CMakeFiles/rebuild_cache.dir
 D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app_controller_yy_board_flash_sdram_xip_debug/middleware/hpm_sdmmc/port/CMakeFiles/edit_cache.dir
 D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app_controller_yy_board_flash_sdram_xip_debug/middleware/hpm_sdmmc/port/CMakeFiles/rebuild_cache.dir
+D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app_controller_yy_board_flash_sdram_xip_debug/middleware/hpm_math/CMakeFiles/edit_cache.dir
+D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app_controller_yy_board_flash_sdram_xip_debug/middleware/hpm_math/CMakeFiles/rebuild_cache.dir
 D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app_controller_yy_board_flash_sdram_xip_debug/middleware/eclipse_threadx/CMakeFiles/edit_cache.dir
 D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app_controller_yy_board_flash_sdram_xip_debug/middleware/eclipse_threadx/CMakeFiles/rebuild_cache.dir
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controller_yy_app_controller_yy_board_flash_sdram_xip_debug/iar_embedded_workbench/controlware_yy_app.ewp

@@ -154,7 +154,7 @@
                 </option>
                 <option>
                     <name>GCoreDevice</name>
-                    <state>rv32imac</state>
+                    <state>rv32imac_Xandesdsp_Xandesperf</state>
                 </option>
                 <option>
                     <name>RadioStdOutErr</name>
@@ -186,7 +186,7 @@
                 </option>
                 <option>
                     <name>GDeviceXandesperfSlave</name>
-                    <state>0</state>
+                    <state>1</state>
                 </option>
                 <option>
                     <name>GDeviceBitmanipSSlave</name>
@@ -230,7 +230,7 @@
                 </option>
                 <option>
                     <name>GDeviceDspRadioSlave</name>
-                    <state>0</state>
+                    <state>1</state>
                 </option>
                 <option>
                     <name>GDeviceCacheManagementSlave</name>
@@ -412,6 +412,7 @@
                     <state>HPMSOC_HAS_HPMSDK_MONO=y</state>
                     <state>HPMSOC_HAS_HPMSDK_PMP=y</state>
                     <state>SD_FATFS_ENABLE=1</state>
+                    <state>HPM_EN_MATH_DSP_LIB=1</state>
                 </option>
                 <option>
                     <name>CCPreprocFile</name>
@@ -495,6 +496,8 @@
                     <state>$PROJ_DIR$\../../controller_yy_app/middleware/hpm_sdmmc/lib</state>
                     <state>$PROJ_DIR$\../../controller_yy_app/middleware/hpm_sdmmc/lib</state>
                     <state>$PROJ_DIR$\../../controller_yy_app/middleware/hpm_sdmmc/port</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/middleware/hpm_math</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/middleware/hpm_math/nds_dsp</state>
                     <state>$PROJ_DIR$\../../controller_yy_app/controlware/control_inc</state>
                     <state>$PROJ_DIR$\../../controller_yy_app/hardware/hard_inc</state>
                     <state>$PROJ_DIR$\../../controller_yy_app/matrix</state>
@@ -630,6 +633,8 @@
                     <state>$PROJ_DIR$\../../controller_yy_app/middleware/hpm_sdmmc/lib</state>
                     <state>$PROJ_DIR$\../../controller_yy_app/middleware/hpm_sdmmc/lib</state>
                     <state>$PROJ_DIR$\../../controller_yy_app/middleware/hpm_sdmmc/port</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/middleware/hpm_math</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/middleware/hpm_math/nds_dsp</state>
                     <state>$PROJ_DIR$\../../controller_yy_app/controlware/control_inc</state>
                     <state>$PROJ_DIR$\../../controller_yy_app/hardware/hard_inc</state>
                     <state>$PROJ_DIR$\../../controller_yy_app/matrix</state>
@@ -706,6 +711,7 @@
                     <state>HPMSOC_HAS_HPMSDK_MONO=y</state>
                     <state>HPMSOC_HAS_HPMSDK_PMP=y</state>
                     <state>SD_FATFS_ENABLE=1</state>
+                    <state>HPM_EN_MATH_DSP_LIB=1</state>
                 </option>
                 <option>
                     <name>PreInclude</name>
@@ -951,7 +957,7 @@
                 </option>
                 <option>
                     <name>IlinkAdditionalLibs</name>
-                    <state></state>
+                    <state>$PROJ_DIR$\..\..\controller_yy_app\middleware\hpm_math\nds_dsp\iar\libdspf.a</state>
                 </option>
                 <option>
                     <name>IlinkOverrideProgramEntryLabel</name>
@@ -1351,7 +1357,7 @@
                 </option>
                 <option>
                     <name>GCoreDevice</name>
-                    <state>rv32imac</state>
+                    <state>rv32imac_Xandesdsp_Xandesperf</state>
                 </option>
                 <option>
                     <name>RadioStdOutErr</name>
@@ -1383,7 +1389,7 @@
                 </option>
                 <option>
                     <name>GDeviceXandesperfSlave</name>
-                    <state>0</state>
+                    <state>1</state>
                 </option>
                 <option>
                     <name>GDeviceBitmanipSSlave</name>
@@ -1427,7 +1433,7 @@
                 </option>
                 <option>
                     <name>GDeviceDspRadioSlave</name>
-                    <state>0</state>
+                    <state>1</state>
                 </option>
                 <option>
                     <name>GDeviceCacheManagementSlave</name>
@@ -1609,6 +1615,7 @@
                     <state>HPMSOC_HAS_HPMSDK_MONO=y</state>
                     <state>HPMSOC_HAS_HPMSDK_PMP=y</state>
                     <state>SD_FATFS_ENABLE=1</state>
+                    <state>HPM_EN_MATH_DSP_LIB=1</state>
                     <state>NDEBUG</state>
                 </option>
                 <option>
@@ -1693,6 +1700,8 @@
                     <state>$PROJ_DIR$\../../controller_yy_app/middleware/hpm_sdmmc/lib</state>
                     <state>$PROJ_DIR$\../../controller_yy_app/middleware/hpm_sdmmc/lib</state>
                     <state>$PROJ_DIR$\../../controller_yy_app/middleware/hpm_sdmmc/port</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/middleware/hpm_math</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/middleware/hpm_math/nds_dsp</state>
                     <state>$PROJ_DIR$\../../controller_yy_app/controlware/control_inc</state>
                     <state>$PROJ_DIR$\../../controller_yy_app/hardware/hard_inc</state>
                     <state>$PROJ_DIR$\../../controller_yy_app/matrix</state>
@@ -1828,6 +1837,8 @@
                     <state>$PROJ_DIR$\../../controller_yy_app/middleware/hpm_sdmmc/lib</state>
                     <state>$PROJ_DIR$\../../controller_yy_app/middleware/hpm_sdmmc/lib</state>
                     <state>$PROJ_DIR$\../../controller_yy_app/middleware/hpm_sdmmc/port</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/middleware/hpm_math</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/middleware/hpm_math/nds_dsp</state>
                     <state>$PROJ_DIR$\../../controller_yy_app/controlware/control_inc</state>
                     <state>$PROJ_DIR$\../../controller_yy_app/hardware/hard_inc</state>
                     <state>$PROJ_DIR$\../../controller_yy_app/matrix</state>
@@ -1904,6 +1915,7 @@
                     <state>HPMSOC_HAS_HPMSDK_MONO=y</state>
                     <state>HPMSOC_HAS_HPMSDK_PMP=y</state>
                     <state>SD_FATFS_ENABLE=1</state>
+                    <state>HPM_EN_MATH_DSP_LIB=1</state>
                 </option>
                 <option>
                     <name>PreInclude</name>
@@ -2149,7 +2161,7 @@
                 </option>
                 <option>
                     <name>IlinkAdditionalLibs</name>
-                    <state></state>
+                    <state>$PROJ_DIR$\..\..\controller_yy_app\middleware\hpm_math\nds_dsp\iar\libdspf.a</state>
                 </option>
                 <option>
                     <name>IlinkOverrideProgramEntryLabel</name>
@@ -2506,6 +2518,11 @@
           <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/middleware/hpm_sdmmc/port/hpm_sdmmc_port.c</name></file>
         </group>
       </group>
+      <group><name>hpm_math</name>
+        <group><name>sw_dsp</name>
+          <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/middleware/hpm_math/sw_dsp/hpm_math_sw.c</name></file>
+        </group>
+      </group>
     </group>
   </group>
   <group><name>soc</name>

controller_yy_app_controller_yy_board_flash_sdram_xip_debug/middleware/cmake_install.cmake

@@ -41,6 +41,7 @@ if(NOT CMAKE_INSTALL_LOCAL_ONLY)
   # Include the install script for each subdirectory.
   include("D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app_controller_yy_board_flash_sdram_xip_debug/middleware/fatfs/cmake_install.cmake")
   include("D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app_controller_yy_board_flash_sdram_xip_debug/middleware/hpm_sdmmc/cmake_install.cmake")
+  include("D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app_controller_yy_board_flash_sdram_xip_debug/middleware/hpm_math/cmake_install.cmake")
   include("D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app_controller_yy_board_flash_sdram_xip_debug/middleware/eclipse_threadx/cmake_install.cmake")
   include("D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app_controller_yy_board_flash_sdram_xip_debug/middleware/CMSIS/cmake_install.cmake")
   include("D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app_controller_yy_board_flash_sdram_xip_debug/middleware/ptpd/cmake_install.cmake")

controller_yy_app_controller_yy_board_flash_sdram_xip_debug/segger_embedded_studio/controlware_yy_app.emProject

@@ -1,526 +1,830 @@
 <!DOCTYPE CrossStudio_Project_File>
 <solution Name="controlware_yy_app" target="20" version="2">
+  <configuration
+    Name="Common"
+    c_preprocessor_definitions="FLASH_XIP=1;INIT_EXT_RAM_FOR_DATA=1;HPMSOC_HAS_HPMSDK_MULTICORE=y;HPMSOC_HAS_HPMSDK_GPIO=y;HPMSOC_HAS_HPMSDK_PLIC=y;HPMSOC_HAS_HPMSDK_MCHTMR=y;HPMSOC_HAS_HPMSDK_PLICSW=y;HPMSOC_HAS_HPMSDK_GPIOM=y;HPMSOC_HAS_HPMSDK_ADC12=y;HPMSOC_HAS_HPMSDK_ADC16=y;HPMSOC_HAS_HPMSDK_ACMP=y;HPMSOC_HAS_HPMSDK_SPI=y;HPMSOC_HAS_HPMSDK_UART=y;HPMSOC_HAS_HPMSDK_CAN=y;HPMSOC_HAS_HPMSDK_WDG=y;HPMSOC_HAS_HPMSDK_MBX=y;HPMSOC_HAS_HPMSDK_PTPC=y;HPMSOC_HAS_HPMSDK_DMAMUX=y;HPMSOC_HAS_HPMSDK_DMA=y;HPMSOC_HAS_HPMSDK_RNG=y;HPMSOC_HAS_HPMSDK_KEYM=y;HPMSOC_HAS_HPMSDK_I2S=y;HPMSOC_HAS_HPMSDK_DAO=y;HPMSOC_HAS_HPMSDK_PDM=y;HPMSOC_HAS_HPMSDK_PWM=y;HPMSOC_HAS_HPMSDK_HALL=y;HPMSOC_HAS_HPMSDK_QEI=y;HPMSOC_HAS_HPMSDK_TRGM=y;HPMSOC_HAS_HPMSDK_SYNT=y;HPMSOC_HAS_HPMSDK_LCDC=y;HPMSOC_HAS_HPMSDK_CAM=y;HPMSOC_HAS_HPMSDK_PDMA=y;HPMSOC_HAS_HPMSDK_JPEG=y;HPMSOC_HAS_HPMSDK_ENET=y;HPMSOC_HAS_HPMSDK_GPTMR=y;HPMSOC_HAS_HPMSDK_USB=y;HPMSOC_HAS_HPMSDK_SDXC=y;HPMSOC_HAS_HPMSDK_CONCTL=y;HPMSOC_HAS_HPMSDK_I2C=y;HPMSOC_HAS_HPMSDK_SDP=y;HPMSOC_HAS_HPMSDK_FEMC=y;HPMSOC_HAS_HPMSDK_SYSCTL=y;HPMSOC_HAS_HPMSDK_IOC=y;HPMSOC_HAS_HPMSDK_OTP=y;HPMSOC_HAS_HPMSDK_PPOR=y;HPMSOC_HAS_HPMSDK_PCFG=y;HPMSOC_HAS_HPMSDK_PSEC=y;HPMSOC_HAS_HPMSDK_PMON=y;HPMSOC_HAS_HPMSDK_PGPR=y;HPMSOC_HAS_HPMSDK_VAD=y;HPMSOC_HAS_HPMSDK_PLLCTL=y;HPMSOC_HAS_HPMSDK_BPOR=y;HPMSOC_HAS_HPMSDK_BCFG=y;HPMSOC_HAS_HPMSDK_BUTN=y;HPMSOC_HAS_HPMSDK_BGPR=y;HPMSOC_HAS_HPMSDK_RTC=y;HPMSOC_HAS_HPMSDK_BSEC=y;HPMSOC_HAS_HPMSDK_BKEY=y;HPMSOC_HAS_HPMSDK_BMON=y;HPMSOC_HAS_HPMSDK_TAMP=y;HPMSOC_HAS_HPMSDK_MONO=y;HPMSOC_HAS_HPMSDK_PMP=y;SD_FATFS_ENABLE=1;HPM_EN_MATH_DSP_LIB=1;"
+    debug_cpu_registers_file="..\..\..\..\..\..\..\sdk_env\sdk_env-v1.8.0\hpm_sdk\soc\HPM6700\HPM6750\hpm_ses_riscv_cpu_regs.xml"
+    debug_register_definition_file="..\..\..\..\..\..\..\sdk_env\sdk_env-v1.8.0\hpm_sdk\soc\HPM6700\HPM6750\hpm_ses_reg.xml"
+    debug_restrict_memory_access="No"
+    gdb_server_write_timeout="300"
+    link_symbol_definitions="_heap_size=0x4000;_stack_size=0x4000;_flash_size=32M;_extram_size=32M;" />
+  <configuration
+    Name="Debug"
+    c_preprocessor_definitions="DEBUG"
+    gcc_debugging_level="Level 3"
+    gcc_optimization_level="None"
+    gdb_server_allow_memory_access_during_execution="Yes"
+    gdb_server_ignore_checksum_errors="No"
+    gdb_server_register_access="General and Individual" />
+  <configuration
+    Name="Release"
+    c_preprocessor_definitions="NDEBUG"
+    gcc_debugging_level="None"
+    gcc_omit_frame_pointer="Yes"
+    gcc_optimization_level="Level 1" />
   <project Name="controlware_yy_app - controller_yy_board">
     <configuration
-      Name="Common"
       LIBRARY_IO_TYPE="STD"
+      Name="Common"
+      RISCV_TOOLCHAIN_VARIANT="Andes"
+      arm_assembler_variant="gcc"
+      arm_compiler_variant="gcc"
       arm_linker_heap_size="0x4000"
+      arm_linker_no_warn_on_mismatch="Yes"
       arm_linker_stack_size="0x4000"
+      arm_linker_variant="GNU"
       arm_rtl_variant="SEGGER"
-      arm_linker_no_warn_on_mismatch="Yes"
-      build_generic_options_file_name=""
-      c_user_include_directories="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/arch;../../controller_yy_board;../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/HPM6750;../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/ip;../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/HPM6750/toolchains;../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/HPM6750/boot;../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/inc;../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/utils;../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/components/debug_console;../build_tmp/generated/include;../../controller_yy_app/middleware/fatfs/src/common;../../controller_yy_app/middleware/fatfs/src/portable;../../controller_yy_app/middleware/fatfs/src/portable/sdxc;../../controller_yy_app/middleware/hpm_sdmmc/lib;../../controller_yy_app/middleware/hpm_sdmmc/lib;../../controller_yy_app/middleware/hpm_sdmmc/port;../../controller_yy_app/controlware/control_inc;../../controller_yy_app/hardware/hard_inc;../../controller_yy_app/matrix;../../controller_yy_app/payload;../../controller_yy_app/remote_controller;../../controller_yy_app/software/soft_inc;../../controller_yy_app/user_src/inc;../../controller_yy_app/v8/v8m;../../controller_yy_app/v8/v8m_yy;../../controller_yy_app/vklink;"
-      link_linker_script_file="..\..\controller_yy_app\linkers\segger\user_linker.icf"
-      link_use_linker_script_file="Yes"
-      linker_output_format="hex"
-      project_directory=""
-      project_type="Executable"
+      build_generic_options_file_name="$(StudioDir)/targets/Andes_build_options.xml"
+      build_output_file_name="$(OutDir)/demo$(EXE)"
+      c_additional_options="-Wall;-Wundef;-Wno-format;-fomit-frame-pointer;-fno-builtin;-ffunction-sections;-fdata-sections;-g;-mcpu=d45;-mext-dsp"
+      c_user_include_directories="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/arch;../../controller_yy_board;../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/HPM6750;../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/ip;../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/HPM6750/toolchains;../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/HPM6750/boot;../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/inc;../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/utils;../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/components/debug_console;../build_tmp/generated/include;../../controller_yy_app/middleware/fatfs/src/common;../../controller_yy_app/middleware/fatfs/src/portable;../../controller_yy_app/middleware/fatfs/src/portable/sdxc;../../controller_yy_app/middleware/hpm_sdmmc/lib;../../controller_yy_app/middleware/hpm_sdmmc/lib;../../controller_yy_app/middleware/hpm_sdmmc/port;../../controller_yy_app/middleware/hpm_math;../../controller_yy_app/middleware/hpm_math/nds_dsp;../../controller_yy_app/controlware/control_inc;../../controller_yy_app/hardware/hard_inc;../../controller_yy_app/matrix;../../controller_yy_app/payload;../../controller_yy_app/remote_controller;../../controller_yy_app/software/soft_inc;../../controller_yy_app/user_src/inc;../../controller_yy_app/v8/v8m;../../controller_yy_app/v8/v8m_yy;../../controller_yy_app/vklink;"
       debug_target_connection="GDB Server"
-      gdb_server_type="Custom"
-      gdb_server_reset_command="reset halt"
+      gcc_all_warnings_command_line_options="-Wall;-Wextra;-Wno-format"
+      gcc_cplusplus_language_standard="c++11"
+      gcc_enable_all_warnings="Yes"
       gdb_server_autostart_server="Yes"
-      gdb_server_port="3333"
       gdb_server_command_line="D:/sdk_env/sdk_env-v1.8.0/tools/openocd/openocd.exe -f $(ProjectDir)/../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/boards/openocd/probes/cmsis_dap.cfg -f $(ProjectDir)/../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/boards/openocd/soc/hpm6750-dual-core.cfg -f D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_board/controller_yy_board.cfg"
-      target_device_name="HPM6750xVMx"
-      linker_output_format="bin"
-      post_build_command="&quot;$(OBJDUMP)&quot; -S -d &quot;$(OutDir)/demo$(EXE)&quot; &gt; &quot;$(OutDir)/demo.asm&quot;"
+      gdb_server_port="3333"
+      gdb_server_reset_command="reset halt"
+      gdb_server_type="Custom"
       heap_size="0x4000"
-      stack_size="0x4000"
-      RISCV_TOOLCHAIN_VARIANT="Standard"
-      rv_abi="ilp32"
-      rv_architecture="rv32imac"
-      c_additional_options="-Wall;-Wundef;-Wno-format;-fomit-frame-pointer;-fno-builtin;-ffunction-sections;-fdata-sections;-g"
-      rv_arch_ext=""
-      rv_arch_zicsr="Yes"
-      rv_arch_zifencei="Yes"
-      rv_debug_extensions="None"
-      rv_toolchain_prefix=""
-      gcc_cplusplus_language_standard="c++11"
-      libcxx="Yes"
-      build_output_file_name="$(OutDir)/demo$(EXE)"
-      linker_printf_fp_enabled="Float"
+      libcxx="Yes (No Exceptions)"
+      link_linker_script_file="..\..\controller_yy_app\linkers\gcc\user_linker.ld"
+      link_symbol_definitions="__SEGGER_RTL_vfprintf=__SEGGER_RTL_vfprintf_short_float_long;__SEGGER_RTL_vfscanf=__SEGGER_RTL_vfscanf_int;"
+      link_use_linker_script_file="Yes"
+      linker_additional_files="..\..\controller_yy_app\middleware\hpm_math\nds_dsp\gcc\libdspf.a"
+      linker_output_format="bin"
       linker_printf_fmt_level="int"
+      linker_printf_fp_enabled="Float"
       linker_printf_wchar_enabled="No"
       linker_printf_width_precision_supported="Yes"
-      linker_scanf_fp_enabled="No"
-      linker_scanf_fmt_level="int"
       linker_scanf_character_group_matching_enabled="No"
-      gcc_enable_all_warnings="Yes"
-      gcc_all_warnings_command_line_options="-Wall;-Wextra;-Wno-format"
-      arm_compiler_variant="gcc"
-      arm_assembler_variant="SEGGER"
-      arm_linker_variant="SEGGER"
-      />
-
-  <folder Name="application">
-    <folder Name="vklink">
-      <configuration Name="Common" build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/application/vklink"/>
-      <file file_name="..\..\controller_yy_app\vklink\gcs_vklink_v30.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/gcs_vklink_v30.c$(OBJ)"/>
-      </file>
-      <file file_name="..\..\controller_yy_app\vklink\um482.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/um482.c$(OBJ)"/>
-      </file>
-      <file file_name="..\..\controller_yy_app\vklink\vklink.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/vklink.c$(OBJ)"/>
-      </file>
-    </folder>
-    <folder Name="v8">
-      <folder Name="v8m">
-        <configuration Name="Common" build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/application/v8/v8m"/>
-        <file file_name="..\..\controller_yy_app\v8\v8m\bsp_V8M_GPIO_photo.c">
-          <configuration Name="Common" build_object_file_name="$(IntDir)/bsp_V8M_GPIO_photo.c$(OBJ)"/>
+      linker_scanf_fmt_level="int"
+      linker_scanf_fp_enabled="No"
+      post_build_command="&quot;$(OBJDUMP)&quot; -S -d &quot;$(OutDir)/demo$(EXE)&quot; &gt; &quot;$(OutDir)/demo.asm&quot;"
+      project_directory=""
+      project_type="Executable"
+      rv32andes_compiler_ext_dsp="Yes"
+      rv_abi="ilp32"
+      rv_arch_ext="_p_xv5"
+      rv_arch_zicsr="No"
+      rv_arch_zifencei="No"
+      rv_architecture="rv32imac"
+      rv_debug_extensions="Andes"
+      rv_toolchain_prefix="andes-"
+      stack_size="0x4000"
+      target_device_name="HPM6750xVMx" />
+    <folder Name="application">
+      <folder Name="controlware">
+        <configuration
+          Name="Common"
+          build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/application/controlware" />
+        <configuration Name="Debug" build_exclude_from_build="Yes" />
+        <file file_name="..\..\controller_yy_app\controlware\control_attitude.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/control_attitude.c$(OBJ)" />
         </file>
-        <file file_name="..\..\controller_yy_app\v8\v8m\bsp_V8M_adc.c">
-          <configuration Name="Common" build_object_file_name="$(IntDir)/bsp_V8M_adc.c$(OBJ)"/>
+        <file file_name="..\..\controller_yy_app\controlware\control_rate.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/control_rate.c$(OBJ)" />
         </file>
-        <file file_name="..\..\controller_yy_app\v8\v8m\bsp_V8M_flash.c">
-          <configuration Name="Common" build_object_file_name="$(IntDir)/bsp_V8M_flash.c$(OBJ)"/>
+        <file file_name="..\..\controller_yy_app\controlware\control_throttle.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/control_throttle.c$(OBJ)" />
         </file>
-        <file file_name="..\..\controller_yy_app\v8\v8m\bsp_V8M_led.c">
-          <configuration Name="Common" build_object_file_name="$(IntDir)/bsp_V8M_led.c$(OBJ)"/>
+        <file file_name="..\..\controller_yy_app\controlware\mode_attitude.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/mode_attitude.c$(OBJ)" />
         </file>
-        <file file_name="..\..\controller_yy_app\v8\v8m\bsp_V8M_pwm.c">
-          <configuration Name="Common" build_object_file_name="$(IntDir)/bsp_V8M_pwm.c$(OBJ)"/>
+        <file file_name="..\..\controller_yy_app\controlware\mode_gcs_tax_launch_run.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/mode_gcs_tax_launch_run.c$(OBJ)" />
         </file>
       </folder>
-      <folder Name="v8m_yy">
-        <configuration Name="Common" build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/application/v8/v8m_yy"/>
-        <file file_name="..\..\controller_yy_app\v8\v8m_yy\bsp_V8M_YY_adc.c">
-          <configuration Name="Common" build_object_file_name="$(IntDir)/bsp_V8M_YY_adc.c$(OBJ)"/>
+      <folder Name="hardware">
+        <configuration
+          Name="Common"
+          build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/application/hardware" />
+        <configuration Name="Debug" build_exclude_from_build="Yes" />
+        <file file_name="..\..\controller_yy_app\hardware\hard_can.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hard_can.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\hardware\hard_flash_at45db.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hard_flash_at45db.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\hardware\hard_flash_gd25q16.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hard_flash_gd25q16.c$(OBJ)" />
         </file>
-        <file file_name="..\..\controller_yy_app\v8\v8m_yy\bsp_V8M_YY_led.c">
-          <configuration Name="Common" build_object_file_name="$(IntDir)/bsp_V8M_YY_led.c$(OBJ)"/>
+        <file file_name="..\..\controller_yy_app\hardware\hard_hdma_int.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hard_hdma_int.c$(OBJ)" />
         </file>
-        <file file_name="..\..\controller_yy_app\v8\v8m_yy\bsp_V8M_YY_pwm.c">
-          <configuration Name="Common" build_object_file_name="$(IntDir)/bsp_V8M_YY_pwm.c$(OBJ)"/>
+        <file file_name="..\..\controller_yy_app\hardware\hard_imu_uart3.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hard_imu_uart3.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\hardware\hard_rc_subs.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hard_rc_subs.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\hardware\hard_sbus_out.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hard_sbus_out.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\hardware\hard_sbusout_af_pump.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hard_sbusout_af_pump.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\hardware\hard_sdio_sd.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hard_sdio_sd.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\hardware\hard_system.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hard_system.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\hardware\hard_system_delay.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hard_system_delay.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\hardware\hard_system_time.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hard_system_time.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\hardware\hard_system_timer.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hard_system_timer.c$(OBJ)" />
         </file>
       </folder>
-    </folder>
-    <folder Name="user_src">
-      <configuration Name="Common" build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/application/user_src"/>
-      <file file_name="..\..\controller_yy_app\user_src\main.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/main.c$(OBJ)"/>
-      </file>
-    </folder>
-    <folder Name="software">
-      <configuration Name="Common" build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/application/software"/>
-      <file file_name="..\..\controller_yy_app\software\debug_printf.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/debug_printf.c$(OBJ)"/>
-      </file>
-      <file file_name="..\..\controller_yy_app\software\drv_uart.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/drv_uart.c$(OBJ)"/>
-      </file>
-      <file file_name="..\..\controller_yy_app\software\params.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/params.c$(OBJ)"/>
-      </file>
-      <file file_name="..\..\controller_yy_app\software\rkfifo.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/rkfifo.c$(OBJ)"/>
-      </file>
-      <file file_name="..\..\controller_yy_app\software\soft_can.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/soft_can.c$(OBJ)"/>
-      </file>
-      <file file_name="..\..\controller_yy_app\software\soft_can_yy.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/soft_can_yy.c$(OBJ)"/>
-      </file>
-      <file file_name="..\..\controller_yy_app\software\soft_delay.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/soft_delay.c$(OBJ)"/>
-      </file>
-      <file file_name="..\..\controller_yy_app\software\soft_flash.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/soft_flash.c$(OBJ)"/>
-      </file>
-      <file file_name="..\..\controller_yy_app\software\soft_gps.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/soft_gps.c$(OBJ)"/>
-      </file>
-      <file file_name="..\..\controller_yy_app\software\soft_gs.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/soft_gs.c$(OBJ)"/>
-      </file>
-      <file file_name="..\..\controller_yy_app\software\soft_imu.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/soft_imu.c$(OBJ)"/>
-      </file>
-      <file file_name="..\..\controller_yy_app\software\soft_motor_output.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/soft_motor_output.c$(OBJ)"/>
-      </file>
-      <file file_name="..\..\controller_yy_app\software\soft_payload.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/soft_payload.c$(OBJ)"/>
-      </file>
-      <file file_name="..\..\controller_yy_app\software\soft_port_uart4.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/soft_port_uart4.c$(OBJ)"/>
-      </file>
-      <file file_name="..\..\controller_yy_app\software\soft_rc_input.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/soft_rc_input.c$(OBJ)"/>
-      </file>
-      <file file_name="..\..\controller_yy_app\software\soft_sdcard.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/soft_sdcard.c$(OBJ)"/>
-      </file>
-      <file file_name="..\..\controller_yy_app\software\soft_system.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/soft_system.c$(OBJ)"/>
-      </file>
-      <file file_name="..\..\controller_yy_app\software\soft_time.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/soft_time.c$(OBJ)"/>
-      </file>
-      <file file_name="..\..\controller_yy_app\software\soft_timer.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/soft_timer.c$(OBJ)"/>
-      </file>
-      <file file_name="..\..\controller_yy_app\software\soft_usharprada.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/soft_usharprada.c$(OBJ)"/>
-      </file>
-      <file file_name="..\..\controller_yy_app\software\soft_voltage.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/soft_voltage.c$(OBJ)"/>
-      </file>
-      <file file_name="..\..\controller_yy_app\software\soft_warn.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/soft_warn.c$(OBJ)"/>
-      </file>
-    </folder>
-    <folder Name="remote_controller">
-      <configuration Name="Common" build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/application/remote_controller"/>
-      <file file_name="..\..\controller_yy_app\remote_controller\rc_rock.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/rc_rock.c$(OBJ)"/>
-      </file>
-      <file file_name="..\..\controller_yy_app\remote_controller\rc_sbus.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/rc_sbus.c$(OBJ)"/>
-      </file>
-      <file file_name="..\..\controller_yy_app\remote_controller\remote_controller.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/remote_controller.c$(OBJ)"/>
-      </file>
-    </folder>
-    <folder Name="payload">
-      <configuration Name="Common" build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/application/payload"/>
-      <file file_name="..\..\controller_yy_app\payload\payload.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/payload.c$(OBJ)"/>
-      </file>
-    </folder>
-    <folder Name="matrix">
-      <configuration Name="Common" build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/application/matrix"/>
-      <file file_name="..\..\controller_yy_app\matrix\euler.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/euler.c$(OBJ)"/>
-      </file>
-      <file file_name="..\..\controller_yy_app\matrix\flt_butter.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/flt_butter.c$(OBJ)"/>
-      </file>
-      <file file_name="..\..\controller_yy_app\matrix\quaternion.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/quaternion.c$(OBJ)"/>
-      </file>
-    </folder>
-    <folder Name="hardware">
-      <configuration Name="Common" build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/application/hardware"/>
-      <file file_name="..\..\controller_yy_app\hardware\hard_can.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/hard_can.c$(OBJ)"/>
-      </file>
-      <file file_name="..\..\controller_yy_app\hardware\hard_flash_at45db.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/hard_flash_at45db.c$(OBJ)"/>
-      </file>
-      <file file_name="..\..\controller_yy_app\hardware\hard_flash_gd25q16.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/hard_flash_gd25q16.c$(OBJ)"/>
-      </file>
-      <file file_name="..\..\controller_yy_app\hardware\hard_hdma_int.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/hard_hdma_int.c$(OBJ)"/>
-      </file>
-      <file file_name="..\..\controller_yy_app\hardware\hard_imu_uart3.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/hard_imu_uart3.c$(OBJ)"/>
-      </file>
-      <file file_name="..\..\controller_yy_app\hardware\hard_rc_subs.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/hard_rc_subs.c$(OBJ)"/>
-      </file>
-      <file file_name="..\..\controller_yy_app\hardware\hard_sbus_out.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/hard_sbus_out.c$(OBJ)"/>
-      </file>
-      <file file_name="..\..\controller_yy_app\hardware\hard_sbusout_af_pump.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/hard_sbusout_af_pump.c$(OBJ)"/>
-      </file>
-      <file file_name="..\..\controller_yy_app\hardware\hard_sdio_sd.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/hard_sdio_sd.c$(OBJ)"/>
-      </file>
-      <file file_name="..\..\controller_yy_app\hardware\hard_system.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/hard_system.c$(OBJ)"/>
-      </file>
-      <file file_name="..\..\controller_yy_app\hardware\hard_system_delay.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/hard_system_delay.c$(OBJ)"/>
-      </file>
-      <file file_name="..\..\controller_yy_app\hardware\hard_system_time.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/hard_system_time.c$(OBJ)"/>
-      </file>
-      <file file_name="..\..\controller_yy_app\hardware\hard_system_timer.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/hard_system_timer.c$(OBJ)"/>
-      </file>
-    </folder>
-    <folder Name="controlware">
-      <configuration Name="Common" build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/application/controlware"/>
-      <file file_name="..\..\controller_yy_app\controlware\control_attitude.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/control_attitude.c$(OBJ)"/>
-      </file>
-      <file file_name="..\..\controller_yy_app\controlware\control_rate.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/control_rate.c$(OBJ)"/>
-      </file>
-      <file file_name="..\..\controller_yy_app\controlware\control_throttle.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/control_throttle.c$(OBJ)"/>
-      </file>
-      <file file_name="..\..\controller_yy_app\controlware\mode_attitude.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/mode_attitude.c$(OBJ)"/>
-      </file>
-      <file file_name="..\..\controller_yy_app\controlware\mode_gcs_tax_launch_run.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/mode_gcs_tax_launch_run.c$(OBJ)"/>
-      </file>
-    </folder>
-    <folder Name="middleware">
-      <folder Name="fatfs">
-        <folder Name="src">
-          <folder Name="common">
-            <configuration Name="Common" build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/application/middleware/fatfs/src/common"/>
-            <file file_name="..\..\controller_yy_app\middleware\fatfs\src\common\ff.c">
-              <configuration Name="Common" build_object_file_name="$(IntDir)/ff.c$(OBJ)"/>
+      <folder Name="matrix">
+        <configuration
+          Name="Common"
+          build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/application/matrix" />
+        <configuration Name="Debug" build_exclude_from_build="Yes" />
+        <file file_name="..\..\controller_yy_app\matrix\euler.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/euler.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\matrix\flt_butter.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/flt_butter.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\matrix\quaternion.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/quaternion.c$(OBJ)" />
+        </file>
+      </folder>
+      <folder Name="middleware">
+        <folder Name="fatfs">
+          <folder Name="src">
+            <folder Name="common">
+              <configuration
+                Name="Common"
+                build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/application/middleware/fatfs/src/common" />
+              <file file_name="..\..\controller_yy_app\middleware\fatfs\src\common\ff.c">
+                <configuration
+                  Name="Common"
+                  build_object_file_name="$(IntDir)/ff.c$(OBJ)" />
+              </file>
+              <file file_name="..\..\controller_yy_app\middleware\fatfs\src\common\ffunicode.c">
+                <configuration
+                  Name="Common"
+                  build_object_file_name="$(IntDir)/ffunicode.c$(OBJ)" />
+              </file>
+            </folder>
+            <folder Name="portable">
+              <configuration
+                Name="Common"
+                build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/application/middleware/fatfs/src/portable" />
+              <folder Name="sdxc">
+                <configuration
+                  Name="Common"
+                  build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/application/middleware/fatfs/src/portable/sdxc" />
+                <file file_name="..\..\controller_yy_app\middleware\fatfs\src\portable\sdxc\hpm_sdmmc_disk.c">
+                  <configuration
+                    Name="Common"
+                    build_object_file_name="$(IntDir)/hpm_sdmmc_disk.c$(OBJ)" />
+                </file>
+              </folder>
+              <file file_name="..\..\controller_yy_app\middleware\fatfs\src\portable\diskio.c">
+                <configuration
+                  Name="Common"
+                  build_object_file_name="$(IntDir)/diskio.c$(OBJ)" />
+              </file>
+            </folder>
+          </folder>
+        </folder>
+        <folder Name="hpm_math">
+          <folder Name="sw_dsp">
+            <configuration
+              Name="Common"
+              build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/application/middleware/hpm_math/sw_dsp" />
+            <file file_name="..\..\controller_yy_app\middleware\hpm_math\sw_dsp\hpm_math_sw.c">
+              <configuration
+                Name="Common"
+                build_object_file_name="$(IntDir)/hpm_math_sw.c$(OBJ)" />
+            </file>
+          </folder>
+        </folder>
+        <folder Name="hpm_sdmmc">
+          <folder Name="lib">
+            <configuration
+              Name="Common"
+              build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/application/middleware/hpm_sdmmc/lib" />
+            <file file_name="..\..\controller_yy_app\middleware\hpm_sdmmc\lib\hpm_sdmmc_common.c">
+              <configuration
+                Name="Common"
+                build_object_file_name="$(IntDir)/hpm_sdmmc_common.c$(OBJ)" />
+            </file>
+            <file file_name="..\..\controller_yy_app\middleware\hpm_sdmmc\lib\hpm_sdmmc_emmc.c">
+              <configuration
+                Name="Common"
+                build_object_file_name="$(IntDir)/hpm_sdmmc_emmc.c$(OBJ)" />
+            </file>
+            <file file_name="..\..\controller_yy_app\middleware\hpm_sdmmc\lib\hpm_sdmmc_host.c">
+              <configuration
+                Name="Common"
+                build_object_file_name="$(IntDir)/hpm_sdmmc_host.c$(OBJ)" />
+            </file>
+            <file file_name="..\..\controller_yy_app\middleware\hpm_sdmmc\lib\hpm_sdmmc_osal.c">
+              <configuration
+                Name="Common"
+                build_object_file_name="$(IntDir)/hpm_sdmmc_osal.c$(OBJ)" />
+            </file>
+            <file file_name="..\..\controller_yy_app\middleware\hpm_sdmmc\lib\hpm_sdmmc_sd.c">
+              <configuration
+                Name="Common"
+                build_object_file_name="$(IntDir)/hpm_sdmmc_sd.c$(OBJ)" />
             </file>
-            <file file_name="..\..\controller_yy_app\middleware\fatfs\src\common\ffunicode.c">
-              <configuration Name="Common" build_object_file_name="$(IntDir)/ffunicode.c$(OBJ)"/>
+            <file file_name="..\..\controller_yy_app\middleware\hpm_sdmmc\lib\hpm_sdmmc_sdio.c">
+              <configuration
+                Name="Common"
+                build_object_file_name="$(IntDir)/hpm_sdmmc_sdio.c$(OBJ)" />
             </file>
           </folder>
-          <folder Name="portable">
-            <configuration Name="Common" build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/application/middleware/fatfs/src/portable"/>
-            <file file_name="..\..\controller_yy_app\middleware\fatfs\src\portable\diskio.c">
-              <configuration Name="Common" build_object_file_name="$(IntDir)/diskio.c$(OBJ)"/>
+          <folder Name="port">
+            <configuration
+              Name="Common"
+              build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/application/middleware/hpm_sdmmc/port" />
+            <file file_name="..\..\controller_yy_app\middleware\hpm_sdmmc\port\hpm_sdmmc_port.c">
+              <configuration
+                Name="Common"
+                build_object_file_name="$(IntDir)/hpm_sdmmc_port.c$(OBJ)" />
             </file>
-            <folder Name="sdxc">
-              <configuration Name="Common" build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/application/middleware/fatfs/src/portable/sdxc"/>
-              <file file_name="..\..\controller_yy_app\middleware\fatfs\src\portable\sdxc\hpm_sdmmc_disk.c">
-                <configuration Name="Common" build_object_file_name="$(IntDir)/hpm_sdmmc_disk.c$(OBJ)"/>
-              </file>
-            </folder>
           </folder>
         </folder>
       </folder>
-      <folder Name="hpm_sdmmc">
-        <folder Name="lib">
-          <configuration Name="Common" build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/application/middleware/hpm_sdmmc/lib"/>
-          <file file_name="..\..\controller_yy_app\middleware\hpm_sdmmc\lib\hpm_sdmmc_host.c">
-            <configuration Name="Common" build_object_file_name="$(IntDir)/hpm_sdmmc_host.c$(OBJ)"/>
-          </file>
-          <file file_name="..\..\controller_yy_app\middleware\hpm_sdmmc\lib\hpm_sdmmc_common.c">
-            <configuration Name="Common" build_object_file_name="$(IntDir)/hpm_sdmmc_common.c$(OBJ)"/>
+      <folder Name="payload">
+        <configuration
+          Name="Common"
+          build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/application/payload" />
+        <configuration Name="Debug" build_exclude_from_build="Yes" />
+        <file file_name="..\..\controller_yy_app\payload\payload.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/payload.c$(OBJ)" />
+        </file>
+      </folder>
+      <folder Name="remote_controller">
+        <configuration
+          Name="Common"
+          build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/application/remote_controller" />
+        <configuration Name="Debug" build_exclude_from_build="Yes" />
+        <file file_name="..\..\controller_yy_app\remote_controller\rc_rock.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/rc_rock.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\remote_controller\rc_sbus.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/rc_sbus.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\remote_controller\remote_controller.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/remote_controller.c$(OBJ)" />
+        </file>
+      </folder>
+      <folder Name="software">
+        <configuration
+          Name="Common"
+          build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/application/software" />
+        <configuration Name="Debug" build_exclude_from_build="Yes" />
+        <file file_name="..\..\controller_yy_app\software\debug_printf.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/debug_printf.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\software\drv_uart.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/drv_uart.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\software\params.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/params.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\software\rkfifo.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/rkfifo.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\software\soft_can.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/soft_can.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\software\soft_can_yy.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/soft_can_yy.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\software\soft_delay.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/soft_delay.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\software\soft_flash.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/soft_flash.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\software\soft_gps.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/soft_gps.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\software\soft_gs.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/soft_gs.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\software\soft_imu.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/soft_imu.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\software\soft_motor_output.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/soft_motor_output.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\software\soft_payload.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/soft_payload.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\software\soft_port_uart4.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/soft_port_uart4.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\software\soft_rc_input.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/soft_rc_input.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\software\soft_sdcard.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/soft_sdcard.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\software\soft_system.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/soft_system.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\software\soft_time.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/soft_time.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\software\soft_timer.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/soft_timer.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\software\soft_usharprada.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/soft_usharprada.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\software\soft_voltage.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/soft_voltage.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\software\soft_warn.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/soft_warn.c$(OBJ)" />
+        </file>
+      </folder>
+      <folder Name="user_src">
+        <configuration
+          Name="Common"
+          build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/application/user_src" />
+        <file file_name="..\..\controller_yy_app\user_src\main.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/main.c$(OBJ)" />
+        </file>
+      </folder>
+      <folder Name="v8">
+        <configuration Name="Debug" build_exclude_from_build="Yes" />
+        <folder Name="v8m">
+          <configuration
+            Name="Common"
+            build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/application/v8/v8m" />
+          <file file_name="..\..\controller_yy_app\v8\v8m\bsp_V8M_adc.c">
+            <configuration
+              Name="Common"
+              build_object_file_name="$(IntDir)/bsp_V8M_adc.c$(OBJ)" />
           </file>
-          <file file_name="..\..\controller_yy_app\middleware\hpm_sdmmc\lib\hpm_sdmmc_sd.c">
-            <configuration Name="Common" build_object_file_name="$(IntDir)/hpm_sdmmc_sd.c$(OBJ)"/>
+          <file file_name="..\..\controller_yy_app\v8\v8m\bsp_V8M_flash.c">
+            <configuration
+              Name="Common"
+              build_object_file_name="$(IntDir)/bsp_V8M_flash.c$(OBJ)" />
           </file>
-          <file file_name="..\..\controller_yy_app\middleware\hpm_sdmmc\lib\hpm_sdmmc_emmc.c">
-            <configuration Name="Common" build_object_file_name="$(IntDir)/hpm_sdmmc_emmc.c$(OBJ)"/>
+          <file file_name="..\..\controller_yy_app\v8\v8m\bsp_V8M_GPIO_photo.c">
+            <configuration
+              Name="Common"
+              build_object_file_name="$(IntDir)/bsp_V8M_GPIO_photo.c$(OBJ)" />
           </file>
-          <file file_name="..\..\controller_yy_app\middleware\hpm_sdmmc\lib\hpm_sdmmc_sdio.c">
-            <configuration Name="Common" build_object_file_name="$(IntDir)/hpm_sdmmc_sdio.c$(OBJ)"/>
+          <file file_name="..\..\controller_yy_app\v8\v8m\bsp_V8M_led.c">
+            <configuration
+              Name="Common"
+              build_object_file_name="$(IntDir)/bsp_V8M_led.c$(OBJ)" />
           </file>
-          <file file_name="..\..\controller_yy_app\middleware\hpm_sdmmc\lib\hpm_sdmmc_osal.c">
-            <configuration Name="Common" build_object_file_name="$(IntDir)/hpm_sdmmc_osal.c$(OBJ)"/>
+          <file file_name="..\..\controller_yy_app\v8\v8m\bsp_V8M_pwm.c">
+            <configuration
+              Name="Common"
+              build_object_file_name="$(IntDir)/bsp_V8M_pwm.c$(OBJ)" />
           </file>
         </folder>
-        <folder Name="port">
-          <configuration Name="Common" build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/application/middleware/hpm_sdmmc/port"/>
-          <file file_name="..\..\controller_yy_app\middleware\hpm_sdmmc\port\hpm_sdmmc_port.c">
-            <configuration Name="Common" build_object_file_name="$(IntDir)/hpm_sdmmc_port.c$(OBJ)"/>
+        <folder Name="v8m_yy">
+          <configuration
+            Name="Common"
+            build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/application/v8/v8m_yy" />
+          <file file_name="..\..\controller_yy_app\v8\v8m_yy\bsp_V8M_YY_adc.c">
+            <configuration
+              Name="Common"
+              build_object_file_name="$(IntDir)/bsp_V8M_YY_adc.c$(OBJ)" />
           </file>
-        </folder>
-      </folder>
-    </folder>
-  </folder>
-  <folder Name="soc">
-    <folder Name="HPM6700">
-      <folder Name="HPM6750">
-        <configuration Name="Common" build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/soc/HPM6700/HPM6750"/>
-        <folder Name="toolchains">
-          <configuration Name="Common" build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/soc/HPM6700/HPM6750/toolchains"/>
-          <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/HPM6750/toolchains/reset.c">
-            <configuration Name="Common" build_object_file_name="$(IntDir)/reset.c$(OBJ)"/>
+          <file file_name="..\..\controller_yy_app\v8\v8m_yy\bsp_V8M_YY_led.c">
+            <configuration
+              Name="Common"
+              build_object_file_name="$(IntDir)/bsp_V8M_YY_led.c$(OBJ)" />
           </file>
-          <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/HPM6750/toolchains/trap.c">
-            <configuration Name="Common" build_object_file_name="$(IntDir)/trap.c$(OBJ)"/>
+          <file file_name="..\..\controller_yy_app\v8\v8m_yy\bsp_V8M_YY_pwm.c">
+            <configuration
+              Name="Common"
+              build_object_file_name="$(IntDir)/bsp_V8M_YY_pwm.c$(OBJ)" />
           </file>
-          <folder Name="segger">
-            <configuration Name="Common" build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/soc/HPM6700/HPM6750/toolchains/segger"/>
-            <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/HPM6750/toolchains/segger/startup.s">
-              <configuration Name="Common" build_object_file_name="$(IntDir)/startup.s$(OBJ)"/>
-            </file>
-          </folder>
         </folder>
-        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/HPM6750/system.c">
-          <configuration Name="Common" build_object_file_name="$(IntDir)/system.c$(OBJ)"/>
+      </folder>
+      <folder Name="vklink">
+        <configuration
+          Name="Common"
+          build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/application/vklink" />
+        <configuration Name="Debug" build_exclude_from_build="Yes" />
+        <file file_name="..\..\controller_yy_app\vklink\gcs_vklink_v30.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/gcs_vklink_v30.c$(OBJ)" />
         </file>
-        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/HPM6750/hpm_sysctl_drv.c">
-          <configuration Name="Common" build_object_file_name="$(IntDir)/hpm_sysctl_drv.c$(OBJ)"/>
+        <file file_name="..\..\controller_yy_app\vklink\um482.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/um482.c$(OBJ)" />
         </file>
-        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/HPM6750/hpm_l1c_drv.c">
-          <configuration Name="Common" build_object_file_name="$(IntDir)/hpm_l1c_drv.c$(OBJ)"/>
+        <file file_name="..\..\controller_yy_app\vklink\vklink.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/vklink.c$(OBJ)" />
         </file>
-        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/HPM6750/hpm_clock_drv.c">
-          <configuration Name="Common" build_object_file_name="$(IntDir)/hpm_clock_drv.c$(OBJ)"/>
+      </folder>
+    </folder>
+    <folder Name="boards">
+      <folder Name="controller_yy_board">
+        <configuration
+          Name="Common"
+          build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/boards/controller_yy_board" />
+        <file file_name="..\..\controller_yy_board\board.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/board.c$(OBJ)" />
         </file>
-        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/HPM6750/hpm_otp_drv.c">
-          <configuration Name="Common" build_object_file_name="$(IntDir)/hpm_otp_drv.c$(OBJ)"/>
+        <file file_name="..\..\controller_yy_board\pinmux.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/pinmux.c$(OBJ)" />
         </file>
-        <folder Name="boot">
-          <configuration Name="Common" build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/soc/HPM6700/HPM6750/boot"/>
-          <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/HPM6750/boot/hpm_bootheader.c">
-            <configuration Name="Common" build_object_file_name="$(IntDir)/hpm_bootheader.c$(OBJ)"/>
-          </file>
-        </folder>
       </folder>
     </folder>
-  </folder>
-  <folder Name="boards">
-    <folder Name="controller_yy_board">
-      <configuration Name="Common" build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/boards/controller_yy_board"/>
-      <file file_name="..\..\controller_yy_board\pinmux.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/pinmux.c$(OBJ)"/>
-      </file>
-      <file file_name="..\..\controller_yy_board\board.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/board.c$(OBJ)"/>
-      </file>
+    <folder Name="components">
+      <folder Name="debug_console">
+        <configuration
+          Name="Common"
+          build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/components/debug_console" />
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/components/debug_console/hpm_debug_console.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_debug_console.c$(OBJ)" />
+        </file>
+      </folder>
     </folder>
-  </folder>
-  <folder Name="drivers">
-    <folder Name="src">
-      <configuration Name="Common" build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/drivers/src"/>
-      <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_uart_drv.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/hpm_uart_drv.c$(OBJ)"/>
-      </file>
-      <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_femc_drv.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/hpm_femc_drv.c$(OBJ)"/>
-      </file>
-      <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_sdp_drv.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/hpm_sdp_drv.c$(OBJ)"/>
-      </file>
-      <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_lcdc_drv.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/hpm_lcdc_drv.c$(OBJ)"/>
-      </file>
-      <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_i2c_drv.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/hpm_i2c_drv.c$(OBJ)"/>
-      </file>
-      <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_pmp_drv.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/hpm_pmp_drv.c$(OBJ)"/>
-      </file>
-      <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_rng_drv.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/hpm_rng_drv.c$(OBJ)"/>
-      </file>
-      <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_gpio_drv.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/hpm_gpio_drv.c$(OBJ)"/>
-      </file>
-      <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_spi_drv.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/hpm_spi_drv.c$(OBJ)"/>
-      </file>
-      <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_pdma_drv.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/hpm_pdma_drv.c$(OBJ)"/>
-      </file>
-      <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_wdg_drv.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/hpm_wdg_drv.c$(OBJ)"/>
-      </file>
-      <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_dma_drv.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/hpm_dma_drv.c$(OBJ)"/>
-      </file>
-      <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_gptmr_drv.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/hpm_gptmr_drv.c$(OBJ)"/>
-      </file>
-      <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_pwm_drv.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/hpm_pwm_drv.c$(OBJ)"/>
-      </file>
-      <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_pllctl_drv.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/hpm_pllctl_drv.c$(OBJ)"/>
-      </file>
-      <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_usb_drv.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/hpm_usb_drv.c$(OBJ)"/>
-      </file>
-      <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_rtc_drv.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/hpm_rtc_drv.c$(OBJ)"/>
-      </file>
-      <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_acmp_drv.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/hpm_acmp_drv.c$(OBJ)"/>
-      </file>
-      <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_i2s_drv.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/hpm_i2s_drv.c$(OBJ)"/>
-      </file>
-      <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_dao_drv.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/hpm_dao_drv.c$(OBJ)"/>
-      </file>
-      <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_pdm_drv.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/hpm_pdm_drv.c$(OBJ)"/>
-      </file>
-      <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_vad_drv.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/hpm_vad_drv.c$(OBJ)"/>
-      </file>
-      <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_cam_drv.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/hpm_cam_drv.c$(OBJ)"/>
-      </file>
-      <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_can_drv.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/hpm_can_drv.c$(OBJ)"/>
-      </file>
-      <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_jpeg_drv.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/hpm_jpeg_drv.c$(OBJ)"/>
-      </file>
-      <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_enet_drv.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/hpm_enet_drv.c$(OBJ)"/>
-      </file>
-      <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_sdxc_drv.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/hpm_sdxc_drv.c$(OBJ)"/>
-      </file>
-      <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_adc12_drv.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/hpm_adc12_drv.c$(OBJ)"/>
-      </file>
-      <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_adc16_drv.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/hpm_adc16_drv.c$(OBJ)"/>
-      </file>
-      <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_pcfg_drv.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/hpm_pcfg_drv.c$(OBJ)"/>
-      </file>
-      <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_ptpc_drv.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/hpm_ptpc_drv.c$(OBJ)"/>
-      </file>
-      <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_mchtmr_drv.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/hpm_mchtmr_drv.c$(OBJ)"/>
-      </file>
-      <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_tamp_drv.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/hpm_tamp_drv.c$(OBJ)"/>
-      </file>
+    <folder Name="drivers">
+      <folder Name="src">
+        <configuration
+          Name="Common"
+          build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/drivers/src" />
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_acmp_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_acmp_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_adc12_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_adc12_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_adc16_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_adc16_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_cam_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_cam_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_can_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_can_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_dao_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_dao_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_dma_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_dma_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_enet_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_enet_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_femc_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_femc_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_gpio_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_gpio_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_gptmr_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_gptmr_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_i2c_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_i2c_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_i2s_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_i2s_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_jpeg_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_jpeg_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_lcdc_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_lcdc_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_mchtmr_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_mchtmr_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_pcfg_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_pcfg_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_pdm_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_pdm_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_pdma_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_pdma_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_pllctl_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_pllctl_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_pmp_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_pmp_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_ptpc_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_ptpc_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_pwm_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_pwm_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_rng_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_rng_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_rtc_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_rtc_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_sdp_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_sdp_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_sdxc_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_sdxc_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_spi_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_spi_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_tamp_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_tamp_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_uart_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_uart_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_usb_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_usb_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_vad_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_vad_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_wdg_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_wdg_drv.c$(OBJ)" />
+        </file>
+      </folder>
+    </folder>
+    <folder Name="soc">
+      <folder Name="HPM6700">
+        <folder Name="HPM6750">
+          <configuration
+            Name="Common"
+            build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/soc/HPM6700/HPM6750" />
+          <folder Name="boot">
+            <configuration
+              Name="Common"
+              build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/soc/HPM6700/HPM6750/boot" />
+            <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/HPM6750/boot/hpm_bootheader.c">
+              <configuration
+                Name="Common"
+                build_object_file_name="$(IntDir)/hpm_bootheader.c$(OBJ)" />
+            </file>
+          </folder>
+          <folder Name="toolchains">
+            <configuration
+              Name="Common"
+              build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/soc/HPM6700/HPM6750/toolchains" />
+            <folder Name="gcc">
+              <configuration
+                Name="Common"
+                build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/soc/HPM6700/HPM6750/toolchains/gcc" />
+              <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/HPM6750/toolchains/gcc/initfini.c">
+                <configuration
+                  Name="Common"
+                  build_object_file_name="$(IntDir)/initfini.c$(OBJ)" />
+              </file>
+              <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/HPM6750/toolchains/gcc/start.S">
+                <configuration
+                  Name="Common"
+                  build_object_file_name="$(IntDir)/start.S$(OBJ)" />
+              </file>
+            </folder>
+            <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/HPM6750/toolchains/reset.c">
+              <configuration
+                Name="Common"
+                build_object_file_name="$(IntDir)/reset.c$(OBJ)" />
+            </file>
+            <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/HPM6750/toolchains/trap.c">
+              <configuration
+                Name="Common"
+                build_object_file_name="$(IntDir)/trap.c$(OBJ)" />
+            </file>
+          </folder>
+          <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/HPM6750/hpm_clock_drv.c">
+            <configuration
+              Name="Common"
+              build_object_file_name="$(IntDir)/hpm_clock_drv.c$(OBJ)" />
+          </file>
+          <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/HPM6750/hpm_l1c_drv.c">
+            <configuration
+              Name="Common"
+              build_object_file_name="$(IntDir)/hpm_l1c_drv.c$(OBJ)" />
+          </file>
+          <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/HPM6750/hpm_otp_drv.c">
+            <configuration
+              Name="Common"
+              build_object_file_name="$(IntDir)/hpm_otp_drv.c$(OBJ)" />
+          </file>
+          <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/HPM6750/hpm_sysctl_drv.c">
+            <configuration
+              Name="Common"
+              build_object_file_name="$(IntDir)/hpm_sysctl_drv.c$(OBJ)" />
+          </file>
+          <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/HPM6750/system.c">
+            <configuration
+              Name="Common"
+              build_object_file_name="$(IntDir)/system.c$(OBJ)" />
+          </file>
+        </folder>
+      </folder>
     </folder>
-  </folder>
-  <folder Name="utils">
-    <configuration Name="Common" build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/utils"/>
-    <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/utils/hpm_swap.c">
-      <configuration Name="Common" build_object_file_name="$(IntDir)/hpm_swap.c$(OBJ)"/>
-    </file>
-    <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/utils/hpm_ffssi.c">
-      <configuration Name="Common" build_object_file_name="$(IntDir)/hpm_ffssi.c$(OBJ)"/>
-    </file>
-    <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/utils/hpm_crc32.c">
-      <configuration Name="Common" build_object_file_name="$(IntDir)/hpm_crc32.c$(OBJ)"/>
-    </file>
-  </folder>
-  <folder Name="components">
-    <folder Name="debug_console">
-      <configuration Name="Common" build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/components/debug_console"/>
-      <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/components/debug_console/hpm_debug_console.c">
-        <configuration Name="Common" build_object_file_name="$(IntDir)/hpm_debug_console.c$(OBJ)"/>
+    <folder Name="utils">
+      <configuration
+        Name="Common"
+        build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/utils" />
+      <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/utils/hpm_crc32.c">
+        <configuration
+          Name="Common"
+          build_object_file_name="$(IntDir)/hpm_crc32.c$(OBJ)" />
+      </file>
+      <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/utils/hpm_ffssi.c">
+        <configuration
+          Name="Common"
+          build_object_file_name="$(IntDir)/hpm_ffssi.c$(OBJ)" />
+      </file>
+      <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/utils/hpm_swap.c">
+        <configuration
+          Name="Common"
+          build_object_file_name="$(IntDir)/hpm_swap.c$(OBJ)" />
       </file>
     </folder>
-  </folder>
-
   </project>
-  <configuration
-    Name="Debug"
-    c_preprocessor_definitions="DEBUG"
-    gcc_debugging_level="Level 3"
-    gdb_server_allow_memory_access_during_execution="Yes"
-    gdb_server_ignore_checksum_errors="No"
-    gdb_server_register_access="General and Individual"
-    gcc_optimization_level="None"
-  />
-  <configuration
-    Name="Release"
-    c_preprocessor_definitions="NDEBUG"
-    gcc_debugging_level="None"
-    gcc_omit_frame_pointer="Yes"
-    gcc_optimization_level="Level 1"
-  />
-  <configuration Name="Common"
-    c_preprocessor_definitions="FLASH_XIP=1;INIT_EXT_RAM_FOR_DATA=1;HPMSOC_HAS_HPMSDK_MULTICORE=y;HPMSOC_HAS_HPMSDK_GPIO=y;HPMSOC_HAS_HPMSDK_PLIC=y;HPMSOC_HAS_HPMSDK_MCHTMR=y;HPMSOC_HAS_HPMSDK_PLICSW=y;HPMSOC_HAS_HPMSDK_GPIOM=y;HPMSOC_HAS_HPMSDK_ADC12=y;HPMSOC_HAS_HPMSDK_ADC16=y;HPMSOC_HAS_HPMSDK_ACMP=y;HPMSOC_HAS_HPMSDK_SPI=y;HPMSOC_HAS_HPMSDK_UART=y;HPMSOC_HAS_HPMSDK_CAN=y;HPMSOC_HAS_HPMSDK_WDG=y;HPMSOC_HAS_HPMSDK_MBX=y;HPMSOC_HAS_HPMSDK_PTPC=y;HPMSOC_HAS_HPMSDK_DMAMUX=y;HPMSOC_HAS_HPMSDK_DMA=y;HPMSOC_HAS_HPMSDK_RNG=y;HPMSOC_HAS_HPMSDK_KEYM=y;HPMSOC_HAS_HPMSDK_I2S=y;HPMSOC_HAS_HPMSDK_DAO=y;HPMSOC_HAS_HPMSDK_PDM=y;HPMSOC_HAS_HPMSDK_PWM=y;HPMSOC_HAS_HPMSDK_HALL=y;HPMSOC_HAS_HPMSDK_QEI=y;HPMSOC_HAS_HPMSDK_TRGM=y;HPMSOC_HAS_HPMSDK_SYNT=y;HPMSOC_HAS_HPMSDK_LCDC=y;HPMSOC_HAS_HPMSDK_CAM=y;HPMSOC_HAS_HPMSDK_PDMA=y;HPMSOC_HAS_HPMSDK_JPEG=y;HPMSOC_HAS_HPMSDK_ENET=y;HPMSOC_HAS_HPMSDK_GPTMR=y;HPMSOC_HAS_HPMSDK_USB=y;HPMSOC_HAS_HPMSDK_SDXC=y;HPMSOC_HAS_HPMSDK_CONCTL=y;HPMSOC_HAS_HPMSDK_I2C=y;HPMSOC_HAS_HPMSDK_SDP=y;HPMSOC_HAS_HPMSDK_FEMC=y;HPMSOC_HAS_HPMSDK_SYSCTL=y;HPMSOC_HAS_HPMSDK_IOC=y;HPMSOC_HAS_HPMSDK_OTP=y;HPMSOC_HAS_HPMSDK_PPOR=y;HPMSOC_HAS_HPMSDK_PCFG=y;HPMSOC_HAS_HPMSDK_PSEC=y;HPMSOC_HAS_HPMSDK_PMON=y;HPMSOC_HAS_HPMSDK_PGPR=y;HPMSOC_HAS_HPMSDK_VAD=y;HPMSOC_HAS_HPMSDK_PLLCTL=y;HPMSOC_HAS_HPMSDK_BPOR=y;HPMSOC_HAS_HPMSDK_BCFG=y;HPMSOC_HAS_HPMSDK_BUTN=y;HPMSOC_HAS_HPMSDK_BGPR=y;HPMSOC_HAS_HPMSDK_RTC=y;HPMSOC_HAS_HPMSDK_BSEC=y;HPMSOC_HAS_HPMSDK_BKEY=y;HPMSOC_HAS_HPMSDK_BMON=y;HPMSOC_HAS_HPMSDK_TAMP=y;HPMSOC_HAS_HPMSDK_MONO=y;HPMSOC_HAS_HPMSDK_PMP=y;SD_FATFS_ENABLE=1;"
-    gdb_server_write_timeout="300"
-    link_symbol_definitions="_heap_size=0x4000;_stack_size=0x4000;_flash_size=32M;_extram_size=32M;"
-    debug_cpu_registers_file="..\..\..\..\..\..\..\sdk_env\sdk_env-v1.8.0\hpm_sdk\soc\HPM6700\HPM6750\hpm_ses_riscv_cpu_regs.xml"
-    debug_register_definition_file="..\..\..\..\..\..\..\sdk_env\sdk_env-v1.8.0\hpm_sdk\soc\HPM6700\HPM6750\hpm_ses_reg.xml"
-    debug_restrict_memory_access="No"
-  />
-</solution>
+</solution>

controller_yy_app_controller_yy_board_flash_sdram_xip_debug/segger_embedded_studio/controlware_yy_app.emSession

@@ -3,25 +3,39 @@
  <Bookmarks/>
  <Breakpoints groups="Breakpoints" active_group="Breakpoints"/>
  <ExecutionProfileWindow/>
- <FrameBuffer/>
- <Memory1/>
- <Memory2/>
- <Memory3/>
- <Memory4/>
+ <FrameBuffer>
+  <FrameBufferWindow width="0" keepAspectRatio="0" zoomToFitWindow="0" showGrid="0" addressSpace="" format="0" height="0" autoEvaluate="0" scaleFactor="1" refreshPeriod="0" name="controlware_yy_app - controller_yy_board_Debug" addressText="" accessByDisplayWidth="0"/>
+ </FrameBuffer>
+ <Memory1>
+  <MemoryWindow addressSpace="" dataSize="1" autoEvaluate="0" viewMode="0" viewType="4" addressOrder="0" columnsText="" refreshPeriod="0" name="controlware_yy_app - controller_yy_board_Debug" sizeText="" addressText=""/>
+ </Memory1>
+ <Memory2>
+  <MemoryWindow addressSpace="" dataSize="1" autoEvaluate="0" viewMode="0" viewType="4" addressOrder="0" columnsText="" refreshPeriod="0" name="controlware_yy_app - controller_yy_board_Debug" sizeText="" addressText=""/>
+ </Memory2>
+ <Memory3>
+  <MemoryWindow addressSpace="" dataSize="1" autoEvaluate="0" viewMode="0" viewType="4" addressOrder="0" columnsText="" refreshPeriod="0" name="controlware_yy_app - controller_yy_board_Debug" sizeText="" addressText=""/>
+ </Memory3>
+ <Memory4>
+  <MemoryWindow addressSpace="" dataSize="1" autoEvaluate="0" viewMode="0" viewType="4" addressOrder="0" columnsText="" refreshPeriod="0" name="controlware_yy_app - controller_yy_board_Debug" sizeText="" addressText=""/>
+ </Memory4>
  <Project>
   <ProjectSessionItem path="controlware_yy_app"/>
   <ProjectSessionItem path="controlware_yy_app;controlware_yy_app - controller_yy_board"/>
   <ProjectSessionItem path="controlware_yy_app;controlware_yy_app - controller_yy_board;application"/>
-  <ProjectSessionItem path="controlware_yy_app;controlware_yy_app - controller_yy_board;application;controlware"/>
-  <ProjectSessionItem path="controlware_yy_app;controlware_yy_app - controller_yy_board;application;hardware"/>
-  <ProjectSessionItem path="controlware_yy_app;controlware_yy_app - controller_yy_board;application;matrix"/>
-  <ProjectSessionItem path="controlware_yy_app;controlware_yy_app - controller_yy_board;application;payload"/>
-  <ProjectSessionItem path="controlware_yy_app;controlware_yy_app - controller_yy_board;application;remote_controller"/>
+  <ProjectSessionItem path="controlware_yy_app;controlware_yy_app - controller_yy_board;application;user_src"/>
  </Project>
- <Register1/>
- <Register2/>
- <Register3/>
- <Register4/>
+ <Register1>
+  <RegisterWindow invisibleNodes="" visibleNodes="ABI, RV32I/pc;ABI, RV32I/ra;ABI, RV32I/sp;ABI, RV32I/gp;ABI, RV32I/tp;ABI, RV32I/a0;ABI, RV32I/a1;ABI, RV32I/a2;ABI, RV32I/a3;ABI, RV32I/a4;ABI, RV32I/a5;ABI, RV32I/a6;ABI, RV32I/a7;ABI, RV32I/t0;ABI, RV32I/t1;ABI, RV32I/t2;ABI, RV32I/t3;ABI, RV32I/t4;ABI, RV32I/t5;ABI, RV32I/t6;ABI, RV32I/s0;ABI, RV32I/s1;ABI, RV32I/s2;ABI, RV32I/s3;ABI, RV32I/s4;ABI, RV32I/s5;ABI, RV32I/s6;ABI, RV32I/s7;ABI, RV32I/s8;ABI, RV32I/s9;ABI, RV32I/s10;ABI, RV32I/s11;CPU, RV32I/pc;CPU, RV32I/x1;CPU, RV32I/x2;CPU, RV32I/x3;CPU, RV32I/x4;CPU, RV32I/x5;CPU, RV32I/x6;CPU, RV32I/x7;CPU, RV32I/x8;CPU, RV32I/x9;CPU, RV32I/x10;CPU, RV32I/x11;CPU, RV32I/x12;CPU, RV32I/x13;CPU, RV32I/x14;CPU, RV32I/x15;CPU, RV32I/x16;CPU, RV32I/x17;CPU, RV32I/x18;CPU, RV32I/x19;CPU, RV32I/x20;CPU, RV32I/x21;CPU, RV32I/x22;CPU, RV32I/x23;CPU, RV32I/x24;CPU, RV32I/x25;CPU, RV32I/x26;CPU, RV32I/x27;CPU, RV32I/x28;CPU, RV32I/x29;CPU, RV32I/x30;CPU, RV32I/x31" binaryNodes="" asciiNodes="" openNodes="ABI, RV32I;CPU, RV32I" name="controlware_yy_app - controller_yy_board_Debug" decimalNodes="" octalNodes="" unsignedNodes=""/>
+ </Register1>
+ <Register2>
+  <RegisterWindow invisibleNodes="" visibleNodes="ABI, RV32I/pc;ABI, RV32I/ra;ABI, RV32I/sp;ABI, RV32I/gp;ABI, RV32I/tp;ABI, RV32I/a0;ABI, RV32I/a1;ABI, RV32I/a2;ABI, RV32I/a3;ABI, RV32I/a4;ABI, RV32I/a5;ABI, RV32I/a6;ABI, RV32I/a7;ABI, RV32I/t0;ABI, RV32I/t1;ABI, RV32I/t2;ABI, RV32I/t3;ABI, RV32I/t4;ABI, RV32I/t5;ABI, RV32I/t6;ABI, RV32I/s0;ABI, RV32I/s1;ABI, RV32I/s2;ABI, RV32I/s3;ABI, RV32I/s4;ABI, RV32I/s5;ABI, RV32I/s6;ABI, RV32I/s7;ABI, RV32I/s8;ABI, RV32I/s9;ABI, RV32I/s10;ABI, RV32I/s11;CPU, RV32I/pc;CPU, RV32I/x1;CPU, RV32I/x2;CPU, RV32I/x3;CPU, RV32I/x4;CPU, RV32I/x5;CPU, RV32I/x6;CPU, RV32I/x7;CPU, RV32I/x8;CPU, RV32I/x9;CPU, RV32I/x10;CPU, RV32I/x11;CPU, RV32I/x12;CPU, RV32I/x13;CPU, RV32I/x14;CPU, RV32I/x15;CPU, RV32I/x16;CPU, RV32I/x17;CPU, RV32I/x18;CPU, RV32I/x19;CPU, RV32I/x20;CPU, RV32I/x21;CPU, RV32I/x22;CPU, RV32I/x23;CPU, RV32I/x24;CPU, RV32I/x25;CPU, RV32I/x26;CPU, RV32I/x27;CPU, RV32I/x28;CPU, RV32I/x29;CPU, RV32I/x30;CPU, RV32I/x31" binaryNodes="" asciiNodes="" openNodes="ABI, RV32I;CPU, RV32I" name="controlware_yy_app - controller_yy_board_Debug" decimalNodes="" octalNodes="" unsignedNodes=""/>
+ </Register2>
+ <Register3>
+  <RegisterWindow invisibleNodes="" visibleNodes="ABI, RV32I/pc;ABI, RV32I/ra;ABI, RV32I/sp;ABI, RV32I/gp;ABI, RV32I/tp;ABI, RV32I/a0;ABI, RV32I/a1;ABI, RV32I/a2;ABI, RV32I/a3;ABI, RV32I/a4;ABI, RV32I/a5;ABI, RV32I/a6;ABI, RV32I/a7;ABI, RV32I/t0;ABI, RV32I/t1;ABI, RV32I/t2;ABI, RV32I/t3;ABI, RV32I/t4;ABI, RV32I/t5;ABI, RV32I/t6;ABI, RV32I/s0;ABI, RV32I/s1;ABI, RV32I/s2;ABI, RV32I/s3;ABI, RV32I/s4;ABI, RV32I/s5;ABI, RV32I/s6;ABI, RV32I/s7;ABI, RV32I/s8;ABI, RV32I/s9;ABI, RV32I/s10;ABI, RV32I/s11;CPU, RV32I/pc;CPU, RV32I/x1;CPU, RV32I/x2;CPU, RV32I/x3;CPU, RV32I/x4;CPU, RV32I/x5;CPU, RV32I/x6;CPU, RV32I/x7;CPU, RV32I/x8;CPU, RV32I/x9;CPU, RV32I/x10;CPU, RV32I/x11;CPU, RV32I/x12;CPU, RV32I/x13;CPU, RV32I/x14;CPU, RV32I/x15;CPU, RV32I/x16;CPU, RV32I/x17;CPU, RV32I/x18;CPU, RV32I/x19;CPU, RV32I/x20;CPU, RV32I/x21;CPU, RV32I/x22;CPU, RV32I/x23;CPU, RV32I/x24;CPU, RV32I/x25;CPU, RV32I/x26;CPU, RV32I/x27;CPU, RV32I/x28;CPU, RV32I/x29;CPU, RV32I/x30;CPU, RV32I/x31" binaryNodes="" asciiNodes="" openNodes="ABI, RV32I;CPU, RV32I" name="controlware_yy_app - controller_yy_board_Debug" decimalNodes="" octalNodes="" unsignedNodes=""/>
+ </Register3>
+ <Register4>
+  <RegisterWindow invisibleNodes="" visibleNodes="ABI, RV32I/pc;ABI, RV32I/ra;ABI, RV32I/sp;ABI, RV32I/gp;ABI, RV32I/tp;ABI, RV32I/a0;ABI, RV32I/a1;ABI, RV32I/a2;ABI, RV32I/a3;ABI, RV32I/a4;ABI, RV32I/a5;ABI, RV32I/a6;ABI, RV32I/a7;ABI, RV32I/t0;ABI, RV32I/t1;ABI, RV32I/t2;ABI, RV32I/t3;ABI, RV32I/t4;ABI, RV32I/t5;ABI, RV32I/t6;ABI, RV32I/s0;ABI, RV32I/s1;ABI, RV32I/s2;ABI, RV32I/s3;ABI, RV32I/s4;ABI, RV32I/s5;ABI, RV32I/s6;ABI, RV32I/s7;ABI, RV32I/s8;ABI, RV32I/s9;ABI, RV32I/s10;ABI, RV32I/s11;CPU, RV32I/pc;CPU, RV32I/x1;CPU, RV32I/x2;CPU, RV32I/x3;CPU, RV32I/x4;CPU, RV32I/x5;CPU, RV32I/x6;CPU, RV32I/x7;CPU, RV32I/x8;CPU, RV32I/x9;CPU, RV32I/x10;CPU, RV32I/x11;CPU, RV32I/x12;CPU, RV32I/x13;CPU, RV32I/x14;CPU, RV32I/x15;CPU, RV32I/x16;CPU, RV32I/x17;CPU, RV32I/x18;CPU, RV32I/x19;CPU, RV32I/x20;CPU, RV32I/x21;CPU, RV32I/x22;CPU, RV32I/x23;CPU, RV32I/x24;CPU, RV32I/x25;CPU, RV32I/x26;CPU, RV32I/x27;CPU, RV32I/x28;CPU, RV32I/x29;CPU, RV32I/x30;CPU, RV32I/x31" binaryNodes="" asciiNodes="" openNodes="ABI, RV32I;CPU, RV32I" name="controlware_yy_app - controller_yy_board_Debug" decimalNodes="" octalNodes="" unsignedNodes=""/>
+ </Register4>
  <Threads>
   <ThreadsWindow showLists=""/>
  </Threads>
@@ -41,21 +55,10 @@
   <Watches active="0" update="Never"/>
  </Watch4>
  <Files>
-  <SessionOpenFile windowGroup="DockEditLeft" x="12" y="8" useTextEdit="1" path="../../controller_yy_app/hardware/hard_sdio_sd.c" left="0" top="0" codecName="Default"/>
-  <SessionOpenFile windowGroup="DockEditLeft" x="40" y="13" useTextEdit="1" folds0="121" path="../../controller_yy_app/middleware/hpm_sdmmc/port/hpm_sdmmc_port.c" left="0" top="0" codecName="Default"/>
-  <SessionOpenFile windowGroup="DockEditLeft" x="0" y="0" useTextEdit="1" path="../../controller_yy_app/controlware/control_attitude.c" left="0" top="0" codecName="Default"/>
-  <SessionOpenFile windowGroup="DockEditLeft" x="17" y="0" useTextEdit="1" path="../../controller_yy_app/controlware/control_rate.c" left="0" top="0" codecName="Default"/>
-  <SessionOpenFile windowGroup="DockEditLeft" x="0" y="0" useTextEdit="1" path="../../controller_yy_app/controlware/control_inc/control_throttle.h" left="0" top="0" codecName="Default"/>
-  <SessionOpenFile windowGroup="DockEditLeft" x="16" y="4" useTextEdit="1" path="../../controller_yy_app/hardware/hard_can.c" left="0" top="0" codecName="Default"/>
-  <SessionOpenFile windowGroup="DockEditLeft" x="14" y="0" useTextEdit="1" path="../../controller_yy_app/hardware/hard_flash_at45db.c" left="0" top="0" codecName="Default"/>
-  <SessionOpenFile windowGroup="DockEditLeft" x="0" y="0" useTextEdit="1" path="../../controller_yy_app/matrix/euler.c" left="0" top="0" codecName="Default"/>
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+  /* __IBMC__ = VRP */
+# define COMPILER_VERSION_MAJOR DEC(__IBMC__/100)
+# define COMPILER_VERSION_MINOR DEC(__IBMC__/10 % 10)
+# define COMPILER_VERSION_PATCH DEC(__IBMC__    % 10)
+
+#elif defined(__NVCOMPILER)
+# define COMPILER_ID "NVHPC"
+# define COMPILER_VERSION_MAJOR DEC(__NVCOMPILER_MAJOR__)
+# define COMPILER_VERSION_MINOR DEC(__NVCOMPILER_MINOR__)
+# if defined(__NVCOMPILER_PATCHLEVEL__)
+#  define COMPILER_VERSION_PATCH DEC(__NVCOMPILER_PATCHLEVEL__)
+# endif
+
+#elif defined(__PGI)
+# define COMPILER_ID "PGI"
+# define COMPILER_VERSION_MAJOR DEC(__PGIC__)
+# define COMPILER_VERSION_MINOR DEC(__PGIC_MINOR__)
+# if defined(__PGIC_PATCHLEVEL__)
+#  define COMPILER_VERSION_PATCH DEC(__PGIC_PATCHLEVEL__)
+# endif
+
+#elif defined(_CRAYC)
+# define COMPILER_ID "Cray"
+# define COMPILER_VERSION_MAJOR DEC(_RELEASE_MAJOR)
+# define COMPILER_VERSION_MINOR DEC(_RELEASE_MINOR)
+
+#elif defined(__TI_COMPILER_VERSION__)
+# define COMPILER_ID "TI"
+  /* __TI_COMPILER_VERSION__ = VVVRRRPPP */
+# define COMPILER_VERSION_MAJOR DEC(__TI_COMPILER_VERSION__/1000000)
+# define COMPILER_VERSION_MINOR DEC(__TI_COMPILER_VERSION__/1000   % 1000)
+# define COMPILER_VERSION_PATCH DEC(__TI_COMPILER_VERSION__        % 1000)
+
+#elif defined(__CLANG_FUJITSU)
+# define COMPILER_ID "FujitsuClang"
+# define COMPILER_VERSION_MAJOR DEC(__FCC_major__)
+# define COMPILER_VERSION_MINOR DEC(__FCC_minor__)
+# define COMPILER_VERSION_PATCH DEC(__FCC_patchlevel__)
+# define COMPILER_VERSION_INTERNAL_STR __clang_version__
+
+
+#elif defined(__FUJITSU)
+# define COMPILER_ID "Fujitsu"
+# if defined(__FCC_version__)
+#   define COMPILER_VERSION __FCC_version__
+# elif defined(__FCC_major__)
+#   define COMPILER_VERSION_MAJOR DEC(__FCC_major__)
+#   define COMPILER_VERSION_MINOR DEC(__FCC_minor__)
+#   define COMPILER_VERSION_PATCH DEC(__FCC_patchlevel__)
+# endif
+# if defined(__fcc_version)
+#   define COMPILER_VERSION_INTERNAL DEC(__fcc_version)
+# elif defined(__FCC_VERSION)
+#   define COMPILER_VERSION_INTERNAL DEC(__FCC_VERSION)
+# endif
+
+
+#elif defined(__ghs__)
+# define COMPILER_ID "GHS"
+/* __GHS_VERSION_NUMBER = VVVVRP */
+# ifdef __GHS_VERSION_NUMBER
+# define COMPILER_VERSION_MAJOR DEC(__GHS_VERSION_NUMBER / 100)
+# define COMPILER_VERSION_MINOR DEC(__GHS_VERSION_NUMBER / 10 % 10)
+# define COMPILER_VERSION_PATCH DEC(__GHS_VERSION_NUMBER      % 10)
+# endif
+
+#elif defined(__TINYC__)
+# define COMPILER_ID "TinyCC"
+
+#elif defined(__BCC__)
+# define COMPILER_ID "Bruce"
+
+#elif defined(__SCO_VERSION__)
+# define COMPILER_ID "SCO"
+
+#elif defined(__ARMCC_VERSION) && !defined(__clang__)
+# define COMPILER_ID "ARMCC"
+#if __ARMCC_VERSION >= 1000000
+  /* __ARMCC_VERSION = VRRPPPP */
+  # define COMPILER_VERSION_MAJOR DEC(__ARMCC_VERSION/1000000)
+  # define COMPILER_VERSION_MINOR DEC(__ARMCC_VERSION/10000 % 100)
+  # define COMPILER_VERSION_PATCH DEC(__ARMCC_VERSION     % 10000)
+#else
+  /* __ARMCC_VERSION = VRPPPP */
+  # define COMPILER_VERSION_MAJOR DEC(__ARMCC_VERSION/100000)
+  # define COMPILER_VERSION_MINOR DEC(__ARMCC_VERSION/10000 % 10)
+  # define COMPILER_VERSION_PATCH DEC(__ARMCC_VERSION    % 10000)
+#endif
+
+
+#elif defined(__clang__) && defined(__apple_build_version__)
+# define COMPILER_ID "AppleClang"
+# if defined(_MSC_VER)
+#  define SIMULATE_ID "MSVC"
+# endif
+# define COMPILER_VERSION_MAJOR DEC(__clang_major__)
+# define COMPILER_VERSION_MINOR DEC(__clang_minor__)
+# define COMPILER_VERSION_PATCH DEC(__clang_patchlevel__)
+# if defined(_MSC_VER)
+   /* _MSC_VER = VVRR */
+#  define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100)
+#  define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100)
+# endif
+# define COMPILER_VERSION_TWEAK DEC(__apple_build_version__)
+
+#elif defined(__clang__) && defined(__ARMCOMPILER_VERSION)
+# define COMPILER_ID "ARMClang"
+  # define COMPILER_VERSION_MAJOR DEC(__ARMCOMPILER_VERSION/1000000)
+  # define COMPILER_VERSION_MINOR DEC(__ARMCOMPILER_VERSION/10000 % 100)
+  # define COMPILER_VERSION_PATCH DEC(__ARMCOMPILER_VERSION     % 10000)
+# define COMPILER_VERSION_INTERNAL DEC(__ARMCOMPILER_VERSION)
+
+#elif defined(__clang__)
+# define COMPILER_ID "Clang"
+# if defined(_MSC_VER)
+#  define SIMULATE_ID "MSVC"
+# endif
+# define COMPILER_VERSION_MAJOR DEC(__clang_major__)
+# define COMPILER_VERSION_MINOR DEC(__clang_minor__)
+# define COMPILER_VERSION_PATCH DEC(__clang_patchlevel__)
+# if defined(_MSC_VER)
+   /* _MSC_VER = VVRR */
+#  define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100)
+#  define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100)
+# endif
+
+#elif defined(__LCC__) && (defined(__GNUC__) || defined(__GNUG__) || defined(__MCST__))
+# define COMPILER_ID "LCC"
+# define COMPILER_VERSION_MAJOR DEC(1)
+# if defined(__LCC__)
+#  define COMPILER_VERSION_MINOR DEC(__LCC__- 100)
+# endif
+# if defined(__LCC_MINOR__)
+#  define COMPILER_VERSION_PATCH DEC(__LCC_MINOR__)
+# endif
+# if defined(__GNUC__) && defined(__GNUC_MINOR__)
+#  define SIMULATE_ID "GNU"
+#  define SIMULATE_VERSION_MAJOR DEC(__GNUC__)
+#  define SIMULATE_VERSION_MINOR DEC(__GNUC_MINOR__)
+#  if defined(__GNUC_PATCHLEVEL__)
+#   define SIMULATE_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__)
+#  endif
+# endif
+
+#elif defined(__GNUC__)
+# define COMPILER_ID "GNU"
+# define COMPILER_VERSION_MAJOR DEC(__GNUC__)
+# if defined(__GNUC_MINOR__)
+#  define COMPILER_VERSION_MINOR DEC(__GNUC_MINOR__)
+# endif
+# if defined(__GNUC_PATCHLEVEL__)
+#  define COMPILER_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__)
+# endif
+
+#elif defined(_MSC_VER)
+# define COMPILER_ID "MSVC"
+  /* _MSC_VER = VVRR */
+# define COMPILER_VERSION_MAJOR DEC(_MSC_VER / 100)
+# define COMPILER_VERSION_MINOR DEC(_MSC_VER % 100)
+# if defined(_MSC_FULL_VER)
+#  if _MSC_VER >= 1400
+    /* _MSC_FULL_VER = VVRRPPPPP */
+#   define COMPILER_VERSION_PATCH DEC(_MSC_FULL_VER % 100000)
+#  else
+    /* _MSC_FULL_VER = VVRRPPPP */
+#   define COMPILER_VERSION_PATCH DEC(_MSC_FULL_VER % 10000)
+#  endif
+# endif
+# if defined(_MSC_BUILD)
+#  define COMPILER_VERSION_TWEAK DEC(_MSC_BUILD)
+# endif
+
+#elif defined(_ADI_COMPILER)
+# define COMPILER_ID "ADSP"
+#if defined(__VERSIONNUM__)
+  /* __VERSIONNUM__ = 0xVVRRPPTT */
+#  define COMPILER_VERSION_MAJOR DEC(__VERSIONNUM__ >> 24 & 0xFF)
+#  define COMPILER_VERSION_MINOR DEC(__VERSIONNUM__ >> 16 & 0xFF)
+#  define COMPILER_VERSION_PATCH DEC(__VERSIONNUM__ >> 8 & 0xFF)
+#  define COMPILER_VERSION_TWEAK DEC(__VERSIONNUM__ & 0xFF)
+#endif
+
+#elif defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC)
+# define COMPILER_ID "IAR"
+# if defined(__VER__) && defined(__ICCARM__)
+#  define COMPILER_VERSION_MAJOR DEC((__VER__) / 1000000)
+#  define COMPILER_VERSION_MINOR DEC(((__VER__) / 1000) % 1000)
+#  define COMPILER_VERSION_PATCH DEC((__VER__) % 1000)
+#  define COMPILER_VERSION_INTERNAL DEC(__IAR_SYSTEMS_ICC__)
+# elif defined(__VER__) && (defined(__ICCAVR__) || defined(__ICCRX__) || defined(__ICCRH850__) || defined(__ICCRL78__) || defined(__ICC430__) || defined(__ICCRISCV__) || defined(__ICCV850__) || defined(__ICC8051__) || defined(__ICCSTM8__))
+#  define COMPILER_VERSION_MAJOR DEC((__VER__) / 100)
+#  define COMPILER_VERSION_MINOR DEC((__VER__) - (((__VER__) / 100)*100))
+#  define COMPILER_VERSION_PATCH DEC(__SUBVERSION__)
+#  define COMPILER_VERSION_INTERNAL DEC(__IAR_SYSTEMS_ICC__)
+# endif
+
+#elif defined(__SDCC_VERSION_MAJOR) || defined(SDCC)
+# define COMPILER_ID "SDCC"
+# if defined(__SDCC_VERSION_MAJOR)
+#  define COMPILER_VERSION_MAJOR DEC(__SDCC_VERSION_MAJOR)
+#  define COMPILER_VERSION_MINOR DEC(__SDCC_VERSION_MINOR)
+#  define COMPILER_VERSION_PATCH DEC(__SDCC_VERSION_PATCH)
+# else
+  /* SDCC = VRP */
+#  define COMPILER_VERSION_MAJOR DEC(SDCC/100)
+#  define COMPILER_VERSION_MINOR DEC(SDCC/10 % 10)
+#  define COMPILER_VERSION_PATCH DEC(SDCC    % 10)
+# endif
+
+
+/* These compilers are either not known or too old to define an
+  identification macro.  Try to identify the platform and guess that
+  it is the native compiler.  */
+#elif defined(__hpux) || defined(__hpua)
+# define COMPILER_ID "HP"
+
+#else /* unknown compiler */
+# define COMPILER_ID ""
+#endif
+
+/* Construct the string literal in pieces to prevent the source from
+   getting matched.  Store it in a pointer rather than an array
+   because some compilers will just produce instructions to fill the
+   array rather than assigning a pointer to a static array.  */
+char const* info_compiler = "INFO" ":" "compiler[" COMPILER_ID "]";
+#ifdef SIMULATE_ID
+char const* info_simulate = "INFO" ":" "simulate[" SIMULATE_ID "]";
+#endif
+
+#ifdef __QNXNTO__
+char const* qnxnto = "INFO" ":" "qnxnto[]";
+#endif
+
+#if defined(__CRAYXT_COMPUTE_LINUX_TARGET)
+char const *info_cray = "INFO" ":" "compiler_wrapper[CrayPrgEnv]";
+#endif
+
+#define STRINGIFY_HELPER(X) #X
+#define STRINGIFY(X) STRINGIFY_HELPER(X)
+
+/* Identify known platforms by name.  */
+#if defined(__linux) || defined(__linux__) || defined(linux)
+# define PLATFORM_ID "Linux"
+
+#elif defined(__MSYS__)
+# define PLATFORM_ID "MSYS"
+
+#elif defined(__CYGWIN__)
+# define PLATFORM_ID "Cygwin"
+
+#elif defined(__MINGW32__)
+# define PLATFORM_ID "MinGW"
+
+#elif defined(__APPLE__)
+# define PLATFORM_ID "Darwin"
+
+#elif defined(_WIN32) || defined(__WIN32__) || defined(WIN32)
+# define PLATFORM_ID "Windows"
+
+#elif defined(__FreeBSD__) || defined(__FreeBSD)
+# define PLATFORM_ID "FreeBSD"
+
+#elif defined(__NetBSD__) || defined(__NetBSD)
+# define PLATFORM_ID "NetBSD"
+
+#elif defined(__OpenBSD__) || defined(__OPENBSD)
+# define PLATFORM_ID "OpenBSD"
+
+#elif defined(__sun) || defined(sun)
+# define PLATFORM_ID "SunOS"
+
+#elif defined(_AIX) || defined(__AIX) || defined(__AIX__) || defined(__aix) || defined(__aix__)
+# define PLATFORM_ID "AIX"
+
+#elif defined(__hpux) || defined(__hpux__)
+# define PLATFORM_ID "HP-UX"
+
+#elif defined(__HAIKU__)
+# define PLATFORM_ID "Haiku"
+
+#elif defined(__BeOS) || defined(__BEOS__) || defined(_BEOS)
+# define PLATFORM_ID "BeOS"
+
+#elif defined(__QNX__) || defined(__QNXNTO__)
+# define PLATFORM_ID "QNX"
+
+#elif defined(__tru64) || defined(_tru64) || defined(__TRU64__)
+# define PLATFORM_ID "Tru64"
+
+#elif defined(__riscos) || defined(__riscos__)
+# define PLATFORM_ID "RISCos"
+
+#elif defined(__sinix) || defined(__sinix__) || defined(__SINIX__)
+# define PLATFORM_ID "SINIX"
+
+#elif defined(__UNIX_SV__)
+# define PLATFORM_ID "UNIX_SV"
+
+#elif defined(__bsdos__)
+# define PLATFORM_ID "BSDOS"
+
+#elif defined(_MPRAS) || defined(MPRAS)
+# define PLATFORM_ID "MP-RAS"
+
+#elif defined(__osf) || defined(__osf__)
+# define PLATFORM_ID "OSF1"
+
+#elif defined(_SCO_SV) || defined(SCO_SV) || defined(sco_sv)
+# define PLATFORM_ID "SCO_SV"
+
+#elif defined(__ultrix) || defined(__ultrix__) || defined(_ULTRIX)
+# define PLATFORM_ID "ULTRIX"
+
+#elif defined(__XENIX__) || defined(_XENIX) || defined(XENIX)
+# define PLATFORM_ID "Xenix"
+
+#elif defined(__WATCOMC__)
+# if defined(__LINUX__)
+#  define PLATFORM_ID "Linux"
+
+# elif defined(__DOS__)
+#  define PLATFORM_ID "DOS"
+
+# elif defined(__OS2__)
+#  define PLATFORM_ID "OS2"
+
+# elif defined(__WINDOWS__)
+#  define PLATFORM_ID "Windows3x"
+
+# elif defined(__VXWORKS__)
+#  define PLATFORM_ID "VxWorks"
+
+# else /* unknown platform */
+#  define PLATFORM_ID
+# endif
+
+#elif defined(__INTEGRITY)
+# if defined(INT_178B)
+#  define PLATFORM_ID "Integrity178"
+
+# else /* regular Integrity */
+#  define PLATFORM_ID "Integrity"
+# endif
+
+# elif defined(_ADI_COMPILER)
+#  define PLATFORM_ID "ADSP"
+
+#else /* unknown platform */
+# define PLATFORM_ID
+
+#endif
+
+/* For windows compilers MSVC and Intel we can determine
+   the architecture of the compiler being used.  This is because
+   the compilers do not have flags that can change the architecture,
+   but rather depend on which compiler is being used
+*/
+#if defined(_WIN32) && defined(_MSC_VER)
+# if defined(_M_IA64)
+#  define ARCHITECTURE_ID "IA64"
+
+# elif defined(_M_ARM64EC)
+#  define ARCHITECTURE_ID "ARM64EC"
+
+# elif defined(_M_X64) || defined(_M_AMD64)
+#  define ARCHITECTURE_ID "x64"
+
+# elif defined(_M_IX86)
+#  define ARCHITECTURE_ID "X86"
+
+# elif defined(_M_ARM64)
+#  define ARCHITECTURE_ID "ARM64"
+
+# elif defined(_M_ARM)
+#  if _M_ARM == 4
+#   define ARCHITECTURE_ID "ARMV4I"
+#  elif _M_ARM == 5
+#   define ARCHITECTURE_ID "ARMV5I"
+#  else
+#   define ARCHITECTURE_ID "ARMV" STRINGIFY(_M_ARM)
+#  endif
+
+# elif defined(_M_MIPS)
+#  define ARCHITECTURE_ID "MIPS"
+
+# elif defined(_M_SH)
+#  define ARCHITECTURE_ID "SHx"
+
+# else /* unknown architecture */
+#  define ARCHITECTURE_ID ""
+# endif
+
+#elif defined(__WATCOMC__)
+# if defined(_M_I86)
+#  define ARCHITECTURE_ID "I86"
+
+# elif defined(_M_IX86)
+#  define ARCHITECTURE_ID "X86"
+
+# else /* unknown architecture */
+#  define ARCHITECTURE_ID ""
+# endif
+
+#elif defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC)
+# if defined(__ICCARM__)
+#  define ARCHITECTURE_ID "ARM"
+
+# elif defined(__ICCRX__)
+#  define ARCHITECTURE_ID "RX"
+
+# elif defined(__ICCRH850__)
+#  define ARCHITECTURE_ID "RH850"
+
+# elif defined(__ICCRL78__)
+#  define ARCHITECTURE_ID "RL78"
+
+# elif defined(__ICCRISCV__)
+#  define ARCHITECTURE_ID "RISCV"
+
+# elif defined(__ICCAVR__)
+#  define ARCHITECTURE_ID "AVR"
+
+# elif defined(__ICC430__)
+#  define ARCHITECTURE_ID "MSP430"
+
+# elif defined(__ICCV850__)
+#  define ARCHITECTURE_ID "V850"
+
+# elif defined(__ICC8051__)
+#  define ARCHITECTURE_ID "8051"
+
+# elif defined(__ICCSTM8__)
+#  define ARCHITECTURE_ID "STM8"
+
+# else /* unknown architecture */
+#  define ARCHITECTURE_ID ""
+# endif
+
+#elif defined(__ghs__)
+# if defined(__PPC64__)
+#  define ARCHITECTURE_ID "PPC64"
+
+# elif defined(__ppc__)
+#  define ARCHITECTURE_ID "PPC"
+
+# elif defined(__ARM__)
+#  define ARCHITECTURE_ID "ARM"
+
+# elif defined(__x86_64__)
+#  define ARCHITECTURE_ID "x64"
+
+# elif defined(__i386__)
+#  define ARCHITECTURE_ID "X86"
+
+# else /* unknown architecture */
+#  define ARCHITECTURE_ID ""
+# endif
+
+#elif defined(__TI_COMPILER_VERSION__)
+# if defined(__TI_ARM__)
+#  define ARCHITECTURE_ID "ARM"
+
+# elif defined(__MSP430__)
+#  define ARCHITECTURE_ID "MSP430"
+
+# elif defined(__TMS320C28XX__)
+#  define ARCHITECTURE_ID "TMS320C28x"
+
+# elif defined(__TMS320C6X__) || defined(_TMS320C6X)
+#  define ARCHITECTURE_ID "TMS320C6x"
+
+# else /* unknown architecture */
+#  define ARCHITECTURE_ID ""
+# endif
+
+# elif defined(__ADSPSHARC__)
+#  define ARCHITECTURE_ID "SHARC"
+
+# elif defined(__ADSPBLACKFIN__)
+#  define ARCHITECTURE_ID "Blackfin"
+
+#else
+#  define ARCHITECTURE_ID
+#endif
+
+/* Convert integer to decimal digit literals.  */
+#define DEC(n)                   \
+  ('0' + (((n) / 10000000)%10)), \
+  ('0' + (((n) / 1000000)%10)),  \
+  ('0' + (((n) / 100000)%10)),   \
+  ('0' + (((n) / 10000)%10)),    \
+  ('0' + (((n) / 1000)%10)),     \
+  ('0' + (((n) / 100)%10)),      \
+  ('0' + (((n) / 10)%10)),       \
+  ('0' +  ((n) % 10))
+
+/* Convert integer to hex digit literals.  */
+#define HEX(n)             \
+  ('0' + ((n)>>28 & 0xF)), \
+  ('0' + ((n)>>24 & 0xF)), \
+  ('0' + ((n)>>20 & 0xF)), \
+  ('0' + ((n)>>16 & 0xF)), \
+  ('0' + ((n)>>12 & 0xF)), \
+  ('0' + ((n)>>8  & 0xF)), \
+  ('0' + ((n)>>4  & 0xF)), \
+  ('0' + ((n)     & 0xF))
+
+/* Construct a string literal encoding the version number. */
+#ifdef COMPILER_VERSION
+char const* info_version = "INFO" ":" "compiler_version[" COMPILER_VERSION "]";
+
+/* Construct a string literal encoding the version number components. */
+#elif defined(COMPILER_VERSION_MAJOR)
+char const info_version[] = {
+  'I', 'N', 'F', 'O', ':',
+  'c','o','m','p','i','l','e','r','_','v','e','r','s','i','o','n','[',
+  COMPILER_VERSION_MAJOR,
+# ifdef COMPILER_VERSION_MINOR
+  '.', COMPILER_VERSION_MINOR,
+#  ifdef COMPILER_VERSION_PATCH
+   '.', COMPILER_VERSION_PATCH,
+#   ifdef COMPILER_VERSION_TWEAK
+    '.', COMPILER_VERSION_TWEAK,
+#   endif
+#  endif
+# endif
+  ']','\0'};
+#endif
+
+/* Construct a string literal encoding the internal version number. */
+#ifdef COMPILER_VERSION_INTERNAL
+char const info_version_internal[] = {
+  'I', 'N', 'F', 'O', ':',
+  'c','o','m','p','i','l','e','r','_','v','e','r','s','i','o','n','_',
+  'i','n','t','e','r','n','a','l','[',
+  COMPILER_VERSION_INTERNAL,']','\0'};
+#elif defined(COMPILER_VERSION_INTERNAL_STR)
+char const* info_version_internal = "INFO" ":" "compiler_version_internal[" COMPILER_VERSION_INTERNAL_STR "]";
+#endif
+
+/* Construct a string literal encoding the version number components. */
+#ifdef SIMULATE_VERSION_MAJOR
+char const info_simulate_version[] = {
+  'I', 'N', 'F', 'O', ':',
+  's','i','m','u','l','a','t','e','_','v','e','r','s','i','o','n','[',
+  SIMULATE_VERSION_MAJOR,
+# ifdef SIMULATE_VERSION_MINOR
+  '.', SIMULATE_VERSION_MINOR,
+#  ifdef SIMULATE_VERSION_PATCH
+   '.', SIMULATE_VERSION_PATCH,
+#   ifdef SIMULATE_VERSION_TWEAK
+    '.', SIMULATE_VERSION_TWEAK,
+#   endif
+#  endif
+# endif
+  ']','\0'};
+#endif
+
+/* Construct the string literal in pieces to prevent the source from
+   getting matched.  Store it in a pointer rather than an array
+   because some compilers will just produce instructions to fill the
+   array rather than assigning a pointer to a static array.  */
+char const* info_platform = "INFO" ":" "platform[" PLATFORM_ID "]";
+char const* info_arch = "INFO" ":" "arch[" ARCHITECTURE_ID "]";
+
+
+
+#if !defined(__STDC__) && !defined(__clang__)
+# if defined(_MSC_VER) || defined(__ibmxl__) || defined(__IBMC__)
+#  define C_VERSION "90"
+# else
+#  define C_VERSION
+# endif
+#elif __STDC_VERSION__ > 201710L
+# define C_VERSION "23"
+#elif __STDC_VERSION__ >= 201710L
+# define C_VERSION "17"
+#elif __STDC_VERSION__ >= 201000L
+# define C_VERSION "11"
+#elif __STDC_VERSION__ >= 199901L
+# define C_VERSION "99"
+#else
+# define C_VERSION "90"
+#endif
+const char* info_language_standard_default =
+  "INFO" ":" "standard_default[" C_VERSION "]";
+
+const char* info_language_extensions_default = "INFO" ":" "extensions_default["
+#if (defined(__clang__) || defined(__GNUC__) || defined(__xlC__) ||           \
+     defined(__TI_COMPILER_VERSION__)) &&                                     \
+  !defined(__STRICT_ANSI__)
+  "ON"
+#else
+  "OFF"
+#endif
+"]";
+
+/*--------------------------------------------------------------------------*/
+
+#ifdef ID_VOID_MAIN
+void main() {}
+#else
+# if defined(__CLASSIC_C__)
+int main(argc, argv) int argc; char *argv[];
+# else
+int main(int argc, char* argv[])
+# endif
+{
+  int require = 0;
+  require += info_compiler[argc];
+  require += info_platform[argc];
+  require += info_arch[argc];
+#ifdef COMPILER_VERSION_MAJOR
+  require += info_version[argc];
+#endif
+#ifdef COMPILER_VERSION_INTERNAL
+  require += info_version_internal[argc];
+#endif
+#ifdef SIMULATE_ID
+  require += info_simulate[argc];
+#endif
+#ifdef SIMULATE_VERSION_MAJOR
+  require += info_simulate_version[argc];
+#endif
+#if defined(__CRAYXT_COMPUTE_LINUX_TARGET)
+  require += info_cray[argc];
+#endif
+  require += info_language_standard_default[argc];
+  require += info_language_extensions_default[argc];
+  (void)argv;
+  return require;
+}
+#endif

controller_yy_app_controller_yy_board_flash_xip_debug/CMakeFiles/3.24.0/CompilerIdCXX/CMakeCXXCompilerId.cpp

@@ -0,0 +1,826 @@
+/* This source file must have a .cpp extension so that all C++ compilers
+   recognize the extension without flags.  Borland does not know .cxx for
+   example.  */
+#ifndef __cplusplus
+# error "A C compiler has been selected for C++."
+#endif
+
+#if !defined(__has_include)
+/* If the compiler does not have __has_include, pretend the answer is
+   always no.  */
+#  define __has_include(x) 0
+#endif
+
+
+/* Version number components: V=Version, R=Revision, P=Patch
+   Version date components:   YYYY=Year, MM=Month,   DD=Day  */
+
+#if defined(__COMO__)
+# define COMPILER_ID "Comeau"
+  /* __COMO_VERSION__ = VRR */
+# define COMPILER_VERSION_MAJOR DEC(__COMO_VERSION__ / 100)
+# define COMPILER_VERSION_MINOR DEC(__COMO_VERSION__ % 100)
+
+#elif defined(__INTEL_COMPILER) || defined(__ICC)
+# define COMPILER_ID "Intel"
+# if defined(_MSC_VER)
+#  define SIMULATE_ID "MSVC"
+# endif
+# if defined(__GNUC__)
+#  define SIMULATE_ID "GNU"
+# endif
+  /* __INTEL_COMPILER = VRP prior to 2021, and then VVVV for 2021 and later,
+     except that a few beta releases use the old format with V=2021.  */
+# if __INTEL_COMPILER < 2021 || __INTEL_COMPILER == 202110 || __INTEL_COMPILER == 202111
+#  define COMPILER_VERSION_MAJOR DEC(__INTEL_COMPILER/100)
+#  define COMPILER_VERSION_MINOR DEC(__INTEL_COMPILER/10 % 10)
+#  if defined(__INTEL_COMPILER_UPDATE)
+#   define COMPILER_VERSION_PATCH DEC(__INTEL_COMPILER_UPDATE)
+#  else
+#   define COMPILER_VERSION_PATCH DEC(__INTEL_COMPILER   % 10)
+#  endif
+# else
+#  define COMPILER_VERSION_MAJOR DEC(__INTEL_COMPILER)
+#  define COMPILER_VERSION_MINOR DEC(__INTEL_COMPILER_UPDATE)
+   /* The third version component from --version is an update index,
+      but no macro is provided for it.  */
+#  define COMPILER_VERSION_PATCH DEC(0)
+# endif
+# if defined(__INTEL_COMPILER_BUILD_DATE)
+   /* __INTEL_COMPILER_BUILD_DATE = YYYYMMDD */
+#  define COMPILER_VERSION_TWEAK DEC(__INTEL_COMPILER_BUILD_DATE)
+# endif
+# if defined(_MSC_VER)
+   /* _MSC_VER = VVRR */
+#  define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100)
+#  define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100)
+# endif
+# if defined(__GNUC__)
+#  define SIMULATE_VERSION_MAJOR DEC(__GNUC__)
+# elif defined(__GNUG__)
+#  define SIMULATE_VERSION_MAJOR DEC(__GNUG__)
+# endif
+# if defined(__GNUC_MINOR__)
+#  define SIMULATE_VERSION_MINOR DEC(__GNUC_MINOR__)
+# endif
+# if defined(__GNUC_PATCHLEVEL__)
+#  define SIMULATE_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__)
+# endif
+
+#elif (defined(__clang__) && defined(__INTEL_CLANG_COMPILER)) || defined(__INTEL_LLVM_COMPILER)
+# define COMPILER_ID "IntelLLVM"
+#if defined(_MSC_VER)
+# define SIMULATE_ID "MSVC"
+#endif
+#if defined(__GNUC__)
+# define SIMULATE_ID "GNU"
+#endif
+/* __INTEL_LLVM_COMPILER = VVVVRP prior to 2021.2.0, VVVVRRPP for 2021.2.0 and
+ * later.  Look for 6 digit vs. 8 digit version number to decide encoding.
+ * VVVV is no smaller than the current year when a version is released.
+ */
+#if __INTEL_LLVM_COMPILER < 1000000L
+# define COMPILER_VERSION_MAJOR DEC(__INTEL_LLVM_COMPILER/100)
+# define COMPILER_VERSION_MINOR DEC(__INTEL_LLVM_COMPILER/10 % 10)
+# define COMPILER_VERSION_PATCH DEC(__INTEL_LLVM_COMPILER    % 10)
+#else
+# define COMPILER_VERSION_MAJOR DEC(__INTEL_LLVM_COMPILER/10000)
+# define COMPILER_VERSION_MINOR DEC(__INTEL_LLVM_COMPILER/100 % 100)
+# define COMPILER_VERSION_PATCH DEC(__INTEL_LLVM_COMPILER     % 100)
+#endif
+#if defined(_MSC_VER)
+  /* _MSC_VER = VVRR */
+# define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100)
+# define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100)
+#endif
+#if defined(__GNUC__)
+# define SIMULATE_VERSION_MAJOR DEC(__GNUC__)
+#elif defined(__GNUG__)
+# define SIMULATE_VERSION_MAJOR DEC(__GNUG__)
+#endif
+#if defined(__GNUC_MINOR__)
+# define SIMULATE_VERSION_MINOR DEC(__GNUC_MINOR__)
+#endif
+#if defined(__GNUC_PATCHLEVEL__)
+# define SIMULATE_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__)
+#endif
+
+#elif defined(__PATHCC__)
+# define COMPILER_ID "PathScale"
+# define COMPILER_VERSION_MAJOR DEC(__PATHCC__)
+# define COMPILER_VERSION_MINOR DEC(__PATHCC_MINOR__)
+# if defined(__PATHCC_PATCHLEVEL__)
+#  define COMPILER_VERSION_PATCH DEC(__PATHCC_PATCHLEVEL__)
+# endif
+
+#elif defined(__BORLANDC__) && defined(__CODEGEARC_VERSION__)
+# define COMPILER_ID "Embarcadero"
+# define COMPILER_VERSION_MAJOR HEX(__CODEGEARC_VERSION__>>24 & 0x00FF)
+# define COMPILER_VERSION_MINOR HEX(__CODEGEARC_VERSION__>>16 & 0x00FF)
+# define COMPILER_VERSION_PATCH DEC(__CODEGEARC_VERSION__     & 0xFFFF)
+
+#elif defined(__BORLANDC__)
+# define COMPILER_ID "Borland"
+  /* __BORLANDC__ = 0xVRR */
+# define COMPILER_VERSION_MAJOR HEX(__BORLANDC__>>8)
+# define COMPILER_VERSION_MINOR HEX(__BORLANDC__ & 0xFF)
+
+#elif defined(__WATCOMC__) && __WATCOMC__ < 1200
+# define COMPILER_ID "Watcom"
+   /* __WATCOMC__ = VVRR */
+# define COMPILER_VERSION_MAJOR DEC(__WATCOMC__ / 100)
+# define COMPILER_VERSION_MINOR DEC((__WATCOMC__ / 10) % 10)
+# if (__WATCOMC__ % 10) > 0
+#  define COMPILER_VERSION_PATCH DEC(__WATCOMC__ % 10)
+# endif
+
+#elif defined(__WATCOMC__)
+# define COMPILER_ID "OpenWatcom"
+   /* __WATCOMC__ = VVRP + 1100 */
+# define COMPILER_VERSION_MAJOR DEC((__WATCOMC__ - 1100) / 100)
+# define COMPILER_VERSION_MINOR DEC((__WATCOMC__ / 10) % 10)
+# if (__WATCOMC__ % 10) > 0
+#  define COMPILER_VERSION_PATCH DEC(__WATCOMC__ % 10)
+# endif
+
+#elif defined(__SUNPRO_CC)
+# define COMPILER_ID "SunPro"
+# if __SUNPRO_CC >= 0x5100
+   /* __SUNPRO_CC = 0xVRRP */
+#  define COMPILER_VERSION_MAJOR HEX(__SUNPRO_CC>>12)
+#  define COMPILER_VERSION_MINOR HEX(__SUNPRO_CC>>4 & 0xFF)
+#  define COMPILER_VERSION_PATCH HEX(__SUNPRO_CC    & 0xF)
+# else
+   /* __SUNPRO_CC = 0xVRP */
+#  define COMPILER_VERSION_MAJOR HEX(__SUNPRO_CC>>8)
+#  define COMPILER_VERSION_MINOR HEX(__SUNPRO_CC>>4 & 0xF)
+#  define COMPILER_VERSION_PATCH HEX(__SUNPRO_CC    & 0xF)
+# endif
+
+#elif defined(__HP_aCC)
+# define COMPILER_ID "HP"
+  /* __HP_aCC = VVRRPP */
+# define COMPILER_VERSION_MAJOR DEC(__HP_aCC/10000)
+# define COMPILER_VERSION_MINOR DEC(__HP_aCC/100 % 100)
+# define COMPILER_VERSION_PATCH DEC(__HP_aCC     % 100)
+
+#elif defined(__DECCXX)
+# define COMPILER_ID "Compaq"
+  /* __DECCXX_VER = VVRRTPPPP */
+# define COMPILER_VERSION_MAJOR DEC(__DECCXX_VER/10000000)
+# define COMPILER_VERSION_MINOR DEC(__DECCXX_VER/100000  % 100)
+# define COMPILER_VERSION_PATCH DEC(__DECCXX_VER         % 10000)
+
+#elif defined(__IBMCPP__) && defined(__COMPILER_VER__)
+# define COMPILER_ID "zOS"
+  /* __IBMCPP__ = VRP */
+# define COMPILER_VERSION_MAJOR DEC(__IBMCPP__/100)
+# define COMPILER_VERSION_MINOR DEC(__IBMCPP__/10 % 10)
+# define COMPILER_VERSION_PATCH DEC(__IBMCPP__    % 10)
+
+#elif defined(__open_xl__) && defined(__clang__)
+# define COMPILER_ID "IBMClang"
+# define COMPILER_VERSION_MAJOR DEC(__open_xl_version__)
+# define COMPILER_VERSION_MINOR DEC(__open_xl_release__)
+# define COMPILER_VERSION_PATCH DEC(__open_xl_modification__)
+# define COMPILER_VERSION_TWEAK DEC(__open_xl_ptf_fix_level__)
+
+
+#elif defined(__ibmxl__) && defined(__clang__)
+# define COMPILER_ID "XLClang"
+# define COMPILER_VERSION_MAJOR DEC(__ibmxl_version__)
+# define COMPILER_VERSION_MINOR DEC(__ibmxl_release__)
+# define COMPILER_VERSION_PATCH DEC(__ibmxl_modification__)
+# define COMPILER_VERSION_TWEAK DEC(__ibmxl_ptf_fix_level__)
+
+
+#elif defined(__IBMCPP__) && !defined(__COMPILER_VER__) && __IBMCPP__ >= 800
+# define COMPILER_ID "XL"
+  /* __IBMCPP__ = VRP */
+# define COMPILER_VERSION_MAJOR DEC(__IBMCPP__/100)
+# define COMPILER_VERSION_MINOR DEC(__IBMCPP__/10 % 10)
+# define COMPILER_VERSION_PATCH DEC(__IBMCPP__    % 10)
+
+#elif defined(__IBMCPP__) && !defined(__COMPILER_VER__) && __IBMCPP__ < 800
+# define COMPILER_ID "VisualAge"
+  /* __IBMCPP__ = VRP */
+# define COMPILER_VERSION_MAJOR DEC(__IBMCPP__/100)
+# define COMPILER_VERSION_MINOR DEC(__IBMCPP__/10 % 10)
+# define COMPILER_VERSION_PATCH DEC(__IBMCPP__    % 10)
+
+#elif defined(__NVCOMPILER)
+# define COMPILER_ID "NVHPC"
+# define COMPILER_VERSION_MAJOR DEC(__NVCOMPILER_MAJOR__)
+# define COMPILER_VERSION_MINOR DEC(__NVCOMPILER_MINOR__)
+# if defined(__NVCOMPILER_PATCHLEVEL__)
+#  define COMPILER_VERSION_PATCH DEC(__NVCOMPILER_PATCHLEVEL__)
+# endif
+
+#elif defined(__PGI)
+# define COMPILER_ID "PGI"
+# define COMPILER_VERSION_MAJOR DEC(__PGIC__)
+# define COMPILER_VERSION_MINOR DEC(__PGIC_MINOR__)
+# if defined(__PGIC_PATCHLEVEL__)
+#  define COMPILER_VERSION_PATCH DEC(__PGIC_PATCHLEVEL__)
+# endif
+
+#elif defined(_CRAYC)
+# define COMPILER_ID "Cray"
+# define COMPILER_VERSION_MAJOR DEC(_RELEASE_MAJOR)
+# define COMPILER_VERSION_MINOR DEC(_RELEASE_MINOR)
+
+#elif defined(__TI_COMPILER_VERSION__)
+# define COMPILER_ID "TI"
+  /* __TI_COMPILER_VERSION__ = VVVRRRPPP */
+# define COMPILER_VERSION_MAJOR DEC(__TI_COMPILER_VERSION__/1000000)
+# define COMPILER_VERSION_MINOR DEC(__TI_COMPILER_VERSION__/1000   % 1000)
+# define COMPILER_VERSION_PATCH DEC(__TI_COMPILER_VERSION__        % 1000)
+
+#elif defined(__CLANG_FUJITSU)
+# define COMPILER_ID "FujitsuClang"
+# define COMPILER_VERSION_MAJOR DEC(__FCC_major__)
+# define COMPILER_VERSION_MINOR DEC(__FCC_minor__)
+# define COMPILER_VERSION_PATCH DEC(__FCC_patchlevel__)
+# define COMPILER_VERSION_INTERNAL_STR __clang_version__
+
+
+#elif defined(__FUJITSU)
+# define COMPILER_ID "Fujitsu"
+# if defined(__FCC_version__)
+#   define COMPILER_VERSION __FCC_version__
+# elif defined(__FCC_major__)
+#   define COMPILER_VERSION_MAJOR DEC(__FCC_major__)
+#   define COMPILER_VERSION_MINOR DEC(__FCC_minor__)
+#   define COMPILER_VERSION_PATCH DEC(__FCC_patchlevel__)
+# endif
+# if defined(__fcc_version)
+#   define COMPILER_VERSION_INTERNAL DEC(__fcc_version)
+# elif defined(__FCC_VERSION)
+#   define COMPILER_VERSION_INTERNAL DEC(__FCC_VERSION)
+# endif
+
+
+#elif defined(__ghs__)
+# define COMPILER_ID "GHS"
+/* __GHS_VERSION_NUMBER = VVVVRP */
+# ifdef __GHS_VERSION_NUMBER
+# define COMPILER_VERSION_MAJOR DEC(__GHS_VERSION_NUMBER / 100)
+# define COMPILER_VERSION_MINOR DEC(__GHS_VERSION_NUMBER / 10 % 10)
+# define COMPILER_VERSION_PATCH DEC(__GHS_VERSION_NUMBER      % 10)
+# endif
+
+#elif defined(__SCO_VERSION__)
+# define COMPILER_ID "SCO"
+
+#elif defined(__ARMCC_VERSION) && !defined(__clang__)
+# define COMPILER_ID "ARMCC"
+#if __ARMCC_VERSION >= 1000000
+  /* __ARMCC_VERSION = VRRPPPP */
+  # define COMPILER_VERSION_MAJOR DEC(__ARMCC_VERSION/1000000)
+  # define COMPILER_VERSION_MINOR DEC(__ARMCC_VERSION/10000 % 100)
+  # define COMPILER_VERSION_PATCH DEC(__ARMCC_VERSION     % 10000)
+#else
+  /* __ARMCC_VERSION = VRPPPP */
+  # define COMPILER_VERSION_MAJOR DEC(__ARMCC_VERSION/100000)
+  # define COMPILER_VERSION_MINOR DEC(__ARMCC_VERSION/10000 % 10)
+  # define COMPILER_VERSION_PATCH DEC(__ARMCC_VERSION    % 10000)
+#endif
+
+
+#elif defined(__clang__) && defined(__apple_build_version__)
+# define COMPILER_ID "AppleClang"
+# if defined(_MSC_VER)
+#  define SIMULATE_ID "MSVC"
+# endif
+# define COMPILER_VERSION_MAJOR DEC(__clang_major__)
+# define COMPILER_VERSION_MINOR DEC(__clang_minor__)
+# define COMPILER_VERSION_PATCH DEC(__clang_patchlevel__)
+# if defined(_MSC_VER)
+   /* _MSC_VER = VVRR */
+#  define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100)
+#  define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100)
+# endif
+# define COMPILER_VERSION_TWEAK DEC(__apple_build_version__)
+
+#elif defined(__clang__) && defined(__ARMCOMPILER_VERSION)
+# define COMPILER_ID "ARMClang"
+  # define COMPILER_VERSION_MAJOR DEC(__ARMCOMPILER_VERSION/1000000)
+  # define COMPILER_VERSION_MINOR DEC(__ARMCOMPILER_VERSION/10000 % 100)
+  # define COMPILER_VERSION_PATCH DEC(__ARMCOMPILER_VERSION     % 10000)
+# define COMPILER_VERSION_INTERNAL DEC(__ARMCOMPILER_VERSION)
+
+#elif defined(__clang__)
+# define COMPILER_ID "Clang"
+# if defined(_MSC_VER)
+#  define SIMULATE_ID "MSVC"
+# endif
+# define COMPILER_VERSION_MAJOR DEC(__clang_major__)
+# define COMPILER_VERSION_MINOR DEC(__clang_minor__)
+# define COMPILER_VERSION_PATCH DEC(__clang_patchlevel__)
+# if defined(_MSC_VER)
+   /* _MSC_VER = VVRR */
+#  define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100)
+#  define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100)
+# endif
+
+#elif defined(__LCC__) && (defined(__GNUC__) || defined(__GNUG__) || defined(__MCST__))
+# define COMPILER_ID "LCC"
+# define COMPILER_VERSION_MAJOR DEC(1)
+# if defined(__LCC__)
+#  define COMPILER_VERSION_MINOR DEC(__LCC__- 100)
+# endif
+# if defined(__LCC_MINOR__)
+#  define COMPILER_VERSION_PATCH DEC(__LCC_MINOR__)
+# endif
+# if defined(__GNUC__) && defined(__GNUC_MINOR__)
+#  define SIMULATE_ID "GNU"
+#  define SIMULATE_VERSION_MAJOR DEC(__GNUC__)
+#  define SIMULATE_VERSION_MINOR DEC(__GNUC_MINOR__)
+#  if defined(__GNUC_PATCHLEVEL__)
+#   define SIMULATE_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__)
+#  endif
+# endif
+
+#elif defined(__GNUC__) || defined(__GNUG__)
+# define COMPILER_ID "GNU"
+# if defined(__GNUC__)
+#  define COMPILER_VERSION_MAJOR DEC(__GNUC__)
+# else
+#  define COMPILER_VERSION_MAJOR DEC(__GNUG__)
+# endif
+# if defined(__GNUC_MINOR__)
+#  define COMPILER_VERSION_MINOR DEC(__GNUC_MINOR__)
+# endif
+# if defined(__GNUC_PATCHLEVEL__)
+#  define COMPILER_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__)
+# endif
+
+#elif defined(_MSC_VER)
+# define COMPILER_ID "MSVC"
+  /* _MSC_VER = VVRR */
+# define COMPILER_VERSION_MAJOR DEC(_MSC_VER / 100)
+# define COMPILER_VERSION_MINOR DEC(_MSC_VER % 100)
+# if defined(_MSC_FULL_VER)
+#  if _MSC_VER >= 1400
+    /* _MSC_FULL_VER = VVRRPPPPP */
+#   define COMPILER_VERSION_PATCH DEC(_MSC_FULL_VER % 100000)
+#  else
+    /* _MSC_FULL_VER = VVRRPPPP */
+#   define COMPILER_VERSION_PATCH DEC(_MSC_FULL_VER % 10000)
+#  endif
+# endif
+# if defined(_MSC_BUILD)
+#  define COMPILER_VERSION_TWEAK DEC(_MSC_BUILD)
+# endif
+
+#elif defined(_ADI_COMPILER)
+# define COMPILER_ID "ADSP"
+#if defined(__VERSIONNUM__)
+  /* __VERSIONNUM__ = 0xVVRRPPTT */
+#  define COMPILER_VERSION_MAJOR DEC(__VERSIONNUM__ >> 24 & 0xFF)
+#  define COMPILER_VERSION_MINOR DEC(__VERSIONNUM__ >> 16 & 0xFF)
+#  define COMPILER_VERSION_PATCH DEC(__VERSIONNUM__ >> 8 & 0xFF)
+#  define COMPILER_VERSION_TWEAK DEC(__VERSIONNUM__ & 0xFF)
+#endif
+
+#elif defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC)
+# define COMPILER_ID "IAR"
+# if defined(__VER__) && defined(__ICCARM__)
+#  define COMPILER_VERSION_MAJOR DEC((__VER__) / 1000000)
+#  define COMPILER_VERSION_MINOR DEC(((__VER__) / 1000) % 1000)
+#  define COMPILER_VERSION_PATCH DEC((__VER__) % 1000)
+#  define COMPILER_VERSION_INTERNAL DEC(__IAR_SYSTEMS_ICC__)
+# elif defined(__VER__) && (defined(__ICCAVR__) || defined(__ICCRX__) || defined(__ICCRH850__) || defined(__ICCRL78__) || defined(__ICC430__) || defined(__ICCRISCV__) || defined(__ICCV850__) || defined(__ICC8051__) || defined(__ICCSTM8__))
+#  define COMPILER_VERSION_MAJOR DEC((__VER__) / 100)
+#  define COMPILER_VERSION_MINOR DEC((__VER__) - (((__VER__) / 100)*100))
+#  define COMPILER_VERSION_PATCH DEC(__SUBVERSION__)
+#  define COMPILER_VERSION_INTERNAL DEC(__IAR_SYSTEMS_ICC__)
+# endif
+
+
+/* These compilers are either not known or too old to define an
+  identification macro.  Try to identify the platform and guess that
+  it is the native compiler.  */
+#elif defined(__hpux) || defined(__hpua)
+# define COMPILER_ID "HP"
+
+#else /* unknown compiler */
+# define COMPILER_ID ""
+#endif
+
+/* Construct the string literal in pieces to prevent the source from
+   getting matched.  Store it in a pointer rather than an array
+   because some compilers will just produce instructions to fill the
+   array rather than assigning a pointer to a static array.  */
+char const* info_compiler = "INFO" ":" "compiler[" COMPILER_ID "]";
+#ifdef SIMULATE_ID
+char const* info_simulate = "INFO" ":" "simulate[" SIMULATE_ID "]";
+#endif
+
+#ifdef __QNXNTO__
+char const* qnxnto = "INFO" ":" "qnxnto[]";
+#endif
+
+#if defined(__CRAYXT_COMPUTE_LINUX_TARGET)
+char const *info_cray = "INFO" ":" "compiler_wrapper[CrayPrgEnv]";
+#endif
+
+#define STRINGIFY_HELPER(X) #X
+#define STRINGIFY(X) STRINGIFY_HELPER(X)
+
+/* Identify known platforms by name.  */
+#if defined(__linux) || defined(__linux__) || defined(linux)
+# define PLATFORM_ID "Linux"
+
+#elif defined(__MSYS__)
+# define PLATFORM_ID "MSYS"
+
+#elif defined(__CYGWIN__)
+# define PLATFORM_ID "Cygwin"
+
+#elif defined(__MINGW32__)
+# define PLATFORM_ID "MinGW"
+
+#elif defined(__APPLE__)
+# define PLATFORM_ID "Darwin"
+
+#elif defined(_WIN32) || defined(__WIN32__) || defined(WIN32)
+# define PLATFORM_ID "Windows"
+
+#elif defined(__FreeBSD__) || defined(__FreeBSD)
+# define PLATFORM_ID "FreeBSD"
+
+#elif defined(__NetBSD__) || defined(__NetBSD)
+# define PLATFORM_ID "NetBSD"
+
+#elif defined(__OpenBSD__) || defined(__OPENBSD)
+# define PLATFORM_ID "OpenBSD"
+
+#elif defined(__sun) || defined(sun)
+# define PLATFORM_ID "SunOS"
+
+#elif defined(_AIX) || defined(__AIX) || defined(__AIX__) || defined(__aix) || defined(__aix__)
+# define PLATFORM_ID "AIX"
+
+#elif defined(__hpux) || defined(__hpux__)
+# define PLATFORM_ID "HP-UX"
+
+#elif defined(__HAIKU__)
+# define PLATFORM_ID "Haiku"
+
+#elif defined(__BeOS) || defined(__BEOS__) || defined(_BEOS)
+# define PLATFORM_ID "BeOS"
+
+#elif defined(__QNX__) || defined(__QNXNTO__)
+# define PLATFORM_ID "QNX"
+
+#elif defined(__tru64) || defined(_tru64) || defined(__TRU64__)
+# define PLATFORM_ID "Tru64"
+
+#elif defined(__riscos) || defined(__riscos__)
+# define PLATFORM_ID "RISCos"
+
+#elif defined(__sinix) || defined(__sinix__) || defined(__SINIX__)
+# define PLATFORM_ID "SINIX"
+
+#elif defined(__UNIX_SV__)
+# define PLATFORM_ID "UNIX_SV"
+
+#elif defined(__bsdos__)
+# define PLATFORM_ID "BSDOS"
+
+#elif defined(_MPRAS) || defined(MPRAS)
+# define PLATFORM_ID "MP-RAS"
+
+#elif defined(__osf) || defined(__osf__)
+# define PLATFORM_ID "OSF1"
+
+#elif defined(_SCO_SV) || defined(SCO_SV) || defined(sco_sv)
+# define PLATFORM_ID "SCO_SV"
+
+#elif defined(__ultrix) || defined(__ultrix__) || defined(_ULTRIX)
+# define PLATFORM_ID "ULTRIX"
+
+#elif defined(__XENIX__) || defined(_XENIX) || defined(XENIX)
+# define PLATFORM_ID "Xenix"
+
+#elif defined(__WATCOMC__)
+# if defined(__LINUX__)
+#  define PLATFORM_ID "Linux"
+
+# elif defined(__DOS__)
+#  define PLATFORM_ID "DOS"
+
+# elif defined(__OS2__)
+#  define PLATFORM_ID "OS2"
+
+# elif defined(__WINDOWS__)
+#  define PLATFORM_ID "Windows3x"
+
+# elif defined(__VXWORKS__)
+#  define PLATFORM_ID "VxWorks"
+
+# else /* unknown platform */
+#  define PLATFORM_ID
+# endif
+
+#elif defined(__INTEGRITY)
+# if defined(INT_178B)
+#  define PLATFORM_ID "Integrity178"
+
+# else /* regular Integrity */
+#  define PLATFORM_ID "Integrity"
+# endif
+
+# elif defined(_ADI_COMPILER)
+#  define PLATFORM_ID "ADSP"
+
+#else /* unknown platform */
+# define PLATFORM_ID
+
+#endif
+
+/* For windows compilers MSVC and Intel we can determine
+   the architecture of the compiler being used.  This is because
+   the compilers do not have flags that can change the architecture,
+   but rather depend on which compiler is being used
+*/
+#if defined(_WIN32) && defined(_MSC_VER)
+# if defined(_M_IA64)
+#  define ARCHITECTURE_ID "IA64"
+
+# elif defined(_M_ARM64EC)
+#  define ARCHITECTURE_ID "ARM64EC"
+
+# elif defined(_M_X64) || defined(_M_AMD64)
+#  define ARCHITECTURE_ID "x64"
+
+# elif defined(_M_IX86)
+#  define ARCHITECTURE_ID "X86"
+
+# elif defined(_M_ARM64)
+#  define ARCHITECTURE_ID "ARM64"
+
+# elif defined(_M_ARM)
+#  if _M_ARM == 4
+#   define ARCHITECTURE_ID "ARMV4I"
+#  elif _M_ARM == 5
+#   define ARCHITECTURE_ID "ARMV5I"
+#  else
+#   define ARCHITECTURE_ID "ARMV" STRINGIFY(_M_ARM)
+#  endif
+
+# elif defined(_M_MIPS)
+#  define ARCHITECTURE_ID "MIPS"
+
+# elif defined(_M_SH)
+#  define ARCHITECTURE_ID "SHx"
+
+# else /* unknown architecture */
+#  define ARCHITECTURE_ID ""
+# endif
+
+#elif defined(__WATCOMC__)
+# if defined(_M_I86)
+#  define ARCHITECTURE_ID "I86"
+
+# elif defined(_M_IX86)
+#  define ARCHITECTURE_ID "X86"
+
+# else /* unknown architecture */
+#  define ARCHITECTURE_ID ""
+# endif
+
+#elif defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC)
+# if defined(__ICCARM__)
+#  define ARCHITECTURE_ID "ARM"
+
+# elif defined(__ICCRX__)
+#  define ARCHITECTURE_ID "RX"
+
+# elif defined(__ICCRH850__)
+#  define ARCHITECTURE_ID "RH850"
+
+# elif defined(__ICCRL78__)
+#  define ARCHITECTURE_ID "RL78"
+
+# elif defined(__ICCRISCV__)
+#  define ARCHITECTURE_ID "RISCV"
+
+# elif defined(__ICCAVR__)
+#  define ARCHITECTURE_ID "AVR"
+
+# elif defined(__ICC430__)
+#  define ARCHITECTURE_ID "MSP430"
+
+# elif defined(__ICCV850__)
+#  define ARCHITECTURE_ID "V850"
+
+# elif defined(__ICC8051__)
+#  define ARCHITECTURE_ID "8051"
+
+# elif defined(__ICCSTM8__)
+#  define ARCHITECTURE_ID "STM8"
+
+# else /* unknown architecture */
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+# endif
+
+#elif defined(__ghs__)
+# if defined(__PPC64__)
+#  define ARCHITECTURE_ID "PPC64"
+
+# elif defined(__ppc__)
+#  define ARCHITECTURE_ID "PPC"
+
+# elif defined(__ARM__)
+#  define ARCHITECTURE_ID "ARM"
+
+# elif defined(__x86_64__)
+#  define ARCHITECTURE_ID "x64"
+
+# elif defined(__i386__)
+#  define ARCHITECTURE_ID "X86"
+
+# else /* unknown architecture */
+#  define ARCHITECTURE_ID ""
+# endif
+
+#elif defined(__TI_COMPILER_VERSION__)
+# if defined(__TI_ARM__)
+#  define ARCHITECTURE_ID "ARM"
+
+# elif defined(__MSP430__)
+#  define ARCHITECTURE_ID "MSP430"
+
+# elif defined(__TMS320C28XX__)
+#  define ARCHITECTURE_ID "TMS320C28x"
+
+# elif defined(__TMS320C6X__) || defined(_TMS320C6X)
+#  define ARCHITECTURE_ID "TMS320C6x"
+
+# else /* unknown architecture */
+#  define ARCHITECTURE_ID ""
+# endif
+
+# elif defined(__ADSPSHARC__)
+#  define ARCHITECTURE_ID "SHARC"
+
+# elif defined(__ADSPBLACKFIN__)
+#  define ARCHITECTURE_ID "Blackfin"
+
+#else
+#  define ARCHITECTURE_ID
+#endif
+
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+  ('0' + (((n) / 1000000)%10)),  \
+  ('0' + (((n) / 100000)%10)),   \
+  ('0' + (((n) / 10000)%10)),    \
+  ('0' + (((n) / 1000)%10)),     \
+  ('0' + (((n) / 100)%10)),      \
+  ('0' + (((n) / 10)%10)),       \
+  ('0' +  ((n) % 10))
+
+/* Convert integer to hex digit literals.  */
+#define HEX(n)             \
+  ('0' + ((n)>>28 & 0xF)), \
+  ('0' + ((n)>>24 & 0xF)), \
+  ('0' + ((n)>>20 & 0xF)), \
+  ('0' + ((n)>>16 & 0xF)), \
+  ('0' + ((n)>>12 & 0xF)), \
+  ('0' + ((n)>>8  & 0xF)), \
+  ('0' + ((n)>>4  & 0xF)), \
+  ('0' + ((n)     & 0xF))
+
+/* Construct a string literal encoding the version number. */
+#ifdef COMPILER_VERSION
+char const* info_version = "INFO" ":" "compiler_version[" COMPILER_VERSION "]";
+
+/* Construct a string literal encoding the version number components. */
+#elif defined(COMPILER_VERSION_MAJOR)
+char const info_version[] = {
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+  COMPILER_VERSION_MAJOR,
+# ifdef COMPILER_VERSION_MINOR
+  '.', COMPILER_VERSION_MINOR,
+#  ifdef COMPILER_VERSION_PATCH
+   '.', COMPILER_VERSION_PATCH,
+#   ifdef COMPILER_VERSION_TWEAK
+    '.', COMPILER_VERSION_TWEAK,
+#   endif
+#  endif
+# endif
+  ']','\0'};
+#endif
+
+/* Construct a string literal encoding the internal version number. */
+#ifdef COMPILER_VERSION_INTERNAL
+char const info_version_internal[] = {
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+  'c','o','m','p','i','l','e','r','_','v','e','r','s','i','o','n','_',
+  'i','n','t','e','r','n','a','l','[',
+  COMPILER_VERSION_INTERNAL,']','\0'};
+#elif defined(COMPILER_VERSION_INTERNAL_STR)
+char const* info_version_internal = "INFO" ":" "compiler_version_internal[" COMPILER_VERSION_INTERNAL_STR "]";
+#endif
+
+/* Construct a string literal encoding the version number components. */
+#ifdef SIMULATE_VERSION_MAJOR
+char const info_simulate_version[] = {
+  'I', 'N', 'F', 'O', ':',
+  's','i','m','u','l','a','t','e','_','v','e','r','s','i','o','n','[',
+  SIMULATE_VERSION_MAJOR,
+# ifdef SIMULATE_VERSION_MINOR
+  '.', SIMULATE_VERSION_MINOR,
+#  ifdef SIMULATE_VERSION_PATCH
+   '.', SIMULATE_VERSION_PATCH,
+#   ifdef SIMULATE_VERSION_TWEAK
+    '.', SIMULATE_VERSION_TWEAK,
+#   endif
+#  endif
+# endif
+  ']','\0'};
+#endif
+
+/* Construct the string literal in pieces to prevent the source from
+   getting matched.  Store it in a pointer rather than an array
+   because some compilers will just produce instructions to fill the
+   array rather than assigning a pointer to a static array.  */
+char const* info_platform = "INFO" ":" "platform[" PLATFORM_ID "]";
+char const* info_arch = "INFO" ":" "arch[" ARCHITECTURE_ID "]";
+
+
+
+#if defined(__INTEL_COMPILER) && defined(_MSVC_LANG) && _MSVC_LANG < 201403L
+#  if defined(__INTEL_CXX11_MODE__)
+#    if defined(__cpp_aggregate_nsdmi)
+#      define CXX_STD 201402L
+#    else
+#      define CXX_STD 201103L
+#    endif
+#  else
+#    define CXX_STD 199711L
+#  endif
+#elif defined(_MSC_VER) && defined(_MSVC_LANG)
+#  define CXX_STD _MSVC_LANG
+#else
+#  define CXX_STD __cplusplus
+#endif
+
+const char* info_language_standard_default = "INFO" ":" "standard_default["
+#if CXX_STD > 202002L
+  "23"
+#elif CXX_STD > 201703L
+  "20"
+#elif CXX_STD >= 201703L
+  "17"
+#elif CXX_STD >= 201402L
+  "14"
+#elif CXX_STD >= 201103L
+  "11"
+#else
+  "98"
+#endif
+"]";
+
+const char* info_language_extensions_default = "INFO" ":" "extensions_default["
+#if (defined(__clang__) || defined(__GNUC__) || defined(__xlC__) ||           \
+     defined(__TI_COMPILER_VERSION__)) &&                                     \
+  !defined(__STRICT_ANSI__)
+  "ON"
+#else
+  "OFF"
+#endif
+"]";
+
+/*--------------------------------------------------------------------------*/
+
+int main(int argc, char* argv[])
+{
+  int require = 0;
+  require += info_compiler[argc];
+  require += info_platform[argc];
+#ifdef COMPILER_VERSION_MAJOR
+  require += info_version[argc];
+#endif
+#ifdef COMPILER_VERSION_INTERNAL
+  require += info_version_internal[argc];
+#endif
+#ifdef SIMULATE_ID
+  require += info_simulate[argc];
+#endif
+#ifdef SIMULATE_VERSION_MAJOR
+  require += info_simulate_version[argc];
+#endif
+#if defined(__CRAYXT_COMPUTE_LINUX_TARGET)
+  require += info_cray[argc];
+#endif
+  require += info_language_standard_default[argc];
+  require += info_language_extensions_default[argc];
+  (void)argv;
+  return require;
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+Copyright (C) 2023 Free Software Foundation, Inc.
+This is free software; see the source for copying conditions.  There is NO
+warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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+# =============================================================================
+# Project: controlware_yy_app
+# Configurations: debug
+# =============================================================================
+# =============================================================================
+
+#############################################
+# Rule for compiling C files.
+
+rule C_COMPILER__app_debug
+  depfile = $DEP_FILE
+  deps = gcc
+  command = D:\sdk_env\sdk_env-v1.8.0\toolchains\rv32imac_zicsr_zifencei_multilib_b_ext-win\bin\riscv32-unknown-elf-gcc.exe $DEFINES $INCLUDES $FLAGS -MD -MT $out -MF $DEP_FILE -o $out -c $in
+  description = Building C object $out
+
+
+#############################################
+# Rule for linking C executable.
+
+rule C_EXECUTABLE_LINKER__demo.2eelf_debug
+  command = cmd.exe /C "$PRE_LINK && D:\sdk_env\sdk_env-v1.8.0\toolchains\rv32imac_zicsr_zifencei_multilib_b_ext-win\bin\riscv32-unknown-elf-gcc.exe $FLAGS $LINK_FLAGS $in -o $TARGET_FILE $LINK_PATH $LINK_LIBRARIES && $POST_BUILD"
+  description = Linking C executable $TARGET_FILE
+  restat = $RESTAT
+
+
+#############################################
+# Rule for running custom commands.
+
+rule CUSTOM_COMMAND
+  command = $COMMAND
+  description = $DESC
+
+
+#############################################
+# Rule for compiling C files.
+
+rule C_COMPILER__hpm_sdk_lib_debug
+  depfile = $DEP_FILE
+  deps = gcc
+  command = D:\sdk_env\sdk_env-v1.8.0\toolchains\rv32imac_zicsr_zifencei_multilib_b_ext-win\bin\riscv32-unknown-elf-gcc.exe $DEFINES $INCLUDES $FLAGS -MD -MT $out -MF $DEP_FILE -o $out -c $in
+  description = Building C object $out
+
+
+#############################################
+# Rule for linking C static library.
+
+rule C_STATIC_LIBRARY_LINKER__hpm_sdk_lib_debug
+  command = cmd.exe /C "$PRE_LINK && D:\sdk_env\sdk_env-v1.8.0\toolchains\rv32imac_zicsr_zifencei_multilib_b_ext-win\bin\riscv32-unknown-elf-ar.exe crD $TARGET_FILE $LINK_FLAGS $in && $POST_BUILD"
+  description = Linking C static library $TARGET_FILE
+  restat = $RESTAT
+
+
+#############################################
+# Rule for compiling C files.
+
+rule C_COMPILER__hpm_sdk_gcc_lib_debug
+  depfile = $DEP_FILE
+  deps = gcc
+  command = D:\sdk_env\sdk_env-v1.8.0\toolchains\rv32imac_zicsr_zifencei_multilib_b_ext-win\bin\riscv32-unknown-elf-gcc.exe $DEFINES $INCLUDES $FLAGS -MD -MT $out -MF $DEP_FILE -o $out -c $in
+  description = Building C object $out
+
+
+#############################################
+# Rule for linking C static library.
+
+rule C_STATIC_LIBRARY_LINKER__hpm_sdk_gcc_lib_debug
+  command = cmd.exe /C "$PRE_LINK && D:\sdk_env\sdk_env-v1.8.0\toolchains\rv32imac_zicsr_zifencei_multilib_b_ext-win\bin\riscv32-unknown-elf-ar.exe crD $TARGET_FILE $LINK_FLAGS $in && $POST_BUILD"
+  description = Linking C static library $TARGET_FILE
+  restat = $RESTAT
+
+
+#############################################
+# Rule for compiling ASM files.
+
+rule ASM_COMPILER__hpm_sdk_gcc_startup_lib_debug
+  depfile = $DEP_FILE
+  deps = gcc
+  command = D:\sdk_env\sdk_env-v1.8.0\toolchains\rv32imac_zicsr_zifencei_multilib_b_ext-win\bin\riscv32-unknown-elf-gcc.exe $DEFINES $INCLUDES $FLAGS -MD -MT $out -MF $DEP_FILE -o $out -c $in
+  description = Building ASM object $out
+
+
+#############################################
+# Rule for compiling C files.
+
+rule C_COMPILER__hpm_sdk_gcc_startup_lib_debug
+  depfile = $DEP_FILE
+  deps = gcc
+  command = D:\sdk_env\sdk_env-v1.8.0\toolchains\rv32imac_zicsr_zifencei_multilib_b_ext-win\bin\riscv32-unknown-elf-gcc.exe $DEFINES $INCLUDES $FLAGS -MD -MT $out -MF $DEP_FILE -o $out -c $in
+  description = Building C object $out
+
+
+#############################################
+# Rule for linking C static library.
+
+rule C_STATIC_LIBRARY_LINKER__hpm_sdk_gcc_startup_lib_debug
+  command = cmd.exe /C "$PRE_LINK && D:\sdk_env\sdk_env-v1.8.0\toolchains\rv32imac_zicsr_zifencei_multilib_b_ext-win\bin\riscv32-unknown-elf-ar.exe crD $TARGET_FILE $LINK_FLAGS $in && $POST_BUILD"
+  description = Linking C static library $TARGET_FILE
+  restat = $RESTAT
+
+
+#############################################
+# Rule for re-running cmake.
+
+rule RERUN_CMAKE
+  command = D:\sdk_env\sdk_env-v1.8.0\tools\cmake\bin\cmake.exe --regenerate-during-build -SD:\Zhuts_file\work\pro\Pro9_HPM6750\controlware_yy_hpm6750\controller_yy_app -BD:\Zhuts_file\work\pro\Pro9_HPM6750\controlware_yy_hpm6750\controller_yy_app_controller_yy_board_flash_xip_debug
+  description = Re-running CMake...
+  generator = 1
+
+
+#############################################
+# Rule for cleaning all built files.
+
+rule CLEAN
+  command = D:\sdk_env\sdk_env-v1.8.0\tools\ninja\ninja.exe $FILE_ARG -t clean $TARGETS
+  description = Cleaning all built files...
+
+
+#############################################
+# Rule for printing all primary targets available.
+
+rule HELP
+  command = D:\sdk_env\sdk_env-v1.8.0\tools\ninja\ninja.exe -t targets
+  description = All primary targets available:
+

controller_yy_app_controller_yy_board_flash_xip_debug/build_tmp/arch/cmake_install.cmake

@@ -0,0 +1,39 @@
+# Install script for directory: D:/sdk_env/sdk_env-v1.8.0/hpm_sdk/arch
+
+# Set the install prefix
+if(NOT DEFINED CMAKE_INSTALL_PREFIX)
+  set(CMAKE_INSTALL_PREFIX "C:/Program Files (x86)")
+endif()
+string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}")
+
+# Set the install configuration name.
+if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME)
+  if(BUILD_TYPE)
+    string(REGEX REPLACE "^[^A-Za-z0-9_]+" ""
+           CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}")
+  else()
+    set(CMAKE_INSTALL_CONFIG_NAME "debug")
+  endif()
+  message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"")
+endif()
+
+# Set the component getting installed.
+if(NOT CMAKE_INSTALL_COMPONENT)
+  if(COMPONENT)
+    message(STATUS "Install component: \"${COMPONENT}\"")
+    set(CMAKE_INSTALL_COMPONENT "${COMPONENT}")
+  else()
+    set(CMAKE_INSTALL_COMPONENT)
+  endif()
+endif()
+
+# Is this installation the result of a crosscompile?
+if(NOT DEFINED CMAKE_CROSSCOMPILING)
+  set(CMAKE_CROSSCOMPILING "TRUE")
+endif()
+
+# Set default install directory permissions.
+if(NOT DEFINED CMAKE_OBJDUMP)
+  set(CMAKE_OBJDUMP "D:/sdk_env/sdk_env-v1.8.0/toolchains/rv32imac_zicsr_zifencei_multilib_b_ext-win/bin/riscv32-unknown-elf-objdump.exe")
+endif()
+

controller_yy_app_controller_yy_board_flash_xip_debug/build_tmp/boards/cmake_install.cmake

@@ -0,0 +1,45 @@
+# Install script for directory: D:/sdk_env/sdk_env-v1.8.0/hpm_sdk/boards
+
+# Set the install prefix
+if(NOT DEFINED CMAKE_INSTALL_PREFIX)
+  set(CMAKE_INSTALL_PREFIX "C:/Program Files (x86)")
+endif()
+string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}")
+
+# Set the install configuration name.
+if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME)
+  if(BUILD_TYPE)
+    string(REGEX REPLACE "^[^A-Za-z0-9_]+" ""
+           CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}")
+  else()
+    set(CMAKE_INSTALL_CONFIG_NAME "debug")
+  endif()
+  message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"")
+endif()
+
+# Set the component getting installed.
+if(NOT CMAKE_INSTALL_COMPONENT)
+  if(COMPONENT)
+    message(STATUS "Install component: \"${COMPONENT}\"")
+    set(CMAKE_INSTALL_COMPONENT "${COMPONENT}")
+  else()
+    set(CMAKE_INSTALL_COMPONENT)
+  endif()
+endif()
+
+# Is this installation the result of a crosscompile?
+if(NOT DEFINED CMAKE_CROSSCOMPILING)
+  set(CMAKE_CROSSCOMPILING "TRUE")
+endif()
+
+# Set default install directory permissions.
+if(NOT DEFINED CMAKE_OBJDUMP)
+  set(CMAKE_OBJDUMP "D:/sdk_env/sdk_env-v1.8.0/toolchains/rv32imac_zicsr_zifencei_multilib_b_ext-win/bin/riscv32-unknown-elf-objdump.exe")
+endif()
+
+if(NOT CMAKE_INSTALL_LOCAL_ONLY)
+  # Include the install script for each subdirectory.
+  include("D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app_controller_yy_board_flash_xip_debug/build_tmp/boards/controller_yy_board/cmake_install.cmake")
+
+endif()
+

controller_yy_app_controller_yy_board_flash_xip_debug/build_tmp/boards/controller_yy_board/cmake_install.cmake

@@ -0,0 +1,39 @@
+# Install script for directory: D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_board
+
+# Set the install prefix
+if(NOT DEFINED CMAKE_INSTALL_PREFIX)
+  set(CMAKE_INSTALL_PREFIX "C:/Program Files (x86)")
+endif()
+string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}")
+
+# Set the install configuration name.
+if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME)
+  if(BUILD_TYPE)
+    string(REGEX REPLACE "^[^A-Za-z0-9_]+" ""
+           CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}")
+  else()
+    set(CMAKE_INSTALL_CONFIG_NAME "debug")
+  endif()
+  message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"")
+endif()
+
+# Set the component getting installed.
+if(NOT CMAKE_INSTALL_COMPONENT)
+  if(COMPONENT)
+    message(STATUS "Install component: \"${COMPONENT}\"")
+    set(CMAKE_INSTALL_COMPONENT "${COMPONENT}")
+  else()
+    set(CMAKE_INSTALL_COMPONENT)
+  endif()
+endif()
+
+# Is this installation the result of a crosscompile?
+if(NOT DEFINED CMAKE_CROSSCOMPILING)
+  set(CMAKE_CROSSCOMPILING "TRUE")
+endif()
+
+# Set default install directory permissions.
+if(NOT DEFINED CMAKE_OBJDUMP)
+  set(CMAKE_OBJDUMP "D:/sdk_env/sdk_env-v1.8.0/toolchains/rv32imac_zicsr_zifencei_multilib_b_ext-win/bin/riscv32-unknown-elf-objdump.exe")
+endif()
+

controller_yy_app_controller_yy_board_flash_xip_debug/build_tmp/cmake_install.cmake

@@ -0,0 +1,51 @@
+# Install script for directory: D:/sdk_env/sdk_env-v1.8.0/hpm_sdk
+
+# Set the install prefix
+if(NOT DEFINED CMAKE_INSTALL_PREFIX)
+  set(CMAKE_INSTALL_PREFIX "C:/Program Files (x86)")
+endif()
+string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}")
+
+# Set the install configuration name.
+if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME)
+  if(BUILD_TYPE)
+    string(REGEX REPLACE "^[^A-Za-z0-9_]+" ""
+           CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}")
+  else()
+    set(CMAKE_INSTALL_CONFIG_NAME "debug")
+  endif()
+  message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"")
+endif()
+
+# Set the component getting installed.
+if(NOT CMAKE_INSTALL_COMPONENT)
+  if(COMPONENT)
+    message(STATUS "Install component: \"${COMPONENT}\"")
+    set(CMAKE_INSTALL_COMPONENT "${COMPONENT}")
+  else()
+    set(CMAKE_INSTALL_COMPONENT)
+  endif()
+endif()
+
+# Is this installation the result of a crosscompile?
+if(NOT DEFINED CMAKE_CROSSCOMPILING)
+  set(CMAKE_CROSSCOMPILING "TRUE")
+endif()
+
+# Set default install directory permissions.
+if(NOT DEFINED CMAKE_OBJDUMP)
+  set(CMAKE_OBJDUMP "D:/sdk_env/sdk_env-v1.8.0/toolchains/rv32imac_zicsr_zifencei_multilib_b_ext-win/bin/riscv32-unknown-elf-objdump.exe")
+endif()
+
+if(NOT CMAKE_INSTALL_LOCAL_ONLY)
+  # Include the install script for each subdirectory.
+  include("D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app_controller_yy_board_flash_xip_debug/build_tmp/arch/cmake_install.cmake")
+  include("D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app_controller_yy_board_flash_xip_debug/build_tmp/boards/cmake_install.cmake")
+  include("D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app_controller_yy_board_flash_xip_debug/build_tmp/soc/cmake_install.cmake")
+  include("D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app_controller_yy_board_flash_xip_debug/build_tmp/drivers/cmake_install.cmake")
+  include("D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app_controller_yy_board_flash_xip_debug/build_tmp/utils/cmake_install.cmake")
+  include("D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app_controller_yy_board_flash_xip_debug/build_tmp/components/cmake_install.cmake")
+  include("D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app_controller_yy_board_flash_xip_debug/build_tmp/middleware/cmake_install.cmake")
+
+endif()
+

controller_yy_app_controller_yy_board_flash_xip_debug/build_tmp/components/cmake_install.cmake

@@ -0,0 +1,45 @@
+# Install script for directory: D:/sdk_env/sdk_env-v1.8.0/hpm_sdk/components
+
+# Set the install prefix
+if(NOT DEFINED CMAKE_INSTALL_PREFIX)
+  set(CMAKE_INSTALL_PREFIX "C:/Program Files (x86)")
+endif()
+string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}")
+
+# Set the install configuration name.
+if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME)
+  if(BUILD_TYPE)
+    string(REGEX REPLACE "^[^A-Za-z0-9_]+" ""
+           CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}")
+  else()
+    set(CMAKE_INSTALL_CONFIG_NAME "debug")
+  endif()
+  message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"")
+endif()
+
+# Set the component getting installed.
+if(NOT CMAKE_INSTALL_COMPONENT)
+  if(COMPONENT)
+    message(STATUS "Install component: \"${COMPONENT}\"")
+    set(CMAKE_INSTALL_COMPONENT "${COMPONENT}")
+  else()
+    set(CMAKE_INSTALL_COMPONENT)
+  endif()
+endif()
+
+# Is this installation the result of a crosscompile?
+if(NOT DEFINED CMAKE_CROSSCOMPILING)
+  set(CMAKE_CROSSCOMPILING "TRUE")
+endif()
+
+# Set default install directory permissions.
+if(NOT DEFINED CMAKE_OBJDUMP)
+  set(CMAKE_OBJDUMP "D:/sdk_env/sdk_env-v1.8.0/toolchains/rv32imac_zicsr_zifencei_multilib_b_ext-win/bin/riscv32-unknown-elf-objdump.exe")
+endif()
+
+if(NOT CMAKE_INSTALL_LOCAL_ONLY)
+  # Include the install script for each subdirectory.
+  include("D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app_controller_yy_board_flash_xip_debug/build_tmp/components/debug_console/cmake_install.cmake")
+
+endif()
+

controller_yy_app_controller_yy_board_flash_xip_debug/build_tmp/components/debug_console/cmake_install.cmake

@@ -0,0 +1,39 @@
+# Install script for directory: D:/sdk_env/sdk_env-v1.8.0/hpm_sdk/components/debug_console
+
+# Set the install prefix
+if(NOT DEFINED CMAKE_INSTALL_PREFIX)
+  set(CMAKE_INSTALL_PREFIX "C:/Program Files (x86)")
+endif()
+string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}")
+
+# Set the install configuration name.
+if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME)
+  if(BUILD_TYPE)
+    string(REGEX REPLACE "^[^A-Za-z0-9_]+" ""
+           CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}")
+  else()
+    set(CMAKE_INSTALL_CONFIG_NAME "debug")
+  endif()
+  message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"")
+endif()
+
+# Set the component getting installed.
+if(NOT CMAKE_INSTALL_COMPONENT)
+  if(COMPONENT)
+    message(STATUS "Install component: \"${COMPONENT}\"")
+    set(CMAKE_INSTALL_COMPONENT "${COMPONENT}")
+  else()
+    set(CMAKE_INSTALL_COMPONENT)
+  endif()
+endif()
+
+# Is this installation the result of a crosscompile?
+if(NOT DEFINED CMAKE_CROSSCOMPILING)
+  set(CMAKE_CROSSCOMPILING "TRUE")
+endif()
+
+# Set default install directory permissions.
+if(NOT DEFINED CMAKE_OBJDUMP)
+  set(CMAKE_OBJDUMP "D:/sdk_env/sdk_env-v1.8.0/toolchains/rv32imac_zicsr_zifencei_multilib_b_ext-win/bin/riscv32-unknown-elf-objdump.exe")
+endif()
+

controller_yy_app_controller_yy_board_flash_xip_debug/build_tmp/drivers/cmake_install.cmake

@@ -0,0 +1,39 @@
+# Install script for directory: D:/sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers
+
+# Set the install prefix
+if(NOT DEFINED CMAKE_INSTALL_PREFIX)
+  set(CMAKE_INSTALL_PREFIX "C:/Program Files (x86)")
+endif()
+string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}")
+
+# Set the install configuration name.
+if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME)
+  if(BUILD_TYPE)
+    string(REGEX REPLACE "^[^A-Za-z0-9_]+" ""
+           CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}")
+  else()
+    set(CMAKE_INSTALL_CONFIG_NAME "debug")
+  endif()
+  message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"")
+endif()
+
+# Set the component getting installed.
+if(NOT CMAKE_INSTALL_COMPONENT)
+  if(COMPONENT)
+    message(STATUS "Install component: \"${COMPONENT}\"")
+    set(CMAKE_INSTALL_COMPONENT "${COMPONENT}")
+  else()
+    set(CMAKE_INSTALL_COMPONENT)
+  endif()
+endif()
+
+# Is this installation the result of a crosscompile?
+if(NOT DEFINED CMAKE_CROSSCOMPILING)
+  set(CMAKE_CROSSCOMPILING "TRUE")
+endif()
+
+# Set default install directory permissions.
+if(NOT DEFINED CMAKE_OBJDUMP)
+  set(CMAKE_OBJDUMP "D:/sdk_env/sdk_env-v1.8.0/toolchains/rv32imac_zicsr_zifencei_multilib_b_ext-win/bin/riscv32-unknown-elf-objdump.exe")
+endif()
+

controller_yy_app_controller_yy_board_flash_xip_debug/build_tmp/generated/include/hpm_sdk_version.h

@@ -0,0 +1,24 @@
+/*
+ * Copyright (c) 2022 HPMicro
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ */
+
+#ifndef HPM_SDK_VERSION_H
+#define HPM_SDK_VERSION_H
+
+/* #undef SDK_VERSION_CODE */
+#define SDK_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + (c))
+
+#define SDKVERSION          0x1080000
+#define SDK_VERSION_NUMBER  0x10800
+#define SDK_VERSION_MAJOR   1
+#define SDK_VERSION_MINOR   8
+#define SDK_PATCHLEVEL      0
+#define SDK_VERSION_STRING  "1.8.0"
+
+#define BUILD_VERSION          
+
+
+#endif /* HPM_SDK_VERSION_H */

controller_yy_app_controller_yy_board_flash_xip_debug/build_tmp/middleware/CMSIS/cmake_install.cmake

@@ -0,0 +1,39 @@
+# Install script for directory: D:/sdk_env/sdk_env-v1.8.0/hpm_sdk/middleware/CMSIS
+
+# Set the install prefix
+if(NOT DEFINED CMAKE_INSTALL_PREFIX)
+  set(CMAKE_INSTALL_PREFIX "C:/Program Files (x86)")
+endif()
+string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}")
+
+# Set the install configuration name.
+if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME)
+  if(BUILD_TYPE)
+    string(REGEX REPLACE "^[^A-Za-z0-9_]+" ""
+           CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}")
+  else()
+    set(CMAKE_INSTALL_CONFIG_NAME "debug")
+  endif()
+  message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"")
+endif()
+
+# Set the component getting installed.
+if(NOT CMAKE_INSTALL_COMPONENT)
+  if(COMPONENT)
+    message(STATUS "Install component: \"${COMPONENT}\"")
+    set(CMAKE_INSTALL_COMPONENT "${COMPONENT}")
+  else()
+    set(CMAKE_INSTALL_COMPONENT)
+  endif()
+endif()
+
+# Is this installation the result of a crosscompile?
+if(NOT DEFINED CMAKE_CROSSCOMPILING)
+  set(CMAKE_CROSSCOMPILING "TRUE")
+endif()
+
+# Set default install directory permissions.
+if(NOT DEFINED CMAKE_OBJDUMP)
+  set(CMAKE_OBJDUMP "D:/sdk_env/sdk_env-v1.8.0/toolchains/rv32imac_zicsr_zifencei_multilib_b_ext-win/bin/riscv32-unknown-elf-objdump.exe")
+endif()
+

controller_yy_app_controller_yy_board_flash_xip_debug/build_tmp/middleware/cmake_install.cmake

@@ -0,0 +1,48 @@
+# Install script for directory: D:/sdk_env/sdk_env-v1.8.0/hpm_sdk/middleware
+
+# Set the install prefix
+if(NOT DEFINED CMAKE_INSTALL_PREFIX)
+  set(CMAKE_INSTALL_PREFIX "C:/Program Files (x86)")
+endif()
+string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}")
+
+# Set the install configuration name.
+if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME)
+  if(BUILD_TYPE)
+    string(REGEX REPLACE "^[^A-Za-z0-9_]+" ""
+           CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}")
+  else()
+    set(CMAKE_INSTALL_CONFIG_NAME "debug")
+  endif()
+  message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"")
+endif()
+
+# Set the component getting installed.
+if(NOT CMAKE_INSTALL_COMPONENT)
+  if(COMPONENT)
+    message(STATUS "Install component: \"${COMPONENT}\"")
+    set(CMAKE_INSTALL_COMPONENT "${COMPONENT}")
+  else()
+    set(CMAKE_INSTALL_COMPONENT)
+  endif()
+endif()
+
+# Is this installation the result of a crosscompile?
+if(NOT DEFINED CMAKE_CROSSCOMPILING)
+  set(CMAKE_CROSSCOMPILING "TRUE")
+endif()
+
+# Set default install directory permissions.
+if(NOT DEFINED CMAKE_OBJDUMP)
+  set(CMAKE_OBJDUMP "D:/sdk_env/sdk_env-v1.8.0/toolchains/rv32imac_zicsr_zifencei_multilib_b_ext-win/bin/riscv32-unknown-elf-objdump.exe")
+endif()
+
+if(NOT CMAKE_INSTALL_LOCAL_ONLY)
+  # Include the install script for each subdirectory.
+  include("D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app_controller_yy_board_flash_xip_debug/build_tmp/middleware/eclipse_threadx/cmake_install.cmake")
+  include("D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app_controller_yy_board_flash_xip_debug/build_tmp/middleware/CMSIS/cmake_install.cmake")
+  include("D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app_controller_yy_board_flash_xip_debug/build_tmp/middleware/ptpd/cmake_install.cmake")
+  include("D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app_controller_yy_board_flash_xip_debug/build_tmp/middleware/wifi/cmake_install.cmake")
+
+endif()
+

controller_yy_app_controller_yy_board_flash_xip_debug/build_tmp/middleware/eclipse_threadx/cmake_install.cmake

@@ -0,0 +1,39 @@
+# Install script for directory: D:/sdk_env/sdk_env-v1.8.0/hpm_sdk/middleware/eclipse_threadx
+
+# Set the install prefix
+if(NOT DEFINED CMAKE_INSTALL_PREFIX)
+  set(CMAKE_INSTALL_PREFIX "C:/Program Files (x86)")
+endif()
+string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}")
+
+# Set the install configuration name.
+if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME)
+  if(BUILD_TYPE)
+    string(REGEX REPLACE "^[^A-Za-z0-9_]+" ""
+           CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}")
+  else()
+    set(CMAKE_INSTALL_CONFIG_NAME "debug")
+  endif()
+  message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"")
+endif()
+
+# Set the component getting installed.
+if(NOT CMAKE_INSTALL_COMPONENT)
+  if(COMPONENT)
+    message(STATUS "Install component: \"${COMPONENT}\"")
+    set(CMAKE_INSTALL_COMPONENT "${COMPONENT}")
+  else()
+    set(CMAKE_INSTALL_COMPONENT)
+  endif()
+endif()
+
+# Is this installation the result of a crosscompile?
+if(NOT DEFINED CMAKE_CROSSCOMPILING)
+  set(CMAKE_CROSSCOMPILING "TRUE")
+endif()
+
+# Set default install directory permissions.
+if(NOT DEFINED CMAKE_OBJDUMP)
+  set(CMAKE_OBJDUMP "D:/sdk_env/sdk_env-v1.8.0/toolchains/rv32imac_zicsr_zifencei_multilib_b_ext-win/bin/riscv32-unknown-elf-objdump.exe")
+endif()
+

controller_yy_app_controller_yy_board_flash_xip_debug/build_tmp/middleware/ptpd/cmake_install.cmake

@@ -0,0 +1,39 @@
+# Install script for directory: D:/sdk_env/sdk_env-v1.8.0/hpm_sdk/middleware/ptpd
+
+# Set the install prefix
+if(NOT DEFINED CMAKE_INSTALL_PREFIX)
+  set(CMAKE_INSTALL_PREFIX "C:/Program Files (x86)")
+endif()
+string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}")
+
+# Set the install configuration name.
+if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME)
+  if(BUILD_TYPE)
+    string(REGEX REPLACE "^[^A-Za-z0-9_]+" ""
+           CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}")
+  else()
+    set(CMAKE_INSTALL_CONFIG_NAME "debug")
+  endif()
+  message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"")
+endif()
+
+# Set the component getting installed.
+if(NOT CMAKE_INSTALL_COMPONENT)
+  if(COMPONENT)
+    message(STATUS "Install component: \"${COMPONENT}\"")
+    set(CMAKE_INSTALL_COMPONENT "${COMPONENT}")
+  else()
+    set(CMAKE_INSTALL_COMPONENT)
+  endif()
+endif()
+
+# Is this installation the result of a crosscompile?
+if(NOT DEFINED CMAKE_CROSSCOMPILING)
+  set(CMAKE_CROSSCOMPILING "TRUE")
+endif()
+
+# Set default install directory permissions.
+if(NOT DEFINED CMAKE_OBJDUMP)
+  set(CMAKE_OBJDUMP "D:/sdk_env/sdk_env-v1.8.0/toolchains/rv32imac_zicsr_zifencei_multilib_b_ext-win/bin/riscv32-unknown-elf-objdump.exe")
+endif()
+

controller_yy_app_controller_yy_board_flash_xip_debug/build_tmp/middleware/wifi/cmake_install.cmake

@@ -0,0 +1,39 @@
+# Install script for directory: D:/sdk_env/sdk_env-v1.8.0/hpm_sdk/middleware/wifi
+
+# Set the install prefix
+if(NOT DEFINED CMAKE_INSTALL_PREFIX)
+  set(CMAKE_INSTALL_PREFIX "C:/Program Files (x86)")
+endif()
+string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}")
+
+# Set the install configuration name.
+if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME)
+  if(BUILD_TYPE)
+    string(REGEX REPLACE "^[^A-Za-z0-9_]+" ""
+           CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}")
+  else()
+    set(CMAKE_INSTALL_CONFIG_NAME "debug")
+  endif()
+  message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"")
+endif()
+
+# Set the component getting installed.
+if(NOT CMAKE_INSTALL_COMPONENT)
+  if(COMPONENT)
+    message(STATUS "Install component: \"${COMPONENT}\"")
+    set(CMAKE_INSTALL_COMPONENT "${COMPONENT}")
+  else()
+    set(CMAKE_INSTALL_COMPONENT)
+  endif()
+endif()
+
+# Is this installation the result of a crosscompile?
+if(NOT DEFINED CMAKE_CROSSCOMPILING)
+  set(CMAKE_CROSSCOMPILING "TRUE")
+endif()
+
+# Set default install directory permissions.
+if(NOT DEFINED CMAKE_OBJDUMP)
+  set(CMAKE_OBJDUMP "D:/sdk_env/sdk_env-v1.8.0/toolchains/rv32imac_zicsr_zifencei_multilib_b_ext-win/bin/riscv32-unknown-elf-objdump.exe")
+endif()
+

controller_yy_app_controller_yy_board_flash_xip_debug/build_tmp/soc/HPM6700/HPM6750/cmake_install.cmake

@@ -0,0 +1,39 @@
+# Install script for directory: D:/sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/HPM6750
+
+# Set the install prefix
+if(NOT DEFINED CMAKE_INSTALL_PREFIX)
+  set(CMAKE_INSTALL_PREFIX "C:/Program Files (x86)")
+endif()
+string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}")
+
+# Set the install configuration name.
+if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME)
+  if(BUILD_TYPE)
+    string(REGEX REPLACE "^[^A-Za-z0-9_]+" ""
+           CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}")
+  else()
+    set(CMAKE_INSTALL_CONFIG_NAME "debug")
+  endif()
+  message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"")
+endif()
+
+# Set the component getting installed.
+if(NOT CMAKE_INSTALL_COMPONENT)
+  if(COMPONENT)
+    message(STATUS "Install component: \"${COMPONENT}\"")
+    set(CMAKE_INSTALL_COMPONENT "${COMPONENT}")
+  else()
+    set(CMAKE_INSTALL_COMPONENT)
+  endif()
+endif()
+
+# Is this installation the result of a crosscompile?
+if(NOT DEFINED CMAKE_CROSSCOMPILING)
+  set(CMAKE_CROSSCOMPILING "TRUE")
+endif()
+
+# Set default install directory permissions.
+if(NOT DEFINED CMAKE_OBJDUMP)
+  set(CMAKE_OBJDUMP "D:/sdk_env/sdk_env-v1.8.0/toolchains/rv32imac_zicsr_zifencei_multilib_b_ext-win/bin/riscv32-unknown-elf-objdump.exe")
+endif()
+

controller_yy_app_controller_yy_board_flash_xip_debug/build_tmp/soc/cmake_install.cmake

@@ -0,0 +1,45 @@
+# Install script for directory: D:/sdk_env/sdk_env-v1.8.0/hpm_sdk/soc
+
+# Set the install prefix
+if(NOT DEFINED CMAKE_INSTALL_PREFIX)
+  set(CMAKE_INSTALL_PREFIX "C:/Program Files (x86)")
+endif()
+string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}")
+
+# Set the install configuration name.
+if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME)
+  if(BUILD_TYPE)
+    string(REGEX REPLACE "^[^A-Za-z0-9_]+" ""
+           CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}")
+  else()
+    set(CMAKE_INSTALL_CONFIG_NAME "debug")
+  endif()
+  message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"")
+endif()
+
+# Set the component getting installed.
+if(NOT CMAKE_INSTALL_COMPONENT)
+  if(COMPONENT)
+    message(STATUS "Install component: \"${COMPONENT}\"")
+    set(CMAKE_INSTALL_COMPONENT "${COMPONENT}")
+  else()
+    set(CMAKE_INSTALL_COMPONENT)
+  endif()
+endif()
+
+# Is this installation the result of a crosscompile?
+if(NOT DEFINED CMAKE_CROSSCOMPILING)
+  set(CMAKE_CROSSCOMPILING "TRUE")
+endif()
+
+# Set default install directory permissions.
+if(NOT DEFINED CMAKE_OBJDUMP)
+  set(CMAKE_OBJDUMP "D:/sdk_env/sdk_env-v1.8.0/toolchains/rv32imac_zicsr_zifencei_multilib_b_ext-win/bin/riscv32-unknown-elf-objdump.exe")
+endif()
+
+if(NOT CMAKE_INSTALL_LOCAL_ONLY)
+  # Include the install script for each subdirectory.
+  include("D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app_controller_yy_board_flash_xip_debug/build_tmp/soc/HPM6700/HPM6750/cmake_install.cmake")
+
+endif()
+

controller_yy_app_controller_yy_board_flash_xip_debug/build_tmp/utils/cmake_install.cmake

@@ -0,0 +1,39 @@
+# Install script for directory: D:/sdk_env/sdk_env-v1.8.0/hpm_sdk/utils
+
+# Set the install prefix
+if(NOT DEFINED CMAKE_INSTALL_PREFIX)
+  set(CMAKE_INSTALL_PREFIX "C:/Program Files (x86)")
+endif()
+string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}")
+
+# Set the install configuration name.
+if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME)
+  if(BUILD_TYPE)
+    string(REGEX REPLACE "^[^A-Za-z0-9_]+" ""
+           CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}")
+  else()
+    set(CMAKE_INSTALL_CONFIG_NAME "debug")
+  endif()
+  message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"")
+endif()
+
+# Set the component getting installed.
+if(NOT CMAKE_INSTALL_COMPONENT)
+  if(COMPONENT)
+    message(STATUS "Install component: \"${COMPONENT}\"")
+    set(CMAKE_INSTALL_COMPONENT "${COMPONENT}")
+  else()
+    set(CMAKE_INSTALL_COMPONENT)
+  endif()
+endif()
+
+# Is this installation the result of a crosscompile?
+if(NOT DEFINED CMAKE_CROSSCOMPILING)
+  set(CMAKE_CROSSCOMPILING "TRUE")
+endif()
+
+# Set default install directory permissions.
+if(NOT DEFINED CMAKE_OBJDUMP)
+  set(CMAKE_OBJDUMP "D:/sdk_env/sdk_env-v1.8.0/toolchains/rv32imac_zicsr_zifencei_multilib_b_ext-win/bin/riscv32-unknown-elf-objdump.exe")
+endif()
+

controller_yy_app_controller_yy_board_flash_xip_debug/cmake_install.cmake

@@ -0,0 +1,56 @@
+# Install script for directory: D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app
+
+# Set the install prefix
+if(NOT DEFINED CMAKE_INSTALL_PREFIX)
+  set(CMAKE_INSTALL_PREFIX "C:/Program Files (x86)")
+endif()
+string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}")
+
+# Set the install configuration name.
+if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME)
+  if(BUILD_TYPE)
+    string(REGEX REPLACE "^[^A-Za-z0-9_]+" ""
+           CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}")
+  else()
+    set(CMAKE_INSTALL_CONFIG_NAME "debug")
+  endif()
+  message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"")
+endif()
+
+# Set the component getting installed.
+if(NOT CMAKE_INSTALL_COMPONENT)
+  if(COMPONENT)
+    message(STATUS "Install component: \"${COMPONENT}\"")
+    set(CMAKE_INSTALL_COMPONENT "${COMPONENT}")
+  else()
+    set(CMAKE_INSTALL_COMPONENT)
+  endif()
+endif()
+
+# Is this installation the result of a crosscompile?
+if(NOT DEFINED CMAKE_CROSSCOMPILING)
+  set(CMAKE_CROSSCOMPILING "TRUE")
+endif()
+
+# Set default install directory permissions.
+if(NOT DEFINED CMAKE_OBJDUMP)
+  set(CMAKE_OBJDUMP "D:/sdk_env/sdk_env-v1.8.0/toolchains/rv32imac_zicsr_zifencei_multilib_b_ext-win/bin/riscv32-unknown-elf-objdump.exe")
+endif()
+
+if(NOT CMAKE_INSTALL_LOCAL_ONLY)
+  # Include the install script for each subdirectory.
+  include("D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app_controller_yy_board_flash_xip_debug/build_tmp/cmake_install.cmake")
+  include("D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app_controller_yy_board_flash_xip_debug/middleware/cmake_install.cmake")
+
+endif()
+
+if(CMAKE_INSTALL_COMPONENT)
+  set(CMAKE_INSTALL_MANIFEST "install_manifest_${CMAKE_INSTALL_COMPONENT}.txt")
+else()
+  set(CMAKE_INSTALL_MANIFEST "install_manifest.txt")
+endif()
+
+string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT
+       "${CMAKE_INSTALL_MANIFEST_FILES}")
+file(WRITE "D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app_controller_yy_board_flash_xip_debug/${CMAKE_INSTALL_MANIFEST}"
+     "${CMAKE_INSTALL_MANIFEST_CONTENT}")

controller_yy_app_controller_yy_board_flash_xip_debug/iar_embedded_workbench/controlware_yy_app.custom_argvars

@@ -0,0 +1,9 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<iarUserArgVars>
+<group name="HPM_SDK" active="true">
+<variable>
+<name>HPM_SDK_BASE</name>
+<value>D:/sdk_env/sdk_env-v1.8.0/hpm_sdk</value>
+</variable>
+</group>
+</iarUserArgVars>

controller_yy_app_controller_yy_board_flash_xip_debug/iar_embedded_workbench/controlware_yy_app.ewd

@@ -0,0 +1,1016 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+    <fileVersion>3</fileVersion>
+    <configuration>
+        <name>Debug</name>
+        <toolchain>
+            <name>RISCV</name>
+        </toolchain>
+        <debug>1</debug>
+        <settings>
+            <name>C-SPY</name>
+            <archiveVersion>5</archiveVersion>
+            <data>
+                <version>2</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>CSPYInput</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CSPYProcessor</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CSPYDynDriver</name>
+                    <state>IJETRISCV</state>
+                </option>
+                <option>
+                    <name>CSPYRunToEnable</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CSPYRunoToName</name>
+                    <state>main</state>
+                </option>
+                <option>
+                    <name>CSPYMacOverride</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CSPYMacFile</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CSPYMemOverride</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CSPYMemFile</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CSPYMandatory</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CSPYDDFileSlave</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CSPYImagesSuppressCheck1</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CSPYImagesPath1</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CSPYImagesSuppressCheck2</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CSPYImagesPath2</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CSPYImagesSuppressCheck3</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CSPYImagesPath3</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CSPYImagesOffset1</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CSPYImagesOffset2</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CSPYImagesOffset3</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CSPYImagesUse1</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CSPYImagesUse2</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CSPYImagesUse3</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CSPYExtraOptionsCheck</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CSPYExtraOptions</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCDownloadSuppressDownload</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCDownloadVerifyAll</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>UseFlashLoader</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OverrideDefFlashBoard</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>FlashLoaders</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>MassEraseBeforeFlashing</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCMulticoreNrOfCores</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCMulticoreWorkspace</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCMulticoreSlaveProject</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCMulticoreSlaveConfiguration</name>
+                    <state>Debug</state>
+                </option>
+                <option>
+                    <name>OCAttachSlave</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCMulticoreNrOfCoresSlave</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCMulticoreAMPConfigType</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCMulticoreSessionFile</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCOverrideSlave</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCOverrideSlavePath</name>
+                    <state></state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>RISCVGDBSERV</name>
+            <archiveVersion>1</archiveVersion>
+            <data>
+                <version>0</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>CGDBMandatory</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>TCPIP</name>
+                    <state>localhost,3333</state>
+                </option>
+                <option>
+                    <name>DoLogfile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>LogFile</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>CCJTagBreakpointRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJTagDoUpdateBreakpoints</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJTagUpdateBreakpoints</name>
+                    <state>_call_main</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>IJETRISCV</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>3</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCIarProbeScriptFile</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCProbeCfgOverride</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCProbeConfig</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IjetProbeConfigRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetSelectedCPUBehaviour</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>ICpuName</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IjetResetList</name>
+                    <version>0</version>
+                    <state>4</state>
+                </option>
+                <option>
+                    <name>IjetHWResetDuration</name>
+                    <state>300</state>
+                </option>
+                <option>
+                    <name>IjetHWResetDelay</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IjetPowerFromProbe</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetPowerRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCIjetUsbSerialNo</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCIjetUsbSerialNoSelect</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetDoLogfile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetLogFile</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>IjetInterfaceRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetInterfaceCmdLine</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetMultiTargetEnable</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetMultiTarget</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetScanChainNonRISCVDevices</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetIRLength</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetMultiCPUEnable</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetMultiCPUNumber</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetJtagSpeedList</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetBreakpointRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetRestoreBreakpointsCheck</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetUpdateBreakpointsEdit</name>
+                    <state>_call_main</state>
+                </option>
+                <option>
+                    <name>RDICatchReset</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchDummy</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCJetEmuParams</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>FlashBoardPathSlave</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchNmi</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchInstrMis</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchInstrFault</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchIllegalInstr</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchLoadMis</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchLoadFault</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchStoreAddr</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchStoreAccess</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchEnvironment</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchInstrPage</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchLoadPage</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchStorePage</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchExternal</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchTimer</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchSoftware</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchModeM</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchModeS</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchModeU</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>GDelayAfterOverride</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IJETStdOutErr</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IjetSystemBusAccess</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCJetSigProbeOpt</name>
+                    <state>1</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>SIMRISCV</name>
+            <archiveVersion>5</archiveVersion>
+            <data>
+                <version>0</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>SIMMandatory</name>
+                    <state>0</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>THIRDPARTY_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>1</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CThirdPartyDriverDll</name>
+                    <state>###Uninitialized###</state>
+                </option>
+                <option>
+                    <name>CThirdPartyLogFileCheck</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CThirdPartyLogFileEditB</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>CThirdPartyDriverOpt</name>
+                    <state></state>
+                </option>
+            </data>
+        </settings>
+        <debuggerPlugins>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+        </debuggerPlugins>
+    </configuration>
+    <configuration>
+        <name>Release</name>
+        <toolchain>
+            <name>RISCV</name>
+        </toolchain>
+        <debug>1</debug>
+        <settings>
+            <name>C-SPY</name>
+            <archiveVersion>5</archiveVersion>
+            <data>
+                <version>2</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>CSPYInput</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CSPYProcessor</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CSPYDynDriver</name>
+                    <state>IJETRISCV</state>
+                </option>
+                <option>
+                    <name>CSPYRunToEnable</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CSPYRunoToName</name>
+                    <state>main</state>
+                </option>
+                <option>
+                    <name>CSPYMacOverride</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CSPYMacFile</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CSPYMemOverride</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CSPYMemFile</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CSPYMandatory</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CSPYDDFileSlave</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CSPYImagesSuppressCheck1</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CSPYImagesPath1</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CSPYImagesSuppressCheck2</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CSPYImagesPath2</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CSPYImagesSuppressCheck3</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CSPYImagesPath3</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CSPYImagesOffset1</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CSPYImagesOffset2</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CSPYImagesOffset3</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CSPYImagesUse1</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CSPYImagesUse2</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CSPYImagesUse3</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CSPYExtraOptionsCheck</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CSPYExtraOptions</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCDownloadSuppressDownload</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCDownloadVerifyAll</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>UseFlashLoader</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OverrideDefFlashBoard</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>FlashLoaders</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>MassEraseBeforeFlashing</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCMulticoreNrOfCores</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCMulticoreWorkspace</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCMulticoreSlaveProject</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCMulticoreSlaveConfiguration</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCAttachSlave</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCMulticoreNrOfCoresSlave</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCMulticoreAMPConfigType</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCMulticoreSessionFile</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OCOverrideSlave</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCOverrideSlavePath</name>
+                    <state></state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>RISCVGDBSERV</name>
+            <archiveVersion>1</archiveVersion>
+            <data>
+                <version>0</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>CGDBMandatory</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>TCPIP</name>
+                    <state>localhost,3333</state>
+                </option>
+                <option>
+                    <name>DoLogfile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>LogFile</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>CCJTagBreakpointRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJTagDoUpdateBreakpoints</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCJTagUpdateBreakpoints</name>
+                    <state>_call_main</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>IJETRISCV</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>3</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCIarProbeScriptFile</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCProbeCfgOverride</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCProbeConfig</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IjetProbeConfigRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetSelectedCPUBehaviour</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>ICpuName</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IjetResetList</name>
+                    <version>0</version>
+                    <state>4</state>
+                </option>
+                <option>
+                    <name>IjetHWResetDuration</name>
+                    <state>300</state>
+                </option>
+                <option>
+                    <name>IjetPowerFromProbe</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetPowerRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCIjetUsbSerialNo</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCIjetUsbSerialNoSelect</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetDoLogfile</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IjetLogFile</name>
+                    <state>$PROJ_DIR$\cspycomm_release.log</state>
+                </option>
+                <option>
+                    <name>IjetInterfaceRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetInterfaceCmdLine</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetMultiTargetEnable</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetMultiTarget</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetScanChainNonRISCVDevices</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetIRLength</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetMultiCPUEnable</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetMultiCPUNumber</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetJtagSpeedList</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetBreakpointRadio</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetRestoreBreakpointsCheck</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IjetUpdateBreakpointsEdit</name>
+                    <state>_call_main</state>
+                </option>
+                <option>
+                    <name>RDICatchReset</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CatchDummy</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OCJetEmuParams</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>FlashBoardPathSlave</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchNmi</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchInstrMis</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchInstrFault</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchIllegalInstr</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchLoadMis</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchLoadFault</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchStoreAddr</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchStoreAccess</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchEnvironment</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchInstrPage</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchLoadPage</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchStorePage</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchExternal</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchTimer</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchSoftware</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchModeM</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchModeS</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RDICatchModeU</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>GDelayAfterOverride</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IJETStdOutErr</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IjetSystemBusAccess</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OCJetSigProbeOpt</name>
+                    <state>1</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>SIMRISCV</name>
+            <archiveVersion>5</archiveVersion>
+            <data>
+                <version>0</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>SIMMandatory</name>
+                    <state>0</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>THIRDPARTY_ID</name>
+            <archiveVersion>2</archiveVersion>
+            <data>
+                <version>1</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>OCDriverInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CThirdPartyDriverDll</name>
+                    <state>Browse to your third-party driver</state>
+                </option>
+                <option>
+                    <name>CThirdPartyLogFileCheck</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CThirdPartyLogFileEditB</name>
+                    <state>$PROJ_DIR$\cspycomm.log</state>
+                </option>
+                <option>
+                    <name>CThirdPartyDriverOpt</name>
+                    <state></state>
+                </option>
+            </data>
+        </settings>
+        <debuggerPlugins>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$EW_DIR$\common\plugins\TargetAccessServer\TargetAccessServer.ENU.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+            <plugin>
+                <file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+                <loadFlag>0</loadFlag>
+            </plugin>
+        </debuggerPlugins>
+    </configuration>
+</project>

controller_yy_app_controller_yy_board_flash_xip_debug/iar_embedded_workbench/controlware_yy_app.ewp

@@ -0,0 +1,2585 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<project>
+    <fileVersion>3</fileVersion>
+    <configuration>
+        <name>Debug</name>
+        <toolchain>
+            <name>RISCV</name>
+        </toolchain>
+        <debug>1</debug>
+        <settings>
+            <name>General</name>
+            <archiveVersion>5</archiveVersion>
+            <data>
+                <version>10</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>GDeviceSelect</name>
+                    <state>HPM6750xVMx	HPMicro HPM6750xVMx</state>
+                </option>
+                <option>
+                    <name>GOutputBinary</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>ExePath</name>
+                    <state>Debug\Exe</state>
+                </option>
+                <option>
+                    <name>ObjPath</name>
+                    <state>Debug\Obj</state>
+                </option>
+                <option>
+                    <name>ListPath</name>
+                    <state>Debug\List</state>
+                </option>
+                <option>
+                    <name>BrowseInfoPath</name>
+                    <state>Debug\BrowseInfo</state>
+                </option>
+                <option>
+                    <name>GRuntimeLibSelect</name>
+                    <version>1</version>
+                    <state>3</state>
+                </option>
+                <option>
+                    <name>GRTDescription</name>
+                    <state>A compact configuration of the C/C++14 runtime library. No locale interface, C locale, no file descriptor support, no multibytes in printf and scanf, and no hex floats in strtod.</state>
+                </option>
+                <option>
+                    <name>GRTConfigPath</name>
+                    <state>$TOOLKIT_DIR$\inc\c\DLib_Config_Normal.h</state>
+                </option>
+                <option>
+                    <name>GRuntimeLibSelectSlave</name>
+                    <version>1</version>
+                    <state>3</state>
+                </option>
+                <option>
+                    <name>GRuntimeLibThreads</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>GInputDescription</name>
+                    <state>Automatic choice of formatter, without multibyte support.</state>
+                </option>
+                <option>
+                    <name>GOutputDescription</name>
+                    <state>Automatic choice of formatter, without multibyte support.</state>
+                </option>
+                <option>
+                    <name>GenMathFunctionVariant</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>GenMathFunctionDescription</name>
+                    <state>Default variants of cos, sin, tan, log, log10, pow, and exp.</state>
+                </option>
+                <option>
+                    <name>GGeneralStack</name>
+                    <state>0x4000</state>
+                </option>
+                <option>
+                    <name>GHeapSize</name>
+                    <state>0x4000</state>
+                </option>
+                <option>
+                    <name>GNumCores</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OGPrintfVariant</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OGPrintfMultibyteSupport</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OGScanfVariant</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OGScanfMultibyteSupport</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OgLibHeap</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OGLibAdditionalLocale</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>GenLocaleTags</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>GenLocaleDisplayOnly</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>GDeviceSelectSlave</name>
+                    <state>RV32	RV32</state>
+                </option>
+                <option>
+                    <name>GGeneralAutoVectorSetup</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>GDeviceCoreIBASRadioSlave</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>GDeviceMultSlave</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>GDeviceAtomicSlave</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>GDeviceCompactSlave</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>GDeviceFloatSelectSlave</name>
+                    <version>1</version>
+                    <state></state>
+                </option>
+                <option>
+                    <name>GCoreDevice</name>
+                    <state>rv32imac</state>
+                </option>
+                <option>
+                    <name>RadioStdOutErr</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RadioLibLowLev</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OGBufferedTerminalOutput</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>GDeviceUserLvlIntSlave</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>GDeviceBitmanipASlave</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>GDeviceBitmanipBSlave</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>GDeviceBitmanipCSlave</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>GDeviceXandesperfSlave</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>GDeviceBitmanipSSlave</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>BuildFilesPath</name>
+                    <state>Debug\</state>
+                </option>
+                <option>
+                    <name>GDeviceBitmanipCountZeroesSlave</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>GCodeModelSlave</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>GDeviceXCoDenseSlave</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>GDeviceXCoDenseJalSlave</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>GDeviceXZenVBitfieldsSlave</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>GDeviceNXPVirgoSupervisorSlave</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>GDeviceResumableNMISlave</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>GDevicePackedSIMDZpsfoperandSlave</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>GDeviceDspRadioSlave</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>GDeviceCacheManagementSlave</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>GDeviceCachePrefetchSlave</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>GDeviceCacheZeroSlave</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>GDeviceCacheEswinSlave</name>
+                    <state>0</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>ICCRISCV</name>
+            <archiveVersion>5</archiveVersion>
+            <data>
+                <version>8</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>ICore</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCObjPrefix</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCLibConfigHeader</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IccLang</name>
+                    <state>2</state>
+                </option>
+                <option>
+                    <name>IccCDialect</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IccAllowVLA</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IccCppInlineSemantics</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IccRequirePrototypes</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IccStaticDestr</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IccLanguageConformance</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IccCharIs</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IccFloatSemantics</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCOptLevel</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCOptStrategy</name>
+                    <version>0</version>
+                    <state>2</state>
+                </option>
+                <option>
+                    <name>CCNoSizeConst</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCOptLevelSlave</name>
+                    <state>2</state>
+                </option>
+                <option>
+                    <name>CCAllowList</name>
+                    <version>0</version>
+                    <state>1111111</state>
+                </option>
+                <option>
+                    <name>CCDebugInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCExtraOptionsCheck</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCExtraOptions</name>
+                    <state>--diag_suppress Pa089</state>
+                    <state>--diag_suppress Pe236</state>
+                    <state>--diag_suppress Pe188</state>
+                    <state>--diag_suppress Pe546</state>
+                    <state>--diag_suppress Pe111</state>
+                </option>
+                <option>
+                    <name>OutputFile</name>
+                    <state>$FILE_BNAME$.o</state>
+                </option>
+                <option>
+                    <name>CCDefines</name>
+                    <state>FLASH_XIP=1</state>
+                    <state>HPMSOC_HAS_HPMSDK_MULTICORE=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_GPIO=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_PLIC=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_MCHTMR=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_PLICSW=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_GPIOM=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_ADC12=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_ADC16=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_ACMP=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_SPI=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_UART=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_CAN=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_WDG=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_MBX=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_PTPC=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_DMAMUX=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_DMA=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_RNG=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_KEYM=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_I2S=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_DAO=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_PDM=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_PWM=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_HALL=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_QEI=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_TRGM=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_SYNT=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_LCDC=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_CAM=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_PDMA=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_JPEG=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_ENET=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_GPTMR=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_USB=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_SDXC=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_CONCTL=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_I2C=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_SDP=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_FEMC=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_SYSCTL=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_IOC=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_OTP=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_PPOR=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_PCFG=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_PSEC=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_PMON=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_PGPR=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_VAD=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_PLLCTL=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_BPOR=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_BCFG=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_BUTN=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_BGPR=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_RTC=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_BSEC=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_BKEY=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_BMON=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_TAMP=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_MONO=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_PMP=y</state>
+                    <state>SD_FATFS_ENABLE=1</state>
+                </option>
+                <option>
+                    <name>CCPreprocFile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCPreprocComments</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCPreprocLine</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCListCFile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCListCMnemonics</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCListCMessages</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCListAssFile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCListAssSource</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCEnableRemarks</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCDiagSuppress</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCDiagRemark</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCDiagWarning</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCDiagError</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCDiagWarnAreErr</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCompilerRuntimeInfo</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>PreInclude</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCIncludePath2</name>
+                    <state>$PROJ_DIR$\../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/arch</state>
+                    <state>$PROJ_DIR$\../../controller_yy_board</state>
+                    <state>$PROJ_DIR$\../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/HPM6750</state>
+                    <state>$PROJ_DIR$\../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/ip</state>
+                    <state>$PROJ_DIR$\../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/HPM6750/toolchains</state>
+                    <state>$PROJ_DIR$\../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/HPM6750/boot</state>
+                    <state>$PROJ_DIR$\../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/inc</state>
+                    <state>$PROJ_DIR$\../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/utils</state>
+                    <state>$PROJ_DIR$\../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/components/debug_console</state>
+                    <state>$PROJ_DIR$\../build_tmp/generated/include</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/middleware/fatfs/src/common</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/middleware/fatfs/src/portable</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/middleware/fatfs/src/portable/sdxc</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/middleware/hpm_sdmmc/lib</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/middleware/hpm_sdmmc/lib</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/middleware/hpm_sdmmc/port</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/controlware/control_inc</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/hardware/hard_inc</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/matrix</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/payload</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/remote_controller</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/software/soft_inc</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/user_src/inc</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/v8/v8m</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/v8/v8m_yy</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/vklink</state>
+                </option>
+                <option>
+                    <name>CCStdIncCheck</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCodeSection</name>
+                    <state>.text</state>
+                </option>
+                <option>
+                    <name>CCEncSource</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCEncOutput</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCEncOutputBom</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCEncInput</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCGuardCalls</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>ICodeModel</name>
+                    <state>1</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>IASMRISCV</name>
+            <archiveVersion>5</archiveVersion>
+            <data>
+                <version>1</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>AsmCore</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>AsmObjPrefix</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>AsmOutputFile</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>AsmCaseSensitivity</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>AsmAllowMnemonics</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>AsmAllowDirectives</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>AsmMacroChars</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>AsmDebugInfo</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>AsmListFile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>AsmListNoDiagnostics</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>AsmListIncludeCrossRef</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>AsmListMacroDefinitions</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>AsmListNoMacroExpansion</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>AsmListAssembledOnly</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>AsmListTruncateMultiline</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>AsmStdIncludeIgnore</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>AsmIncludePath</name>
+                    <state>$PROJ_DIR$\../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/arch</state>
+                    <state>$PROJ_DIR$\../../controller_yy_board</state>
+                    <state>$PROJ_DIR$\../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/HPM6750</state>
+                    <state>$PROJ_DIR$\../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/ip</state>
+                    <state>$PROJ_DIR$\../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/HPM6750/toolchains</state>
+                    <state>$PROJ_DIR$\../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/HPM6750/boot</state>
+                    <state>$PROJ_DIR$\../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/inc</state>
+                    <state>$PROJ_DIR$\../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/utils</state>
+                    <state>$PROJ_DIR$\../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/components/debug_console</state>
+                    <state>$PROJ_DIR$\../build_tmp/generated/include</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/middleware/fatfs/src/common</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/middleware/fatfs/src/portable</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/middleware/fatfs/src/portable/sdxc</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/middleware/hpm_sdmmc/lib</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/middleware/hpm_sdmmc/lib</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/middleware/hpm_sdmmc/port</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/controlware/control_inc</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/hardware/hard_inc</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/matrix</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/payload</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/remote_controller</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/software/soft_inc</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/user_src/inc</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/v8/v8m</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/v8/v8m_yy</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/vklink</state>
+                </option>
+                <option>
+                    <name>AsmDefines</name>
+                    <state>FLASH_XIP=1</state>
+                    <state>HPMSOC_HAS_HPMSDK_MULTICORE=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_GPIO=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_PLIC=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_MCHTMR=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_PLICSW=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_GPIOM=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_ADC12=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_ADC16=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_ACMP=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_SPI=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_UART=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_CAN=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_WDG=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_MBX=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_PTPC=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_DMAMUX=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_DMA=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_RNG=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_KEYM=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_I2S=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_DAO=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_PDM=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_PWM=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_HALL=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_QEI=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_TRGM=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_SYNT=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_LCDC=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_CAM=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_PDMA=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_JPEG=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_ENET=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_GPTMR=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_USB=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_SDXC=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_CONCTL=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_I2C=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_SDP=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_FEMC=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_SYSCTL=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_IOC=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_OTP=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_PPOR=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_PCFG=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_PSEC=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_PMON=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_PGPR=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_VAD=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_PLLCTL=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_BPOR=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_BCFG=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_BUTN=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_BGPR=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_RTC=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_BSEC=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_BKEY=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_BMON=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_TAMP=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_MONO=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_PMP=y</state>
+                    <state>SD_FATFS_ENABLE=1</state>
+                </option>
+                <option>
+                    <name>PreInclude</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>AsmPreprocOutput</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>AsmPreprocComment</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>AsmPreprocLine</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>AsmEnableRemarks</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>AsmDiagnosticsSuppress</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>AsmDiagnosticsRemark</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>AsmDiagnosticsWarning</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>AsmDiagnosticsError</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>AsmDiagnosticsWarningsAreErrors</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>AsmLimitNumberOfErrors</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>AsmMaxNumberOfErrors</name>
+                    <state>100</state>
+                </option>
+                <option>
+                    <name>AsmUseExtraOptions</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>AsmExtraOptions</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>ACodeModel</name>
+                    <state>1</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>OBJCOPY</name>
+            <archiveVersion>5</archiveVersion>
+            <data>
+                <version>0</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>OOCOutputFormat</name>
+                    <version>0</version>
+                    <state>2</state>
+                </option>
+                <option>
+                    <name>OCOutputOverride</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OOCOutputFile</name>
+                    <state>demo.bin</state>
+                </option>
+                <option>
+                    <name>OOCCommandLineProducer</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OOCObjCopyEnable</name>
+                    <state>1</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>CUSTOM</name>
+            <archiveVersion>3</archiveVersion>
+            <data>
+                <extensions></extensions>
+                <cmdline></cmdline>
+                <hasPrio>0</hasPrio>
+                <buildSequence>inputOutputBased</buildSequence>
+            </data>
+        </settings>
+        <settings>
+            <name>BUILDACTION</name>
+            <archiveVersion>1</archiveVersion>
+            <data>
+                <prebuild></prebuild>
+                <postbuild></postbuild>
+            </data>
+        </settings>
+        <settings>
+            <name>ILINK</name>
+            <archiveVersion>5</archiveVersion>
+            <data>
+                <version>9</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>IlinkLibIOConfig</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkStackSize</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkHeapSize</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkHeapSelect</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkLocaleSelect</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkInputFileSlave</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkOutputFile</name>
+                    <state>demo.elf</state>
+                </option>
+                <option>
+                    <name>IlinkDebugInfoEnable</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkKeepSymbols</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkRawBinaryFile</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkRawBinarySymbol</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkRawBinarySegment</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkRawBinaryAlign</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkDefines</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkConfigDefines</name>
+                    <state>_flash_size=32M</state>
+                    <state>_extram_size=32M</state>
+                </option>
+                <option>
+                    <name>IlinkMapFile</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkLogFile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkLogInitialization</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkLogModule</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkLogSection</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkLogVeneer</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkIcfOverride</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkIcfFile</name>
+                    <state>$PROJ_DIR$\..\..\controller_yy_app\linkers\iar\user_linker.icf</state>
+                </option>
+                <option>
+                    <name>IlinkIcfFileSlave</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkEnableRemarks</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkSuppressDiags</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkTreatAsRem</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkTreatAsWarn</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkTreatAsErr</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkWarningsAreErrors</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkAutoLibEnable</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkAdditionalLibs</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkOverrideProgramEntryLabel</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkProgramEntryLabelSelect</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkProgramEntryLabel</name>
+                    <state>_start</state>
+                </option>
+                <option>
+                    <name>DoFill</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>FillerByte</name>
+                    <state>0xFF</state>
+                </option>
+                <option>
+                    <name>FillerStart</name>
+                    <state>0x0</state>
+                </option>
+                <option>
+                    <name>FillerEnd</name>
+                    <state>0x0</state>
+                </option>
+                <option>
+                    <name>CrcSize</name>
+                    <version>0</version>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CrcAlign</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CrcPoly</name>
+                    <state>0x11021</state>
+                </option>
+                <option>
+                    <name>CrcCompl</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CrcBitOrder</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CrcInitialValue</name>
+                    <state>0x0</state>
+                </option>
+                <option>
+                    <name>DoCrc</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CrcFullSize</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkLogAutoLibSelect</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkLogRedirSymbols</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkLogUnusedFragments</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkCrcReverseByteOrder</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkCrcUseAsInput</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CrcAlgorithm</name>
+                    <version>1</version>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CrcUnitSize</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkIcfFile_AltDefault</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkOptMergeDuplSections</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkOptUseVfe</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkOptForceVfe</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkStackAnalysisEnable</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkStackControlFile</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkStackCallGraphFile</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkLogCallGraph</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkEncInput</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkEncOutput</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkEncOutputBom</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkUseExtraOptions</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkExtraOptions</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkThreadsSlave</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkRawBinaryFile2</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkRawBinarySymbol2</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkRawBinarySegment2</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkRawBinaryAlign2</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkAutoVectorSetupSlave</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>ILINKStdOutErr</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkLogCrtRoutineSelection</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkLogFragmentInfo</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkLogInlining</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkLogMerging</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkDemangle</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkBufferedTerminalOutput</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkCspyDebugSupportEnable2</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkWrapperFileEnable</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkWrapperFile</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>ILinkCodeModel</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>ILinkCore</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>ILinkCoDenseJal</name>
+                    <state>1</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>IARCHIVE</name>
+            <archiveVersion>5</archiveVersion>
+            <data>
+                <version>0</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>1</debug>
+                <option>
+                    <name>IarchiveInputs</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IarchiveOverride</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IarchiveOutput</name>
+                    <state>###Uninitialized###</state>
+                </option>
+            </data>
+        </settings>
+    </configuration>
+    <configuration>
+        <name>Release</name>
+        <toolchain>
+            <name>RISCV</name>
+        </toolchain>
+        <debug>0</debug>
+        <settings>
+            <name>General</name>
+            <archiveVersion>5</archiveVersion>
+            <data>
+                <version>10</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>0</debug>
+                <option>
+                    <name>GDeviceSelect</name>
+                    <state>HPM6750xVMx	HPMicro HPM6750xVMx</state>
+                </option>
+                <option>
+                    <name>GOutputBinary</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>ExePath</name>
+                    <state>Release\Exe</state>
+                </option>
+                <option>
+                    <name>ObjPath</name>
+                    <state>Release\Obj</state>
+                </option>
+                <option>
+                    <name>ListPath</name>
+                    <state>Release\List</state>
+                </option>
+                <option>
+                    <name>BrowseInfoPath</name>
+                    <state>Release\BrowseInfo</state>
+                </option>
+                <option>
+                    <name>GRuntimeLibSelect</name>
+                    <version>1</version>
+                    <state>3</state>
+                </option>
+                <option>
+                    <name>GRTDescription</name>
+                    <state>A compact configuration of the C/C++14 runtime library. No locale interface, C locale, no file descriptor support, no multibytes in printf and scanf, and no hex floats in strtod.</state>
+                </option>
+                <option>
+                    <name>GRTConfigPath</name>
+                    <state>$TOOLKIT_DIR$\inc\c\DLib_Config_Normal.h</state>
+                </option>
+                <option>
+                    <name>GRuntimeLibSelectSlave</name>
+                    <version>1</version>
+                    <state>3</state>
+                </option>
+                <option>
+                    <name>GRuntimeLibThreads</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>GInputDescription</name>
+                    <state>Automatic choice of formatter, without multibyte support.</state>
+                </option>
+                <option>
+                    <name>GOutputDescription</name>
+                    <state>Automatic choice of formatter, without multibyte support.</state>
+                </option>
+                <option>
+                    <name>GenMathFunctionVariant</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>GenMathFunctionDescription</name>
+                    <state>Default variants of cos, sin, tan, log, log10, pow, and exp.</state>
+                </option>
+                <option>
+                    <name>GGeneralStack</name>
+                    <state>0x4000</state>
+                </option>
+                <option>
+                    <name>GHeapSize</name>
+                    <state>0x4000</state>
+                </option>
+                <option>
+                    <name>GNumCores</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>OGPrintfVariant</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OGPrintfMultibyteSupport</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OGScanfVariant</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OGScanfMultibyteSupport</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OgLibHeap</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>OGLibAdditionalLocale</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>GenLocaleTags</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>GenLocaleDisplayOnly</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>GDeviceSelectSlave</name>
+                    <state>RV32	RV32</state>
+                </option>
+                <option>
+                    <name>GGeneralAutoVectorSetup</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>GDeviceCoreIBASRadioSlave</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>GDeviceMultSlave</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>GDeviceAtomicSlave</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>GDeviceCompactSlave</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>GDeviceFloatSelectSlave</name>
+                    <version>1</version>
+                    <state></state>
+                </option>
+                <option>
+                    <name>GCoreDevice</name>
+                    <state>rv32imac</state>
+                </option>
+                <option>
+                    <name>RadioStdOutErr</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>RadioLibLowLev</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OGBufferedTerminalOutput</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>GDeviceUserLvlIntSlave</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>GDeviceBitmanipASlave</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>GDeviceBitmanipBSlave</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>GDeviceBitmanipCSlave</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>GDeviceXandesperfSlave</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>GDeviceBitmanipSSlave</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>BuildFilesPath</name>
+                    <state>Release\</state>
+                </option>
+                <option>
+                    <name>GDeviceBitmanipCountZeroesSlave</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>GCodeModelSlave</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>GDeviceXCoDenseSlave</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>GDeviceXCoDenseJalSlave</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>GDeviceXZenVBitfieldsSlave</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>GDeviceNXPVirgoSupervisorSlave</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>GDeviceResumableNMISlave</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>GDevicePackedSIMDZpsfoperandSlave</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>GDeviceDspRadioSlave</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>GDeviceCacheManagementSlave</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>GDeviceCachePrefetchSlave</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>GDeviceCacheZeroSlave</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>GDeviceCacheEswinSlave</name>
+                    <state>0</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>ICCRISCV</name>
+            <archiveVersion>5</archiveVersion>
+            <data>
+                <version>8</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>0</debug>
+                <option>
+                    <name>ICore</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCObjPrefix</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCLibConfigHeader</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IccLang</name>
+                    <state>2</state>
+                </option>
+                <option>
+                    <name>IccCDialect</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IccAllowVLA</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IccCppInlineSemantics</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IccRequirePrototypes</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IccStaticDestr</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IccLanguageConformance</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IccCharIs</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IccFloatSemantics</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCOptLevel</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCOptStrategy</name>
+                    <version>0</version>
+                    <state>2</state>
+                </option>
+                <option>
+                    <name>CCNoSizeConst</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCOptLevelSlave</name>
+                    <state>2</state>
+                </option>
+                <option>
+                    <name>CCAllowList</name>
+                    <version>0</version>
+                    <state>1111111</state>
+                </option>
+                <option>
+                    <name>CCDebugInfo</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCExtraOptionsCheck</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCExtraOptions</name>
+                    <state>--diag_suppress Pa089</state>
+                    <state>--diag_suppress Pe236</state>
+                    <state>--diag_suppress Pe188</state>
+                    <state>--diag_suppress Pe546</state>
+                    <state>--diag_suppress Pe111</state>
+                </option>
+                <option>
+                    <name>OutputFile</name>
+                    <state>$FILE_BNAME$.o</state>
+                </option>
+                <option>
+                    <name>CCDefines</name>
+                    <state>FLASH_XIP=1</state>
+                    <state>HPMSOC_HAS_HPMSDK_MULTICORE=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_GPIO=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_PLIC=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_MCHTMR=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_PLICSW=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_GPIOM=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_ADC12=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_ADC16=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_ACMP=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_SPI=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_UART=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_CAN=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_WDG=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_MBX=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_PTPC=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_DMAMUX=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_DMA=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_RNG=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_KEYM=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_I2S=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_DAO=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_PDM=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_PWM=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_HALL=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_QEI=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_TRGM=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_SYNT=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_LCDC=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_CAM=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_PDMA=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_JPEG=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_ENET=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_GPTMR=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_USB=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_SDXC=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_CONCTL=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_I2C=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_SDP=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_FEMC=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_SYSCTL=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_IOC=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_OTP=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_PPOR=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_PCFG=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_PSEC=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_PMON=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_PGPR=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_VAD=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_PLLCTL=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_BPOR=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_BCFG=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_BUTN=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_BGPR=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_RTC=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_BSEC=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_BKEY=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_BMON=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_TAMP=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_MONO=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_PMP=y</state>
+                    <state>SD_FATFS_ENABLE=1</state>
+                    <state>NDEBUG</state>
+                </option>
+                <option>
+                    <name>CCPreprocFile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCPreprocComments</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCPreprocLine</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCListCFile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCListCMnemonics</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCListCMessages</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCListAssFile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCListAssSource</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCEnableRemarks</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCDiagSuppress</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCDiagRemark</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCDiagWarning</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCDiagError</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCDiagWarnAreErr</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCompilerRuntimeInfo</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>PreInclude</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>CCIncludePath2</name>
+                    <state>$PROJ_DIR$\../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/arch</state>
+                    <state>$PROJ_DIR$\../../controller_yy_board</state>
+                    <state>$PROJ_DIR$\../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/HPM6750</state>
+                    <state>$PROJ_DIR$\../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/ip</state>
+                    <state>$PROJ_DIR$\../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/HPM6750/toolchains</state>
+                    <state>$PROJ_DIR$\../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/HPM6750/boot</state>
+                    <state>$PROJ_DIR$\../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/inc</state>
+                    <state>$PROJ_DIR$\../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/utils</state>
+                    <state>$PROJ_DIR$\../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/components/debug_console</state>
+                    <state>$PROJ_DIR$\../build_tmp/generated/include</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/middleware/fatfs/src/common</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/middleware/fatfs/src/portable</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/middleware/fatfs/src/portable/sdxc</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/middleware/hpm_sdmmc/lib</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/middleware/hpm_sdmmc/lib</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/middleware/hpm_sdmmc/port</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/controlware/control_inc</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/hardware/hard_inc</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/matrix</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/payload</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/remote_controller</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/software/soft_inc</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/user_src/inc</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/v8/v8m</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/v8/v8m_yy</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/vklink</state>
+                </option>
+                <option>
+                    <name>CCStdIncCheck</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCCodeSection</name>
+                    <state>.text</state>
+                </option>
+                <option>
+                    <name>CCEncSource</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCEncOutput</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCEncOutputBom</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CCEncInput</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CCGuardCalls</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>ICodeModel</name>
+                    <state>1</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>IASMRISCV</name>
+            <archiveVersion>5</archiveVersion>
+            <data>
+                <version>1</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>0</debug>
+                <option>
+                    <name>AsmCore</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>AsmObjPrefix</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>AsmOutputFile</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>AsmCaseSensitivity</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>AsmAllowMnemonics</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>AsmAllowDirectives</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>AsmMacroChars</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>AsmDebugInfo</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>AsmListFile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>AsmListNoDiagnostics</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>AsmListIncludeCrossRef</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>AsmListMacroDefinitions</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>AsmListNoMacroExpansion</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>AsmListAssembledOnly</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>AsmListTruncateMultiline</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>AsmStdIncludeIgnore</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>AsmIncludePath</name>
+                    <state>$PROJ_DIR$\../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/arch</state>
+                    <state>$PROJ_DIR$\../../controller_yy_board</state>
+                    <state>$PROJ_DIR$\../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/HPM6750</state>
+                    <state>$PROJ_DIR$\../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/ip</state>
+                    <state>$PROJ_DIR$\../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/HPM6750/toolchains</state>
+                    <state>$PROJ_DIR$\../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/HPM6750/boot</state>
+                    <state>$PROJ_DIR$\../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/inc</state>
+                    <state>$PROJ_DIR$\../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/utils</state>
+                    <state>$PROJ_DIR$\../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/components/debug_console</state>
+                    <state>$PROJ_DIR$\../build_tmp/generated/include</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/middleware/fatfs/src/common</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/middleware/fatfs/src/portable</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/middleware/fatfs/src/portable/sdxc</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/middleware/hpm_sdmmc/lib</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/middleware/hpm_sdmmc/lib</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/middleware/hpm_sdmmc/port</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/controlware/control_inc</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/hardware/hard_inc</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/matrix</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/payload</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/remote_controller</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/software/soft_inc</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/user_src/inc</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/v8/v8m</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/v8/v8m_yy</state>
+                    <state>$PROJ_DIR$\../../controller_yy_app/vklink</state>
+                </option>
+                <option>
+                    <name>AsmDefines</name>
+                    <state>FLASH_XIP=1</state>
+                    <state>HPMSOC_HAS_HPMSDK_MULTICORE=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_GPIO=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_PLIC=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_MCHTMR=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_PLICSW=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_GPIOM=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_ADC12=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_ADC16=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_ACMP=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_SPI=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_UART=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_CAN=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_WDG=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_MBX=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_PTPC=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_DMAMUX=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_DMA=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_RNG=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_KEYM=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_I2S=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_DAO=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_PDM=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_PWM=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_HALL=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_QEI=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_TRGM=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_SYNT=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_LCDC=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_CAM=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_PDMA=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_JPEG=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_ENET=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_GPTMR=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_USB=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_SDXC=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_CONCTL=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_I2C=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_SDP=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_FEMC=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_SYSCTL=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_IOC=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_OTP=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_PPOR=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_PCFG=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_PSEC=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_PMON=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_PGPR=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_VAD=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_PLLCTL=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_BPOR=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_BCFG=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_BUTN=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_BGPR=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_RTC=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_BSEC=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_BKEY=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_BMON=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_TAMP=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_MONO=y</state>
+                    <state>HPMSOC_HAS_HPMSDK_PMP=y</state>
+                    <state>SD_FATFS_ENABLE=1</state>
+                </option>
+                <option>
+                    <name>PreInclude</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>AsmPreprocOutput</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>AsmPreprocComment</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>AsmPreprocLine</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>AsmEnableRemarks</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>AsmDiagnosticsSuppress</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>AsmDiagnosticsRemark</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>AsmDiagnosticsWarning</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>AsmDiagnosticsError</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>AsmDiagnosticsWarningsAreErrors</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>AsmLimitNumberOfErrors</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>AsmMaxNumberOfErrors</name>
+                    <state>100</state>
+                </option>
+                <option>
+                    <name>AsmUseExtraOptions</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>AsmExtraOptions</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>ACodeModel</name>
+                    <state>1</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>OBJCOPY</name>
+            <archiveVersion>5</archiveVersion>
+            <data>
+                <version>0</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>0</debug>
+                <option>
+                    <name>OOCOutputFormat</name>
+                    <version>0</version>
+                    <state>2</state>
+                </option>
+                <option>
+                    <name>OCOutputOverride</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OOCOutputFile</name>
+                    <state>demo.bin</state>
+                </option>
+                <option>
+                    <name>OOCCommandLineProducer</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>OOCObjCopyEnable</name>
+                    <state>1</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>CUSTOM</name>
+            <archiveVersion>3</archiveVersion>
+            <data>
+                <extensions></extensions>
+                <cmdline></cmdline>
+                <hasPrio>0</hasPrio>
+                <buildSequence>inputOutputBased</buildSequence>
+            </data>
+        </settings>
+        <settings>
+            <name>BUILDACTION</name>
+            <archiveVersion>1</archiveVersion>
+            <data>
+                <prebuild></prebuild>
+                <postbuild></postbuild>
+            </data>
+        </settings>
+        <settings>
+            <name>ILINK</name>
+            <archiveVersion>5</archiveVersion>
+            <data>
+                <version>9</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>0</debug>
+                <option>
+                    <name>IlinkLibIOConfig</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkStackSize</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkHeapSize</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkHeapSelect</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkLocaleSelect</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkInputFileSlave</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkOutputFile</name>
+                    <state>demo.elf</state>
+                </option>
+                <option>
+                    <name>IlinkDebugInfoEnable</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkKeepSymbols</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkRawBinaryFile</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkRawBinarySymbol</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkRawBinarySegment</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkRawBinaryAlign</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkDefines</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkConfigDefines</name>
+                    <state>_flash_size=32M</state>
+                    <state>_extram_size=32M</state>
+                </option>
+                <option>
+                    <name>IlinkMapFile</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkLogFile</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkLogInitialization</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkLogModule</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkLogSection</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkLogVeneer</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkIcfOverride</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkIcfFile</name>
+                    <state>$PROJ_DIR$\..\..\controller_yy_app\linkers\iar\user_linker.icf</state>
+                </option>
+                <option>
+                    <name>IlinkIcfFileSlave</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkEnableRemarks</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkSuppressDiags</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkTreatAsRem</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkTreatAsWarn</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkTreatAsErr</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkWarningsAreErrors</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkAutoLibEnable</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkAdditionalLibs</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkOverrideProgramEntryLabel</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkProgramEntryLabelSelect</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkProgramEntryLabel</name>
+                    <state>_start</state>
+                </option>
+                <option>
+                    <name>DoFill</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>FillerByte</name>
+                    <state>0xFF</state>
+                </option>
+                <option>
+                    <name>FillerStart</name>
+                    <state>0x0</state>
+                </option>
+                <option>
+                    <name>FillerEnd</name>
+                    <state>0x0</state>
+                </option>
+                <option>
+                    <name>CrcSize</name>
+                    <version>0</version>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CrcAlign</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CrcPoly</name>
+                    <state>0x11021</state>
+                </option>
+                <option>
+                    <name>CrcCompl</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CrcBitOrder</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CrcInitialValue</name>
+                    <state>0x0</state>
+                </option>
+                <option>
+                    <name>DoCrc</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>CrcFullSize</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkLogAutoLibSelect</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkLogRedirSymbols</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkLogUnusedFragments</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkCrcReverseByteOrder</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkCrcUseAsInput</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CrcAlgorithm</name>
+                    <version>1</version>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>CrcUnitSize</name>
+                    <version>0</version>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkIcfFile_AltDefault</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkOptMergeDuplSections</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkOptUseVfe</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkOptForceVfe</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkStackAnalysisEnable</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkStackControlFile</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkStackCallGraphFile</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkLogCallGraph</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkEncInput</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkEncOutput</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkEncOutputBom</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkUseExtraOptions</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkExtraOptions</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkThreadsSlave</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkRawBinaryFile2</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkRawBinarySymbol2</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkRawBinarySegment2</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkRawBinaryAlign2</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IlinkAutoVectorSetupSlave</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>ILINKStdOutErr</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkLogCrtRoutineSelection</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkLogFragmentInfo</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkLogInlining</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkLogMerging</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkDemangle</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkBufferedTerminalOutput</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkCspyDebugSupportEnable2</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>IlinkWrapperFileEnable</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IlinkWrapperFile</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>ILinkCodeModel</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>ILinkCore</name>
+                    <state>1</state>
+                </option>
+                <option>
+                    <name>ILinkCoDenseJal</name>
+                    <state>1</state>
+                </option>
+            </data>
+        </settings>
+        <settings>
+            <name>IARCHIVE</name>
+            <archiveVersion>5</archiveVersion>
+            <data>
+                <version>0</version>
+                <wantNonLocal>1</wantNonLocal>
+                <debug>0</debug>
+                <option>
+                    <name>IarchiveInputs</name>
+                    <state></state>
+                </option>
+                <option>
+                    <name>IarchiveOverride</name>
+                    <state>0</state>
+                </option>
+                <option>
+                    <name>IarchiveOutput</name>
+                    <state>###Uninitialized###</state>
+                </option>
+            </data>
+        </settings>
+    </configuration>
+      <group><name>application</name>
+    <group><name>vklink</name>
+      <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/vklink/gcs_vklink_v30.c</name></file>
+      <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/vklink/um482.c</name></file>
+      <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/vklink/vklink.c</name></file>
+    </group>
+    <group><name>v8</name>
+      <group><name>v8m</name>
+        <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/v8/v8m/bsp_V8M_GPIO_photo.c</name></file>
+        <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/v8/v8m/bsp_V8M_adc.c</name></file>
+        <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/v8/v8m/bsp_V8M_flash.c</name></file>
+        <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/v8/v8m/bsp_V8M_led.c</name></file>
+        <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/v8/v8m/bsp_V8M_pwm.c</name></file>
+      </group>
+      <group><name>v8m_yy</name>
+        <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/v8/v8m_yy/bsp_V8M_YY_adc.c</name></file>
+        <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/v8/v8m_yy/bsp_V8M_YY_led.c</name></file>
+        <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/v8/v8m_yy/bsp_V8M_YY_pwm.c</name></file>
+      </group>
+    </group>
+    <group><name>user_src</name>
+      <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/user_src/main.c</name></file>
+    </group>
+    <group><name>software</name>
+      <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/software/debug_printf.c</name></file>
+      <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/software/drv_uart.c</name></file>
+      <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/software/params.c</name></file>
+      <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/software/rkfifo.c</name></file>
+      <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/software/soft_can.c</name></file>
+      <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/software/soft_can_yy.c</name></file>
+      <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/software/soft_delay.c</name></file>
+      <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/software/soft_flash.c</name></file>
+      <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/software/soft_gps.c</name></file>
+      <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/software/soft_gs.c</name></file>
+      <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/software/soft_imu.c</name></file>
+      <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/software/soft_motor_output.c</name></file>
+      <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/software/soft_payload.c</name></file>
+      <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/software/soft_port_uart4.c</name></file>
+      <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/software/soft_rc_input.c</name></file>
+      <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/software/soft_sdcard.c</name></file>
+      <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/software/soft_system.c</name></file>
+      <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/software/soft_time.c</name></file>
+      <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/software/soft_timer.c</name></file>
+      <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/software/soft_usharprada.c</name></file>
+      <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/software/soft_voltage.c</name></file>
+      <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/software/soft_warn.c</name></file>
+    </group>
+    <group><name>remote_controller</name>
+      <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/remote_controller/rc_rock.c</name></file>
+      <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/remote_controller/rc_sbus.c</name></file>
+      <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/remote_controller/remote_controller.c</name></file>
+    </group>
+    <group><name>payload</name>
+      <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/payload/payload.c</name></file>
+    </group>
+    <group><name>matrix</name>
+      <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/matrix/euler.c</name></file>
+      <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/matrix/flt_butter.c</name></file>
+      <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/matrix/quaternion.c</name></file>
+    </group>
+    <group><name>hardware</name>
+      <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/hardware/hard_can.c</name></file>
+      <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/hardware/hard_flash_at45db.c</name></file>
+      <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/hardware/hard_flash_gd25q16.c</name></file>
+      <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/hardware/hard_hdma_int.c</name></file>
+      <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/hardware/hard_imu_uart3.c</name></file>
+      <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/hardware/hard_rc_subs.c</name></file>
+      <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/hardware/hard_sbus_out.c</name></file>
+      <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/hardware/hard_sbusout_af_pump.c</name></file>
+      <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/hardware/hard_sdio_sd.c</name></file>
+      <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/hardware/hard_system.c</name></file>
+      <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/hardware/hard_system_delay.c</name></file>
+      <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/hardware/hard_system_time.c</name></file>
+      <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/hardware/hard_system_timer.c</name></file>
+    </group>
+    <group><name>controlware</name>
+      <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/controlware/control_attitude.c</name></file>
+      <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/controlware/control_rate.c</name></file>
+      <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/controlware/control_throttle.c</name></file>
+      <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/controlware/mode_attitude.c</name></file>
+      <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/controlware/mode_gcs_tax_launch_run.c</name></file>
+    </group>
+    <group><name>middleware</name>
+      <group><name>fatfs</name>
+        <group><name>src</name>
+          <group><name>common</name>
+            <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/middleware/fatfs/src/common/ff.c</name></file>
+            <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/middleware/fatfs/src/common/ffunicode.c</name></file>
+          </group>
+          <group><name>portable</name>
+            <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/middleware/fatfs/src/portable/diskio.c</name></file>
+            <group><name>sdxc</name>
+              <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/middleware/fatfs/src/portable/sdxc/hpm_sdmmc_disk.c</name></file>
+            </group>
+          </group>
+        </group>
+      </group>
+      <group><name>hpm_sdmmc</name>
+        <group><name>lib</name>
+          <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/middleware/hpm_sdmmc/lib/hpm_sdmmc_host.c</name></file>
+          <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/middleware/hpm_sdmmc/lib/hpm_sdmmc_common.c</name></file>
+          <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/middleware/hpm_sdmmc/lib/hpm_sdmmc_sd.c</name></file>
+          <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/middleware/hpm_sdmmc/lib/hpm_sdmmc_emmc.c</name></file>
+          <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/middleware/hpm_sdmmc/lib/hpm_sdmmc_sdio.c</name></file>
+          <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/middleware/hpm_sdmmc/lib/hpm_sdmmc_osal.c</name></file>
+        </group>
+        <group><name>port</name>
+          <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/middleware/hpm_sdmmc/port/hpm_sdmmc_port.c</name></file>
+        </group>
+      </group>
+    </group>
+  </group>
+  <group><name>soc</name>
+    <group><name>HPM6700</name>
+      <group><name>HPM6750</name>
+        <group><name>toolchains</name>
+          <file><name>$PROJ_DIR$\..\..\..\..\..\..\..\sdk_env\sdk_env-v1.8.0\hpm_sdk\soc\HPM6700\HPM6750\toolchains\reset.c</name></file>
+          <file><name>$PROJ_DIR$\..\..\..\..\..\..\..\sdk_env\sdk_env-v1.8.0\hpm_sdk\soc\HPM6700\HPM6750\toolchains\trap.c</name></file>
+          <file><name>$PROJ_DIR$\..\..\..\..\..\..\..\sdk_env\sdk_env-v1.8.0\hpm_sdk\soc\HPM6700\HPM6750\toolchains\reset.c</name></file>
+          <file><name>$PROJ_DIR$\..\..\..\..\..\..\..\sdk_env\sdk_env-v1.8.0\hpm_sdk\soc\HPM6700\HPM6750\toolchains\trap.c</name></file>
+          <group><name>iar</name>
+            <file><name>$PROJ_DIR$\..\..\..\..\..\..\..\sdk_env\sdk_env-v1.8.0\hpm_sdk\soc\HPM6700\HPM6750\toolchains\iar\startup.s</name></file>
+          </group>
+        </group>
+        <file><name>$PROJ_DIR$\..\..\..\..\..\..\..\sdk_env\sdk_env-v1.8.0\hpm_sdk\soc\HPM6700\HPM6750\system.c</name></file>
+        <file><name>$PROJ_DIR$\..\..\..\..\..\..\..\sdk_env\sdk_env-v1.8.0\hpm_sdk\soc\HPM6700\HPM6750\hpm_sysctl_drv.c</name></file>
+        <file><name>$PROJ_DIR$\..\..\..\..\..\..\..\sdk_env\sdk_env-v1.8.0\hpm_sdk\soc\HPM6700\HPM6750\hpm_l1c_drv.c</name></file>
+        <file><name>$PROJ_DIR$\..\..\..\..\..\..\..\sdk_env\sdk_env-v1.8.0\hpm_sdk\soc\HPM6700\HPM6750\hpm_clock_drv.c</name></file>
+        <file><name>$PROJ_DIR$\..\..\..\..\..\..\..\sdk_env\sdk_env-v1.8.0\hpm_sdk\soc\HPM6700\HPM6750\hpm_otp_drv.c</name></file>
+        <group><name>boot</name>
+          <file><name>$PROJ_DIR$\..\..\..\..\..\..\..\sdk_env\sdk_env-v1.8.0\hpm_sdk\soc\HPM6700\HPM6750\boot\hpm_bootheader.c</name></file>
+        </group>
+      </group>
+    </group>
+  </group>
+  <group><name>boards</name>
+    <group><name>controller_yy_board</name>
+      <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_board/pinmux.c</name></file>
+      <file><name>D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_board/board.c</name></file>
+    </group>
+  </group>
+  <group><name>drivers</name>
+    <group><name>src</name>
+      <file><name>$PROJ_DIR$\..\..\..\..\..\..\..\sdk_env\sdk_env-v1.8.0\hpm_sdk\drivers\src\hpm_uart_drv.c</name></file>
+      <file><name>$PROJ_DIR$\..\..\..\..\..\..\..\sdk_env\sdk_env-v1.8.0\hpm_sdk\drivers\src\hpm_femc_drv.c</name></file>
+      <file><name>$PROJ_DIR$\..\..\..\..\..\..\..\sdk_env\sdk_env-v1.8.0\hpm_sdk\drivers\src\hpm_sdp_drv.c</name></file>
+      <file><name>$PROJ_DIR$\..\..\..\..\..\..\..\sdk_env\sdk_env-v1.8.0\hpm_sdk\drivers\src\hpm_lcdc_drv.c</name></file>
+      <file><name>$PROJ_DIR$\..\..\..\..\..\..\..\sdk_env\sdk_env-v1.8.0\hpm_sdk\drivers\src\hpm_i2c_drv.c</name></file>
+      <file><name>$PROJ_DIR$\..\..\..\..\..\..\..\sdk_env\sdk_env-v1.8.0\hpm_sdk\drivers\src\hpm_pmp_drv.c</name></file>
+      <file><name>$PROJ_DIR$\..\..\..\..\..\..\..\sdk_env\sdk_env-v1.8.0\hpm_sdk\drivers\src\hpm_rng_drv.c</name></file>
+      <file><name>$PROJ_DIR$\..\..\..\..\..\..\..\sdk_env\sdk_env-v1.8.0\hpm_sdk\drivers\src\hpm_gpio_drv.c</name></file>
+      <file><name>$PROJ_DIR$\..\..\..\..\..\..\..\sdk_env\sdk_env-v1.8.0\hpm_sdk\drivers\src\hpm_spi_drv.c</name></file>
+      <file><name>$PROJ_DIR$\..\..\..\..\..\..\..\sdk_env\sdk_env-v1.8.0\hpm_sdk\drivers\src\hpm_pdma_drv.c</name></file>
+      <file><name>$PROJ_DIR$\..\..\..\..\..\..\..\sdk_env\sdk_env-v1.8.0\hpm_sdk\drivers\src\hpm_wdg_drv.c</name></file>
+      <file><name>$PROJ_DIR$\..\..\..\..\..\..\..\sdk_env\sdk_env-v1.8.0\hpm_sdk\drivers\src\hpm_dma_drv.c</name></file>
+      <file><name>$PROJ_DIR$\..\..\..\..\..\..\..\sdk_env\sdk_env-v1.8.0\hpm_sdk\drivers\src\hpm_gptmr_drv.c</name></file>
+      <file><name>$PROJ_DIR$\..\..\..\..\..\..\..\sdk_env\sdk_env-v1.8.0\hpm_sdk\drivers\src\hpm_pwm_drv.c</name></file>
+      <file><name>$PROJ_DIR$\..\..\..\..\..\..\..\sdk_env\sdk_env-v1.8.0\hpm_sdk\drivers\src\hpm_pllctl_drv.c</name></file>
+      <file><name>$PROJ_DIR$\..\..\..\..\..\..\..\sdk_env\sdk_env-v1.8.0\hpm_sdk\drivers\src\hpm_usb_drv.c</name></file>
+      <file><name>$PROJ_DIR$\..\..\..\..\..\..\..\sdk_env\sdk_env-v1.8.0\hpm_sdk\drivers\src\hpm_rtc_drv.c</name></file>
+      <file><name>$PROJ_DIR$\..\..\..\..\..\..\..\sdk_env\sdk_env-v1.8.0\hpm_sdk\drivers\src\hpm_acmp_drv.c</name></file>
+      <file><name>$PROJ_DIR$\..\..\..\..\..\..\..\sdk_env\sdk_env-v1.8.0\hpm_sdk\drivers\src\hpm_i2s_drv.c</name></file>
+      <file><name>$PROJ_DIR$\..\..\..\..\..\..\..\sdk_env\sdk_env-v1.8.0\hpm_sdk\drivers\src\hpm_dao_drv.c</name></file>
+      <file><name>$PROJ_DIR$\..\..\..\..\..\..\..\sdk_env\sdk_env-v1.8.0\hpm_sdk\drivers\src\hpm_pdm_drv.c</name></file>
+      <file><name>$PROJ_DIR$\..\..\..\..\..\..\..\sdk_env\sdk_env-v1.8.0\hpm_sdk\drivers\src\hpm_vad_drv.c</name></file>
+      <file><name>$PROJ_DIR$\..\..\..\..\..\..\..\sdk_env\sdk_env-v1.8.0\hpm_sdk\drivers\src\hpm_cam_drv.c</name></file>
+      <file><name>$PROJ_DIR$\..\..\..\..\..\..\..\sdk_env\sdk_env-v1.8.0\hpm_sdk\drivers\src\hpm_can_drv.c</name></file>
+      <file><name>$PROJ_DIR$\..\..\..\..\..\..\..\sdk_env\sdk_env-v1.8.0\hpm_sdk\drivers\src\hpm_jpeg_drv.c</name></file>
+      <file><name>$PROJ_DIR$\..\..\..\..\..\..\..\sdk_env\sdk_env-v1.8.0\hpm_sdk\drivers\src\hpm_enet_drv.c</name></file>
+      <file><name>$PROJ_DIR$\..\..\..\..\..\..\..\sdk_env\sdk_env-v1.8.0\hpm_sdk\drivers\src\hpm_sdxc_drv.c</name></file>
+      <file><name>$PROJ_DIR$\..\..\..\..\..\..\..\sdk_env\sdk_env-v1.8.0\hpm_sdk\drivers\src\hpm_adc12_drv.c</name></file>
+      <file><name>$PROJ_DIR$\..\..\..\..\..\..\..\sdk_env\sdk_env-v1.8.0\hpm_sdk\drivers\src\hpm_adc16_drv.c</name></file>
+      <file><name>$PROJ_DIR$\..\..\..\..\..\..\..\sdk_env\sdk_env-v1.8.0\hpm_sdk\drivers\src\hpm_pcfg_drv.c</name></file>
+      <file><name>$PROJ_DIR$\..\..\..\..\..\..\..\sdk_env\sdk_env-v1.8.0\hpm_sdk\drivers\src\hpm_ptpc_drv.c</name></file>
+      <file><name>$PROJ_DIR$\..\..\..\..\..\..\..\sdk_env\sdk_env-v1.8.0\hpm_sdk\drivers\src\hpm_mchtmr_drv.c</name></file>
+      <file><name>$PROJ_DIR$\..\..\..\..\..\..\..\sdk_env\sdk_env-v1.8.0\hpm_sdk\drivers\src\hpm_tamp_drv.c</name></file>
+    </group>
+  </group>
+  <group><name>utils</name>
+    <file><name>$PROJ_DIR$\..\..\..\..\..\..\..\sdk_env\sdk_env-v1.8.0\hpm_sdk\utils\hpm_sbrk.c</name></file>
+    <file><name>$PROJ_DIR$\..\..\..\..\..\..\..\sdk_env\sdk_env-v1.8.0\hpm_sdk\utils\hpm_swap.c</name></file>
+    <file><name>$PROJ_DIR$\..\..\..\..\..\..\..\sdk_env\sdk_env-v1.8.0\hpm_sdk\utils\hpm_ffssi.c</name></file>
+    <file><name>$PROJ_DIR$\..\..\..\..\..\..\..\sdk_env\sdk_env-v1.8.0\hpm_sdk\utils\hpm_crc32.c</name></file>
+  </group>
+  <group><name>components</name>
+    <group><name>debug_console</name>
+      <file><name>$PROJ_DIR$\..\..\..\..\..\..\..\sdk_env\sdk_env-v1.8.0\hpm_sdk\components\debug_console\hpm_debug_console.c</name></file>
+    </group>
+  </group>
+
+</project>

controller_yy_app_controller_yy_board_flash_xip_debug/iar_embedded_workbench/controlware_yy_app.eww

@@ -0,0 +1,7 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<workspace>
+<project>
+<path>$WS_DIR$\controlware_yy_app.ewp</path>
+</project>
+<batchBuild />
+</workspace>

controller_yy_app_controller_yy_board_flash_xip_debug/middleware/CMSIS/cmake_install.cmake

@@ -0,0 +1,39 @@
+# Install script for directory: D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/middleware/CMSIS
+
+# Set the install prefix
+if(NOT DEFINED CMAKE_INSTALL_PREFIX)
+  set(CMAKE_INSTALL_PREFIX "C:/Program Files (x86)")
+endif()
+string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}")
+
+# Set the install configuration name.
+if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME)
+  if(BUILD_TYPE)
+    string(REGEX REPLACE "^[^A-Za-z0-9_]+" ""
+           CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}")
+  else()
+    set(CMAKE_INSTALL_CONFIG_NAME "debug")
+  endif()
+  message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"")
+endif()
+
+# Set the component getting installed.
+if(NOT CMAKE_INSTALL_COMPONENT)
+  if(COMPONENT)
+    message(STATUS "Install component: \"${COMPONENT}\"")
+    set(CMAKE_INSTALL_COMPONENT "${COMPONENT}")
+  else()
+    set(CMAKE_INSTALL_COMPONENT)
+  endif()
+endif()
+
+# Is this installation the result of a crosscompile?
+if(NOT DEFINED CMAKE_CROSSCOMPILING)
+  set(CMAKE_CROSSCOMPILING "TRUE")
+endif()
+
+# Set default install directory permissions.
+if(NOT DEFINED CMAKE_OBJDUMP)
+  set(CMAKE_OBJDUMP "D:/sdk_env/sdk_env-v1.8.0/toolchains/rv32imac_zicsr_zifencei_multilib_b_ext-win/bin/riscv32-unknown-elf-objdump.exe")
+endif()
+

controller_yy_app_controller_yy_board_flash_xip_debug/middleware/cmake_install.cmake

@@ -0,0 +1,50 @@
+# Install script for directory: D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/middleware
+
+# Set the install prefix
+if(NOT DEFINED CMAKE_INSTALL_PREFIX)
+  set(CMAKE_INSTALL_PREFIX "C:/Program Files (x86)")
+endif()
+string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}")
+
+# Set the install configuration name.
+if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME)
+  if(BUILD_TYPE)
+    string(REGEX REPLACE "^[^A-Za-z0-9_]+" ""
+           CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}")
+  else()
+    set(CMAKE_INSTALL_CONFIG_NAME "debug")
+  endif()
+  message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"")
+endif()
+
+# Set the component getting installed.
+if(NOT CMAKE_INSTALL_COMPONENT)
+  if(COMPONENT)
+    message(STATUS "Install component: \"${COMPONENT}\"")
+    set(CMAKE_INSTALL_COMPONENT "${COMPONENT}")
+  else()
+    set(CMAKE_INSTALL_COMPONENT)
+  endif()
+endif()
+
+# Is this installation the result of a crosscompile?
+if(NOT DEFINED CMAKE_CROSSCOMPILING)
+  set(CMAKE_CROSSCOMPILING "TRUE")
+endif()
+
+# Set default install directory permissions.
+if(NOT DEFINED CMAKE_OBJDUMP)
+  set(CMAKE_OBJDUMP "D:/sdk_env/sdk_env-v1.8.0/toolchains/rv32imac_zicsr_zifencei_multilib_b_ext-win/bin/riscv32-unknown-elf-objdump.exe")
+endif()
+
+if(NOT CMAKE_INSTALL_LOCAL_ONLY)
+  # Include the install script for each subdirectory.
+  include("D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app_controller_yy_board_flash_xip_debug/middleware/fatfs/cmake_install.cmake")
+  include("D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app_controller_yy_board_flash_xip_debug/middleware/hpm_sdmmc/cmake_install.cmake")
+  include("D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app_controller_yy_board_flash_xip_debug/middleware/eclipse_threadx/cmake_install.cmake")
+  include("D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app_controller_yy_board_flash_xip_debug/middleware/CMSIS/cmake_install.cmake")
+  include("D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app_controller_yy_board_flash_xip_debug/middleware/ptpd/cmake_install.cmake")
+  include("D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app_controller_yy_board_flash_xip_debug/middleware/wifi/cmake_install.cmake")
+
+endif()
+

controller_yy_app_controller_yy_board_flash_xip_debug/middleware/eclipse_threadx/cmake_install.cmake

@@ -0,0 +1,39 @@
+# Install script for directory: D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/middleware/eclipse_threadx
+
+# Set the install prefix
+if(NOT DEFINED CMAKE_INSTALL_PREFIX)
+  set(CMAKE_INSTALL_PREFIX "C:/Program Files (x86)")
+endif()
+string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}")
+
+# Set the install configuration name.
+if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME)
+  if(BUILD_TYPE)
+    string(REGEX REPLACE "^[^A-Za-z0-9_]+" ""
+           CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}")
+  else()
+    set(CMAKE_INSTALL_CONFIG_NAME "debug")
+  endif()
+  message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"")
+endif()
+
+# Set the component getting installed.
+if(NOT CMAKE_INSTALL_COMPONENT)
+  if(COMPONENT)
+    message(STATUS "Install component: \"${COMPONENT}\"")
+    set(CMAKE_INSTALL_COMPONENT "${COMPONENT}")
+  else()
+    set(CMAKE_INSTALL_COMPONENT)
+  endif()
+endif()
+
+# Is this installation the result of a crosscompile?
+if(NOT DEFINED CMAKE_CROSSCOMPILING)
+  set(CMAKE_CROSSCOMPILING "TRUE")
+endif()
+
+# Set default install directory permissions.
+if(NOT DEFINED CMAKE_OBJDUMP)
+  set(CMAKE_OBJDUMP "D:/sdk_env/sdk_env-v1.8.0/toolchains/rv32imac_zicsr_zifencei_multilib_b_ext-win/bin/riscv32-unknown-elf-objdump.exe")
+endif()
+

controller_yy_app_controller_yy_board_flash_xip_debug/middleware/fatfs/cmake_install.cmake

@@ -0,0 +1,45 @@
+# Install script for directory: D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/middleware/fatfs
+
+# Set the install prefix
+if(NOT DEFINED CMAKE_INSTALL_PREFIX)
+  set(CMAKE_INSTALL_PREFIX "C:/Program Files (x86)")
+endif()
+string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}")
+
+# Set the install configuration name.
+if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME)
+  if(BUILD_TYPE)
+    string(REGEX REPLACE "^[^A-Za-z0-9_]+" ""
+           CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}")
+  else()
+    set(CMAKE_INSTALL_CONFIG_NAME "debug")
+  endif()
+  message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"")
+endif()
+
+# Set the component getting installed.
+if(NOT CMAKE_INSTALL_COMPONENT)
+  if(COMPONENT)
+    message(STATUS "Install component: \"${COMPONENT}\"")
+    set(CMAKE_INSTALL_COMPONENT "${COMPONENT}")
+  else()
+    set(CMAKE_INSTALL_COMPONENT)
+  endif()
+endif()
+
+# Is this installation the result of a crosscompile?
+if(NOT DEFINED CMAKE_CROSSCOMPILING)
+  set(CMAKE_CROSSCOMPILING "TRUE")
+endif()
+
+# Set default install directory permissions.
+if(NOT DEFINED CMAKE_OBJDUMP)
+  set(CMAKE_OBJDUMP "D:/sdk_env/sdk_env-v1.8.0/toolchains/rv32imac_zicsr_zifencei_multilib_b_ext-win/bin/riscv32-unknown-elf-objdump.exe")
+endif()
+
+if(NOT CMAKE_INSTALL_LOCAL_ONLY)
+  # Include the install script for each subdirectory.
+  include("D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app_controller_yy_board_flash_xip_debug/middleware/fatfs/src/portable/cmake_install.cmake")
+
+endif()
+

controller_yy_app_controller_yy_board_flash_xip_debug/middleware/fatfs/src/portable/cmake_install.cmake

@@ -0,0 +1,39 @@
+# Install script for directory: D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/middleware/fatfs/src/portable
+
+# Set the install prefix
+if(NOT DEFINED CMAKE_INSTALL_PREFIX)
+  set(CMAKE_INSTALL_PREFIX "C:/Program Files (x86)")
+endif()
+string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}")
+
+# Set the install configuration name.
+if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME)
+  if(BUILD_TYPE)
+    string(REGEX REPLACE "^[^A-Za-z0-9_]+" ""
+           CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}")
+  else()
+    set(CMAKE_INSTALL_CONFIG_NAME "debug")
+  endif()
+  message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"")
+endif()
+
+# Set the component getting installed.
+if(NOT CMAKE_INSTALL_COMPONENT)
+  if(COMPONENT)
+    message(STATUS "Install component: \"${COMPONENT}\"")
+    set(CMAKE_INSTALL_COMPONENT "${COMPONENT}")
+  else()
+    set(CMAKE_INSTALL_COMPONENT)
+  endif()
+endif()
+
+# Is this installation the result of a crosscompile?
+if(NOT DEFINED CMAKE_CROSSCOMPILING)
+  set(CMAKE_CROSSCOMPILING "TRUE")
+endif()
+
+# Set default install directory permissions.
+if(NOT DEFINED CMAKE_OBJDUMP)
+  set(CMAKE_OBJDUMP "D:/sdk_env/sdk_env-v1.8.0/toolchains/rv32imac_zicsr_zifencei_multilib_b_ext-win/bin/riscv32-unknown-elf-objdump.exe")
+endif()
+

controller_yy_app_controller_yy_board_flash_xip_debug/middleware/hpm_sdmmc/cmake_install.cmake

@@ -0,0 +1,46 @@
+# Install script for directory: D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/middleware/hpm_sdmmc
+
+# Set the install prefix
+if(NOT DEFINED CMAKE_INSTALL_PREFIX)
+  set(CMAKE_INSTALL_PREFIX "C:/Program Files (x86)")
+endif()
+string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}")
+
+# Set the install configuration name.
+if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME)
+  if(BUILD_TYPE)
+    string(REGEX REPLACE "^[^A-Za-z0-9_]+" ""
+           CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}")
+  else()
+    set(CMAKE_INSTALL_CONFIG_NAME "debug")
+  endif()
+  message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"")
+endif()
+
+# Set the component getting installed.
+if(NOT CMAKE_INSTALL_COMPONENT)
+  if(COMPONENT)
+    message(STATUS "Install component: \"${COMPONENT}\"")
+    set(CMAKE_INSTALL_COMPONENT "${COMPONENT}")
+  else()
+    set(CMAKE_INSTALL_COMPONENT)
+  endif()
+endif()
+
+# Is this installation the result of a crosscompile?
+if(NOT DEFINED CMAKE_CROSSCOMPILING)
+  set(CMAKE_CROSSCOMPILING "TRUE")
+endif()
+
+# Set default install directory permissions.
+if(NOT DEFINED CMAKE_OBJDUMP)
+  set(CMAKE_OBJDUMP "D:/sdk_env/sdk_env-v1.8.0/toolchains/rv32imac_zicsr_zifencei_multilib_b_ext-win/bin/riscv32-unknown-elf-objdump.exe")
+endif()
+
+if(NOT CMAKE_INSTALL_LOCAL_ONLY)
+  # Include the install script for each subdirectory.
+  include("D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app_controller_yy_board_flash_xip_debug/middleware/hpm_sdmmc/lib/cmake_install.cmake")
+  include("D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app_controller_yy_board_flash_xip_debug/middleware/hpm_sdmmc/port/cmake_install.cmake")
+
+endif()
+

controller_yy_app_controller_yy_board_flash_xip_debug/middleware/hpm_sdmmc/lib/cmake_install.cmake

@@ -0,0 +1,39 @@
+# Install script for directory: D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/middleware/hpm_sdmmc/lib
+
+# Set the install prefix
+if(NOT DEFINED CMAKE_INSTALL_PREFIX)
+  set(CMAKE_INSTALL_PREFIX "C:/Program Files (x86)")
+endif()
+string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}")
+
+# Set the install configuration name.
+if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME)
+  if(BUILD_TYPE)
+    string(REGEX REPLACE "^[^A-Za-z0-9_]+" ""
+           CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}")
+  else()
+    set(CMAKE_INSTALL_CONFIG_NAME "debug")
+  endif()
+  message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"")
+endif()
+
+# Set the component getting installed.
+if(NOT CMAKE_INSTALL_COMPONENT)
+  if(COMPONENT)
+    message(STATUS "Install component: \"${COMPONENT}\"")
+    set(CMAKE_INSTALL_COMPONENT "${COMPONENT}")
+  else()
+    set(CMAKE_INSTALL_COMPONENT)
+  endif()
+endif()
+
+# Is this installation the result of a crosscompile?
+if(NOT DEFINED CMAKE_CROSSCOMPILING)
+  set(CMAKE_CROSSCOMPILING "TRUE")
+endif()
+
+# Set default install directory permissions.
+if(NOT DEFINED CMAKE_OBJDUMP)
+  set(CMAKE_OBJDUMP "D:/sdk_env/sdk_env-v1.8.0/toolchains/rv32imac_zicsr_zifencei_multilib_b_ext-win/bin/riscv32-unknown-elf-objdump.exe")
+endif()
+

controller_yy_app_controller_yy_board_flash_xip_debug/middleware/hpm_sdmmc/port/cmake_install.cmake

@@ -0,0 +1,39 @@
+# Install script for directory: D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/middleware/hpm_sdmmc/port
+
+# Set the install prefix
+if(NOT DEFINED CMAKE_INSTALL_PREFIX)
+  set(CMAKE_INSTALL_PREFIX "C:/Program Files (x86)")
+endif()
+string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}")
+
+# Set the install configuration name.
+if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME)
+  if(BUILD_TYPE)
+    string(REGEX REPLACE "^[^A-Za-z0-9_]+" ""
+           CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}")
+  else()
+    set(CMAKE_INSTALL_CONFIG_NAME "debug")
+  endif()
+  message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"")
+endif()
+
+# Set the component getting installed.
+if(NOT CMAKE_INSTALL_COMPONENT)
+  if(COMPONENT)
+    message(STATUS "Install component: \"${COMPONENT}\"")
+    set(CMAKE_INSTALL_COMPONENT "${COMPONENT}")
+  else()
+    set(CMAKE_INSTALL_COMPONENT)
+  endif()
+endif()
+
+# Is this installation the result of a crosscompile?
+if(NOT DEFINED CMAKE_CROSSCOMPILING)
+  set(CMAKE_CROSSCOMPILING "TRUE")
+endif()
+
+# Set default install directory permissions.
+if(NOT DEFINED CMAKE_OBJDUMP)
+  set(CMAKE_OBJDUMP "D:/sdk_env/sdk_env-v1.8.0/toolchains/rv32imac_zicsr_zifencei_multilib_b_ext-win/bin/riscv32-unknown-elf-objdump.exe")
+endif()
+

controller_yy_app_controller_yy_board_flash_xip_debug/middleware/ptpd/cmake_install.cmake

@@ -0,0 +1,39 @@
+# Install script for directory: D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/middleware/ptpd
+
+# Set the install prefix
+if(NOT DEFINED CMAKE_INSTALL_PREFIX)
+  set(CMAKE_INSTALL_PREFIX "C:/Program Files (x86)")
+endif()
+string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}")
+
+# Set the install configuration name.
+if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME)
+  if(BUILD_TYPE)
+    string(REGEX REPLACE "^[^A-Za-z0-9_]+" ""
+           CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}")
+  else()
+    set(CMAKE_INSTALL_CONFIG_NAME "debug")
+  endif()
+  message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"")
+endif()
+
+# Set the component getting installed.
+if(NOT CMAKE_INSTALL_COMPONENT)
+  if(COMPONENT)
+    message(STATUS "Install component: \"${COMPONENT}\"")
+    set(CMAKE_INSTALL_COMPONENT "${COMPONENT}")
+  else()
+    set(CMAKE_INSTALL_COMPONENT)
+  endif()
+endif()
+
+# Is this installation the result of a crosscompile?
+if(NOT DEFINED CMAKE_CROSSCOMPILING)
+  set(CMAKE_CROSSCOMPILING "TRUE")
+endif()
+
+# Set default install directory permissions.
+if(NOT DEFINED CMAKE_OBJDUMP)
+  set(CMAKE_OBJDUMP "D:/sdk_env/sdk_env-v1.8.0/toolchains/rv32imac_zicsr_zifencei_multilib_b_ext-win/bin/riscv32-unknown-elf-objdump.exe")
+endif()
+

controller_yy_app_controller_yy_board_flash_xip_debug/middleware/wifi/cmake_install.cmake

@@ -0,0 +1,39 @@
+# Install script for directory: D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_app/middleware/wifi
+
+# Set the install prefix
+if(NOT DEFINED CMAKE_INSTALL_PREFIX)
+  set(CMAKE_INSTALL_PREFIX "C:/Program Files (x86)")
+endif()
+string(REGEX REPLACE "/$" "" CMAKE_INSTALL_PREFIX "${CMAKE_INSTALL_PREFIX}")
+
+# Set the install configuration name.
+if(NOT DEFINED CMAKE_INSTALL_CONFIG_NAME)
+  if(BUILD_TYPE)
+    string(REGEX REPLACE "^[^A-Za-z0-9_]+" ""
+           CMAKE_INSTALL_CONFIG_NAME "${BUILD_TYPE}")
+  else()
+    set(CMAKE_INSTALL_CONFIG_NAME "debug")
+  endif()
+  message(STATUS "Install configuration: \"${CMAKE_INSTALL_CONFIG_NAME}\"")
+endif()
+
+# Set the component getting installed.
+if(NOT CMAKE_INSTALL_COMPONENT)
+  if(COMPONENT)
+    message(STATUS "Install component: \"${COMPONENT}\"")
+    set(CMAKE_INSTALL_COMPONENT "${COMPONENT}")
+  else()
+    set(CMAKE_INSTALL_COMPONENT)
+  endif()
+endif()
+
+# Is this installation the result of a crosscompile?
+if(NOT DEFINED CMAKE_CROSSCOMPILING)
+  set(CMAKE_CROSSCOMPILING "TRUE")
+endif()
+
+# Set default install directory permissions.
+if(NOT DEFINED CMAKE_OBJDUMP)
+  set(CMAKE_OBJDUMP "D:/sdk_env/sdk_env-v1.8.0/toolchains/rv32imac_zicsr_zifencei_multilib_b_ext-win/bin/riscv32-unknown-elf-objdump.exe")
+endif()
+

controller_yy_app_controller_yy_board_flash_xip_debug/segger_embedded_studio/Output/Debug/Exe/demo.asm

@@ -0,0 +1,14657 @@
+
+Output/Debug/Exe/demo.elf:     file format elf32-littleriscv
+
+
+Disassembly of section .init._start:
+
+80003000 <_start>:
+#define L(label) .L_start_##label
+
+START_FUNC _start
+        .option push
+        .option norelax
+        lui     gp,     %hi(__global_pointer$)
+80003000:	800041b7          	lui	gp,0x80004
+        addi    gp, gp, %lo(__global_pointer$)
+80003004:	00818193          	add	gp,gp,8 # 80004008 <__global_pointer$>
+        lui     tp,     %hi(__thread_pointer$)
+80003008:	01081237          	lui	tp,0x1081
+        addi    tp, tp, %lo(__thread_pointer$)
+8000300c:	80020213          	add	tp,tp,-2048 # 1080800 <__thread_pointer$>
+        .option pop
+
+        csrw    mstatus, zero
+80003010:	30001073          	csrw	mstatus,zero
+        csrw    mcause, zero
+80003014:	34201073          	csrw	mcause,zero
+    /* Initialize FCSR */
+    fscsr zero
+#endif
+
+    /* Enable LMM1 clock */
+    la t0, 0xF4000800
+80003018:	f40012b7          	lui	t0,0xf4001
+8000301c:	80028293          	add	t0,t0,-2048 # f4000800 <__AHB_SRAM_segment_end__+0x3cf8800>
+    lw t1, 0(t0)
+80003020:	0002a303          	lw	t1,0(t0)
+    ori t1, t1, 0x80
+80003024:	08036313          	or	t1,t1,128
+    sw t1, 0(t0)
+80003028:	0062a023          	sw	t1,0(t0)
+    la t0, _stack_safe
+    mv sp, t0
+    call _init_ext_ram
+#endif
+
+        lui     t0,     %hi(__stack_end__)
+8000302c:	000c02b7          	lui	t0,0xc0
+        addi    sp, t0, %lo(__stack_end__)
+80003030:	00028113          	mv	sp,t0
+
+#ifdef CONFIG_NOT_ENABLE_ICACHE
+        call    l1c_ic_disable
+#else
+        call    l1c_ic_enable
+80003034:	01f010ef          	jal	80004852 <l1c_ic_enable>
+#endif
+#ifdef CONFIG_NOT_ENABLE_DCACHE
+        call    l1c_dc_invalidate_all
+        call    l1c_dc_disable
+#else
+        call    l1c_dc_enable
+80003038:	7e4010ef          	jal	8000481c <l1c_dc_enable>
+        call    l1c_dc_invalidate_all
+8000303c:	411040ef          	jal	80007c4c <l1c_dc_invalidate_all>
+
+#ifndef __NO_SYSTEM_INIT
+        //
+        // Call _init
+        //
+        call    _init
+80003040:	281040ef          	jal	80007ac0 <_init>
+
+80003044 <.Lpcrel_hi0>:
+        // Call linker init functions which in turn performs the following:
+        // * Perform segment init
+        // * Perform heap init (if used)
+        // * Call constructors of global Objects (if any exist)
+        //
+        la      s0, __SEGGER_init_table__       // Set table pointer to start of initialization table
+80003044:	8000b437          	lui	s0,0x8000b
+80003048:	8c840413          	add	s0,s0,-1848 # 8000a8c8 <.L155+0x2>
+
+8000304c <.L_start_RunInit>:
+L(RunInit):
+        lw      a0, (s0)                        // Get next initialization function from table
+8000304c:	4008                	lw	a0,0(s0)
+        add     s0, s0, 4                       // Increment table pointer to point to function arguments
+8000304e:	0411                	add	s0,s0,4
+        jalr    a0                              // Call initialization function
+80003050:	9502                	jalr	a0
+        j       L(RunInit)
+80003052:	bfed                	j	8000304c <.L_start_RunInit>
+
+80003054 <__SEGGER_init_done>:
+        // Time to call main(), the application entry point.
+        //
+
+#ifndef NO_CLEANUP_AT_START
+    /* clean up */
+    call _clean_up
+80003054:	1ab040ef          	jal	800079fe <_clean_up>
+
+80003058 <.Lpcrel_hi1>:
+    #define HANDLER_S_TRAP irq_handler_s_trap
+#endif
+
+#if !defined(USE_NONVECTOR_MODE) || (USE_NONVECTOR_MODE == 0)
+    /* Initial machine trap-vector Base */
+    la t0, __vector_table
+80003058:	000002b7          	lui	t0,0x0
+8000305c:	00028293          	mv	t0,t0
+    csrw mtvec, t0
+80003060:	30529073          	csrw	mtvec,t0
+
+    /* Enable vectored external PLIC interrupt */
+    csrsi CSR_MMISC_CTL, 2
+80003064:	7d016073          	csrs	0x7d0,2
+
+80003068 <start>:
+        //
+        // In a real embedded application ("Free-standing environment"),
+        // main() does not get any arguments,
+        // which means it is not necessary to init a0 and a1.
+        //
+        call    APP_ENTRY_POINT
+80003068:	243040ef          	jal	80007aaa <reset_handler>
+        tail    exit
+8000306c:	a009                	j	8000306e <exit>
+
+8000306e <exit>:
+MARK_FUNC exit
+        //
+        // In a free-standing environment, if returned from application:
+        // Loop forever.
+        //
+        j       .
+8000306e:	a001                	j	8000306e <exit>
+        la      a1, args
+        call    debug_getargs
+        li      a0, ARGSSPACE
+        la      a1, args
+#else
+        li      a0, 0
+80003070:	4501                	li	a0,0
+        li      a1, 0
+80003072:	4581                	li	a1,0
+#endif
+
+        call    APP_ENTRY_POINT
+80003074:	237040ef          	jal	80007aaa <reset_handler>
+        tail    exit
+80003078:	bfdd                	j	8000306e <exit>
+
+Disassembly of section .text.libc.__SEGGER_RTL_SIGNAL_SIG_DFL:
+
+8000307a <__SEGGER_RTL_SIGNAL_SIG_DFL>:
+8000307a:	8082                	ret
+
+Disassembly of section .text.adc12_init_pmt_dma:
+
+80003f86 <adc12_init_pmt_dma>:
+ *
+ * @param[in] ptr An ADC12 peripheral base address.
+ * @param[in] addr A start address of DMA write operation.
+ */
+static inline void adc12_init_pmt_dma(ADC12_Type *ptr, uint32_t addr)
+{
+80003f86:	1141                	add	sp,sp,-16
+80003f88:	c62a                	sw	a0,12(sp)
+80003f8a:	c42e                	sw	a1,8(sp)
+    ptr->TRG_DMA_ADDR = addr & ADC12_TRG_DMA_ADDR_TRG_DMA_ADDR_MASK;
+80003f8c:	47a2                	lw	a5,8(sp)
+80003f8e:	ffc7f713          	and	a4,a5,-4
+80003f92:	47b2                	lw	a5,12(sp)
+80003f94:	db98                	sw	a4,48(a5)
+}
+80003f96:	0001                	nop
+80003f98:	0141                	add	sp,sp,16
+80003f9a:	8082                	ret
+
+Disassembly of section .text.adc12_set_nonblocking_read:
+
+80003fba <adc12_set_nonblocking_read>:
+ * @note An ADC does not block access to the associated peripheral whether it completes a conversion or not.
+ *
+ * @param[in] ptr An ADC12 peripheral base address.
+ */
+static inline void adc12_set_nonblocking_read(ADC12_Type *ptr)
+{
+80003fba:	1141                	add	sp,sp,-16
+80003fbc:	c62a                	sw	a0,12(sp)
+    ptr->BUF_CFG0 |= ADC12_BUF_CFG0_WAIT_DIS_MASK;
+80003fbe:	47b2                	lw	a5,12(sp)
+80003fc0:	5007a783          	lw	a5,1280(a5)
+80003fc4:	0017e713          	or	a4,a5,1
+80003fc8:	47b2                	lw	a5,12(sp)
+80003fca:	50e7a023          	sw	a4,1280(a5)
+}
+80003fce:	0001                	nop
+80003fd0:	0141                	add	sp,sp,16
+80003fd2:	8082                	ret
+
+Disassembly of section .text.adc12_is_nonblocking_mode:
+
+80003fde <adc12_is_nonblocking_mode>:
+ * @retval True means that nonblocking reading.
+ * @retval False means that blocking reading.
+ *
+ */
+static inline bool adc12_is_nonblocking_mode(ADC12_Type *ptr)
+{
+80003fde:	1141                	add	sp,sp,-16
+80003fe0:	c62a                	sw	a0,12(sp)
+    return (ADC12_BUF_CFG0_WAIT_DIS_GET(ptr->BUF_CFG0)  ? true : false);
+80003fe2:	47b2                	lw	a5,12(sp)
+80003fe4:	5007a783          	lw	a5,1280(a5)
+80003fe8:	8b85                	and	a5,a5,1
+80003fea:	00f037b3          	snez	a5,a5
+80003fee:	0ff7f793          	zext.b	a5,a5
+}
+80003ff2:	853e                	mv	a0,a5
+80003ff4:	0141                	add	sp,sp,16
+80003ff6:	8082                	ret
+
+Disassembly of section .text.process_pmt_data:
+
+80003ffa <process_pmt_data>:
+
+    return status_success;
+}
+
+hpm_stat_t process_pmt_data(uint32_t *buff, int32_t start_pos, uint32_t len)
+{
+80003ffa:	7179                	add	sp,sp,-48
+80003ffc:	d606                	sw	ra,44(sp)
+80003ffe:	c62a                	sw	a0,12(sp)
+80004000:	c42e                	sw	a1,8(sp)
+80004002:	c232                	sw	a2,4(sp)
+    adc12_pmt_dma_data_t *dma_data = (adc12_pmt_dma_data_t *)buff;
+80004004:	47b2                	lw	a5,12(sp)
+80004006:	cc3e                	sw	a5,24(sp)
+
+    if (ADC12_IS_PMT_DMA_BUFF_LEN_INVLAID(len)) {
+80004008:	4792                	lw	a5,4(sp)
+8000400a:	c791                	beqz	a5,80004016 <.L49>
+8000400c:	4712                	lw	a4,4(sp)
+8000400e:	03000793          	li	a5,48
+80004012:	00e7f463          	bgeu	a5,a4,8000401a <.L50>
+
+80004016 <.L49>:
+        return status_invalid_argument;
+80004016:	4789                	li	a5,2
+80004018:	a0e5                	j	80004100 <.L51>
+
+8000401a <.L50>:
+    }
+
+    for (uint32_t i = start_pos; i < start_pos + len; i++) {
+8000401a:	47a2                	lw	a5,8(sp)
+8000401c:	ce3e                	sw	a5,28(sp)
+8000401e:	a8d1                	j	800040f2 <.L52>
+
+80004020 <.L55>:
+        if (dma_data[i].cycle_bit) {
+80004020:	47f2                	lw	a5,28(sp)
+80004022:	078a                	sll	a5,a5,0x2
+80004024:	4762                	lw	a4,24(sp)
+80004026:	97ba                	add	a5,a5,a4
+80004028:	4398                	lw	a4,0(a5)
+8000402a:	800007b7          	lui	a5,0x80000
+8000402e:	8ff9                	and	a5,a5,a4
+80004030:	cbd5                	beqz	a5,800040e4 <.L53>
+            printf("Preemption Mode - %s - ", BOARD_APP_ADC12_NAME);
+80004032:	4dc18593          	add	a1,gp,1244 # 800044e4 <.LC7>
+80004036:	55018513          	add	a0,gp,1360 # 80004558 <.LC13>
+8000403a:	3a6030ef          	jal	800073e0 <printf>
+            printf("Trigger Channel: %02d - ", dma_data[i].trig_ch);
+8000403e:	47f2                	lw	a5,28(sp)
+80004040:	078a                	sll	a5,a5,0x2
+80004042:	4762                	lw	a4,24(sp)
+80004044:	97ba                	add	a5,a5,a4
+80004046:	439c                	lw	a5,0(a5)
+80004048:	83d1                	srl	a5,a5,0x14
+8000404a:	8bbd                	and	a5,a5,15
+8000404c:	0ff7f793          	zext.b	a5,a5
+80004050:	85be                	mv	a1,a5
+80004052:	56818513          	add	a0,gp,1384 # 80004570 <.LC14>
+80004056:	38a030ef          	jal	800073e0 <printf>
+            printf("Cycle Bit: %02d - ", dma_data[i].cycle_bit);
+8000405a:	47f2                	lw	a5,28(sp)
+8000405c:	078a                	sll	a5,a5,0x2
+8000405e:	4762                	lw	a4,24(sp)
+80004060:	97ba                	add	a5,a5,a4
+80004062:	439c                	lw	a5,0(a5)
+80004064:	83fd                	srl	a5,a5,0x1f
+80004066:	0ff7f793          	zext.b	a5,a5
+8000406a:	85be                	mv	a1,a5
+8000406c:	4fc18513          	add	a0,gp,1276 # 80004504 <.LC9>
+80004070:	370030ef          	jal	800073e0 <printf>
+            printf("Sequence Number: %02d - ", dma_data[i].seq_num);
+80004074:	47f2                	lw	a5,28(sp)
+80004076:	078a                	sll	a5,a5,0x2
+80004078:	4762                	lw	a4,24(sp)
+8000407a:	97ba                	add	a5,a5,a4
+8000407c:	439c                	lw	a5,0(a5)
+8000407e:	83c1                	srl	a5,a5,0x10
+80004080:	8b8d                	and	a5,a5,3
+80004082:	0ff7f793          	zext.b	a5,a5
+80004086:	85be                	mv	a1,a5
+80004088:	58418513          	add	a0,gp,1412 # 8000458c <.LC15>
+8000408c:	354030ef          	jal	800073e0 <printf>
+            printf("ADC Channel: %02d - ", dma_data[i].adc_ch);
+80004090:	47f2                	lw	a5,28(sp)
+80004092:	078a                	sll	a5,a5,0x2
+80004094:	4762                	lw	a4,24(sp)
+80004096:	97ba                	add	a5,a5,a4
+80004098:	439c                	lw	a5,0(a5)
+8000409a:	83e1                	srl	a5,a5,0x18
+8000409c:	8bfd                	and	a5,a5,31
+8000409e:	0ff7f793          	zext.b	a5,a5
+800040a2:	85be                	mv	a1,a5
+800040a4:	52818513          	add	a0,gp,1320 # 80004530 <.LC11>
+800040a8:	338030ef          	jal	800073e0 <printf>
+            printf("Result: 0x%04x\n", dma_data[i].result);
+800040ac:	47f2                	lw	a5,28(sp)
+800040ae:	078a                	sll	a5,a5,0x2
+800040b0:	4762                	lw	a4,24(sp)
+800040b2:	97ba                	add	a5,a5,a4
+800040b4:	439c                	lw	a5,0(a5)
+800040b6:	8391                	srl	a5,a5,0x4
+800040b8:	873e                	mv	a4,a5
+800040ba:	6785                	lui	a5,0x1
+800040bc:	17fd                	add	a5,a5,-1 # fff <__NOR_CFG_OPTION_segment_size__+0x3ff>
+800040be:	8ff9                	and	a5,a5,a4
+800040c0:	07c2                	sll	a5,a5,0x10
+800040c2:	83c1                	srl	a5,a5,0x10
+800040c4:	85be                	mv	a1,a5
+800040c6:	54018513          	add	a0,gp,1344 # 80004548 <.LC12>
+800040ca:	316030ef          	jal	800073e0 <printf>
+            dma_data[i].cycle_bit = 0;
+800040ce:	47f2                	lw	a5,28(sp)
+800040d0:	078a                	sll	a5,a5,0x2
+800040d2:	4762                	lw	a4,24(sp)
+800040d4:	97ba                	add	a5,a5,a4
+800040d6:	4394                	lw	a3,0(a5)
+800040d8:	80000737          	lui	a4,0x80000
+800040dc:	177d                	add	a4,a4,-1 # 7fffffff <_extram_size+0x7dffffff>
+800040de:	8f75                	and	a4,a4,a3
+800040e0:	c398                	sw	a4,0(a5)
+800040e2:	a029                	j	800040ec <.L54>
+
+800040e4 <.L53>:
+        } else {
+            printf("invalid data\n");
+800040e4:	5a018513          	add	a0,gp,1440 # 800045a8 <.LC16>
+800040e8:	2f8030ef          	jal	800073e0 <printf>
+
+800040ec <.L54>:
+    for (uint32_t i = start_pos; i < start_pos + len; i++) {
+800040ec:	47f2                	lw	a5,28(sp)
+800040ee:	0785                	add	a5,a5,1
+800040f0:	ce3e                	sw	a5,28(sp)
+
+800040f2 <.L52>:
+800040f2:	4722                	lw	a4,8(sp)
+800040f4:	4792                	lw	a5,4(sp)
+800040f6:	97ba                	add	a5,a5,a4
+800040f8:	4772                	lw	a4,28(sp)
+800040fa:	f2f763e3          	bltu	a4,a5,80004020 <.L55>
+
+800040fe <.LBE15>:
+        }
+    }
+
+    return status_success;
+800040fe:	4781                	li	a5,0
+
+80004100 <.L51>:
+}
+80004100:	853e                	mv	a0,a5
+80004102:	50b2                	lw	ra,44(sp)
+80004104:	6145                	add	sp,sp,48
+80004106:	8082                	ret
+
+Disassembly of section .text.init_common_config:
+
+80004142 <init_common_config>:
+
+    adc12_set_pmt_config(ptr, &pmt_cfg);
+}
+
+hpm_stat_t init_common_config(adc12_conversion_mode_t conv_mode)
+{
+80004142:	711d                	add	sp,sp,-96
+80004144:	ce86                	sw	ra,92(sp)
+80004146:	87aa                	mv	a5,a0
+80004148:	00f107a3          	sb	a5,15(sp)
+    adc12_config_t cfg;
+
+    /* initialize an ADC instance */
+    adc12_get_default_config(&cfg);
+8000414c:	081c                	add	a5,sp,16
+8000414e:	853e                	mv	a0,a5
+80004150:	790040ef          	jal	800088e0 <adc12_get_default_config>
+
+    cfg.res            = adc12_res_12_bits;
+80004154:	478d                	li	a5,3
+80004156:	00f10823          	sb	a5,16(sp)
+    cfg.conv_mode      = conv_mode;
+8000415a:	00f14783          	lbu	a5,15(sp)
+8000415e:	00f108a3          	sb	a5,17(sp)
+    cfg.diff_sel       = adc12_sample_signal_single_ended;
+80004162:	00010923          	sb	zero,18(sp)
+    cfg.adc_clk_div    = adc12_clock_divider_3;
+80004166:	478d                	li	a5,3
+80004168:	ca3e                	sw	a5,20(sp)
+    cfg.sel_sync_ahb   = (clk_adc_src_ahb0 == clock_get_source(BOARD_APP_ADC12_CLK_NAME)) ? true : false;
+8000416a:	013f07b7          	lui	a5,0x13f0
+8000416e:	10078513          	add	a0,a5,256 # 13f0100 <__SHARE_RAM_segment_end__+0x270100>
+80004172:	0af000ef          	jal	80004a20 <clock_get_source>
+80004176:	87aa                	mv	a5,a0
+80004178:	17c1                	add	a5,a5,-16
+8000417a:	0017b793          	seqz	a5,a5
+8000417e:	0ff7f793          	zext.b	a5,a5
+80004182:	00f10ca3          	sb	a5,25(sp)
+
+    if (cfg.conv_mode == adc12_conv_mode_sequence ||
+80004186:	01114703          	lbu	a4,17(sp)
+8000418a:	4789                	li	a5,2
+8000418c:	00f70763          	beq	a4,a5,8000419a <.L62>
+        cfg.conv_mode == adc12_conv_mode_preemption) {
+80004190:	01114703          	lbu	a4,17(sp)
+    if (cfg.conv_mode == adc12_conv_mode_sequence ||
+80004194:	478d                	li	a5,3
+80004196:	00f71563          	bne	a4,a5,800041a0 <.L63>
+
+8000419a <.L62>:
+        cfg.adc_ahb_en = true;
+8000419a:	4785                	li	a5,1
+8000419c:	00f10d23          	sb	a5,26(sp)
+
+800041a0 <.L63>:
+    }
+
+    /* adc12 initialization */
+    if (adc12_init(BOARD_APP_ADC12_BASE, &cfg) == status_success) {
+800041a0:	081c                	add	a5,sp,16
+800041a2:	85be                	mv	a1,a5
+800041a4:	f0010537          	lui	a0,0xf0010
+800041a8:	7a4040ef          	jal	8000894c <adc12_init>
+800041ac:	87aa                	mv	a5,a0
+800041ae:	e3d1                	bnez	a5,80004232 <.L64>
+800041b0:	47cd                	li	a5,19
+800041b2:	d83e                	sw	a5,48(sp)
+800041b4:	4785                	li	a5,1
+800041b6:	d63e                	sw	a5,44(sp)
+800041b8:	e40007b7          	lui	a5,0xe4000
+800041bc:	d43e                	sw	a5,40(sp)
+800041be:	57c2                	lw	a5,48(sp)
+800041c0:	d23e                	sw	a5,36(sp)
+800041c2:	57b2                	lw	a5,44(sp)
+800041c4:	d03e                	sw	a5,32(sp)
+
+800041c6 <.LBB17>:
+ATTR_ALWAYS_INLINE static inline void __plic_set_irq_priority(uint32_t base,
+                                               uint32_t irq,
+                                               uint32_t priority)
+{
+    volatile uint32_t *priority_ptr = (volatile uint32_t *)(base +
+            HPM_PLIC_PRIORITY_OFFSET + ((irq-1) << HPM_PLIC_PRIORITY_SHIFT_PER_SOURCE));
+800041c6:	5792                	lw	a5,36(sp)
+800041c8:	17fd                	add	a5,a5,-1 # e3ffffff <__XPI0_segment_end__+0x61ffffff>
+800041ca:	00279713          	sll	a4,a5,0x2
+800041ce:	57a2                	lw	a5,40(sp)
+800041d0:	97ba                	add	a5,a5,a4
+800041d2:	0791                	add	a5,a5,4
+    volatile uint32_t *priority_ptr = (volatile uint32_t *)(base +
+800041d4:	ce3e                	sw	a5,28(sp)
+    *priority_ptr = priority;
+800041d6:	47f2                	lw	a5,28(sp)
+800041d8:	5702                	lw	a4,32(sp)
+800041da:	c398                	sw	a4,0(a5)
+}
+800041dc:	0001                	nop
+
+800041de <.LBE19>:
+ * @param[in] priority Priority of interrupt
+ */
+ATTR_ALWAYS_INLINE static inline void intc_set_irq_priority(uint32_t irq, uint32_t priority)
+{
+    __plic_set_irq_priority(HPM_PLIC_BASE, irq, priority);
+}
+800041de:	0001                	nop
+800041e0:	c682                	sw	zero,76(sp)
+800041e2:	47cd                	li	a5,19
+800041e4:	c4be                	sw	a5,72(sp)
+800041e6:	e40007b7          	lui	a5,0xe4000
+800041ea:	c2be                	sw	a5,68(sp)
+800041ec:	47b6                	lw	a5,76(sp)
+800041ee:	c0be                	sw	a5,64(sp)
+800041f0:	47a6                	lw	a5,72(sp)
+800041f2:	de3e                	sw	a5,60(sp)
+
+800041f4 <.LBB21>:
+                                                        uint32_t target,
+                                                        uint32_t irq)
+{
+    volatile uint32_t *current_ptr = (volatile uint32_t *)(base +
+            HPM_PLIC_ENABLE_OFFSET +
+            (target << HPM_PLIC_ENABLE_SHIFT_PER_TARGET) +
+800041f4:	4786                	lw	a5,64(sp)
+800041f6:	00779713          	sll	a4,a5,0x7
+            HPM_PLIC_ENABLE_OFFSET +
+800041fa:	4796                	lw	a5,68(sp)
+800041fc:	973e                	add	a4,a4,a5
+            ((irq >> 5) << 2));
+800041fe:	57f2                	lw	a5,60(sp)
+80004200:	8395                	srl	a5,a5,0x5
+80004202:	078a                	sll	a5,a5,0x2
+            (target << HPM_PLIC_ENABLE_SHIFT_PER_TARGET) +
+80004204:	973e                	add	a4,a4,a5
+80004206:	6789                	lui	a5,0x2
+80004208:	97ba                	add	a5,a5,a4
+    volatile uint32_t *current_ptr = (volatile uint32_t *)(base +
+8000420a:	dc3e                	sw	a5,56(sp)
+    uint32_t current = *current_ptr;
+8000420c:	57e2                	lw	a5,56(sp)
+8000420e:	439c                	lw	a5,0(a5)
+80004210:	da3e                	sw	a5,52(sp)
+    current = current | (1 << (irq & 0x1F));
+80004212:	57f2                	lw	a5,60(sp)
+80004214:	8bfd                	and	a5,a5,31
+80004216:	4705                	li	a4,1
+80004218:	00f717b3          	sll	a5,a4,a5
+8000421c:	873e                	mv	a4,a5
+8000421e:	57d2                	lw	a5,52(sp)
+80004220:	8fd9                	or	a5,a5,a4
+80004222:	da3e                	sw	a5,52(sp)
+    *current_ptr = current;
+80004224:	57e2                	lw	a5,56(sp)
+80004226:	5752                	lw	a4,52(sp)
+80004228:	c398                	sw	a4,0(a5)
+}
+8000422a:	0001                	nop
+
+8000422c <.LBE23>:
+}
+8000422c:	0001                	nop
+
+8000422e <.LBE21>:
+        /* enable irq */
+        intc_m_enable_irq_with_priority(BOARD_APP_ADC12_IRQn, 1);
+        return status_success;
+8000422e:	4781                	li	a5,0
+80004230:	a801                	j	80004240 <.L66>
+
+80004232 <.L64>:
+    } else {
+        printf("%s initialization failed!\n", BOARD_APP_ADC12_NAME);
+80004232:	4dc18593          	add	a1,gp,1244 # 800044e4 <.LC7>
+80004236:	5b018513          	add	a0,gp,1456 # 800045b8 <.LC17>
+8000423a:	1a6030ef          	jal	800073e0 <printf>
+        return status_fail;
+8000423e:	4785                	li	a5,1
+
+80004240 <.L66>:
+    }
+}
+80004240:	853e                	mv	a0,a5
+80004242:	40f6                	lw	ra,92(sp)
+80004244:	6125                	add	sp,sp,96
+80004246:	8082                	ret
+
+Disassembly of section .text.channel_result_out_of_threshold_handler:
+
+8000424a <channel_result_out_of_threshold_handler>:
+
+void channel_result_out_of_threshold_handler(void)
+{
+8000424a:	1101                	add	sp,sp,-32
+8000424c:	ce06                	sw	ra,28(sp)
+    adc12_channel_threshold_t threshold;
+    uint32_t i = 31;
+8000424e:	47fd                	li	a5,31
+80004250:	c63e                	sw	a5,12(sp)
+
+    if (res_out_of_thr_flag) {
+80004252:	83022783          	lw	a5,-2000(tp) # fffff830 <__APB_SRAM_segment_end__+0xbf0d830>
+80004256:	cfa9                	beqz	a5,800042b0 <.L71>
+        while (i--) {
+80004258:	a83d                	j	80004296 <.L69>
+
+8000425a <.L70>:
+            if ((res_out_of_thr_flag >> i) & 0x01) {
+8000425a:	83022703          	lw	a4,-2000(tp) # fffff830 <__APB_SRAM_segment_end__+0xbf0d830>
+8000425e:	47b2                	lw	a5,12(sp)
+80004260:	00f757b3          	srl	a5,a4,a5
+80004264:	8b85                	and	a5,a5,1
+80004266:	cb85                	beqz	a5,80004296 <.L69>
+                adc12_get_channel_threshold(BOARD_APP_ADC12_BASE, i, &threshold);
+80004268:	47b2                	lw	a5,12(sp)
+8000426a:	0ff7f793          	zext.b	a5,a5
+8000426e:	0058                	add	a4,sp,4
+80004270:	863a                	mv	a2,a4
+80004272:	85be                	mv	a1,a5
+80004274:	f0010537          	lui	a0,0xf0010
+80004278:	0f9040ef          	jal	80008b70 <adc12_get_channel_threshold>
+                printf("Warning - %s [channel %02d] - Sample voltage is out of the thresholds between 0x%04x and 0x%04x !\n", BOARD_APP_ADC12_NAME, i, threshold.thshdl, threshold.thshdh);
+8000427c:	00815783          	lhu	a5,8(sp)
+80004280:	86be                	mv	a3,a5
+80004282:	00615783          	lhu	a5,6(sp)
+80004286:	873e                	mv	a4,a5
+80004288:	4632                	lw	a2,12(sp)
+8000428a:	4dc18593          	add	a1,gp,1244 # 800044e4 <.LC7>
+8000428e:	5cc18513          	add	a0,gp,1484 # 800045d4 <.LC18>
+80004292:	14e030ef          	jal	800073e0 <printf>
+
+80004296 <.L69>:
+        while (i--) {
+80004296:	47b2                	lw	a5,12(sp)
+80004298:	fff78713          	add	a4,a5,-1 # 1fff <__AXI_SRAM_segment_used_size__+0xee2>
+8000429c:	c63a                	sw	a4,12(sp)
+8000429e:	ffd5                	bnez	a5,8000425a <.L70>
+            }
+        }
+
+        res_out_of_thr_flag = 0;
+800042a0:	82022823          	sw	zero,-2000(tp) # fffff830 <__APB_SRAM_segment_end__+0xbf0d830>
+        adc12_enable_interrupts(BOARD_APP_ADC12_BASE, APP_ADC12_CH_WDOG_EVENT);
+800042a4:	08000593          	li	a1,128
+800042a8:	f0010537          	lui	a0,0xf0010
+800042ac:	254030ef          	jal	80007500 <adc12_enable_interrupts>
+
+800042b0 <.L71>:
+    }
+}
+800042b0:	0001                	nop
+800042b2:	40f2                	lw	ra,28(sp)
+800042b4:	6105                	add	sp,sp,32
+800042b6:	8082                	ret
+
+Disassembly of section .text.init_oneshot_config:
+
+800042ea <init_oneshot_config>:
+
+void init_oneshot_config(void)
+{
+800042ea:	1101                	add	sp,sp,-32
+800042ec:	ce06                	sw	ra,28(sp)
+    adc12_channel_config_t ch_cfg;
+
+    /* get a default channel config */
+    adc12_get_channel_default_config(&ch_cfg);
+800042ee:	005c                	add	a5,sp,4
+800042f0:	853e                	mv	a0,a5
+800042f2:	622040ef          	jal	80008914 <adc12_get_channel_default_config>
+
+    /* initialize an ADC channel */
+    ch_cfg.ch           = BOARD_APP_ADC12_CH_1;
+800042f6:	479d                	li	a5,7
+800042f8:	00f10223          	sb	a5,4(sp)
+    ch_cfg.diff_sel     = adc12_sample_signal_single_ended;
+800042fc:	000102a3          	sb	zero,5(sp)
+    ch_cfg.sample_cycle = APP_ADC12_CH_SAMPLE_CYCLE;
+80004300:	47d1                	li	a5,20
+80004302:	c63e                	sw	a5,12(sp)
+
+    adc12_init_channel(BOARD_APP_ADC12_BASE, &ch_cfg);
+80004304:	005c                	add	a5,sp,4
+80004306:	85be                	mv	a1,a5
+80004308:	f0010537          	lui	a0,0xf0010
+8000430c:	7a0040ef          	jal	80008aac <adc12_init_channel>
+
+    adc12_set_nonblocking_read(BOARD_APP_ADC12_BASE);
+80004310:	f0010537          	lui	a0,0xf0010
+80004314:	315d                	jal	80003fba <adc12_set_nonblocking_read>
+}
+80004316:	0001                	nop
+80004318:	40f2                	lw	ra,28(sp)
+8000431a:	6105                	add	sp,sp,32
+8000431c:	8082                	ret
+
+Disassembly of section .text.libc.__SEGGER_RTL_SIGNAL_SIG_IGN:
+
+8000431e <__SEGGER_RTL_SIGNAL_SIG_IGN>:
+8000431e:	8082                	ret
+
+Disassembly of section .text.preemption_handler:
+
+8000433e <preemption_handler>:
+    init_trigger_source(APP_ADC12_HW_TRIG_SRC);
+#endif
+}
+
+void preemption_handler(void)
+{
+8000433e:	1141                	add	sp,sp,-16
+80004340:	c606                	sw	ra,12(sp)
+#ifdef __ADC12_USE_SW_TRIG
+    /* SW trigger */
+    adc12_trigger_pmt_by_sw(BOARD_APP_ADC12_BASE, APP_ADC12_PMT_TRIG_CH);
+80004342:	4581                	li	a1,0
+80004344:	f0010537          	lui	a0,0xf0010
+80004348:	0a9040ef          	jal	80008bf0 <adc12_trigger_pmt_by_sw>
+#endif
+
+    /* Wait for a complete of conversion */
+    while (trig_complete_flag == 0) {
+8000434c:	0001                	nop
+
+8000434e <.L90>:
+8000434e:	84c24783          	lbu	a5,-1972(tp) # fffff84c <__APB_SRAM_segment_end__+0xbf0d84c>
+80004352:	0ff7f793          	zext.b	a5,a5
+80004356:	dfe5                	beqz	a5,8000434e <.L90>
+
+    }
+
+    /* Process data */
+    process_pmt_data(pmt_buff, APP_ADC12_PMT_TRIG_CH * sizeof(adc12_pmt_dma_data_t), sizeof(trig_adc_channel));
+80004358:	4605                	li	a2,1
+8000435a:	4581                	li	a1,0
+8000435c:	010817b7          	lui	a5,0x1081
+80004360:	05078513          	add	a0,a5,80 # 1081050 <pmt_buff>
+80004364:	3959                	jal	80003ffa <process_pmt_data>
+
+    /* Clear the flag */
+    trig_complete_flag = 0;
+80004366:	84020623          	sb	zero,-1972(tp) # fffff84c <__APB_SRAM_segment_end__+0xbf0d84c>
+}
+8000436a:	0001                	nop
+8000436c:	40b2                	lw	ra,12(sp)
+8000436e:	0141                	add	sp,sp,16
+80004370:	8082                	ret
+
+Disassembly of section .text.libc.__SEGGER_RTL_SIGNAL_SIG_ERR:
+
+80004372 <__SEGGER_RTL_SIGNAL_SIG_ERR>:
+80004372:	8082                	ret
+
+Disassembly of section .text.syscall_handler:
+
+80004382 <syscall_handler>:
+__attribute__((weak)) void swi_isr(void)
+{
+}
+
+__attribute__((weak)) void syscall_handler(long n, long a0, long a1, long a2, long a3)
+{
+80004382:	1101                	add	sp,sp,-32
+80004384:	ce2a                	sw	a0,28(sp)
+80004386:	cc2e                	sw	a1,24(sp)
+80004388:	ca32                	sw	a2,20(sp)
+8000438a:	c836                	sw	a3,16(sp)
+8000438c:	c63a                	sw	a4,12(sp)
+    (void) n;
+    (void) a0;
+    (void) a1;
+    (void) a2;
+    (void) a3;
+}
+8000438e:	0001                	nop
+80004390:	6105                	add	sp,sp,32
+80004392:	8082                	ret
+
+Disassembly of section .text.system_init:
+
+8000439e <system_init>:
+#endif
+    __plic_set_feature(HPM_PLIC_BASE, plic_feature);
+}
+
+__attribute__((weak)) void system_init(void)
+{
+8000439e:	7179                	add	sp,sp,-48
+800043a0:	d606                	sw	ra,44(sp)
+800043a2:	47a1                	li	a5,8
+800043a4:	c83e                	sw	a5,16(sp)
+
+800043a6 <.LBB16>:
+    return read_clear_csr(CSR_MSTATUS, mask);
+800043a6:	c602                	sw	zero,12(sp)
+800043a8:	47c2                	lw	a5,16(sp)
+800043aa:	3007b7f3          	csrrc	a5,mstatus,a5
+800043ae:	c63e                	sw	a5,12(sp)
+800043b0:	47b2                	lw	a5,12(sp)
+
+800043b2 <.LBE18>:
+800043b2:	0001                	nop
+
+800043b4 <.LBB19>:
+    clear_csr(CSR_MIE, CSR_MIE_MEIE_MASK);
+800043b4:	6785                	lui	a5,0x1
+800043b6:	80078793          	add	a5,a5,-2048 # 800 <__ILM_segment_used_end__+0x31a>
+800043ba:	3047b073          	csrc	mie,a5
+}
+800043be:	0001                	nop
+
+800043c0 <.LBE19>:
+    disable_global_irq(CSR_MSTATUS_MIE_MASK);
+    disable_irq_from_intc();
+    enable_plic_feature();
+800043c0:	738030ef          	jal	80007af8 <enable_plic_feature>
+
+800043c4 <.LBB21>:
+    set_csr(CSR_MIE, CSR_MIE_MEIE_MASK);
+800043c4:	6785                	lui	a5,0x1
+800043c6:	80078793          	add	a5,a5,-2048 # 800 <__ILM_segment_used_end__+0x31a>
+800043ca:	3047a073          	csrs	mie,a5
+}
+800043ce:	0001                	nop
+800043d0:	47a1                	li	a5,8
+800043d2:	ca3e                	sw	a5,20(sp)
+
+800043d4 <.LBB23>:
+    set_csr(CSR_MSTATUS, mask);
+800043d4:	47d2                	lw	a5,20(sp)
+800043d6:	3007a073          	csrs	mstatus,a5
+}
+800043da:	0001                	nop
+
+800043dc <.LBB25>:
+#if !CONFIG_DISABLE_GLOBAL_IRQ_ON_STARTUP
+    enable_global_irq(CSR_MSTATUS_MIE_MASK);
+#endif
+
+#ifndef CONFIG_NOT_ENALBE_ACCESS_TO_CYCLE_CSR
+    uint32_t mcounteren = read_csr(CSR_MCOUNTEREN);
+800043dc:	306027f3          	csrr	a5,mcounteren
+800043e0:	ce3e                	sw	a5,28(sp)
+800043e2:	47f2                	lw	a5,28(sp)
+
+800043e4 <.LBE25>:
+800043e4:	cc3e                	sw	a5,24(sp)
+    write_csr(CSR_MCOUNTEREN, mcounteren | 1); /* Enable MCYCLE */
+800043e6:	47e2                	lw	a5,24(sp)
+800043e8:	0017e793          	or	a5,a5,1
+800043ec:	30679073          	csrw	mcounteren,a5
+#endif
+
+#if defined(CONFIG_ENABLE_BPOR_RETENTION) && CONFIG_ENABLE_BPOR_RETENTION
+    bpor_enable_reg_value_retention(HPM_BPOR);
+#endif
+}
+800043f0:	0001                	nop
+800043f2:	50b2                	lw	ra,44(sp)
+800043f4:	6145                	add	sp,sp,48
+800043f6:	8082                	ret
+
+Disassembly of section .text.sysctl_resource_target_is_busy:
+
+80004402 <sysctl_resource_target_is_busy>:
+ * @param[in] ptr SYSCTL_Type base address
+ * @param[in] resource target resource index
+ * @return true if target resource is busy
+ */
+static inline bool sysctl_resource_target_is_busy(SYSCTL_Type *ptr, sysctl_resource_t resource)
+{
+80004402:	1141                	add	sp,sp,-16
+80004404:	c62a                	sw	a0,12(sp)
+80004406:	87ae                	mv	a5,a1
+80004408:	00f11523          	sh	a5,10(sp)
+    return ptr->RESOURCE[resource] & SYSCTL_RESOURCE_LOC_BUSY_MASK;
+8000440c:	00a15783          	lhu	a5,10(sp)
+80004410:	4732                	lw	a4,12(sp)
+80004412:	078a                	sll	a5,a5,0x2
+80004414:	97ba                	add	a5,a5,a4
+80004416:	4398                	lw	a4,0(a5)
+80004418:	400007b7          	lui	a5,0x40000
+8000441c:	8ff9                	and	a5,a5,a4
+8000441e:	00f037b3          	snez	a5,a5
+80004422:	0ff7f793          	zext.b	a5,a5
+}
+80004426:	853e                	mv	a0,a5
+80004428:	0141                	add	sp,sp,16
+8000442a:	8082                	ret
+
+Disassembly of section .text.sysctl_clock_target_is_busy:
+
+8000474c <sysctl_clock_target_is_busy>:
+ * @param[in] clock target clock
+ * @return true if target clock is busy
+ */
+static inline bool sysctl_clock_target_is_busy(SYSCTL_Type *ptr,
+                                               clock_node_t clock)
+{
+8000474c:	1141                	add	sp,sp,-16
+8000474e:	c62a                	sw	a0,12(sp)
+80004750:	87ae                	mv	a5,a1
+80004752:	00f105a3          	sb	a5,11(sp)
+    return ptr->CLOCK[clock] & SYSCTL_CLOCK_LOC_BUSY_MASK;
+80004756:	00b14783          	lbu	a5,11(sp)
+8000475a:	4732                	lw	a4,12(sp)
+8000475c:	60078793          	add	a5,a5,1536 # 40000600 <_extram_size+0x3e000600>
+80004760:	078a                	sll	a5,a5,0x2
+80004762:	97ba                	add	a5,a5,a4
+80004764:	4398                	lw	a4,0(a5)
+80004766:	400007b7          	lui	a5,0x40000
+8000476a:	8ff9                	and	a5,a5,a4
+8000476c:	00f037b3          	snez	a5,a5
+80004770:	0ff7f793          	zext.b	a5,a5
+}
+80004774:	853e                	mv	a0,a5
+80004776:	0141                	add	sp,sp,16
+80004778:	8082                	ret
+
+Disassembly of section .text.sysctl_config_clock:
+
+8000477a <sysctl_config_clock>:
+    return status_success;
+}
+
+hpm_stat_t sysctl_config_clock(SYSCTL_Type *ptr, clock_node_t node,
+                                clock_source_t source, uint32_t divide_by)
+{
+8000477a:	1101                	add	sp,sp,-32
+8000477c:	ce06                	sw	ra,28(sp)
+8000477e:	c62a                	sw	a0,12(sp)
+80004780:	87ae                	mv	a5,a1
+80004782:	8732                	mv	a4,a2
+80004784:	c236                	sw	a3,4(sp)
+80004786:	00f105a3          	sb	a5,11(sp)
+8000478a:	87ba                	mv	a5,a4
+8000478c:	00f10523          	sb	a5,10(sp)
+    if (node >= clock_node_adc_i2s_start) {
+80004790:	00b14703          	lbu	a4,11(sp)
+80004794:	04200793          	li	a5,66
+80004798:	00e7f463          	bgeu	a5,a4,800047a0 <.L114>
+        return status_invalid_argument;
+8000479c:	4789                	li	a5,2
+8000479e:	a89d                	j	80004814 <.L115>
+
+800047a0 <.L114>:
+    }
+
+    if (source >= clock_source_general_source_end) {
+800047a0:	00a14703          	lbu	a4,10(sp)
+800047a4:	479d                	li	a5,7
+800047a6:	00e7f463          	bgeu	a5,a4,800047ae <.L116>
+        return status_invalid_argument;
+800047aa:	4789                	li	a5,2
+800047ac:	a0a5                	j	80004814 <.L115>
+
+800047ae <.L116>:
+    }
+    ptr->CLOCK[node] = (ptr->CLOCK[node] &
+800047ae:	00b14783          	lbu	a5,11(sp)
+800047b2:	4732                	lw	a4,12(sp)
+800047b4:	60078793          	add	a5,a5,1536 # 40000600 <_extram_size+0x3e000600>
+800047b8:	078a                	sll	a5,a5,0x2
+800047ba:	97ba                	add	a5,a5,a4
+800047bc:	4398                	lw	a4,0(a5)
+800047be:	77fd                	lui	a5,0xfffff
+800047c0:	00f776b3          	and	a3,a4,a5
+            ~(SYSCTL_CLOCK_MUX_MASK | SYSCTL_CLOCK_DIV_MASK))
+            | (SYSCTL_CLOCK_MUX_SET(source) | SYSCTL_CLOCK_DIV_SET(divide_by - 1));
+800047c4:	00a14783          	lbu	a5,10(sp)
+800047c8:	00879713          	sll	a4,a5,0x8
+800047cc:	6785                	lui	a5,0x1
+800047ce:	f0078793          	add	a5,a5,-256 # f00 <__NOR_CFG_OPTION_segment_size__+0x300>
+800047d2:	8f7d                	and	a4,a4,a5
+800047d4:	4792                	lw	a5,4(sp)
+800047d6:	17fd                	add	a5,a5,-1
+800047d8:	0ff7f793          	zext.b	a5,a5
+800047dc:	8f5d                	or	a4,a4,a5
+    ptr->CLOCK[node] = (ptr->CLOCK[node] &
+800047de:	00b14783          	lbu	a5,11(sp)
+            | (SYSCTL_CLOCK_MUX_SET(source) | SYSCTL_CLOCK_DIV_SET(divide_by - 1));
+800047e2:	8f55                	or	a4,a4,a3
+    ptr->CLOCK[node] = (ptr->CLOCK[node] &
+800047e4:	46b2                	lw	a3,12(sp)
+800047e6:	60078793          	add	a5,a5,1536
+800047ea:	078a                	sll	a5,a5,0x2
+800047ec:	97b6                	add	a5,a5,a3
+800047ee:	c398                	sw	a4,0(a5)
+    while (sysctl_clock_target_is_busy(ptr, node)) {
+800047f0:	0001                	nop
+
+800047f2 <.L117>:
+800047f2:	00b14783          	lbu	a5,11(sp)
+800047f6:	85be                	mv	a1,a5
+800047f8:	4532                	lw	a0,12(sp)
+800047fa:	3f89                	jal	8000474c <sysctl_clock_target_is_busy>
+800047fc:	87aa                	mv	a5,a0
+800047fe:	fbf5                	bnez	a5,800047f2 <.L117>
+    }
+
+    if ((node == clock_node_cpu0) || (node == clock_node_cpu1)) {
+80004800:	00b14783          	lbu	a5,11(sp)
+80004804:	c791                	beqz	a5,80004810 <.L118>
+80004806:	00b14703          	lbu	a4,11(sp)
+8000480a:	4789                	li	a5,2
+8000480c:	00f71363          	bne	a4,a5,80004812 <.L119>
+
+80004810 <.L118>:
+        clock_update_core_clock();
+80004810:	23c9                	jal	80004dd2 <clock_update_core_clock>
+
+80004812 <.L119>:
+    }
+    return status_success;
+80004812:	4781                	li	a5,0
+
+80004814 <.L115>:
+}
+80004814:	853e                	mv	a0,a5
+80004816:	40f2                	lw	ra,28(sp)
+80004818:	6105                	add	sp,sp,32
+8000481a:	8082                	ret
+
+Disassembly of section .text.l1c_dc_enable:
+
+8000481c <l1c_dc_enable>:
+
+    write_csr(CSR_MSTATUS, csr);
+}
+
+void l1c_dc_enable(void)
+{
+8000481c:	1141                	add	sp,sp,-16
+
+8000481e <.LBB56>:
+extern "C" {
+#endif
+/* get cache control register value */
+__attribute__((always_inline)) static inline uint32_t l1c_get_control(void)
+{
+    return read_csr(CSR_MCACHE_CTL);
+8000481e:	7ca027f3          	csrr	a5,0x7ca
+80004822:	c63e                	sw	a5,12(sp)
+80004824:	47b2                	lw	a5,12(sp)
+
+80004826 <.LBE60>:
+80004826:	0001                	nop
+
+80004828 <.LBE58>:
+}
+
+__attribute__((always_inline)) static inline bool l1c_dc_is_enabled(void)
+{
+    return l1c_get_control() & HPM_MCACHE_CTL_DC_EN_MASK;
+80004828:	8b89                	and	a5,a5,2
+8000482a:	00f037b3          	snez	a5,a5
+8000482e:	0ff7f793          	zext.b	a5,a5
+
+80004832 <.LBE56>:
+    if (!l1c_dc_is_enabled()) {
+80004832:	0017c793          	xor	a5,a5,1
+80004836:	0ff7f793          	zext.b	a5,a5
+8000483a:	cb89                	beqz	a5,8000484c <.L13>
+        clear_csr(CSR_MCACHE_CTL, HPM_MCACHE_CTL_DC_WAROUND_MASK);
+8000483c:	001807b7          	lui	a5,0x180
+80004840:	7ca7b073          	csrc	0x7ca,a5
+        set_csr(CSR_MCACHE_CTL,
+80004844:	67c1                	lui	a5,0x10
+80004846:	0789                	add	a5,a5,2 # 10002 <__AHB_SRAM_segment_size__+0x8002>
+80004848:	7ca7a073          	csrs	0x7ca,a5
+
+8000484c <.L13>:
+                HPM_MCACHE_CTL_DC_WAROUND(L1C_DC_WAROUND_VALUE) |
+#endif
+                                HPM_MCACHE_CTL_DPREF_EN_MASK
+                              | HPM_MCACHE_CTL_DC_EN_MASK);
+    }
+}
+8000484c:	0001                	nop
+8000484e:	0141                	add	sp,sp,16
+80004850:	8082                	ret
+
+Disassembly of section .text.l1c_ic_enable:
+
+80004852 <l1c_ic_enable>:
+        clear_csr(CSR_MCACHE_CTL, HPM_MCACHE_CTL_DC_EN_MASK);
+    }
+}
+
+void l1c_ic_enable(void)
+{
+80004852:	1141                	add	sp,sp,-16
+
+80004854 <.LBB66>:
+    return read_csr(CSR_MCACHE_CTL);
+80004854:	7ca027f3          	csrr	a5,0x7ca
+80004858:	c63e                	sw	a5,12(sp)
+8000485a:	47b2                	lw	a5,12(sp)
+
+8000485c <.LBE70>:
+8000485c:	0001                	nop
+
+8000485e <.LBE68>:
+}
+
+__attribute__((always_inline)) static inline bool l1c_ic_is_enabled(void)
+{
+    return l1c_get_control() & HPM_MCACHE_CTL_IC_EN_MASK;
+8000485e:	8b85                	and	a5,a5,1
+80004860:	00f037b3          	snez	a5,a5
+80004864:	0ff7f793          	zext.b	a5,a5
+
+80004868 <.LBE66>:
+    if (!l1c_ic_is_enabled()) {
+80004868:	0017c793          	xor	a5,a5,1
+8000486c:	0ff7f793          	zext.b	a5,a5
+80004870:	c789                	beqz	a5,8000487a <.L23>
+        set_csr(CSR_MCACHE_CTL, HPM_MCACHE_CTL_IPREF_EN_MASK
+80004872:	30100793          	li	a5,769
+80004876:	7ca7a073          	csrs	0x7ca,a5
+
+8000487a <.L23>:
+                              | HPM_MCACHE_CTL_CCTL_SUEN_MASK
+                              | HPM_MCACHE_CTL_IC_EN_MASK);
+    }
+}
+8000487a:	0001                	nop
+8000487c:	0141                	add	sp,sp,16
+8000487e:	8082                	ret
+
+Disassembly of section .text.pllctl_get_div:
+
+80004880 <pllctl_get_div>:
+ * @param[in] div_index Target DIV to query
+ *
+ * @return Divider value of target DIV
+ */
+static inline hpm_stat_t pllctl_get_div(PLLCTL_Type *ptr, uint8_t pll, uint8_t div_index)
+{
+80004880:	1141                	add	sp,sp,-16
+80004882:	c62a                	sw	a0,12(sp)
+80004884:	87ae                	mv	a5,a1
+80004886:	8732                	mv	a4,a2
+80004888:	00f105a3          	sb	a5,11(sp)
+8000488c:	87ba                	mv	a5,a4
+8000488e:	00f10523          	sb	a5,10(sp)
+    if ((pll > (PLLCTL_SOC_PLL_MAX_COUNT - 1))
+80004892:	00b14703          	lbu	a4,11(sp)
+80004896:	4791                	li	a5,4
+80004898:	00e7ec63          	bltu	a5,a4,800048b0 <.L6>
+            || !(PLLCTL_SOC_PLL_HAS_DIV0(pll))) {
+8000489c:	00b14703          	lbu	a4,11(sp)
+800048a0:	4785                	li	a5,1
+800048a2:	00f70963          	beq	a4,a5,800048b4 <.L7>
+800048a6:	00b14703          	lbu	a4,11(sp)
+800048aa:	4789                	li	a5,2
+800048ac:	00f70463          	beq	a4,a5,800048b4 <.L7>
+
+800048b0 <.L6>:
+        return status_invalid_argument;
+800048b0:	4789                	li	a5,2
+800048b2:	a80d                	j	800048e4 <.L8>
+
+800048b4 <.L7>:
+    }
+    if (div_index) {
+800048b4:	00a14783          	lbu	a5,10(sp)
+800048b8:	cf81                	beqz	a5,800048d0 <.L9>
+        return PLLCTL_PLL_DIV0_DIV_GET(ptr->PLL[pll].DIV1) + 1;
+800048ba:	00b14783          	lbu	a5,11(sp)
+800048be:	4732                	lw	a4,12(sp)
+800048c0:	079e                	sll	a5,a5,0x7
+800048c2:	97ba                	add	a5,a5,a4
+800048c4:	0c47a783          	lw	a5,196(a5)
+800048c8:	0ff7f793          	zext.b	a5,a5
+800048cc:	0785                	add	a5,a5,1
+800048ce:	a819                	j	800048e4 <.L8>
+
+800048d0 <.L9>:
+    } else {
+        return PLLCTL_PLL_DIV0_DIV_GET(ptr->PLL[pll].DIV0) + 1;
+800048d0:	00b14783          	lbu	a5,11(sp)
+800048d4:	4732                	lw	a4,12(sp)
+800048d6:	079e                	sll	a5,a5,0x7
+800048d8:	97ba                	add	a5,a5,a4
+800048da:	0c07a783          	lw	a5,192(a5)
+800048de:	0ff7f793          	zext.b	a5,a5
+800048e2:	0785                	add	a5,a5,1
+
+800048e4 <.L8>:
+    }
+}
+800048e4:	853e                	mv	a0,a5
+800048e6:	0141                	add	sp,sp,16
+800048e8:	8082                	ret
+
+Disassembly of section .text.clock_get_frequency:
+
+800048ea <clock_get_frequency>:
+
+/***********************************************************************************************************************
+ * Codes
+ **********************************************************************************************************************/
+uint32_t clock_get_frequency(clock_name_t clock_name)
+{
+800048ea:	7179                	add	sp,sp,-48
+800048ec:	d606                	sw	ra,44(sp)
+800048ee:	c62a                	sw	a0,12(sp)
+    uint32_t clk_freq = 0UL;
+800048f0:	ce02                	sw	zero,28(sp)
+    uint32_t clk_src_type = GET_CLK_SRC_GROUP_FROM_NAME(clock_name);
+800048f2:	47b2                	lw	a5,12(sp)
+800048f4:	83a1                	srl	a5,a5,0x8
+800048f6:	0ff7f793          	zext.b	a5,a5
+800048fa:	cc3e                	sw	a5,24(sp)
+    uint32_t node_or_instance = GET_CLK_NODE_FROM_NAME(clock_name);
+800048fc:	47b2                	lw	a5,12(sp)
+800048fe:	0ff7f793          	zext.b	a5,a5
+80004902:	ca3e                	sw	a5,20(sp)
+    switch (clk_src_type) {
+80004904:	4762                	lw	a4,24(sp)
+80004906:	47b1                	li	a5,12
+80004908:	08e7ee63          	bltu	a5,a4,800049a4 <.L18>
+8000490c:	47e2                	lw	a5,24(sp)
+8000490e:	00279713          	sll	a4,a5,0x2
+80004912:	800037b7          	lui	a5,0x80003
+80004916:	18c78793          	add	a5,a5,396 # 8000318c <.L20>
+8000491a:	97ba                	add	a5,a5,a4
+8000491c:	439c                	lw	a5,0(a5)
+8000491e:	8782                	jr	a5
+
+80004920 <.L32>:
+    case CLK_SRC_GROUP_COMMON:
+        clk_freq = get_frequency_for_ip_in_common_group((clock_node_t) node_or_instance);
+80004920:	47d2                	lw	a5,20(sp)
+80004922:	0ff7f793          	zext.b	a5,a5
+80004926:	853e                	mv	a0,a5
+80004928:	2069                	jal	800049b2 <.LFE130>
+8000492a:	ce2a                	sw	a0,28(sp)
+        break;
+8000492c:	a8b5                	j	800049a8 <.L33>
+
+8000492e <.L31>:
+    case CLK_SRC_GROUP_ADC:
+        clk_freq = get_frequency_for_i2s_or_adc(CLK_SRC_GROUP_ADC, node_or_instance);
+8000492e:	45d2                	lw	a1,20(sp)
+80004930:	4505                	li	a0,1
+80004932:	432030ef          	jal	80007d64 <get_frequency_for_i2s_or_adc>
+80004936:	ce2a                	sw	a0,28(sp)
+        break;
+80004938:	a885                	j	800049a8 <.L33>
+
+8000493a <.L30>:
+    case CLK_SRC_GROUP_I2S:
+        clk_freq = get_frequency_for_i2s_or_adc(CLK_SRC_GROUP_I2S, node_or_instance);
+8000493a:	45d2                	lw	a1,20(sp)
+8000493c:	4509                	li	a0,2
+8000493e:	426030ef          	jal	80007d64 <get_frequency_for_i2s_or_adc>
+80004942:	ce2a                	sw	a0,28(sp)
+        break;
+80004944:	a095                	j	800049a8 <.L33>
+
+80004946 <.L29>:
+    case CLK_SRC_GROUP_WDG:
+        clk_freq = get_frequency_for_wdg(node_or_instance);
+80004946:	4552                	lw	a0,20(sp)
+80004948:	4f4030ef          	jal	80007e3c <get_frequency_for_wdg>
+8000494c:	ce2a                	sw	a0,28(sp)
+        break;
+8000494e:	a8a9                	j	800049a8 <.L33>
+
+80004950 <.L19>:
+    case CLK_SRC_GROUP_PWDG:
+        clk_freq = get_frequency_for_pwdg();
+80004950:	520030ef          	jal	80007e70 <get_frequency_for_pwdg>
+80004954:	ce2a                	sw	a0,28(sp)
+        break;
+80004956:	a889                	j	800049a8 <.L33>
+
+80004958 <.L28>:
+    case CLK_SRC_GROUP_PMIC:
+        clk_freq = FREQ_PRESET1_OSC0_CLK0;
+80004958:	016e37b7          	lui	a5,0x16e3
+8000495c:	60078793          	add	a5,a5,1536 # 16e3600 <__SHARE_RAM_segment_end__+0x563600>
+80004960:	ce3e                	sw	a5,28(sp)
+        break;
+80004962:	a099                	j	800049a8 <.L33>
+
+80004964 <.L27>:
+    case CLK_SRC_GROUP_AHB:
+        clk_freq = get_frequency_for_ip_in_common_group(clock_node_ahb0);
+80004964:	451d                	li	a0,7
+80004966:	20b1                	jal	800049b2 <.LFE130>
+80004968:	ce2a                	sw	a0,28(sp)
+        break;
+8000496a:	a83d                	j	800049a8 <.L33>
+
+8000496c <.L26>:
+    case CLK_SRC_GROUP_AXI0:
+        clk_freq = get_frequency_for_ip_in_common_group(clock_node_axi0);
+8000496c:	4511                	li	a0,4
+8000496e:	2091                	jal	800049b2 <.LFE130>
+80004970:	ce2a                	sw	a0,28(sp)
+        break;
+80004972:	a81d                	j	800049a8 <.L33>
+
+80004974 <.L25>:
+    case CLK_SRC_GROUP_AXI1:
+        clk_freq = get_frequency_for_ip_in_common_group(clock_node_axi1);
+80004974:	4515                	li	a0,5
+80004976:	2835                	jal	800049b2 <.LFE130>
+80004978:	ce2a                	sw	a0,28(sp)
+        break;
+8000497a:	a03d                	j	800049a8 <.L33>
+
+8000497c <.L24>:
+    case CLK_SRC_GROUP_AXI2:
+        clk_freq = get_frequency_for_ip_in_common_group(clock_node_axi2);
+8000497c:	4519                	li	a0,6
+8000497e:	2815                	jal	800049b2 <.LFE130>
+80004980:	ce2a                	sw	a0,28(sp)
+        break;
+80004982:	a01d                	j	800049a8 <.L33>
+
+80004984 <.L23>:
+    case CLK_SRC_GROUP_CPU0:
+        clk_freq = get_frequency_for_ip_in_common_group(clock_node_cpu0);
+80004984:	4501                	li	a0,0
+80004986:	2035                	jal	800049b2 <.LFE130>
+80004988:	ce2a                	sw	a0,28(sp)
+        break;
+8000498a:	a839                	j	800049a8 <.L33>
+
+8000498c <.L22>:
+    case CLK_SRC_GROUP_CPU1:
+        clk_freq = get_frequency_for_ip_in_common_group(clock_node_cpu1);
+8000498c:	4509                	li	a0,2
+8000498e:	2015                	jal	800049b2 <.LFE130>
+80004990:	ce2a                	sw	a0,28(sp)
+        break;
+80004992:	a819                	j	800049a8 <.L33>
+
+80004994 <.L21>:
+    case CLK_SRC_GROUP_SRC:
+        clk_freq = get_frequency_for_source((clock_source_t) node_or_instance);
+80004994:	47d2                	lw	a5,20(sp)
+80004996:	0ff7f793          	zext.b	a5,a5
+8000499a:	853e                	mv	a0,a5
+8000499c:	2c8030ef          	jal	80007c64 <get_frequency_for_source>
+800049a0:	ce2a                	sw	a0,28(sp)
+        break;
+800049a2:	a019                	j	800049a8 <.L33>
+
+800049a4 <.L18>:
+    default:
+        clk_freq = 0UL;
+800049a4:	ce02                	sw	zero,28(sp)
+        break;
+800049a6:	0001                	nop
+
+800049a8 <.L33>:
+    }
+    return clk_freq;
+800049a8:	47f2                	lw	a5,28(sp)
+}
+800049aa:	853e                	mv	a0,a5
+800049ac:	50b2                	lw	ra,44(sp)
+800049ae:	6145                	add	sp,sp,48
+800049b0:	8082                	ret
+
+Disassembly of section .text.get_frequency_for_ip_in_common_group:
+
+800049b2 <get_frequency_for_ip_in_common_group>:
+
+    return clk_freq;
+}
+
+static uint32_t get_frequency_for_ip_in_common_group(clock_node_t node)
+{
+800049b2:	7139                	add	sp,sp,-64
+800049b4:	de06                	sw	ra,60(sp)
+800049b6:	87aa                	mv	a5,a0
+800049b8:	00f107a3          	sb	a5,15(sp)
+    uint32_t clk_freq = 0UL;
+800049bc:	d602                	sw	zero,44(sp)
+    uint32_t node_or_instance = GET_CLK_NODE_FROM_NAME(node);
+800049be:	00f14783          	lbu	a5,15(sp)
+800049c2:	d43e                	sw	a5,40(sp)
+
+    if (node_or_instance < clock_node_end) {
+800049c4:	5722                	lw	a4,40(sp)
+800049c6:	04a00793          	li	a5,74
+800049ca:	04e7e663          	bltu	a5,a4,80004a16 <.L49>
+
+800049ce <.LBB6>:
+        uint32_t clk_node = (uint32_t) node_or_instance;
+800049ce:	57a2                	lw	a5,40(sp)
+800049d0:	d23e                	sw	a5,36(sp)
+
+        uint32_t clk_div = 1UL + SYSCTL_CLOCK_DIV_GET(HPM_SYSCTL->CLOCK[clk_node]);
+800049d2:	f4000737          	lui	a4,0xf4000
+800049d6:	5792                	lw	a5,36(sp)
+800049d8:	60078793          	add	a5,a5,1536
+800049dc:	078a                	sll	a5,a5,0x2
+800049de:	97ba                	add	a5,a5,a4
+800049e0:	439c                	lw	a5,0(a5)
+800049e2:	0ff7f793          	zext.b	a5,a5
+800049e6:	0785                	add	a5,a5,1
+800049e8:	d03e                	sw	a5,32(sp)
+        clock_source_t clk_mux = (clock_source_t) SYSCTL_CLOCK_MUX_GET(HPM_SYSCTL->CLOCK[clk_node]);
+800049ea:	f4000737          	lui	a4,0xf4000
+800049ee:	5792                	lw	a5,36(sp)
+800049f0:	60078793          	add	a5,a5,1536
+800049f4:	078a                	sll	a5,a5,0x2
+800049f6:	97ba                	add	a5,a5,a4
+800049f8:	439c                	lw	a5,0(a5)
+800049fa:	83a1                	srl	a5,a5,0x8
+800049fc:	8bbd                	and	a5,a5,15
+800049fe:	00f10fa3          	sb	a5,31(sp)
+        clk_freq = get_frequency_for_source(clk_mux) / clk_div;
+80004a02:	01f14783          	lbu	a5,31(sp)
+80004a06:	853e                	mv	a0,a5
+80004a08:	25c030ef          	jal	80007c64 <get_frequency_for_source>
+80004a0c:	872a                	mv	a4,a0
+80004a0e:	5782                	lw	a5,32(sp)
+80004a10:	02f757b3          	divu	a5,a4,a5
+80004a14:	d63e                	sw	a5,44(sp)
+
+80004a16 <.L49>:
+    }
+    return clk_freq;
+80004a16:	57b2                	lw	a5,44(sp)
+}
+80004a18:	853e                	mv	a0,a5
+80004a1a:	50f2                	lw	ra,60(sp)
+80004a1c:	6121                	add	sp,sp,64
+80004a1e:	8082                	ret
+
+Disassembly of section .text.clock_get_source:
+
+80004a20 <clock_get_source>:
+
+    return freq_in_hz;
+}
+
+clk_src_t clock_get_source(clock_name_t clock_name)
+{
+80004a20:	1101                	add	sp,sp,-32
+80004a22:	c62a                	sw	a0,12(sp)
+    uint8_t clk_src_group = CLK_SRC_GROUP_INVALID;
+80004a24:	47bd                	li	a5,15
+80004a26:	00f10fa3          	sb	a5,31(sp)
+    uint8_t clk_src_index = 0xFU;
+80004a2a:	47bd                	li	a5,15
+80004a2c:	00f10f23          	sb	a5,30(sp)
+    uint32_t clk_src_type = GET_CLK_SRC_GROUP_FROM_NAME(clock_name);
+80004a30:	47b2                	lw	a5,12(sp)
+80004a32:	83a1                	srl	a5,a5,0x8
+80004a34:	0ff7f793          	zext.b	a5,a5
+80004a38:	cc3e                	sw	a5,24(sp)
+    uint32_t node_or_instance = GET_CLK_NODE_FROM_NAME(clock_name);
+80004a3a:	47b2                	lw	a5,12(sp)
+80004a3c:	0ff7f793          	zext.b	a5,a5
+80004a40:	ca3e                	sw	a5,20(sp)
+    switch (clk_src_type) {
+80004a42:	4762                	lw	a4,24(sp)
+80004a44:	47b1                	li	a5,12
+80004a46:	1ae7e063          	bltu	a5,a4,80004be6 <.L66>
+80004a4a:	47e2                	lw	a5,24(sp)
+80004a4c:	00279713          	sll	a4,a5,0x2
+80004a50:	800037b7          	lui	a5,0x80003
+80004a54:	1e078793          	add	a5,a5,480 # 800031e0 <.L68>
+80004a58:	97ba                	add	a5,a5,a4
+80004a5a:	439c                	lw	a5,0(a5)
+80004a5c:	8782                	jr	a5
+
+80004a5e <.L80>:
+    case CLK_SRC_GROUP_COMMON:
+        clk_src_group = CLK_SRC_GROUP_COMMON;
+80004a5e:	00010fa3          	sb	zero,31(sp)
+        clk_src_index = SYSCTL_CLOCK_MUX_GET(HPM_SYSCTL->CLOCK[node_or_instance]);
+80004a62:	f4000737          	lui	a4,0xf4000
+80004a66:	47d2                	lw	a5,20(sp)
+80004a68:	60078793          	add	a5,a5,1536
+80004a6c:	078a                	sll	a5,a5,0x2
+80004a6e:	97ba                	add	a5,a5,a4
+80004a70:	439c                	lw	a5,0(a5)
+80004a72:	83a1                	srl	a5,a5,0x8
+80004a74:	0ff7f793          	zext.b	a5,a5
+80004a78:	8bbd                	and	a5,a5,15
+80004a7a:	00f10f23          	sb	a5,30(sp)
+        break;
+80004a7e:	aaad                	j	80004bf8 <.L81>
+
+80004a80 <.L79>:
+    case CLK_SRC_GROUP_ADC:
+        if (node_or_instance < ADC_INSTANCE_NUM) {
+80004a80:	4752                	lw	a4,20(sp)
+80004a82:	478d                	li	a5,3
+80004a84:	16e7e563          	bltu	a5,a4,80004bee <.L88>
+            clk_src_group = CLK_SRC_GROUP_ADC;
+80004a88:	4785                	li	a5,1
+80004a8a:	00f10fa3          	sb	a5,31(sp)
+            clk_src_index = SYSCTL_ADCCLK_MUX_GET(HPM_SYSCTL->ADCCLK[node_or_instance]);
+80004a8e:	f4000737          	lui	a4,0xf4000
+80004a92:	47d2                	lw	a5,20(sp)
+80004a94:	70078793          	add	a5,a5,1792
+80004a98:	078a                	sll	a5,a5,0x2
+80004a9a:	97ba                	add	a5,a5,a4
+80004a9c:	439c                	lw	a5,0(a5)
+80004a9e:	83a1                	srl	a5,a5,0x8
+80004aa0:	0ff7f793          	zext.b	a5,a5
+80004aa4:	8b9d                	and	a5,a5,7
+80004aa6:	00f10f23          	sb	a5,30(sp)
+        }
+        break;
+80004aaa:	a291                	j	80004bee <.L88>
+
+80004aac <.L78>:
+    case CLK_SRC_GROUP_I2S:
+        if (node_or_instance < I2S_INSTANCE_NUM) {
+80004aac:	4752                	lw	a4,20(sp)
+80004aae:	478d                	li	a5,3
+80004ab0:	14e7e163          	bltu	a5,a4,80004bf2 <.L89>
+            clk_src_group = CLK_SRC_GROUP_I2S;
+80004ab4:	4789                	li	a5,2
+80004ab6:	00f10fa3          	sb	a5,31(sp)
+            clk_src_index = SYSCTL_I2SCLK_MUX_GET(HPM_SYSCTL->I2SCLK[node_or_instance]);
+80004aba:	f4000737          	lui	a4,0xf4000
+80004abe:	47d2                	lw	a5,20(sp)
+80004ac0:	70478793          	add	a5,a5,1796
+80004ac4:	078a                	sll	a5,a5,0x2
+80004ac6:	97ba                	add	a5,a5,a4
+80004ac8:	439c                	lw	a5,0(a5)
+80004aca:	83a1                	srl	a5,a5,0x8
+80004acc:	0ff7f793          	zext.b	a5,a5
+80004ad0:	8b9d                	and	a5,a5,7
+80004ad2:	00f10f23          	sb	a5,30(sp)
+        }
+        break;
+80004ad6:	aa31                	j	80004bf2 <.L89>
+
+80004ad8 <.L77>:
+    case CLK_SRC_GROUP_WDG:
+        if (node_or_instance < WDG_INSTANCE_NUM) {
+80004ad8:	4752                	lw	a4,20(sp)
+80004ada:	478d                	li	a5,3
+80004adc:	10e7ed63          	bltu	a5,a4,80004bf6 <.L90>
+            clk_src_group = CLK_SRC_GROUP_WDG;
+80004ae0:	478d                	li	a5,3
+80004ae2:	00f10fa3          	sb	a5,31(sp)
+            clk_src_index = WDG_CTRL_CLKSEL_GET(s_wdgs[node_or_instance]->CTRL);
+80004ae6:	800037b7          	lui	a5,0x80003
+80004aea:	17c78713          	add	a4,a5,380 # 8000317c <s_wdgs>
+80004aee:	47d2                	lw	a5,20(sp)
+80004af0:	078a                	sll	a5,a5,0x2
+80004af2:	97ba                	add	a5,a5,a4
+80004af4:	439c                	lw	a5,0(a5)
+80004af6:	4b9c                	lw	a5,16(a5)
+80004af8:	8385                	srl	a5,a5,0x1
+80004afa:	0ff7f793          	zext.b	a5,a5
+80004afe:	8b85                	and	a5,a5,1
+80004b00:	00f10f23          	sb	a5,30(sp)
+        }
+        break;
+80004b04:	a8cd                	j	80004bf6 <.L90>
+
+80004b06 <.L67>:
+    case CLK_SRC_GROUP_PWDG:
+        clk_src_group = CLK_SRC_GROUP_PWDG;
+80004b06:	47b1                	li	a5,12
+80004b08:	00f10fa3          	sb	a5,31(sp)
+        clk_src_index = WDG_CTRL_CLKSEL_GET(HPM_PWDG->CTRL);
+80004b0c:	f40e87b7          	lui	a5,0xf40e8
+80004b10:	4b9c                	lw	a5,16(a5)
+80004b12:	8385                	srl	a5,a5,0x1
+80004b14:	0ff7f793          	zext.b	a5,a5
+80004b18:	8b85                	and	a5,a5,1
+80004b1a:	00f10f23          	sb	a5,30(sp)
+        break;
+80004b1e:	a8e9                	j	80004bf8 <.L81>
+
+80004b20 <.L76>:
+    case CLK_SRC_GROUP_PMIC:
+        clk_src_group = CLK_SRC_GROUP_COMMON;
+80004b20:	00010fa3          	sb	zero,31(sp)
+        clk_src_index = clock_source_osc0_clk0;
+80004b24:	00010f23          	sb	zero,30(sp)
+        break;
+80004b28:	a8c1                	j	80004bf8 <.L81>
+
+80004b2a <.L75>:
+    case CLK_SRC_GROUP_AHB:
+        clk_src_group = CLK_SRC_GROUP_COMMON;
+80004b2a:	00010fa3          	sb	zero,31(sp)
+        clk_src_index = SYSCTL_CLOCK_MUX_GET(HPM_SYSCTL->CLOCK[(uint32_t) clock_node_ahb0]);
+80004b2e:	f4000737          	lui	a4,0xf4000
+80004b32:	6789                	lui	a5,0x2
+80004b34:	97ba                	add	a5,a5,a4
+80004b36:	81c7a783          	lw	a5,-2020(a5) # 181c <__AXI_SRAM_segment_used_size__+0x6ff>
+80004b3a:	83a1                	srl	a5,a5,0x8
+80004b3c:	0ff7f793          	zext.b	a5,a5
+80004b40:	8bbd                	and	a5,a5,15
+80004b42:	00f10f23          	sb	a5,30(sp)
+        break;
+80004b46:	a84d                	j	80004bf8 <.L81>
+
+80004b48 <.L74>:
+    case CLK_SRC_GROUP_AXI0:
+        clk_src_group = CLK_SRC_GROUP_COMMON;
+80004b48:	00010fa3          	sb	zero,31(sp)
+        clk_src_index = SYSCTL_CLOCK_MUX_GET(HPM_SYSCTL->CLOCK[(uint32_t) clock_node_axi0]);
+80004b4c:	f4000737          	lui	a4,0xf4000
+80004b50:	6789                	lui	a5,0x2
+80004b52:	97ba                	add	a5,a5,a4
+80004b54:	8107a783          	lw	a5,-2032(a5) # 1810 <__AXI_SRAM_segment_used_size__+0x6f3>
+80004b58:	83a1                	srl	a5,a5,0x8
+80004b5a:	0ff7f793          	zext.b	a5,a5
+80004b5e:	8bbd                	and	a5,a5,15
+80004b60:	00f10f23          	sb	a5,30(sp)
+        break;
+80004b64:	a851                	j	80004bf8 <.L81>
+
+80004b66 <.L73>:
+    case CLK_SRC_GROUP_AXI1:
+        clk_src_group = CLK_SRC_GROUP_COMMON;
+80004b66:	00010fa3          	sb	zero,31(sp)
+        clk_src_index = SYSCTL_CLOCK_MUX_GET(HPM_SYSCTL->CLOCK[(uint32_t) clock_node_axi1]);
+80004b6a:	f4000737          	lui	a4,0xf4000
+80004b6e:	6789                	lui	a5,0x2
+80004b70:	97ba                	add	a5,a5,a4
+80004b72:	8147a783          	lw	a5,-2028(a5) # 1814 <__AXI_SRAM_segment_used_size__+0x6f7>
+80004b76:	83a1                	srl	a5,a5,0x8
+80004b78:	0ff7f793          	zext.b	a5,a5
+80004b7c:	8bbd                	and	a5,a5,15
+80004b7e:	00f10f23          	sb	a5,30(sp)
+        break;
+80004b82:	a89d                	j	80004bf8 <.L81>
+
+80004b84 <.L72>:
+    case CLK_SRC_GROUP_AXI2:
+        clk_src_group = CLK_SRC_GROUP_COMMON;
+80004b84:	00010fa3          	sb	zero,31(sp)
+        clk_src_index = SYSCTL_CLOCK_MUX_GET(HPM_SYSCTL->CLOCK[(uint32_t) clock_node_axi2]);
+80004b88:	f4000737          	lui	a4,0xf4000
+80004b8c:	6789                	lui	a5,0x2
+80004b8e:	97ba                	add	a5,a5,a4
+80004b90:	8187a783          	lw	a5,-2024(a5) # 1818 <__AXI_SRAM_segment_used_size__+0x6fb>
+80004b94:	83a1                	srl	a5,a5,0x8
+80004b96:	0ff7f793          	zext.b	a5,a5
+80004b9a:	8bbd                	and	a5,a5,15
+80004b9c:	00f10f23          	sb	a5,30(sp)
+        break;
+80004ba0:	a8a1                	j	80004bf8 <.L81>
+
+80004ba2 <.L71>:
+    case CLK_SRC_GROUP_CPU0:
+        clk_src_group = CLK_SRC_GROUP_COMMON;
+80004ba2:	00010fa3          	sb	zero,31(sp)
+        clk_src_index = SYSCTL_CLOCK_MUX_GET(HPM_SYSCTL->CLOCK[(uint32_t) clock_node_cpu0]);
+80004ba6:	f4000737          	lui	a4,0xf4000
+80004baa:	6789                	lui	a5,0x2
+80004bac:	97ba                	add	a5,a5,a4
+80004bae:	8007a783          	lw	a5,-2048(a5) # 1800 <__AXI_SRAM_segment_used_size__+0x6e3>
+80004bb2:	83a1                	srl	a5,a5,0x8
+80004bb4:	0ff7f793          	zext.b	a5,a5
+80004bb8:	8bbd                	and	a5,a5,15
+80004bba:	00f10f23          	sb	a5,30(sp)
+        break;
+80004bbe:	a82d                	j	80004bf8 <.L81>
+
+80004bc0 <.L70>:
+    case CLK_SRC_GROUP_CPU1:
+        clk_src_group = CLK_SRC_GROUP_COMMON;
+80004bc0:	00010fa3          	sb	zero,31(sp)
+        clk_src_index = SYSCTL_CLOCK_MUX_GET(HPM_SYSCTL->CLOCK[(uint32_t) clock_node_cpu1]);
+80004bc4:	f4000737          	lui	a4,0xf4000
+80004bc8:	6789                	lui	a5,0x2
+80004bca:	97ba                	add	a5,a5,a4
+80004bcc:	8087a783          	lw	a5,-2040(a5) # 1808 <__AXI_SRAM_segment_used_size__+0x6eb>
+80004bd0:	83a1                	srl	a5,a5,0x8
+80004bd2:	0ff7f793          	zext.b	a5,a5
+80004bd6:	8bbd                	and	a5,a5,15
+80004bd8:	00f10f23          	sb	a5,30(sp)
+        break;
+80004bdc:	a831                	j	80004bf8 <.L81>
+
+80004bde <.L69>:
+    case CLK_SRC_GROUP_SRC:
+        clk_src_index = (clk_src_t) node_or_instance;
+80004bde:	47d2                	lw	a5,20(sp)
+80004be0:	00f10f23          	sb	a5,30(sp)
+        break;
+80004be4:	a811                	j	80004bf8 <.L81>
+
+80004be6 <.L66>:
+    default:
+        clk_src_group = CLK_SRC_GROUP_INVALID;
+80004be6:	47bd                	li	a5,15
+80004be8:	00f10fa3          	sb	a5,31(sp)
+        break;
+80004bec:	a031                	j	80004bf8 <.L81>
+
+80004bee <.L88>:
+        break;
+80004bee:	0001                	nop
+80004bf0:	a021                	j	80004bf8 <.L81>
+
+80004bf2 <.L89>:
+        break;
+80004bf2:	0001                	nop
+80004bf4:	a011                	j	80004bf8 <.L81>
+
+80004bf6 <.L90>:
+        break;
+80004bf6:	0001                	nop
+
+80004bf8 <.L81>:
+    }
+
+    clk_src_t clk_src;
+    if (clk_src_group != CLK_SRC_GROUP_INVALID) {
+80004bf8:	01f14703          	lbu	a4,31(sp)
+80004bfc:	47bd                	li	a5,15
+80004bfe:	02f70063          	beq	a4,a5,80004c1e <.L85>
+        clk_src = MAKE_CLK_SRC(clk_src_group, clk_src_index);
+80004c02:	01f10783          	lb	a5,31(sp)
+80004c06:	0792                	sll	a5,a5,0x4
+80004c08:	01879713          	sll	a4,a5,0x18
+80004c0c:	8761                	sra	a4,a4,0x18
+80004c0e:	01e10783          	lb	a5,30(sp)
+80004c12:	8fd9                	or	a5,a5,a4
+80004c14:	07e2                	sll	a5,a5,0x18
+80004c16:	87e1                	sra	a5,a5,0x18
+80004c18:	00f10ea3          	sb	a5,29(sp)
+80004c1c:	a021                	j	80004c24 <.L86>
+
+80004c1e <.L85>:
+    } else {
+        clk_src = clk_src_invalid;
+80004c1e:	57fd                	li	a5,-1
+80004c20:	00f10ea3          	sb	a5,29(sp)
+
+80004c24 <.L86>:
+    }
+
+    return clk_src;
+80004c24:	01d14783          	lbu	a5,29(sp)
+}
+80004c28:	853e                	mv	a0,a5
+80004c2a:	6105                	add	sp,sp,32
+80004c2c:	8082                	ret
+
+Disassembly of section .text.clock_set_adc_source:
+
+80004c2e <clock_set_adc_source>:
+    }
+    return clk_divider;
+}
+
+hpm_stat_t clock_set_adc_source(clock_name_t clock_name, clk_src_t src)
+{
+80004c2e:	1101                	add	sp,sp,-32
+80004c30:	c62a                	sw	a0,12(sp)
+80004c32:	87ae                	mv	a5,a1
+80004c34:	00f105a3          	sb	a5,11(sp)
+    uint32_t clk_src_type = GET_CLK_SRC_GROUP_FROM_NAME(clock_name);
+80004c38:	47b2                	lw	a5,12(sp)
+80004c3a:	83a1                	srl	a5,a5,0x8
+80004c3c:	0ff7f793          	zext.b	a5,a5
+80004c40:	ce3e                	sw	a5,28(sp)
+    uint32_t node_or_instance = GET_CLK_NODE_FROM_NAME(clock_name);
+80004c42:	47b2                	lw	a5,12(sp)
+80004c44:	0ff7f793          	zext.b	a5,a5
+80004c48:	cc3e                	sw	a5,24(sp)
+
+    if ((clk_src_type != CLK_SRC_GROUP_ADC) || (node_or_instance >= ADC_INSTANCE_NUM)) {
+80004c4a:	4772                	lw	a4,28(sp)
+80004c4c:	4785                	li	a5,1
+80004c4e:	00f71663          	bne	a4,a5,80004c5a <.L118>
+80004c52:	4762                	lw	a4,24(sp)
+80004c54:	478d                	li	a5,3
+80004c56:	00e7f663          	bgeu	a5,a4,80004c62 <.L119>
+
+80004c5a <.L118>:
+        return status_clk_invalid;
+80004c5a:	6795                	lui	a5,0x5
+80004c5c:	5f278793          	add	a5,a5,1522 # 55f2 <__HEAPSIZE__+0x15f2>
+80004c60:	a899                	j	80004cb6 <.L120>
+
+80004c62 <.L119>:
+    }
+
+    if ((src < clk_adc_src_ahb0) || (src > clk_adc_src_ana2)) {
+80004c62:	00b14703          	lbu	a4,11(sp)
+80004c66:	47bd                	li	a5,15
+80004c68:	00e7f763          	bgeu	a5,a4,80004c76 <.L121>
+80004c6c:	00b14703          	lbu	a4,11(sp)
+80004c70:	47cd                	li	a5,19
+80004c72:	00e7f663          	bgeu	a5,a4,80004c7e <.L122>
+
+80004c76 <.L121>:
+        return status_clk_src_invalid;
+80004c76:	6795                	lui	a5,0x5
+80004c78:	5f178793          	add	a5,a5,1521 # 55f1 <__HEAPSIZE__+0x15f1>
+80004c7c:	a82d                	j	80004cb6 <.L120>
+
+80004c7e <.L122>:
+    }
+
+    uint32_t clk_src_index = GET_CLK_SRC_INDEX(src);
+80004c7e:	00b14783          	lbu	a5,11(sp)
+80004c82:	8bbd                	and	a5,a5,15
+80004c84:	ca3e                	sw	a5,20(sp)
+    HPM_SYSCTL->ADCCLK[node_or_instance] =
+            (HPM_SYSCTL->ADCCLK[node_or_instance] & ~SYSCTL_ADCCLK_MUX_MASK) | SYSCTL_ADCCLK_MUX_SET(clk_src_index);
+80004c86:	f4000737          	lui	a4,0xf4000
+80004c8a:	47e2                	lw	a5,24(sp)
+80004c8c:	70078793          	add	a5,a5,1792
+80004c90:	078a                	sll	a5,a5,0x2
+80004c92:	97ba                	add	a5,a5,a4
+80004c94:	439c                	lw	a5,0(a5)
+80004c96:	8ff7f713          	and	a4,a5,-1793
+80004c9a:	47d2                	lw	a5,20(sp)
+80004c9c:	07a2                	sll	a5,a5,0x8
+80004c9e:	7007f793          	and	a5,a5,1792
+    HPM_SYSCTL->ADCCLK[node_or_instance] =
+80004ca2:	f40006b7          	lui	a3,0xf4000
+            (HPM_SYSCTL->ADCCLK[node_or_instance] & ~SYSCTL_ADCCLK_MUX_MASK) | SYSCTL_ADCCLK_MUX_SET(clk_src_index);
+80004ca6:	8f5d                	or	a4,a4,a5
+    HPM_SYSCTL->ADCCLK[node_or_instance] =
+80004ca8:	47e2                	lw	a5,24(sp)
+80004caa:	70078793          	add	a5,a5,1792
+80004cae:	078a                	sll	a5,a5,0x2
+80004cb0:	97b6                	add	a5,a5,a3
+80004cb2:	c398                	sw	a4,0(a5)
+
+    return status_success;
+80004cb4:	4781                	li	a5,0
+
+80004cb6 <.L120>:
+}
+80004cb6:	853e                	mv	a0,a5
+80004cb8:	6105                	add	sp,sp,32
+80004cba:	8082                	ret
+
+Disassembly of section .text.clock_set_source_divider:
+
+80004cbc <clock_set_source_divider>:
+    }
+    return status_success;
+}
+
+hpm_stat_t clock_set_source_divider(clock_name_t clock_name, clk_src_t src, uint32_t div)
+{
+80004cbc:	7179                	add	sp,sp,-48
+80004cbe:	d606                	sw	ra,44(sp)
+80004cc0:	c62a                	sw	a0,12(sp)
+80004cc2:	87ae                	mv	a5,a1
+80004cc4:	c232                	sw	a2,4(sp)
+80004cc6:	00f105a3          	sb	a5,11(sp)
+    hpm_stat_t status = status_success;
+80004cca:	ce02                	sw	zero,28(sp)
+    uint32_t clk_src_type = GET_CLK_SRC_GROUP_FROM_NAME(clock_name);
+80004ccc:	47b2                	lw	a5,12(sp)
+80004cce:	83a1                	srl	a5,a5,0x8
+80004cd0:	0ff7f793          	zext.b	a5,a5
+80004cd4:	cc3e                	sw	a5,24(sp)
+    uint32_t node_or_instance = GET_CLK_NODE_FROM_NAME(clock_name);
+80004cd6:	47b2                	lw	a5,12(sp)
+80004cd8:	0ff7f793          	zext.b	a5,a5
+80004cdc:	ca3e                	sw	a5,20(sp)
+    switch (clk_src_type) {
+80004cde:	4762                	lw	a4,24(sp)
+80004ce0:	47b1                	li	a5,12
+80004ce2:	0ae7e163          	bltu	a5,a4,80004d84 <.L140>
+80004ce6:	47e2                	lw	a5,24(sp)
+80004ce8:	00279713          	sll	a4,a5,0x2
+80004cec:	800037b7          	lui	a5,0x80003
+80004cf0:	21478793          	add	a5,a5,532 # 80003214 <.L142>
+80004cf4:	97ba                	add	a5,a5,a4
+80004cf6:	439c                	lw	a5,0(a5)
+80004cf8:	8782                	jr	a5
+
+80004cfa <.L150>:
+    case CLK_SRC_GROUP_COMMON:
+        if ((div < 1U) || (div > 256U)) {
+80004cfa:	4792                	lw	a5,4(sp)
+80004cfc:	c791                	beqz	a5,80004d08 <.L151>
+80004cfe:	4712                	lw	a4,4(sp)
+80004d00:	10000793          	li	a5,256
+80004d04:	00e7f763          	bgeu	a5,a4,80004d12 <.L152>
+
+80004d08 <.L151>:
+            status = status_clk_div_invalid;
+80004d08:	6795                	lui	a5,0x5
+80004d0a:	5f078793          	add	a5,a5,1520 # 55f0 <__HEAPSIZE__+0x15f0>
+80004d0e:	ce3e                	sw	a5,28(sp)
+        } else {
+            clock_source_t clk_src = GET_CLOCK_SOURCE_FROM_CLK_SRC(src);
+            sysctl_config_clock(HPM_SYSCTL, (clock_node_t) node_or_instance, clk_src, div);
+        }
+        break;
+80004d10:	a8bd                	j	80004d8e <.L154>
+
+80004d12 <.L152>:
+            clock_source_t clk_src = GET_CLOCK_SOURCE_FROM_CLK_SRC(src);
+80004d12:	00b14783          	lbu	a5,11(sp)
+80004d16:	8bbd                	and	a5,a5,15
+80004d18:	00f109a3          	sb	a5,19(sp)
+            sysctl_config_clock(HPM_SYSCTL, (clock_node_t) node_or_instance, clk_src, div);
+80004d1c:	47d2                	lw	a5,20(sp)
+80004d1e:	0ff7f793          	zext.b	a5,a5
+80004d22:	01314703          	lbu	a4,19(sp)
+80004d26:	4692                	lw	a3,4(sp)
+80004d28:	863a                	mv	a2,a4
+80004d2a:	85be                	mv	a1,a5
+80004d2c:	f4000537          	lui	a0,0xf4000
+80004d30:	34a9                	jal	8000477a <sysctl_config_clock>
+
+80004d32 <.LBE14>:
+        break;
+80004d32:	a8b1                	j	80004d8e <.L154>
+
+80004d34 <.L141>:
+    case CLK_SRC_GROUP_ADC:
+    case CLK_SRC_GROUP_I2S:
+    case CLK_SRC_GROUP_WDG:
+    case CLK_SRC_GROUP_PWDG:
+    case CLK_SRC_GROUP_SRC:
+        status = status_clk_operation_unsupported;
+80004d34:	6795                	lui	a5,0x5
+80004d36:	5f378793          	add	a5,a5,1523 # 55f3 <__HEAPSIZE__+0x15f3>
+80004d3a:	ce3e                	sw	a5,28(sp)
+        break;
+80004d3c:	a889                	j	80004d8e <.L154>
+
+80004d3e <.L149>:
+    case CLK_SRC_GROUP_PMIC:
+        status = status_clk_fixed;
+80004d3e:	6795                	lui	a5,0x5
+80004d40:	5fa78793          	add	a5,a5,1530 # 55fa <__HEAPSIZE__+0x15fa>
+80004d44:	ce3e                	sw	a5,28(sp)
+        break;
+80004d46:	a0a1                	j	80004d8e <.L154>
+
+80004d48 <.L148>:
+    case CLK_SRC_GROUP_AHB:
+        status = status_clk_shared_ahb;
+80004d48:	6795                	lui	a5,0x5
+80004d4a:	5f478793          	add	a5,a5,1524 # 55f4 <__HEAPSIZE__+0x15f4>
+80004d4e:	ce3e                	sw	a5,28(sp)
+        break;
+80004d50:	a83d                	j	80004d8e <.L154>
+
+80004d52 <.L147>:
+    case CLK_SRC_GROUP_AXI0:
+        status = status_clk_shared_axi0;
+80004d52:	6795                	lui	a5,0x5
+80004d54:	5f578793          	add	a5,a5,1525 # 55f5 <__HEAPSIZE__+0x15f5>
+80004d58:	ce3e                	sw	a5,28(sp)
+        break;
+80004d5a:	a815                	j	80004d8e <.L154>
+
+80004d5c <.L146>:
+    case CLK_SRC_GROUP_AXI1:
+        status = status_clk_shared_axi1;
+80004d5c:	6795                	lui	a5,0x5
+80004d5e:	5f678793          	add	a5,a5,1526 # 55f6 <__HEAPSIZE__+0x15f6>
+80004d62:	ce3e                	sw	a5,28(sp)
+        break;
+80004d64:	a02d                	j	80004d8e <.L154>
+
+80004d66 <.L145>:
+    case CLK_SRC_GROUP_AXI2:
+        status = status_clk_shared_axi2;
+80004d66:	6795                	lui	a5,0x5
+80004d68:	5f778793          	add	a5,a5,1527 # 55f7 <__HEAPSIZE__+0x15f7>
+80004d6c:	ce3e                	sw	a5,28(sp)
+        break;
+80004d6e:	a005                	j	80004d8e <.L154>
+
+80004d70 <.L144>:
+    case CLK_SRC_GROUP_CPU0:
+        status = status_clk_shared_cpu0;
+80004d70:	6795                	lui	a5,0x5
+80004d72:	5f878793          	add	a5,a5,1528 # 55f8 <__HEAPSIZE__+0x15f8>
+80004d76:	ce3e                	sw	a5,28(sp)
+        break;
+80004d78:	a819                	j	80004d8e <.L154>
+
+80004d7a <.L143>:
+    case CLK_SRC_GROUP_CPU1:
+        status = status_clk_shared_cpu1;
+80004d7a:	6795                	lui	a5,0x5
+80004d7c:	5f978793          	add	a5,a5,1529 # 55f9 <__HEAPSIZE__+0x15f9>
+80004d80:	ce3e                	sw	a5,28(sp)
+        break;
+80004d82:	a031                	j	80004d8e <.L154>
+
+80004d84 <.L140>:
+    default:
+        status = status_clk_src_invalid;
+80004d84:	6795                	lui	a5,0x5
+80004d86:	5f178793          	add	a5,a5,1521 # 55f1 <__HEAPSIZE__+0x15f1>
+80004d8a:	ce3e                	sw	a5,28(sp)
+        break;
+80004d8c:	0001                	nop
+
+80004d8e <.L154>:
+    }
+
+    return status;
+80004d8e:	47f2                	lw	a5,28(sp)
+}
+80004d90:	853e                	mv	a0,a5
+80004d92:	50b2                	lw	ra,44(sp)
+80004d94:	6145                	add	sp,sp,48
+80004d96:	8082                	ret
+
+Disassembly of section .text.clock_add_to_group:
+
+80004d98 <clock_add_to_group>:
+{
+    switch_ip_clock(clock_name, CLOCK_OFF);
+}
+
+void clock_add_to_group(clock_name_t clock_name, uint32_t group)
+{
+80004d98:	7179                	add	sp,sp,-48
+80004d9a:	d606                	sw	ra,44(sp)
+80004d9c:	c62a                	sw	a0,12(sp)
+80004d9e:	c42e                	sw	a1,8(sp)
+    uint32_t resource = GET_CLK_RESOURCE_FROM_NAME(clock_name);
+80004da0:	47b2                	lw	a5,12(sp)
+80004da2:	83c1                	srl	a5,a5,0x10
+80004da4:	ce3e                	sw	a5,28(sp)
+
+    if (resource < sysctl_resource_end) {
+80004da6:	4772                	lw	a4,28(sp)
+80004da8:	15d00793          	li	a5,349
+80004dac:	00e7ef63          	bltu	a5,a4,80004dca <.L165>
+        sysctl_enable_group_resource(HPM_SYSCTL, group, resource, true);
+80004db0:	47a2                	lw	a5,8(sp)
+80004db2:	0ff7f793          	zext.b	a5,a5
+80004db6:	4772                	lw	a4,28(sp)
+80004db8:	0742                	sll	a4,a4,0x10
+80004dba:	8341                	srl	a4,a4,0x10
+80004dbc:	4685                	li	a3,1
+80004dbe:	863a                	mv	a2,a4
+80004dc0:	85be                	mv	a1,a5
+80004dc2:	f4000537          	lui	a0,0xf4000
+80004dc6:	55f020ef          	jal	80007b24 <sysctl_enable_group_resource>
+
+80004dca <.L165>:
+    }
+}
+80004dca:	0001                	nop
+80004dcc:	50b2                	lw	ra,44(sp)
+80004dce:	6145                	add	sp,sp,48
+80004dd0:	8082                	ret
+
+Disassembly of section .text.clock_update_core_clock:
+
+80004dd2 <clock_update_core_clock>:
+    while (hpm_csr_get_core_cycle() < expected_ticks) {
+    }
+}
+
+void clock_update_core_clock(void)
+{
+80004dd2:	1101                	add	sp,sp,-32
+80004dd4:	ce06                	sw	ra,28(sp)
+
+80004dd6 <.LBB16>:
+    uint32_t hart_id = read_csr(CSR_MHARTID);
+80004dd6:	f14027f3          	csrr	a5,mhartid
+80004dda:	c63e                	sw	a5,12(sp)
+80004ddc:	47b2                	lw	a5,12(sp)
+
+80004dde <.LBE16>:
+80004dde:	c43e                	sw	a5,8(sp)
+    clock_name_t cpu_clk_name = (hart_id == 1U) ? clock_cpu1 : clock_cpu0;
+80004de0:	4722                	lw	a4,8(sp)
+80004de2:	4785                	li	a5,1
+80004de4:	00f71663          	bne	a4,a5,80004df0 <.L192>
+80004de8:	000807b7          	lui	a5,0x80
+80004dec:	0789                	add	a5,a5,2 # 80002 <__AXI_SRAM_segment_size__+0x2>
+80004dee:	a011                	j	80004df2 <.L193>
+
+80004df0 <.L192>:
+80004df0:	4781                	li	a5,0
+
+80004df2 <.L193>:
+80004df2:	c23e                	sw	a5,4(sp)
+    hpm_core_clock = clock_get_frequency(cpu_clk_name);
+80004df4:	4512                	lw	a0,4(sp)
+80004df6:	3cd5                	jal	800048ea <clock_get_frequency>
+80004df8:	872a                	mv	a4,a0
+80004dfa:	82e22a23          	sw	a4,-1996(tp) # fffff834 <__APB_SRAM_segment_end__+0xbf0d834>
+80004dfe:	0001                	nop
+80004e00:	40f2                	lw	ra,28(sp)
+80004e02:	6105                	add	sp,sp,32
+80004e04:	8082                	ret
+
+Disassembly of section .text.pllctl_xtal_set_rampup_time:
+
+80004e06 <pllctl_xtal_set_rampup_time>:
+ * @brief set XTAL rampup time in cycles of IRC24M
+ *
+ * @param[in] ptr PLLCTL base address
+ */
+static inline void pllctl_xtal_set_rampup_time(PLLCTL_Type *ptr, uint32_t cycles)
+{
+80004e06:	1141                	add	sp,sp,-16
+80004e08:	c62a                	sw	a0,12(sp)
+80004e0a:	c42e                	sw	a1,8(sp)
+    ptr->XTAL = (ptr->XTAL & ~PLLCTL_XTAL_RAMP_TIME_MASK) | PLLCTL_XTAL_RAMP_TIME_SET(cycles);
+80004e0c:	47b2                	lw	a5,12(sp)
+80004e0e:	4398                	lw	a4,0(a5)
+80004e10:	fff007b7          	lui	a5,0xfff00
+80004e14:	8f7d                	and	a4,a4,a5
+80004e16:	46a2                	lw	a3,8(sp)
+80004e18:	001007b7          	lui	a5,0x100
+80004e1c:	17fd                	add	a5,a5,-1 # fffff <__DLM_segment_end__+0x3ffff>
+80004e1e:	8ff5                	and	a5,a5,a3
+80004e20:	8f5d                	or	a4,a4,a5
+80004e22:	47b2                	lw	a5,12(sp)
+80004e24:	c398                	sw	a4,0(a5)
+}
+80004e26:	0001                	nop
+80004e28:	0141                	add	sp,sp,16
+80004e2a:	8082                	ret
+
+Disassembly of section .text.pcfg_dcdc_switch_to_dcm_mode:
+
+80004e2c <pcfg_dcdc_switch_to_dcm_mode>:
+ * @brief dcdc switch to dcm mode
+ *
+ * @param[in] ptr base address
+ */
+static inline void pcfg_dcdc_switch_to_dcm_mode(PCFG_Type *ptr)
+{
+80004e2c:	7139                	add	sp,sp,-64
+80004e2e:	c62a                	sw	a0,12(sp)
+    const uint8_t pcfc_dcdc_min_duty_cycle[] = {
+80004e30:	a2818793          	add	a5,gp,-1496 # 80003a30 <.LC0>
+80004e34:	0007a883          	lw	a7,0(a5)
+80004e38:	0047a803          	lw	a6,4(a5)
+80004e3c:	4788                	lw	a0,8(a5)
+80004e3e:	47cc                	lw	a1,12(a5)
+80004e40:	4b90                	lw	a2,16(a5)
+80004e42:	4bd4                	lw	a3,20(a5)
+80004e44:	4f98                	lw	a4,24(a5)
+80004e46:	4fdc                	lw	a5,28(a5)
+80004e48:	ce46                	sw	a7,28(sp)
+80004e4a:	d042                	sw	a6,32(sp)
+80004e4c:	d22a                	sw	a0,36(sp)
+80004e4e:	d42e                	sw	a1,40(sp)
+80004e50:	d632                	sw	a2,44(sp)
+80004e52:	d836                	sw	a3,48(sp)
+80004e54:	da3a                	sw	a4,52(sp)
+80004e56:	dc3e                	sw	a5,56(sp)
+        0x76, 0x78, 0x78, 0x78, 0x78, 0x7A, 0x7A, 0x7A,
+        0x7A, 0x7C, 0x7C, 0x7C, 0x7E, 0x7E, 0x7E, 0x7E
+    };
+    uint16_t voltage;
+
+    ptr->DCDC_MODE |= 0x77000u;
+80004e58:	47b2                	lw	a5,12(sp)
+80004e5a:	4b98                	lw	a4,16(a5)
+80004e5c:	000777b7          	lui	a5,0x77
+80004e60:	8f5d                	or	a4,a4,a5
+80004e62:	47b2                	lw	a5,12(sp)
+80004e64:	cb98                	sw	a4,16(a5)
+    ptr->DCDC_ADVMODE = (ptr->DCDC_ADVMODE & ~0x73F0067u) | 0x4120067u;
+80004e66:	47b2                	lw	a5,12(sp)
+80004e68:	5398                	lw	a4,32(a5)
+80004e6a:	f8c107b7          	lui	a5,0xf8c10
+80004e6e:	f9878793          	add	a5,a5,-104 # f8c0ff98 <__APB_SRAM_segment_end__+0x4b1df98>
+80004e72:	8f7d                	and	a4,a4,a5
+80004e74:	041207b7          	lui	a5,0x4120
+80004e78:	06778793          	add	a5,a5,103 # 4120067 <_extram_size+0x2120067>
+80004e7c:	8f5d                	or	a4,a4,a5
+80004e7e:	47b2                	lw	a5,12(sp)
+80004e80:	d398                	sw	a4,32(a5)
+    ptr->DCDC_PROT &= ~PCFG_DCDC_PROT_SHORT_CURRENT_MASK;
+80004e82:	47b2                	lw	a5,12(sp)
+80004e84:	4f9c                	lw	a5,24(a5)
+80004e86:	fef7f713          	and	a4,a5,-17
+80004e8a:	47b2                	lw	a5,12(sp)
+80004e8c:	cf98                	sw	a4,24(a5)
+    ptr->DCDC_PROT |= PCFG_DCDC_PROT_DISABLE_SHORT_MASK;
+80004e8e:	47b2                	lw	a5,12(sp)
+80004e90:	4f9c                	lw	a5,24(a5)
+80004e92:	0807e713          	or	a4,a5,128
+80004e96:	47b2                	lw	a5,12(sp)
+80004e98:	cf98                	sw	a4,24(a5)
+    ptr->DCDC_MISC = 0x100000u;
+80004e9a:	47b2                	lw	a5,12(sp)
+80004e9c:	00100737          	lui	a4,0x100
+80004ea0:	d798                	sw	a4,40(a5)
+    voltage = PCFG_DCDC_MODE_VOLT_GET(ptr->DCDC_MODE);
+80004ea2:	47b2                	lw	a5,12(sp)
+80004ea4:	4b9c                	lw	a5,16(a5)
+80004ea6:	01079713          	sll	a4,a5,0x10
+80004eaa:	8341                	srl	a4,a4,0x10
+80004eac:	6785                	lui	a5,0x1
+80004eae:	17fd                	add	a5,a5,-1 # fff <__NOR_CFG_OPTION_segment_size__+0x3ff>
+80004eb0:	8ff9                	and	a5,a5,a4
+80004eb2:	02f11f23          	sh	a5,62(sp)
+    voltage = (voltage - 600) / 25;
+80004eb6:	03e15783          	lhu	a5,62(sp)
+80004eba:	da878713          	add	a4,a5,-600
+80004ebe:	47e5                	li	a5,25
+80004ec0:	02f747b3          	div	a5,a4,a5
+80004ec4:	02f11f23          	sh	a5,62(sp)
+    ptr->DCDC_ADVPARAM = (ptr->DCDC_ADVPARAM & ~PCFG_DCDC_ADVPARAM_MIN_DUT_MASK) | PCFG_DCDC_ADVPARAM_MIN_DUT_SET(pcfc_dcdc_min_duty_cycle[voltage]);
+80004ec8:	47b2                	lw	a5,12(sp)
+80004eca:	53d8                	lw	a4,36(a5)
+80004ecc:	77e1                	lui	a5,0xffff8
+80004ece:	0ff78793          	add	a5,a5,255 # ffff80ff <__APB_SRAM_segment_end__+0xbf060ff>
+80004ed2:	8f7d                	and	a4,a4,a5
+80004ed4:	03e15783          	lhu	a5,62(sp)
+80004ed8:	04078793          	add	a5,a5,64
+80004edc:	978a                	add	a5,a5,sp
+80004ede:	fdc7c783          	lbu	a5,-36(a5)
+80004ee2:	00879693          	sll	a3,a5,0x8
+80004ee6:	67a1                	lui	a5,0x8
+80004ee8:	f0078793          	add	a5,a5,-256 # 7f00 <__XPI0_segment_used_size__+0x94>
+80004eec:	8ff5                	and	a5,a5,a3
+80004eee:	8f5d                	or	a4,a4,a5
+80004ef0:	47b2                	lw	a5,12(sp)
+80004ef2:	d3d8                	sw	a4,36(a5)
+}
+80004ef4:	0001                	nop
+80004ef6:	6121                	add	sp,sp,64
+80004ef8:	8082                	ret
+
+Disassembly of section .text.board_print_clock_freq:
+
+80004efa <board_print_clock_freq>:
+#endif
+#endif
+}
+
+void board_print_clock_freq(void)
+{
+80004efa:	1141                	add	sp,sp,-16
+80004efc:	c606                	sw	ra,12(sp)
+    printf("==============================\n");
+80004efe:	a4818513          	add	a0,gp,-1464 # 80003a50 <.LC1>
+80004f02:	4de020ef          	jal	800073e0 <printf>
+    printf(" %s clock summary\n", BOARD_NAME);
+80004f06:	a6818593          	add	a1,gp,-1432 # 80003a70 <.LC2>
+80004f0a:	a7818513          	add	a0,gp,-1416 # 80003a80 <.LC3>
+80004f0e:	4d2020ef          	jal	800073e0 <printf>
+    printf("==============================\n");
+80004f12:	a4818513          	add	a0,gp,-1464 # 80003a50 <.LC1>
+80004f16:	4ca020ef          	jal	800073e0 <printf>
+    printf("cpu0:\t\t %luHz\n", clock_get_frequency(clock_cpu0));
+80004f1a:	4501                	li	a0,0
+80004f1c:	32f9                	jal	800048ea <clock_get_frequency>
+80004f1e:	87aa                	mv	a5,a0
+80004f20:	85be                	mv	a1,a5
+80004f22:	a8c18513          	add	a0,gp,-1396 # 80003a94 <.LC4>
+80004f26:	4ba020ef          	jal	800073e0 <printf>
+    printf("cpu1:\t\t %luHz\n", clock_get_frequency(clock_cpu1));
+80004f2a:	000807b7          	lui	a5,0x80
+80004f2e:	00278513          	add	a0,a5,2 # 80002 <__AXI_SRAM_segment_size__+0x2>
+80004f32:	3a65                	jal	800048ea <clock_get_frequency>
+80004f34:	87aa                	mv	a5,a0
+80004f36:	85be                	mv	a1,a5
+80004f38:	a9c18513          	add	a0,gp,-1380 # 80003aa4 <.LC5>
+80004f3c:	4a4020ef          	jal	800073e0 <printf>
+    printf("axi0:\t\t %luHz\n", clock_get_frequency(clock_axi0));
+80004f40:	010107b7          	lui	a5,0x1010
+80004f44:	00478513          	add	a0,a5,4 # 1010004 <__DLM_segment_end__+0xf50004>
+80004f48:	324d                	jal	800048ea <clock_get_frequency>
+80004f4a:	87aa                	mv	a5,a0
+80004f4c:	85be                	mv	a1,a5
+80004f4e:	aac18513          	add	a0,gp,-1364 # 80003ab4 <.LC6>
+80004f52:	48e020ef          	jal	800073e0 <printf>
+    printf("axi1:\t\t %luHz\n", clock_get_frequency(clock_axi1));
+80004f56:	010207b7          	lui	a5,0x1020
+80004f5a:	00578513          	add	a0,a5,5 # 1020005 <__DLM_segment_end__+0xf60005>
+80004f5e:	3271                	jal	800048ea <clock_get_frequency>
+80004f60:	87aa                	mv	a5,a0
+80004f62:	85be                	mv	a1,a5
+80004f64:	abc18513          	add	a0,gp,-1348 # 80003ac4 <.LC7>
+80004f68:	478020ef          	jal	800073e0 <printf>
+    printf("axi2:\t\t %luHz\n", clock_get_frequency(clock_axi2));
+80004f6c:	010307b7          	lui	a5,0x1030
+80004f70:	00678513          	add	a0,a5,6 # 1030006 <__DLM_segment_end__+0xf70006>
+80004f74:	3a9d                	jal	800048ea <clock_get_frequency>
+80004f76:	87aa                	mv	a5,a0
+80004f78:	85be                	mv	a1,a5
+80004f7a:	acc18513          	add	a0,gp,-1332 # 80003ad4 <.LC8>
+80004f7e:	462020ef          	jal	800073e0 <printf>
+    printf("ahb:\t\t %luHz\n", clock_get_frequency(clock_ahb));
+80004f82:	010007b7          	lui	a5,0x1000
+80004f86:	00778513          	add	a0,a5,7 # 1000007 <__DLM_segment_end__+0xf40007>
+80004f8a:	3285                	jal	800048ea <clock_get_frequency>
+80004f8c:	87aa                	mv	a5,a0
+80004f8e:	85be                	mv	a1,a5
+80004f90:	adc18513          	add	a0,gp,-1316 # 80003ae4 <.LC9>
+80004f94:	44c020ef          	jal	800073e0 <printf>
+    printf("mchtmr0:\t %luHz\n", clock_get_frequency(clock_mchtmr0));
+80004f98:	010807b7          	lui	a5,0x1080
+80004f9c:	00178513          	add	a0,a5,1 # 1080001 <__RAL_global_locale+0x1>
+80004fa0:	32a9                	jal	800048ea <clock_get_frequency>
+80004fa2:	87aa                	mv	a5,a0
+80004fa4:	85be                	mv	a1,a5
+80004fa6:	aec18513          	add	a0,gp,-1300 # 80003af4 <.LC10>
+80004faa:	436020ef          	jal	800073e0 <printf>
+    printf("mchtmr1:\t %luHz\n", clock_get_frequency(clock_mchtmr1));
+80004fae:	010907b7          	lui	a5,0x1090
+80004fb2:	00378513          	add	a0,a5,3 # 1090003 <__AXI_SRAM_segment_used_end__+0xeee6>
+80004fb6:	3a15                	jal	800048ea <clock_get_frequency>
+80004fb8:	87aa                	mv	a5,a0
+80004fba:	85be                	mv	a1,a5
+80004fbc:	b0018513          	add	a0,gp,-1280 # 80003b08 <.LC11>
+80004fc0:	420020ef          	jal	800073e0 <printf>
+    printf("xpi0:\t\t %luHz\n", clock_get_frequency(clock_xpi0));
+80004fc4:	010c07b7          	lui	a5,0x10c0
+80004fc8:	00978513          	add	a0,a5,9 # 10c0009 <__AXI_SRAM_segment_used_end__+0x3eeec>
+80004fcc:	3a39                	jal	800048ea <clock_get_frequency>
+80004fce:	87aa                	mv	a5,a0
+80004fd0:	85be                	mv	a1,a5
+80004fd2:	b1418513          	add	a0,gp,-1260 # 80003b1c <.LC12>
+80004fd6:	40a020ef          	jal	800073e0 <printf>
+    printf("xpi1:\t\t %luHz\n", clock_get_frequency(clock_xpi1));
+80004fda:	010d07b7          	lui	a5,0x10d0
+80004fde:	00a78513          	add	a0,a5,10 # 10d000a <__AXI_SRAM_segment_used_end__+0x4eeed>
+80004fe2:	3221                	jal	800048ea <clock_get_frequency>
+80004fe4:	87aa                	mv	a5,a0
+80004fe6:	85be                	mv	a1,a5
+80004fe8:	b2418513          	add	a0,gp,-1244 # 80003b2c <.LC13>
+80004fec:	3f4020ef          	jal	800073e0 <printf>
+    printf("femc:\t\t %luHz\n", clock_get_frequency(clock_femc));
+80004ff0:	010407b7          	lui	a5,0x1040
+80004ff4:	00878513          	add	a0,a5,8 # 1040008 <__DLM_segment_end__+0xf80008>
+80004ff8:	38cd                	jal	800048ea <clock_get_frequency>
+80004ffa:	87aa                	mv	a5,a0
+80004ffc:	85be                	mv	a1,a5
+80004ffe:	b3418513          	add	a0,gp,-1228 # 80003b3c <.LC14>
+80005002:	3de020ef          	jal	800073e0 <printf>
+    printf("display:\t %luHz\n", clock_get_frequency(clock_display));
+80005006:	014f07b7          	lui	a5,0x14f0
+8000500a:	03678513          	add	a0,a5,54 # 14f0036 <__SHARE_RAM_segment_end__+0x370036>
+8000500e:	38f1                	jal	800048ea <clock_get_frequency>
+80005010:	87aa                	mv	a5,a0
+80005012:	85be                	mv	a1,a5
+80005014:	b4418513          	add	a0,gp,-1212 # 80003b4c <.LC15>
+80005018:	3c8020ef          	jal	800073e0 <printf>
+    printf("cam0:\t\t %luHz\n", clock_get_frequency(clock_camera0));
+8000501c:	015007b7          	lui	a5,0x1500
+80005020:	03778513          	add	a0,a5,55 # 1500037 <__SHARE_RAM_segment_end__+0x380037>
+80005024:	30d9                	jal	800048ea <clock_get_frequency>
+80005026:	87aa                	mv	a5,a0
+80005028:	85be                	mv	a1,a5
+8000502a:	b5818513          	add	a0,gp,-1192 # 80003b60 <.LC16>
+8000502e:	3b2020ef          	jal	800073e0 <printf>
+    printf("cam1:\t\t %luHz\n", clock_get_frequency(clock_camera1));
+80005032:	015107b7          	lui	a5,0x1510
+80005036:	03878513          	add	a0,a5,56 # 1510038 <__SHARE_RAM_segment_end__+0x390038>
+8000503a:	3845                	jal	800048ea <clock_get_frequency>
+8000503c:	87aa                	mv	a5,a0
+8000503e:	85be                	mv	a1,a5
+80005040:	b6818513          	add	a0,gp,-1176 # 80003b70 <.LC17>
+80005044:	39c020ef          	jal	800073e0 <printf>
+    printf("jpeg:\t\t %luHz\n", clock_get_frequency(clock_jpeg));
+80005048:	015217b7          	lui	a5,0x1521
+8000504c:	80078513          	add	a0,a5,-2048 # 1520800 <__SHARE_RAM_segment_end__+0x3a0800>
+80005050:	3869                	jal	800048ea <clock_get_frequency>
+80005052:	87aa                	mv	a5,a0
+80005054:	85be                	mv	a1,a5
+80005056:	b7818513          	add	a0,gp,-1160 # 80003b80 <.LC18>
+8000505a:	386020ef          	jal	800073e0 <printf>
+    printf("pdma:\t\t %luHz\n", clock_get_frequency(clock_pdma));
+8000505e:	015317b7          	lui	a5,0x1531
+80005062:	80178513          	add	a0,a5,-2047 # 1530801 <__SHARE_RAM_segment_end__+0x3b0801>
+80005066:	3051                	jal	800048ea <clock_get_frequency>
+80005068:	87aa                	mv	a5,a0
+8000506a:	85be                	mv	a1,a5
+8000506c:	b8818513          	add	a0,gp,-1144 # 80003b90 <.LC19>
+80005070:	370020ef          	jal	800073e0 <printf>
+    printf("==============================\n");
+80005074:	a4818513          	add	a0,gp,-1464 # 80003a50 <.LC1>
+80005078:	368020ef          	jal	800073e0 <printf>
+}
+8000507c:	0001                	nop
+8000507e:	40b2                	lw	ra,12(sp)
+80005080:	0141                	add	sp,sp,16
+80005082:	8082                	ret
+
+Disassembly of section .text.board_print_banner:
+
+80005084 <board_print_banner>:
+    init_uart_pins(ptr);
+    board_init_uart_clock(ptr);
+}
+
+void board_print_banner(void)
+{
+80005084:	d8010113          	add	sp,sp,-640
+80005088:	26112e23          	sw	ra,636(sp)
+    const uint8_t banner[] = {"\n\
+8000508c:	bb418713          	add	a4,gp,-1100 # 80003bbc <.LC20>
+80005090:	878a                	mv	a5,sp
+80005092:	86ba                	mv	a3,a4
+80005094:	26f00713          	li	a4,623
+80005098:	863a                	mv	a2,a4
+8000509a:	85b6                	mv	a1,a3
+8000509c:	853e                	mv	a0,a5
+8000509e:	1e2020ef          	jal	80007280 <memcpy>
+$$ |  $$ |$$ |      $$ |\\$  /$$ |$$ |$$ |      $$ |      $$ |  $$ |\n\
+$$ |  $$ |$$ |      $$ | \\_/ $$ |$$ |\\$$$$$$$\\ $$ |      \\$$$$$$  |\n\
+\\__|  \\__|\\__|      \\__|     \\__|\\__| \\_______|\\__|       \\______/\n\
+----------------------------------------------------------------------\n"};
+#ifdef SDK_VERSION_STRING
+    printf("hpm_sdk: %s\n", SDK_VERSION_STRING);
+800050a2:	b9818593          	add	a1,gp,-1128 # 80003ba0 <.LC21>
+800050a6:	ba018513          	add	a0,gp,-1120 # 80003ba8 <.LC22>
+800050aa:	336020ef          	jal	800073e0 <printf>
+#endif
+    printf("%s", banner);
+800050ae:	878a                	mv	a5,sp
+800050b0:	85be                	mv	a1,a5
+800050b2:	bb018513          	add	a0,gp,-1104 # 80003bb8 <.LC23>
+800050b6:	32a020ef          	jal	800073e0 <printf>
+}
+800050ba:	0001                	nop
+800050bc:	27c12083          	lw	ra,636(sp)
+800050c0:	28010113          	add	sp,sp,640
+800050c4:	8082                	ret
+
+Disassembly of section .text.board_init_pmp:
+
+800050c6 <board_init_pmp>:
+    (void) usb_index;
+    (void) level;
+}
+
+void board_init_pmp(void)
+{
+800050c6:	712d                	add	sp,sp,-288
+800050c8:	10112e23          	sw	ra,284(sp)
+    uint32_t start_addr;
+    uint32_t end_addr;
+    uint32_t length;
+    pmp_entry_t pmp_entry[16];
+    uint8_t index = 0;
+800050cc:	100107a3          	sb	zero,271(sp)
+
+    /* Init noncachable memory */
+    extern uint32_t __noncacheable_start__[];
+    extern uint32_t __noncacheable_end__[];
+    start_addr = (uint32_t) __noncacheable_start__;
+800050d0:	011007b7          	lui	a5,0x1100
+800050d4:	00078793          	mv	a5,a5
+800050d8:	10f12423          	sw	a5,264(sp)
+    end_addr = (uint32_t) __noncacheable_end__;
+800050dc:	011407b7          	lui	a5,0x1140
+800050e0:	00078793          	mv	a5,a5
+800050e4:	10f12223          	sw	a5,260(sp)
+    length = end_addr - start_addr;
+800050e8:	10412703          	lw	a4,260(sp)
+800050ec:	10812783          	lw	a5,264(sp)
+800050f0:	40f707b3          	sub	a5,a4,a5
+800050f4:	10f12023          	sw	a5,256(sp)
+    if (length > 0) {
+800050f8:	10012783          	lw	a5,256(sp)
+800050fc:	cfc5                	beqz	a5,800051b4 <.L126>
+        /* Ensure the address and the length are power of 2 aligned */
+        assert((length & (length - 1U)) == 0U);
+800050fe:	10012783          	lw	a5,256(sp)
+80005102:	fff78713          	add	a4,a5,-1 # 113ffff <__AXI_SRAM_segment_end__+0x3ffff>
+80005106:	10012783          	lw	a5,256(sp)
+8000510a:	8ff9                	and	a5,a5,a4
+8000510c:	cb89                	beqz	a5,8000511e <.L127>
+8000510e:	25700613          	li	a2,599
+80005112:	ec018593          	add	a1,gp,-320 # 80003ec8 <.LC29>
+80005116:	f1818513          	add	a0,gp,-232 # 80003f20 <.LC30>
+8000511a:	5f7030ef          	jal	80008f10 <__SEGGER_RTL_X_assert>
+
+8000511e <.L127>:
+        assert((start_addr & (length - 1U)) == 0U);
+8000511e:	10012783          	lw	a5,256(sp)
+80005122:	fff78713          	add	a4,a5,-1
+80005126:	10812783          	lw	a5,264(sp)
+8000512a:	8ff9                	and	a5,a5,a4
+8000512c:	cb89                	beqz	a5,8000513e <.L128>
+8000512e:	25800613          	li	a2,600
+80005132:	ec018593          	add	a1,gp,-320 # 80003ec8 <.LC29>
+80005136:	f3818513          	add	a0,gp,-200 # 80003f40 <.LC31>
+8000513a:	5d7030ef          	jal	80008f10 <__SEGGER_RTL_X_assert>
+
+8000513e <.L128>:
+        pmp_entry[index].pmp_addr = PMP_NAPOT_ADDR(start_addr, length);
+8000513e:	10812783          	lw	a5,264(sp)
+80005142:	0027d693          	srl	a3,a5,0x2
+80005146:	10012783          	lw	a5,256(sp)
+8000514a:	17fd                	add	a5,a5,-1
+8000514c:	0037d713          	srl	a4,a5,0x3
+80005150:	10f14783          	lbu	a5,271(sp)
+80005154:	8f55                	or	a4,a4,a3
+80005156:	0792                	sll	a5,a5,0x4
+80005158:	11078793          	add	a5,a5,272
+8000515c:	978a                	add	a5,a5,sp
+8000515e:	eee7aa23          	sw	a4,-268(a5)
+        pmp_entry[index].pmp_cfg.val = PMP_CFG(READ_EN, WRITE_EN, EXECUTE_EN, ADDR_MATCH_NAPOT, REG_UNLOCK);
+80005162:	10f14783          	lbu	a5,271(sp)
+80005166:	0792                	sll	a5,a5,0x4
+80005168:	11078793          	add	a5,a5,272
+8000516c:	978a                	add	a5,a5,sp
+8000516e:	477d                	li	a4,31
+80005170:	eee78823          	sb	a4,-272(a5)
+        pmp_entry[index].pma_addr = PMA_NAPOT_ADDR(start_addr, length);
+80005174:	10812783          	lw	a5,264(sp)
+80005178:	0027d693          	srl	a3,a5,0x2
+8000517c:	10012783          	lw	a5,256(sp)
+80005180:	17fd                	add	a5,a5,-1
+80005182:	0037d713          	srl	a4,a5,0x3
+80005186:	10f14783          	lbu	a5,271(sp)
+8000518a:	8f55                	or	a4,a4,a3
+8000518c:	0792                	sll	a5,a5,0x4
+8000518e:	11078793          	add	a5,a5,272
+80005192:	978a                	add	a5,a5,sp
+80005194:	eee7ae23          	sw	a4,-260(a5)
+        pmp_entry[index].pma_cfg.val = PMA_CFG(ADDR_MATCH_NAPOT, MEM_TYPE_MEM_NON_CACHE_BUF, AMO_EN);
+80005198:	10f14783          	lbu	a5,271(sp)
+8000519c:	0792                	sll	a5,a5,0x4
+8000519e:	11078793          	add	a5,a5,272
+800051a2:	978a                	add	a5,a5,sp
+800051a4:	473d                	li	a4,15
+800051a6:	eee78c23          	sb	a4,-264(a5)
+        index++;
+800051aa:	10f14783          	lbu	a5,271(sp)
+800051ae:	0785                	add	a5,a5,1
+800051b0:	10f107a3          	sb	a5,271(sp)
+
+800051b4 <.L126>:
+    }
+
+    /* Init share memory */
+    extern uint32_t __share_mem_start__[];
+    extern uint32_t __share_mem_end__[];
+    start_addr = (uint32_t)__share_mem_start__;
+800051b4:	0117c7b7          	lui	a5,0x117c
+800051b8:	00078793          	mv	a5,a5
+800051bc:	10f12423          	sw	a5,264(sp)
+    end_addr = (uint32_t)__share_mem_end__;
+800051c0:	011807b7          	lui	a5,0x1180
+800051c4:	00078793          	mv	a5,a5
+800051c8:	10f12223          	sw	a5,260(sp)
+    length = end_addr - start_addr;
+800051cc:	10412703          	lw	a4,260(sp)
+800051d0:	10812783          	lw	a5,264(sp)
+800051d4:	40f707b3          	sub	a5,a4,a5
+800051d8:	10f12023          	sw	a5,256(sp)
+    if (length > 0) {
+800051dc:	10012783          	lw	a5,256(sp)
+800051e0:	cfc5                	beqz	a5,80005298 <.L129>
+        /* Ensure the address and the length are power of 2 aligned */
+        assert((length & (length - 1U)) == 0U);
+800051e2:	10012783          	lw	a5,256(sp)
+800051e6:	fff78713          	add	a4,a5,-1 # 117ffff <__SHARE_RAM_segment_start__+0x3fff>
+800051ea:	10012783          	lw	a5,256(sp)
+800051ee:	8ff9                	and	a5,a5,a4
+800051f0:	cb89                	beqz	a5,80005202 <.L130>
+800051f2:	26800613          	li	a2,616
+800051f6:	ec018593          	add	a1,gp,-320 # 80003ec8 <.LC29>
+800051fa:	f1818513          	add	a0,gp,-232 # 80003f20 <.LC30>
+800051fe:	513030ef          	jal	80008f10 <__SEGGER_RTL_X_assert>
+
+80005202 <.L130>:
+        assert((start_addr & (length - 1U)) == 0U);
+80005202:	10012783          	lw	a5,256(sp)
+80005206:	fff78713          	add	a4,a5,-1
+8000520a:	10812783          	lw	a5,264(sp)
+8000520e:	8ff9                	and	a5,a5,a4
+80005210:	cb89                	beqz	a5,80005222 <.L131>
+80005212:	26900613          	li	a2,617
+80005216:	ec018593          	add	a1,gp,-320 # 80003ec8 <.LC29>
+8000521a:	f3818513          	add	a0,gp,-200 # 80003f40 <.LC31>
+8000521e:	4f3030ef          	jal	80008f10 <__SEGGER_RTL_X_assert>
+
+80005222 <.L131>:
+        pmp_entry[index].pmp_addr = PMP_NAPOT_ADDR(start_addr, length);
+80005222:	10812783          	lw	a5,264(sp)
+80005226:	0027d693          	srl	a3,a5,0x2
+8000522a:	10012783          	lw	a5,256(sp)
+8000522e:	17fd                	add	a5,a5,-1
+80005230:	0037d713          	srl	a4,a5,0x3
+80005234:	10f14783          	lbu	a5,271(sp)
+80005238:	8f55                	or	a4,a4,a3
+8000523a:	0792                	sll	a5,a5,0x4
+8000523c:	11078793          	add	a5,a5,272
+80005240:	978a                	add	a5,a5,sp
+80005242:	eee7aa23          	sw	a4,-268(a5)
+        pmp_entry[index].pmp_cfg.val = PMP_CFG(READ_EN, WRITE_EN, EXECUTE_EN, ADDR_MATCH_NAPOT, REG_UNLOCK);
+80005246:	10f14783          	lbu	a5,271(sp)
+8000524a:	0792                	sll	a5,a5,0x4
+8000524c:	11078793          	add	a5,a5,272
+80005250:	978a                	add	a5,a5,sp
+80005252:	477d                	li	a4,31
+80005254:	eee78823          	sb	a4,-272(a5)
+        pmp_entry[index].pma_addr = PMA_NAPOT_ADDR(start_addr, length);
+80005258:	10812783          	lw	a5,264(sp)
+8000525c:	0027d693          	srl	a3,a5,0x2
+80005260:	10012783          	lw	a5,256(sp)
+80005264:	17fd                	add	a5,a5,-1
+80005266:	0037d713          	srl	a4,a5,0x3
+8000526a:	10f14783          	lbu	a5,271(sp)
+8000526e:	8f55                	or	a4,a4,a3
+80005270:	0792                	sll	a5,a5,0x4
+80005272:	11078793          	add	a5,a5,272
+80005276:	978a                	add	a5,a5,sp
+80005278:	eee7ae23          	sw	a4,-260(a5)
+        pmp_entry[index].pma_cfg.val = PMA_CFG(ADDR_MATCH_NAPOT, MEM_TYPE_MEM_NON_CACHE_BUF, AMO_EN);
+8000527c:	10f14783          	lbu	a5,271(sp)
+80005280:	0792                	sll	a5,a5,0x4
+80005282:	11078793          	add	a5,a5,272
+80005286:	978a                	add	a5,a5,sp
+80005288:	473d                	li	a4,15
+8000528a:	eee78c23          	sb	a4,-264(a5)
+        index++;
+8000528e:	10f14783          	lbu	a5,271(sp)
+80005292:	0785                	add	a5,a5,1
+80005294:	10f107a3          	sb	a5,271(sp)
+
+80005298 <.L129>:
+    }
+
+    pmp_config(&pmp_entry[0], index);
+80005298:	10f14703          	lbu	a4,271(sp)
+8000529c:	878a                	mv	a5,sp
+8000529e:	85ba                	mv	a1,a4
+800052a0:	853e                	mv	a0,a5
+800052a2:	28d000ef          	jal	80005d2e <pmp_config>
+}
+800052a6:	0001                	nop
+800052a8:	11c12083          	lw	ra,284(sp)
+800052ac:	6115                	add	sp,sp,288
+800052ae:	8082                	ret
+
+Disassembly of section .text.board_init_clock:
+
+800052b0 <board_init_clock>:
+
+void board_init_clock(void)
+{
+800052b0:	1101                	add	sp,sp,-32
+800052b2:	ce06                	sw	ra,28(sp)
+    uint32_t cpu0_freq = clock_get_frequency(clock_cpu0);
+800052b4:	4501                	li	a0,0
+800052b6:	e34ff0ef          	jal	800048ea <clock_get_frequency>
+800052ba:	c62a                	sw	a0,12(sp)
+    if (cpu0_freq == PLLCTL_SOC_PLL_REFCLK_FREQ) {
+800052bc:	4732                	lw	a4,12(sp)
+800052be:	016e37b7          	lui	a5,0x16e3
+800052c2:	60078793          	add	a5,a5,1536 # 16e3600 <__SHARE_RAM_segment_end__+0x563600>
+800052c6:	00f71e63          	bne	a4,a5,800052e2 <.L133>
+        /* Configure the External OSC ramp-up time: ~9ms */
+        pllctl_xtal_set_rampup_time(HPM_PLLCTL, 32UL * 1000UL * 9U);
+800052ca:	000467b7          	lui	a5,0x46
+800052ce:	50078593          	add	a1,a5,1280 # 46500 <__DLM_segment_size__+0x6500>
+800052d2:	f4100537          	lui	a0,0xf4100
+800052d6:	3e05                	jal	80004e06 <pllctl_xtal_set_rampup_time>
+
+        /* Select clock setting preset1 */
+        sysctl_clock_set_preset(HPM_SYSCTL, sysctl_preset_1);
+800052d8:	4589                	li	a1,2
+800052da:	f4000537          	lui	a0,0xf4000
+800052de:	54f020ef          	jal	8000802c <sysctl_clock_set_preset>
+
+800052e2 <.L133>:
+    }
+
+    /* Add most Clocks to group 0 */
+    /* not open uart clock in this API, uart should configure pin function before opening clock */
+    clock_add_to_group(clock_cpu0, 0);
+800052e2:	4581                	li	a1,0
+800052e4:	4501                	li	a0,0
+800052e6:	3c4d                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_mchtmr0, 0);
+800052e8:	4581                	li	a1,0
+800052ea:	010807b7          	lui	a5,0x1080
+800052ee:	00178513          	add	a0,a5,1 # 1080001 <__RAL_global_locale+0x1>
+800052f2:	345d                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_axi0, 0);
+800052f4:	4581                	li	a1,0
+800052f6:	010107b7          	lui	a5,0x1010
+800052fa:	00478513          	add	a0,a5,4 # 1010004 <__DLM_segment_end__+0xf50004>
+800052fe:	3c69                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_axi1, 0);
+80005300:	4581                	li	a1,0
+80005302:	010207b7          	lui	a5,0x1020
+80005306:	00578513          	add	a0,a5,5 # 1020005 <__DLM_segment_end__+0xf60005>
+8000530a:	3479                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_axi2, 0);
+8000530c:	4581                	li	a1,0
+8000530e:	010307b7          	lui	a5,0x1030
+80005312:	00678513          	add	a0,a5,6 # 1030006 <__DLM_segment_end__+0xf70006>
+80005316:	3449                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_ahb, 0);
+80005318:	4581                	li	a1,0
+8000531a:	010007b7          	lui	a5,0x1000
+8000531e:	00778513          	add	a0,a5,7 # 1000007 <__DLM_segment_end__+0xf40007>
+80005322:	3c9d                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_femc, 0);
+80005324:	4581                	li	a1,0
+80005326:	010407b7          	lui	a5,0x1040
+8000532a:	00878513          	add	a0,a5,8 # 1040008 <__DLM_segment_end__+0xf80008>
+8000532e:	34ad                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_xpi0, 0);
+80005330:	4581                	li	a1,0
+80005332:	010c07b7          	lui	a5,0x10c0
+80005336:	00978513          	add	a0,a5,9 # 10c0009 <__AXI_SRAM_segment_used_end__+0x3eeec>
+8000533a:	3cb9                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_xpi1, 0);
+8000533c:	4581                	li	a1,0
+8000533e:	010d07b7          	lui	a5,0x10d0
+80005342:	00a78513          	add	a0,a5,10 # 10d000a <__AXI_SRAM_segment_used_end__+0x4eeed>
+80005346:	3c89                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_gptmr0, 0);
+80005348:	4581                	li	a1,0
+8000534a:	011a07b7          	lui	a5,0x11a0
+8000534e:	00b78513          	add	a0,a5,11 # 11a000b <__SHARE_RAM_segment_end__+0x2000b>
+80005352:	3499                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_gptmr1, 0);
+80005354:	4581                	li	a1,0
+80005356:	011b07b7          	lui	a5,0x11b0
+8000535a:	00c78513          	add	a0,a5,12 # 11b000c <__SHARE_RAM_segment_end__+0x3000c>
+8000535e:	3c2d                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_gptmr2, 0);
+80005360:	4581                	li	a1,0
+80005362:	011c07b7          	lui	a5,0x11c0
+80005366:	00d78513          	add	a0,a5,13 # 11c000d <__SHARE_RAM_segment_end__+0x4000d>
+8000536a:	343d                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_gptmr3, 0);
+8000536c:	4581                	li	a1,0
+8000536e:	011d07b7          	lui	a5,0x11d0
+80005372:	00e78513          	add	a0,a5,14 # 11d000e <__SHARE_RAM_segment_end__+0x5000e>
+80005376:	340d                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_gptmr4, 0);
+80005378:	4581                	li	a1,0
+8000537a:	011e07b7          	lui	a5,0x11e0
+8000537e:	00f78513          	add	a0,a5,15 # 11e000f <__SHARE_RAM_segment_end__+0x6000f>
+80005382:	3c19                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_gptmr5, 0);
+80005384:	4581                	li	a1,0
+80005386:	011f07b7          	lui	a5,0x11f0
+8000538a:	01078513          	add	a0,a5,16 # 11f0010 <__SHARE_RAM_segment_end__+0x70010>
+8000538e:	3429                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_gptmr6, 0);
+80005390:	4581                	li	a1,0
+80005392:	012007b7          	lui	a5,0x1200
+80005396:	01178513          	add	a0,a5,17 # 1200011 <__SHARE_RAM_segment_end__+0x80011>
+8000539a:	3afd                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_gptmr7, 0);
+8000539c:	4581                	li	a1,0
+8000539e:	012107b7          	lui	a5,0x1210
+800053a2:	01278513          	add	a0,a5,18 # 1210012 <__SHARE_RAM_segment_end__+0x90012>
+800053a6:	3acd                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_i2c0, 0);
+800053a8:	4581                	li	a1,0
+800053aa:	013207b7          	lui	a5,0x1320
+800053ae:	02378513          	add	a0,a5,35 # 1320023 <__SHARE_RAM_segment_end__+0x1a0023>
+800053b2:	32dd                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_i2c1, 0);
+800053b4:	4581                	li	a1,0
+800053b6:	013307b7          	lui	a5,0x1330
+800053ba:	02478513          	add	a0,a5,36 # 1330024 <__SHARE_RAM_segment_end__+0x1b0024>
+800053be:	3ae9                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_i2c2, 0);
+800053c0:	4581                	li	a1,0
+800053c2:	013407b7          	lui	a5,0x1340
+800053c6:	02578513          	add	a0,a5,37 # 1340025 <__SHARE_RAM_segment_end__+0x1c0025>
+800053ca:	32f9                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_i2c3, 0);
+800053cc:	4581                	li	a1,0
+800053ce:	013507b7          	lui	a5,0x1350
+800053d2:	02678513          	add	a0,a5,38 # 1350026 <__SHARE_RAM_segment_end__+0x1d0026>
+800053d6:	32c9                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_spi0, 0);
+800053d8:	4581                	li	a1,0
+800053da:	013607b7          	lui	a5,0x1360
+800053de:	02778513          	add	a0,a5,39 # 1360027 <__SHARE_RAM_segment_end__+0x1e0027>
+800053e2:	3a5d                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_spi1, 0);
+800053e4:	4581                	li	a1,0
+800053e6:	013707b7          	lui	a5,0x1370
+800053ea:	02878513          	add	a0,a5,40 # 1370028 <__SHARE_RAM_segment_end__+0x1f0028>
+800053ee:	326d                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_spi2, 0);
+800053f0:	4581                	li	a1,0
+800053f2:	013807b7          	lui	a5,0x1380
+800053f6:	02978513          	add	a0,a5,41 # 1380029 <__SHARE_RAM_segment_end__+0x200029>
+800053fa:	3a79                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_spi3, 0);
+800053fc:	4581                	li	a1,0
+800053fe:	013907b7          	lui	a5,0x1390
+80005402:	02a78513          	add	a0,a5,42 # 139002a <__SHARE_RAM_segment_end__+0x21002a>
+80005406:	3a49                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_can0, 0);
+80005408:	4581                	li	a1,0
+8000540a:	013a07b7          	lui	a5,0x13a0
+8000540e:	02b78513          	add	a0,a5,43 # 13a002b <__SHARE_RAM_segment_end__+0x22002b>
+80005412:	3259                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_can1, 0);
+80005414:	4581                	li	a1,0
+80005416:	013b07b7          	lui	a5,0x13b0
+8000541a:	02c78513          	add	a0,a5,44 # 13b002c <__SHARE_RAM_segment_end__+0x23002c>
+8000541e:	3aad                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_can2, 0);
+80005420:	4581                	li	a1,0
+80005422:	013c07b7          	lui	a5,0x13c0
+80005426:	02d78513          	add	a0,a5,45 # 13c002d <__SHARE_RAM_segment_end__+0x24002d>
+8000542a:	32bd                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_can3, 0);
+8000542c:	4581                	li	a1,0
+8000542e:	013d07b7          	lui	a5,0x13d0
+80005432:	02e78513          	add	a0,a5,46 # 13d002e <__SHARE_RAM_segment_end__+0x25002e>
+80005436:	328d                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_display, 0);
+80005438:	4581                	li	a1,0
+8000543a:	014f07b7          	lui	a5,0x14f0
+8000543e:	03678513          	add	a0,a5,54 # 14f0036 <__SHARE_RAM_segment_end__+0x370036>
+80005442:	3a99                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_sdxc0, 0);
+80005444:	4581                	li	a1,0
+80005446:	015807b7          	lui	a5,0x1580
+8000544a:	04178513          	add	a0,a5,65 # 1580041 <__SHARE_RAM_segment_end__+0x400041>
+8000544e:	32a9                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_sdxc1, 0);
+80005450:	4581                	li	a1,0
+80005452:	015907b7          	lui	a5,0x1590
+80005456:	04278513          	add	a0,a5,66 # 1590042 <__SHARE_RAM_segment_end__+0x410042>
+8000545a:	3a3d                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_camera0, 0);
+8000545c:	4581                	li	a1,0
+8000545e:	015007b7          	lui	a5,0x1500
+80005462:	03778513          	add	a0,a5,55 # 1500037 <__SHARE_RAM_segment_end__+0x380037>
+80005466:	3a0d                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_camera1, 0);
+80005468:	4581                	li	a1,0
+8000546a:	015107b7          	lui	a5,0x1510
+8000546e:	03878513          	add	a0,a5,56 # 1510038 <__SHARE_RAM_segment_end__+0x390038>
+80005472:	321d                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_ptpc, 0);
+80005474:	4581                	li	a1,0
+80005476:	013e07b7          	lui	a5,0x13e0
+8000547a:	02f78513          	add	a0,a5,47 # 13e002f <__SHARE_RAM_segment_end__+0x26002f>
+8000547e:	3a29                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_ref0, 0);
+80005480:	4581                	li	a1,0
+80005482:	015c07b7          	lui	a5,0x15c0
+80005486:	03d78513          	add	a0,a5,61 # 15c003d <__SHARE_RAM_segment_end__+0x44003d>
+8000548a:	3239                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_ref1, 0);
+8000548c:	4581                	li	a1,0
+8000548e:	015d07b7          	lui	a5,0x15d0
+80005492:	03e78513          	add	a0,a5,62 # 15d003e <__SHARE_RAM_segment_end__+0x45003e>
+80005496:	3209                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_watchdog0, 0);
+80005498:	4581                	li	a1,0
+8000549a:	011607b7          	lui	a5,0x1160
+8000549e:	30078513          	add	a0,a5,768 # 1160300 <__NONCACHEABLE_RAM_segment_end__+0x20300>
+800054a2:	38dd                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_eth0, 0);
+800054a4:	4581                	li	a1,0
+800054a6:	015407b7          	lui	a5,0x1540
+800054aa:	03978513          	add	a0,a5,57 # 1540039 <__SHARE_RAM_segment_end__+0x3c0039>
+800054ae:	30ed                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_eth1, 0);
+800054b0:	4581                	li	a1,0
+800054b2:	015507b7          	lui	a5,0x1550
+800054b6:	03a78513          	add	a0,a5,58 # 155003a <__SHARE_RAM_segment_end__+0x3d003a>
+800054ba:	38f9                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_sdp, 0);
+800054bc:	4581                	li	a1,0
+800054be:	010e07b7          	lui	a5,0x10e0
+800054c2:	60078513          	add	a0,a5,1536 # 10e0600 <__AXI_SRAM_segment_used_end__+0x5f4e3>
+800054c6:	38c9                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_xdma, 0);
+800054c8:	4581                	li	a1,0
+800054ca:	011207b7          	lui	a5,0x1120
+800054ce:	60178513          	add	a0,a5,1537 # 1120601 <__AXI_SRAM_segment_end__+0x20601>
+800054d2:	30d9                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_ram0, 0);
+800054d4:	4581                	li	a1,0
+800054d6:	010a07b7          	lui	a5,0x10a0
+800054da:	60378513          	add	a0,a5,1539 # 10a0603 <__AXI_SRAM_segment_used_end__+0x1f4e6>
+800054de:	386d                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_ram1, 0);
+800054e0:	4581                	li	a1,0
+800054e2:	010b07b7          	lui	a5,0x10b0
+800054e6:	60478513          	add	a0,a5,1540 # 10b0604 <__AXI_SRAM_segment_used_end__+0x2f4e7>
+800054ea:	307d                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_usb0, 0);
+800054ec:	4581                	li	a1,0
+800054ee:	015a07b7          	lui	a5,0x15a0
+800054f2:	70078513          	add	a0,a5,1792 # 15a0700 <__SHARE_RAM_segment_end__+0x420700>
+800054f6:	304d                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_usb1, 0);
+800054f8:	4581                	li	a1,0
+800054fa:	015b07b7          	lui	a5,0x15b0
+800054fe:	70178513          	add	a0,a5,1793 # 15b0701 <__SHARE_RAM_segment_end__+0x430701>
+80005502:	3859                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_jpeg, 0);
+80005504:	4581                	li	a1,0
+80005506:	015217b7          	lui	a5,0x1521
+8000550a:	80078513          	add	a0,a5,-2048 # 1520800 <__SHARE_RAM_segment_end__+0x3a0800>
+8000550e:	3069                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_pdma, 0);
+80005510:	4581                	li	a1,0
+80005512:	015317b7          	lui	a5,0x1531
+80005516:	80178513          	add	a0,a5,-2047 # 1530801 <__SHARE_RAM_segment_end__+0x3b0801>
+8000551a:	38bd                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_kman, 0);
+8000551c:	4581                	li	a1,0
+8000551e:	011007b7          	lui	a5,0x1100
+80005522:	50078513          	add	a0,a5,1280 # 1100500 <__AXI_SRAM_segment_end__+0x500>
+80005526:	388d                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_gpio, 0);
+80005528:	4581                	li	a1,0
+8000552a:	011307b7          	lui	a5,0x1130
+8000552e:	50178513          	add	a0,a5,1281 # 1130501 <__AXI_SRAM_segment_end__+0x30501>
+80005532:	309d                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_mbx0, 0);
+80005534:	4581                	li	a1,0
+80005536:	011407b7          	lui	a5,0x1140
+8000553a:	50278513          	add	a0,a5,1282 # 1140502 <__NONCACHEABLE_RAM_segment_end__+0x502>
+8000553e:	38a9                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_hdma, 0);
+80005540:	4581                	li	a1,0
+80005542:	011107b7          	lui	a5,0x1110
+80005546:	50478513          	add	a0,a5,1284 # 1110504 <__AXI_SRAM_segment_end__+0x10504>
+8000554a:	30b9                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_rng, 0);
+8000554c:	4581                	li	a1,0
+8000554e:	010f07b7          	lui	a5,0x10f0
+80005552:	50578513          	add	a0,a5,1285 # 10f0505 <__AXI_SRAM_segment_used_end__+0x6f3e8>
+80005556:	3089                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_mot0, 0);
+80005558:	4581                	li	a1,0
+8000555a:	014b07b7          	lui	a5,0x14b0
+8000555e:	50678513          	add	a0,a5,1286 # 14b0506 <__SHARE_RAM_segment_end__+0x330506>
+80005562:	381d                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_mot1, 0);
+80005564:	4581                	li	a1,0
+80005566:	014c07b7          	lui	a5,0x14c0
+8000556a:	50778513          	add	a0,a5,1287 # 14c0507 <__SHARE_RAM_segment_end__+0x340507>
+8000556e:	302d                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_mot2, 0);
+80005570:	4581                	li	a1,0
+80005572:	014d07b7          	lui	a5,0x14d0
+80005576:	50878513          	add	a0,a5,1288 # 14d0508 <__SHARE_RAM_segment_end__+0x350508>
+8000557a:	3839                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_mot3, 0);
+8000557c:	4581                	li	a1,0
+8000557e:	014e07b7          	lui	a5,0x14e0
+80005582:	50978513          	add	a0,a5,1289 # 14e0509 <__SHARE_RAM_segment_end__+0x360509>
+80005586:	3809                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_acmp, 0);
+80005588:	4581                	li	a1,0
+8000558a:	014307b7          	lui	a5,0x1430
+8000558e:	50a78513          	add	a0,a5,1290 # 143050a <__SHARE_RAM_segment_end__+0x2b050a>
+80005592:	3019                	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_dao, 0);
+80005594:	4581                	li	a1,0
+80005596:	014907b7          	lui	a5,0x1490
+8000559a:	20178513          	add	a0,a5,513 # 1490201 <__SHARE_RAM_segment_end__+0x310201>
+8000559e:	ffaff0ef          	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_synt, 0);
+800055a2:	4581                	li	a1,0
+800055a4:	014a07b7          	lui	a5,0x14a0
+800055a8:	50c78513          	add	a0,a5,1292 # 14a050c <__SHARE_RAM_segment_end__+0x32050c>
+800055ac:	fecff0ef          	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_lmm0, 0);
+800055b0:	4581                	li	a1,0
+800055b2:	010617b7          	lui	a5,0x1061
+800055b6:	90078513          	add	a0,a5,-1792 # 1060900 <__DLM_segment_end__+0xfa0900>
+800055ba:	fdeff0ef          	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_lmm1, 0);
+800055be:	4581                	li	a1,0
+800055c0:	010717b7          	lui	a5,0x1071
+800055c4:	a0078513          	add	a0,a5,-1536 # 1070a00 <__DLM_segment_end__+0xfb0a00>
+800055c8:	fd0ff0ef          	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_pdm, 0);
+800055cc:	4581                	li	a1,0
+800055ce:	014807b7          	lui	a5,0x1480
+800055d2:	20078513          	add	a0,a5,512 # 1480200 <__SHARE_RAM_segment_end__+0x300200>
+800055d6:	fc2ff0ef          	jal	80004d98 <clock_add_to_group>
+
+    clock_add_to_group(clock_adc0, 0);
+800055da:	4581                	li	a1,0
+800055dc:	013f07b7          	lui	a5,0x13f0
+800055e0:	10078513          	add	a0,a5,256 # 13f0100 <__SHARE_RAM_segment_end__+0x270100>
+800055e4:	fb4ff0ef          	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_adc1, 0);
+800055e8:	4581                	li	a1,0
+800055ea:	014007b7          	lui	a5,0x1400
+800055ee:	10178513          	add	a0,a5,257 # 1400101 <__SHARE_RAM_segment_end__+0x280101>
+800055f2:	fa6ff0ef          	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_adc2, 0);
+800055f6:	4581                	li	a1,0
+800055f8:	014107b7          	lui	a5,0x1410
+800055fc:	10278513          	add	a0,a5,258 # 1410102 <__SHARE_RAM_segment_end__+0x290102>
+80005600:	f98ff0ef          	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_adc3, 0);
+80005604:	4581                	li	a1,0
+80005606:	014207b7          	lui	a5,0x1420
+8000560a:	10378513          	add	a0,a5,259 # 1420103 <__SHARE_RAM_segment_end__+0x2a0103>
+8000560e:	f8aff0ef          	jal	80004d98 <clock_add_to_group>
+
+    clock_add_to_group(clock_i2s0, 0);
+80005612:	4581                	li	a1,0
+80005614:	014407b7          	lui	a5,0x1440
+80005618:	20078513          	add	a0,a5,512 # 1440200 <__SHARE_RAM_segment_end__+0x2c0200>
+8000561c:	f7cff0ef          	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_i2s1, 0);
+80005620:	4581                	li	a1,0
+80005622:	014507b7          	lui	a5,0x1450
+80005626:	20178513          	add	a0,a5,513 # 1450201 <__SHARE_RAM_segment_end__+0x2d0201>
+8000562a:	f6eff0ef          	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_i2s2, 0);
+8000562e:	4581                	li	a1,0
+80005630:	014607b7          	lui	a5,0x1460
+80005634:	20278513          	add	a0,a5,514 # 1460202 <__SHARE_RAM_segment_end__+0x2e0202>
+80005638:	f60ff0ef          	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_i2s3, 0);
+8000563c:	4581                	li	a1,0
+8000563e:	014707b7          	lui	a5,0x1470
+80005642:	20378513          	add	a0,a5,515 # 1470203 <__SHARE_RAM_segment_end__+0x2f0203>
+80005646:	f52ff0ef          	jal	80004d98 <clock_add_to_group>
+    /* Connect Group0 to CPU0 */
+    clock_connect_group_to_cpu(0, 0);
+8000564a:	4581                	li	a1,0
+8000564c:	4501                	li	a0,0
+8000564e:	047020ef          	jal	80007e94 <clock_connect_group_to_cpu>
+
+    /* Add the CPU1 clock to Group1 */
+    clock_add_to_group(clock_mchtmr1, 1);
+80005652:	4585                	li	a1,1
+80005654:	010907b7          	lui	a5,0x1090
+80005658:	00378513          	add	a0,a5,3 # 1090003 <__AXI_SRAM_segment_used_end__+0xeee6>
+8000565c:	f3cff0ef          	jal	80004d98 <clock_add_to_group>
+    clock_add_to_group(clock_mbx1, 1);
+80005660:	4585                	li	a1,1
+80005662:	011507b7          	lui	a5,0x1150
+80005666:	50378513          	add	a0,a5,1283 # 1150503 <__NONCACHEABLE_RAM_segment_end__+0x10503>
+8000566a:	f2eff0ef          	jal	80004d98 <clock_add_to_group>
+    /* Connect Group1 to CPU1 */
+    clock_connect_group_to_cpu(1, 1);
+8000566e:	4585                	li	a1,1
+80005670:	4505                	li	a0,1
+80005672:	023020ef          	jal	80007e94 <clock_connect_group_to_cpu>
+
+    /* Bump up DCDC voltage to 1200mv */
+    pcfg_dcdc_set_voltage(HPM_PCFG, 1200);
+80005676:	4b000593          	li	a1,1200
+8000567a:	f40c4537          	lui	a0,0xf40c4
+8000567e:	68e030ef          	jal	80008d0c <pcfg_dcdc_set_voltage>
+    pcfg_dcdc_switch_to_dcm_mode(HPM_PCFG);
+80005682:	f40c4537          	lui	a0,0xf40c4
+80005686:	fa6ff0ef          	jal	80004e2c <pcfg_dcdc_switch_to_dcm_mode>
+
+    if (status_success != pllctl_init_int_pll_with_freq(HPM_PLLCTL, 0, BOARD_CPU_FREQ)) {
+8000568a:	269fb7b7          	lui	a5,0x269fb
+8000568e:	20078613          	add	a2,a5,512 # 269fb200 <_extram_size+0x249fb200>
+80005692:	4581                	li	a1,0
+80005694:	f4100537          	lui	a0,0xf4100
+80005698:	6a5020ef          	jal	8000853c <pllctl_init_int_pll_with_freq>
+8000569c:	87aa                	mv	a5,a0
+8000569e:	cb91                	beqz	a5,800056b2 <.L134>
+        printf("Failed to set pll0_clk0 to %ldHz\n", BOARD_CPU_FREQ);
+800056a0:	269fb7b7          	lui	a5,0x269fb
+800056a4:	20078593          	add	a1,a5,512 # 269fb200 <_extram_size+0x249fb200>
+800056a8:	f5c18513          	add	a0,gp,-164 # 80003f64 <.LC32>
+800056ac:	535010ef          	jal	800073e0 <printf>
+
+800056b0 <.L135>:
+        while (1) {
+800056b0:	a001                	j	800056b0 <.L135>
+
+800056b2 <.L134>:
+        }
+    }
+
+    clock_set_source_divider(clock_cpu0, clk_src_pll0_clk0, 1);
+800056b2:	4605                	li	a2,1
+800056b4:	4585                	li	a1,1
+800056b6:	4501                	li	a0,0
+800056b8:	e04ff0ef          	jal	80004cbc <clock_set_source_divider>
+    clock_set_source_divider(clock_cpu1, clk_src_pll0_clk0, 1);
+800056bc:	4605                	li	a2,1
+800056be:	4585                	li	a1,1
+800056c0:	000807b7          	lui	a5,0x80
+800056c4:	00278513          	add	a0,a5,2 # 80002 <__AXI_SRAM_segment_size__+0x2>
+800056c8:	df4ff0ef          	jal	80004cbc <clock_set_source_divider>
+    clock_update_core_clock();
+800056cc:	f06ff0ef          	jal	80004dd2 <clock_update_core_clock>
+
+    clock_set_source_divider(clock_ahb, clk_src_pll1_clk1, 2); /*200m hz*/
+800056d0:	4609                	li	a2,2
+800056d2:	458d                	li	a1,3
+800056d4:	010007b7          	lui	a5,0x1000
+800056d8:	00778513          	add	a0,a5,7 # 1000007 <__DLM_segment_end__+0xf40007>
+800056dc:	de0ff0ef          	jal	80004cbc <clock_set_source_divider>
+    clock_set_source_divider(clock_mchtmr0, clk_src_osc24m, 1);
+800056e0:	4605                	li	a2,1
+800056e2:	4581                	li	a1,0
+800056e4:	010807b7          	lui	a5,0x1080
+800056e8:	00178513          	add	a0,a5,1 # 1080001 <__RAL_global_locale+0x1>
+800056ec:	dd0ff0ef          	jal	80004cbc <clock_set_source_divider>
+    clock_set_source_divider(clock_mchtmr1, clk_src_osc24m, 1);
+800056f0:	4605                	li	a2,1
+800056f2:	4581                	li	a1,0
+800056f4:	010907b7          	lui	a5,0x1090
+800056f8:	00378513          	add	a0,a5,3 # 1090003 <__AXI_SRAM_segment_used_end__+0xeee6>
+800056fc:	dc0ff0ef          	jal	80004cbc <clock_set_source_divider>
+}
+80005700:	0001                	nop
+80005702:	40f2                	lw	ra,28(sp)
+80005704:	6105                	add	sp,sp,32
+80005706:	8082                	ret
+
+Disassembly of section .text.board_init_adc_clock:
+
+80005708 <board_init_adc_clock>:
+{
+    init_adc16_pins();
+}
+
+uint32_t board_init_adc_clock(void *ptr, bool clk_src_ahb)
+{
+80005708:	7179                	add	sp,sp,-48
+8000570a:	d606                	sw	ra,44(sp)
+8000570c:	c62a                	sw	a0,12(sp)
+8000570e:	87ae                	mv	a5,a1
+80005710:	00f105a3          	sb	a5,11(sp)
+    uint32_t freq = 0;
+80005714:	ce02                	sw	zero,28(sp)
+
+    if (ptr == (void *)HPM_ADC0) {
+80005716:	4732                	lw	a4,12(sp)
+80005718:	f00107b7          	lui	a5,0xf0010
+8000571c:	04f71363          	bne	a4,a5,80005762 <.L160>
+        if (clk_src_ahb) {
+80005720:	00b14783          	lbu	a5,11(sp)
+80005724:	cb89                	beqz	a5,80005736 <.L161>
+            /* Configure the ADC clock from AHB (@200MHz by default)*/
+            clock_set_adc_source(clock_adc0, clk_adc_src_ahb0);
+80005726:	45c1                	li	a1,16
+80005728:	013f07b7          	lui	a5,0x13f0
+8000572c:	10078513          	add	a0,a5,256 # 13f0100 <__SHARE_RAM_segment_end__+0x270100>
+80005730:	cfeff0ef          	jal	80004c2e <clock_set_adc_source>
+80005734:	a839                	j	80005752 <.L162>
+
+80005736 <.L161>:
+        } else {
+            /* Configure the ADC clock from pll1_clk1 divided by 2 (@200MHz by default) */
+            clock_set_adc_source(clock_adc0, clk_adc_src_ana0);
+80005736:	45c5                	li	a1,17
+80005738:	013f07b7          	lui	a5,0x13f0
+8000573c:	10078513          	add	a0,a5,256 # 13f0100 <__SHARE_RAM_segment_end__+0x270100>
+80005740:	ceeff0ef          	jal	80004c2e <clock_set_adc_source>
+            clock_set_source_divider(clock_ana0, clk_src_pll1_clk1, 2U);
+80005744:	4609                	li	a2,2
+80005746:	458d                	li	a1,3
+80005748:	77c1                	lui	a5,0xffff0
+8000574a:	03078513          	add	a0,a5,48 # ffff0030 <__APB_SRAM_segment_end__+0xbefe030>
+8000574e:	d6eff0ef          	jal	80004cbc <clock_set_source_divider>
+
+80005752 <.L162>:
+        }
+        freq = clock_get_frequency(clock_adc0);
+80005752:	013f07b7          	lui	a5,0x13f0
+80005756:	10078513          	add	a0,a5,256 # 13f0100 <__SHARE_RAM_segment_end__+0x270100>
+8000575a:	990ff0ef          	jal	800048ea <clock_get_frequency>
+8000575e:	ce2a                	sw	a0,28(sp)
+80005760:	a0d5                	j	80005844 <.L163>
+
+80005762 <.L160>:
+    } else if (ptr == (void *)HPM_ADC1) {
+80005762:	4732                	lw	a4,12(sp)
+80005764:	f00147b7          	lui	a5,0xf0014
+80005768:	04f71363          	bne	a4,a5,800057ae <.L164>
+        if (clk_src_ahb) {
+8000576c:	00b14783          	lbu	a5,11(sp)
+80005770:	cb89                	beqz	a5,80005782 <.L165>
+            /* Configure the ADC clock from AHB (@200MHz by default)*/
+            clock_set_adc_source(clock_adc1, clk_adc_src_ahb0);
+80005772:	45c1                	li	a1,16
+80005774:	014007b7          	lui	a5,0x1400
+80005778:	10178513          	add	a0,a5,257 # 1400101 <__SHARE_RAM_segment_end__+0x280101>
+8000577c:	cb2ff0ef          	jal	80004c2e <clock_set_adc_source>
+80005780:	a839                	j	8000579e <.L166>
+
+80005782 <.L165>:
+        } else {
+            /* Configure the ADC clock from pll1_clk1 divided by 2 (@200MHz by default) */
+            clock_set_adc_source(clock_adc1, clk_adc_src_ana1);
+80005782:	45c9                	li	a1,18
+80005784:	014007b7          	lui	a5,0x1400
+80005788:	10178513          	add	a0,a5,257 # 1400101 <__SHARE_RAM_segment_end__+0x280101>
+8000578c:	ca2ff0ef          	jal	80004c2e <clock_set_adc_source>
+            clock_set_source_divider(clock_ana1, clk_src_pll1_clk1, 2U);
+80005790:	4609                	li	a2,2
+80005792:	458d                	li	a1,3
+80005794:	77c1                	lui	a5,0xffff0
+80005796:	03178513          	add	a0,a5,49 # ffff0031 <__APB_SRAM_segment_end__+0xbefe031>
+8000579a:	d22ff0ef          	jal	80004cbc <clock_set_source_divider>
+
+8000579e <.L166>:
+        }
+        freq = clock_get_frequency(clock_adc1);
+8000579e:	014007b7          	lui	a5,0x1400
+800057a2:	10178513          	add	a0,a5,257 # 1400101 <__SHARE_RAM_segment_end__+0x280101>
+800057a6:	944ff0ef          	jal	800048ea <clock_get_frequency>
+800057aa:	ce2a                	sw	a0,28(sp)
+800057ac:	a861                	j	80005844 <.L163>
+
+800057ae <.L164>:
+    } else if (ptr == (void *)HPM_ADC2) {
+800057ae:	4732                	lw	a4,12(sp)
+800057b0:	f00187b7          	lui	a5,0xf0018
+800057b4:	04f71363          	bne	a4,a5,800057fa <.L167>
+        if (clk_src_ahb) {
+800057b8:	00b14783          	lbu	a5,11(sp)
+800057bc:	cb89                	beqz	a5,800057ce <.L168>
+            /* Configure the ADC clock from AHB (@200MHz by default)*/
+            clock_set_adc_source(clock_adc2, clk_adc_src_ahb0);
+800057be:	45c1                	li	a1,16
+800057c0:	014107b7          	lui	a5,0x1410
+800057c4:	10278513          	add	a0,a5,258 # 1410102 <__SHARE_RAM_segment_end__+0x290102>
+800057c8:	c66ff0ef          	jal	80004c2e <clock_set_adc_source>
+800057cc:	a839                	j	800057ea <.L169>
+
+800057ce <.L168>:
+        } else {
+            /* Configure the ADC clock from pll1_clk1 divided by 2 (@200MHz by default) */
+            clock_set_adc_source(clock_adc2, clk_adc_src_ana2);
+800057ce:	45cd                	li	a1,19
+800057d0:	014107b7          	lui	a5,0x1410
+800057d4:	10278513          	add	a0,a5,258 # 1410102 <__SHARE_RAM_segment_end__+0x290102>
+800057d8:	c56ff0ef          	jal	80004c2e <clock_set_adc_source>
+            clock_set_source_divider(clock_ana2, clk_src_pll1_clk1, 2U);
+800057dc:	4609                	li	a2,2
+800057de:	458d                	li	a1,3
+800057e0:	77c1                	lui	a5,0xffff0
+800057e2:	03278513          	add	a0,a5,50 # ffff0032 <__APB_SRAM_segment_end__+0xbefe032>
+800057e6:	cd6ff0ef          	jal	80004cbc <clock_set_source_divider>
+
+800057ea <.L169>:
+        }
+        freq = clock_get_frequency(clock_adc2);
+800057ea:	014107b7          	lui	a5,0x1410
+800057ee:	10278513          	add	a0,a5,258 # 1410102 <__SHARE_RAM_segment_end__+0x290102>
+800057f2:	8f8ff0ef          	jal	800048ea <clock_get_frequency>
+800057f6:	ce2a                	sw	a0,28(sp)
+800057f8:	a0b1                	j	80005844 <.L163>
+
+800057fa <.L167>:
+    } else if (ptr == (void *)HPM_ADC3) {
+800057fa:	4732                	lw	a4,12(sp)
+800057fc:	f001c7b7          	lui	a5,0xf001c
+80005800:	04f71263          	bne	a4,a5,80005844 <.L163>
+        if (clk_src_ahb) {
+80005804:	00b14783          	lbu	a5,11(sp)
+80005808:	cb89                	beqz	a5,8000581a <.L170>
+            /* Configure the ADC clock from AHB (@200MHz by default)*/
+            clock_set_adc_source(clock_adc3, clk_adc_src_ahb0);
+8000580a:	45c1                	li	a1,16
+8000580c:	014207b7          	lui	a5,0x1420
+80005810:	10378513          	add	a0,a5,259 # 1420103 <__SHARE_RAM_segment_end__+0x2a0103>
+80005814:	c1aff0ef          	jal	80004c2e <clock_set_adc_source>
+80005818:	a839                	j	80005836 <.L171>
+
+8000581a <.L170>:
+        } else {
+            /* Configure the ADC clock from pll1_clk1 divided by 2 (@200MHz by default) */
+            clock_set_adc_source(clock_adc3, clk_adc_src_ana2);
+8000581a:	45cd                	li	a1,19
+8000581c:	014207b7          	lui	a5,0x1420
+80005820:	10378513          	add	a0,a5,259 # 1420103 <__SHARE_RAM_segment_end__+0x2a0103>
+80005824:	c0aff0ef          	jal	80004c2e <clock_set_adc_source>
+            clock_set_source_divider(clock_ana2, clk_src_pll1_clk1, 2U);
+80005828:	4609                	li	a2,2
+8000582a:	458d                	li	a1,3
+8000582c:	77c1                	lui	a5,0xffff0
+8000582e:	03278513          	add	a0,a5,50 # ffff0032 <__APB_SRAM_segment_end__+0xbefe032>
+80005832:	c8aff0ef          	jal	80004cbc <clock_set_source_divider>
+
+80005836 <.L171>:
+        }
+        freq = clock_get_frequency(clock_adc3);
+80005836:	014207b7          	lui	a5,0x1420
+8000583a:	10378513          	add	a0,a5,259 # 1420103 <__SHARE_RAM_segment_end__+0x2a0103>
+8000583e:	8acff0ef          	jal	800048ea <clock_get_frequency>
+80005842:	ce2a                	sw	a0,28(sp)
+
+80005844 <.L163>:
+    }
+
+    return freq;
+80005844:	47f2                	lw	a5,28(sp)
+}
+80005846:	853e                	mv	a0,a5
+80005848:	50b2                	lw	ra,44(sp)
+8000584a:	6145                	add	sp,sp,48
+8000584c:	8082                	ret
+
+Disassembly of section .text.uart_default_config:
+
+8000584e <uart_default_config>:
+#ifndef UART_SOC_OVERSAMPLE_MAX
+#define UART_SOC_OVERSAMPLE_MAX HPM_UART_OSC_MAX
+#endif
+
+void uart_default_config(UART_Type *ptr, uart_config_t *config)
+{
+8000584e:	1141                	add	sp,sp,-16
+80005850:	c62a                	sw	a0,12(sp)
+80005852:	c42e                	sw	a1,8(sp)
+    (void) ptr;
+    config->baudrate = 115200;
+80005854:	47a2                	lw	a5,8(sp)
+80005856:	6771                	lui	a4,0x1c
+80005858:	20070713          	add	a4,a4,512 # 1c200 <__AHB_SRAM_segment_size__+0x14200>
+8000585c:	c3d8                	sw	a4,4(a5)
+    config->word_length = word_length_8_bits;
+8000585e:	47a2                	lw	a5,8(sp)
+80005860:	470d                	li	a4,3
+80005862:	00e784a3          	sb	a4,9(a5)
+    config->parity = parity_none;
+80005866:	47a2                	lw	a5,8(sp)
+80005868:	00078523          	sb	zero,10(a5)
+    config->num_of_stop_bits = stop_bits_1;
+8000586c:	47a2                	lw	a5,8(sp)
+8000586e:	00078423          	sb	zero,8(a5)
+    config->fifo_enable = true;
+80005872:	47a2                	lw	a5,8(sp)
+80005874:	4705                	li	a4,1
+80005876:	00e78723          	sb	a4,14(a5)
+    config->rx_fifo_level = uart_rx_fifo_trg_not_empty;
+8000587a:	47a2                	lw	a5,8(sp)
+8000587c:	00078623          	sb	zero,12(a5)
+    config->tx_fifo_level = uart_tx_fifo_trg_not_full;
+80005880:	47a2                	lw	a5,8(sp)
+80005882:	000785a3          	sb	zero,11(a5)
+    config->dma_enable = false;
+80005886:	47a2                	lw	a5,8(sp)
+80005888:	000786a3          	sb	zero,13(a5)
+    config->modem_config.auto_flow_ctrl_en = false;
+8000588c:	47a2                	lw	a5,8(sp)
+8000588e:	000787a3          	sb	zero,15(a5)
+    config->modem_config.loop_back_en = false;
+80005892:	47a2                	lw	a5,8(sp)
+80005894:	00078823          	sb	zero,16(a5)
+    config->modem_config.set_rts_high = false;
+80005898:	47a2                	lw	a5,8(sp)
+8000589a:	000788a3          	sb	zero,17(a5)
+    config->txidle_config.threshold = 10; /* 10-bit for typical UART configuration (8-N-1) */
+#endif
+#if defined(HPM_IP_FEATURE_UART_RX_EN) && (HPM_IP_FEATURE_UART_RX_EN == 1)
+    config->rx_enable = true;
+#endif
+}
+8000589e:	0001                	nop
+800058a0:	0141                	add	sp,sp,16
+800058a2:	8082                	ret
+
+Disassembly of section .text.uart_calculate_baudrate:
+
+800058a4 <uart_calculate_baudrate>:
+
+static bool uart_calculate_baudrate(uint32_t freq, uint32_t baudrate, uint16_t *div_out, uint8_t *osc_out)
+{
+800058a4:	7179                	add	sp,sp,-48
+800058a6:	d606                	sw	ra,44(sp)
+800058a8:	d422                	sw	s0,40(sp)
+800058aa:	c62a                	sw	a0,12(sp)
+800058ac:	c42e                	sw	a1,8(sp)
+800058ae:	c232                	sw	a2,4(sp)
+800058b0:	c036                	sw	a3,0(sp)
+    uint16_t div, osc, delta;
+    float tmp;
+    if ((div_out == NULL) || (!freq) || (!baudrate)
+800058b2:	4792                	lw	a5,4(sp)
+800058b4:	cb85                	beqz	a5,800058e4 <.L4>
+800058b6:	47b2                	lw	a5,12(sp)
+800058b8:	c795                	beqz	a5,800058e4 <.L4>
+800058ba:	47a2                	lw	a5,8(sp)
+800058bc:	c785                	beqz	a5,800058e4 <.L4>
+            || (baudrate < HPM_UART_MINIMUM_BAUDRATE)
+800058be:	4722                	lw	a4,8(sp)
+800058c0:	0c700793          	li	a5,199
+800058c4:	02e7f063          	bgeu	a5,a4,800058e4 <.L4>
+            || (freq / HPM_UART_BAUDRATE_DIV_MIN < baudrate * HPM_UART_OSC_MIN)
+800058c8:	47a2                	lw	a5,8(sp)
+800058ca:	078e                	sll	a5,a5,0x3
+800058cc:	4732                	lw	a4,12(sp)
+800058ce:	00f76b63          	bltu	a4,a5,800058e4 <.L4>
+            || (freq / HPM_UART_BAUDRATE_DIV_MAX > (baudrate * HPM_UART_OSC_MAX))) {
+800058d2:	4732                	lw	a4,12(sp)
+800058d4:	67c1                	lui	a5,0x10
+800058d6:	17fd                	add	a5,a5,-1 # ffff <__AHB_SRAM_segment_size__+0x7fff>
+800058d8:	02f75733          	divu	a4,a4,a5
+800058dc:	47a2                	lw	a5,8(sp)
+800058de:	0796                	sll	a5,a5,0x5
+800058e0:	00e7f463          	bgeu	a5,a4,800058e8 <.L5>
+
+800058e4 <.L4>:
+        return 0;
+800058e4:	4781                	li	a5,0
+800058e6:	aa8d                	j	80005a58 <.L6>
+
+800058e8 <.L5>:
+    }
+
+    tmp = (float) freq / baudrate;
+800058e8:	4532                	lw	a0,12(sp)
+800058ea:	673000ef          	jal	8000675c <__floatunsisf>
+800058ee:	842a                	mv	s0,a0
+800058f0:	4522                	lw	a0,8(sp)
+800058f2:	66b000ef          	jal	8000675c <__floatunsisf>
+800058f6:	87aa                	mv	a5,a0
+800058f8:	85be                	mv	a1,a5
+800058fa:	8522                	mv	a0,s0
+800058fc:	30d030ef          	jal	80009408 <__divsf3>
+80005900:	87aa                	mv	a5,a0
+80005902:	cc3e                	sw	a5,24(sp)
+
+    for (osc = HPM_UART_OSC_MIN; osc <= UART_SOC_OVERSAMPLE_MAX; osc += 2) {
+80005904:	47a1                	li	a5,8
+80005906:	00f11f23          	sh	a5,30(sp)
+8000590a:	a281                	j	80005a4a <.L7>
+
+8000590c <.L18>:
+        /* osc range: HPM_UART_OSC_MIN - UART_SOC_OVERSAMPLE_MAX, even number */
+        delta = 0;
+8000590c:	00011e23          	sh	zero,28(sp)
+        div = (uint16_t)(tmp / osc);
+80005910:	01e15783          	lhu	a5,30(sp)
+80005914:	853e                	mv	a0,a5
+80005916:	5e1000ef          	jal	800066f6 <__floatsisf>
+8000591a:	87aa                	mv	a5,a0
+8000591c:	85be                	mv	a1,a5
+8000591e:	4562                	lw	a0,24(sp)
+80005920:	2e9030ef          	jal	80009408 <__divsf3>
+80005924:	87aa                	mv	a5,a0
+80005926:	853e                	mv	a0,a5
+80005928:	56b000ef          	jal	80006692 <__fixunssfsi>
+8000592c:	87aa                	mv	a5,a0
+8000592e:	00f11b23          	sh	a5,22(sp)
+        if (div < HPM_UART_BAUDRATE_DIV_MIN) {
+80005932:	01615783          	lhu	a5,22(sp)
+80005936:	10078263          	beqz	a5,80005a3a <.L22>
+            /* invalid div */
+            continue;
+        }
+        if (div * osc > tmp) {
+8000593a:	01615703          	lhu	a4,22(sp)
+8000593e:	01e15783          	lhu	a5,30(sp)
+80005942:	02f707b3          	mul	a5,a4,a5
+80005946:	853e                	mv	a0,a5
+80005948:	5af000ef          	jal	800066f6 <__floatsisf>
+8000594c:	87aa                	mv	a5,a0
+8000594e:	85be                	mv	a1,a5
+80005950:	4562                	lw	a0,24(sp)
+80005952:	461000ef          	jal	800065b2 <__ltsf2>
+80005956:	87aa                	mv	a5,a0
+80005958:	0207d863          	bgez	a5,80005988 <.L21>
+            delta = (uint16_t)(div * osc - tmp);
+8000595c:	01615703          	lhu	a4,22(sp)
+80005960:	01e15783          	lhu	a5,30(sp)
+80005964:	02f707b3          	mul	a5,a4,a5
+80005968:	853e                	mv	a0,a5
+8000596a:	58d000ef          	jal	800066f6 <__floatsisf>
+8000596e:	87aa                	mv	a5,a0
+80005970:	45e2                	lw	a1,24(sp)
+80005972:	853e                	mv	a0,a5
+80005974:	289000ef          	jal	800063fc <__subsf3>
+80005978:	87aa                	mv	a5,a0
+8000597a:	853e                	mv	a0,a5
+8000597c:	517000ef          	jal	80006692 <__fixunssfsi>
+80005980:	87aa                	mv	a5,a0
+80005982:	00f11e23          	sh	a5,28(sp)
+80005986:	a0b9                	j	800059d4 <.L12>
+
+80005988 <.L21>:
+        } else if (div * osc < tmp) {
+80005988:	01615703          	lhu	a4,22(sp)
+8000598c:	01e15783          	lhu	a5,30(sp)
+80005990:	02f707b3          	mul	a5,a4,a5
+80005994:	853e                	mv	a0,a5
+80005996:	561000ef          	jal	800066f6 <__floatsisf>
+8000599a:	87aa                	mv	a5,a0
+8000599c:	85be                	mv	a1,a5
+8000599e:	4562                	lw	a0,24(sp)
+800059a0:	483000ef          	jal	80006622 <__gtsf2>
+800059a4:	87aa                	mv	a5,a0
+800059a6:	02f05763          	blez	a5,800059d4 <.L12>
+            delta = (uint16_t)(tmp - div * osc);
+800059aa:	01615703          	lhu	a4,22(sp)
+800059ae:	01e15783          	lhu	a5,30(sp)
+800059b2:	02f707b3          	mul	a5,a4,a5
+800059b6:	853e                	mv	a0,a5
+800059b8:	53f000ef          	jal	800066f6 <__floatsisf>
+800059bc:	87aa                	mv	a5,a0
+800059be:	85be                	mv	a1,a5
+800059c0:	4562                	lw	a0,24(sp)
+800059c2:	23b000ef          	jal	800063fc <__subsf3>
+800059c6:	87aa                	mv	a5,a0
+800059c8:	853e                	mv	a0,a5
+800059ca:	4c9000ef          	jal	80006692 <__fixunssfsi>
+800059ce:	87aa                	mv	a5,a0
+800059d0:	00f11e23          	sh	a5,28(sp)
+
+800059d4 <.L12>:
+        }
+        if (delta && ((delta * 100 / tmp) > HPM_UART_BAUDRATE_TOLERANCE)) {
+800059d4:	01c15783          	lhu	a5,28(sp)
+800059d8:	cb9d                	beqz	a5,80005a0e <.L14>
+800059da:	01c15703          	lhu	a4,28(sp)
+800059de:	06400793          	li	a5,100
+800059e2:	02f707b3          	mul	a5,a4,a5
+800059e6:	853e                	mv	a0,a5
+800059e8:	50f000ef          	jal	800066f6 <__floatsisf>
+800059ec:	87aa                	mv	a5,a0
+800059ee:	45e2                	lw	a1,24(sp)
+800059f0:	853e                	mv	a0,a5
+800059f2:	217030ef          	jal	80009408 <__divsf3>
+800059f6:	87aa                	mv	a5,a0
+800059f8:	873e                	mv	a4,a5
+800059fa:	800037b7          	lui	a5,0x80003
+800059fe:	25c7a583          	lw	a1,604(a5) # 8000325c <.LC0>
+80005a02:	853a                	mv	a0,a4
+80005a04:	41f000ef          	jal	80006622 <__gtsf2>
+80005a08:	87aa                	mv	a5,a0
+80005a0a:	02f04a63          	bgtz	a5,80005a3e <.L23>
+
+80005a0e <.L14>:
+            continue;
+        } else {
+            *div_out = div;
+80005a0e:	4792                	lw	a5,4(sp)
+80005a10:	01615703          	lhu	a4,22(sp)
+80005a14:	00e79023          	sh	a4,0(a5)
+            *osc_out = (osc == HPM_UART_OSC_MAX) ? 0 : osc; /* osc == 0 in bitfield, oversample rate is 32 */
+80005a18:	01e15703          	lhu	a4,30(sp)
+80005a1c:	02000793          	li	a5,32
+80005a20:	00f70763          	beq	a4,a5,80005a2e <.L16>
+80005a24:	01e15783          	lhu	a5,30(sp)
+80005a28:	0ff7f793          	zext.b	a5,a5
+80005a2c:	a011                	j	80005a30 <.L17>
+
+80005a2e <.L16>:
+80005a2e:	4781                	li	a5,0
+
+80005a30 <.L17>:
+80005a30:	4702                	lw	a4,0(sp)
+80005a32:	00f70023          	sb	a5,0(a4)
+            return true;
+80005a36:	4785                	li	a5,1
+80005a38:	a005                	j	80005a58 <.L6>
+
+80005a3a <.L22>:
+            continue;
+80005a3a:	0001                	nop
+80005a3c:	a011                	j	80005a40 <.L9>
+
+80005a3e <.L23>:
+            continue;
+80005a3e:	0001                	nop
+
+80005a40 <.L9>:
+    for (osc = HPM_UART_OSC_MIN; osc <= UART_SOC_OVERSAMPLE_MAX; osc += 2) {
+80005a40:	01e15783          	lhu	a5,30(sp)
+80005a44:	0789                	add	a5,a5,2
+80005a46:	00f11f23          	sh	a5,30(sp)
+
+80005a4a <.L7>:
+80005a4a:	01e15703          	lhu	a4,30(sp)
+80005a4e:	02000793          	li	a5,32
+80005a52:	eae7fde3          	bgeu	a5,a4,8000590c <.L18>
+        }
+    }
+    return false;
+80005a56:	4781                	li	a5,0
+
+80005a58 <.L6>:
+}
+80005a58:	853e                	mv	a0,a5
+80005a5a:	50b2                	lw	ra,44(sp)
+80005a5c:	5422                	lw	s0,40(sp)
+80005a5e:	6145                	add	sp,sp,48
+80005a60:	8082                	ret
+
+Disassembly of section .text.uart_send_byte:
+
+80005a62 <uart_send_byte>:
+
+    return status_success;
+}
+
+hpm_stat_t uart_send_byte(UART_Type *ptr, uint8_t c)
+{
+80005a62:	1101                	add	sp,sp,-32
+80005a64:	c62a                	sw	a0,12(sp)
+80005a66:	87ae                	mv	a5,a1
+80005a68:	00f105a3          	sb	a5,11(sp)
+    uint32_t retry = 0;
+80005a6c:	ce02                	sw	zero,28(sp)
+
+    while (!(ptr->LSR & UART_LSR_THRE_MASK)) {
+80005a6e:	a811                	j	80005a82 <.L49>
+
+80005a70 <.L52>:
+        if (retry > HPM_UART_DRV_RETRY_COUNT) {
+80005a70:	4772                	lw	a4,28(sp)
+80005a72:	6785                	lui	a5,0x1
+80005a74:	38878793          	add	a5,a5,904 # 1388 <__AXI_SRAM_segment_used_size__+0x26b>
+80005a78:	00e7eb63          	bltu	a5,a4,80005a8e <.L55>
+            break;
+        }
+        retry++;
+80005a7c:	47f2                	lw	a5,28(sp)
+80005a7e:	0785                	add	a5,a5,1
+80005a80:	ce3e                	sw	a5,28(sp)
+
+80005a82 <.L49>:
+    while (!(ptr->LSR & UART_LSR_THRE_MASK)) {
+80005a82:	47b2                	lw	a5,12(sp)
+80005a84:	5bdc                	lw	a5,52(a5)
+80005a86:	0207f793          	and	a5,a5,32
+80005a8a:	d3fd                	beqz	a5,80005a70 <.L52>
+80005a8c:	a011                	j	80005a90 <.L51>
+
+80005a8e <.L55>:
+            break;
+80005a8e:	0001                	nop
+
+80005a90 <.L51>:
+    }
+
+    if (retry > HPM_UART_DRV_RETRY_COUNT) {
+80005a90:	4772                	lw	a4,28(sp)
+80005a92:	6785                	lui	a5,0x1
+80005a94:	38878793          	add	a5,a5,904 # 1388 <__AXI_SRAM_segment_used_size__+0x26b>
+80005a98:	00e7f463          	bgeu	a5,a4,80005aa0 <.L53>
+        return status_timeout;
+80005a9c:	478d                	li	a5,3
+80005a9e:	a031                	j	80005aaa <.L54>
+
+80005aa0 <.L53>:
+    }
+
+    ptr->THR = UART_THR_THR_SET(c);
+80005aa0:	00b14703          	lbu	a4,11(sp)
+80005aa4:	47b2                	lw	a5,12(sp)
+80005aa6:	d398                	sw	a4,32(a5)
+    return status_success;
+80005aa8:	4781                	li	a5,0
+
+80005aaa <.L54>:
+}
+80005aaa:	853e                	mv	a0,a5
+80005aac:	6105                	add	sp,sp,32
+80005aae:	8082                	ret
+
+Disassembly of section .text.uart_receive_byte:
+
+80005ab0 <uart_receive_byte>:
+
+    return status_success;
+}
+
+hpm_stat_t uart_receive_byte(UART_Type *ptr, uint8_t *byte)
+{
+80005ab0:	1101                	add	sp,sp,-32
+80005ab2:	c62a                	sw	a0,12(sp)
+80005ab4:	c42e                	sw	a1,8(sp)
+    uint32_t retry = 0;
+80005ab6:	ce02                	sw	zero,28(sp)
+
+    while (!(ptr->LSR & UART_LSR_DR_MASK)) {
+80005ab8:	a811                	j	80005acc <.L65>
+
+80005aba <.L68>:
+        if (retry > HPM_UART_DRV_RETRY_COUNT) {
+80005aba:	4772                	lw	a4,28(sp)
+80005abc:	6785                	lui	a5,0x1
+80005abe:	38878793          	add	a5,a5,904 # 1388 <__AXI_SRAM_segment_used_size__+0x26b>
+80005ac2:	00e7ea63          	bltu	a5,a4,80005ad6 <.L71>
+            break;
+        }
+        retry++;
+80005ac6:	47f2                	lw	a5,28(sp)
+80005ac8:	0785                	add	a5,a5,1
+80005aca:	ce3e                	sw	a5,28(sp)
+
+80005acc <.L65>:
+    while (!(ptr->LSR & UART_LSR_DR_MASK)) {
+80005acc:	47b2                	lw	a5,12(sp)
+80005ace:	5bdc                	lw	a5,52(a5)
+80005ad0:	8b85                	and	a5,a5,1
+80005ad2:	d7e5                	beqz	a5,80005aba <.L68>
+80005ad4:	a011                	j	80005ad8 <.L67>
+
+80005ad6 <.L71>:
+            break;
+80005ad6:	0001                	nop
+
+80005ad8 <.L67>:
+    }
+
+    if (retry > HPM_UART_DRV_RETRY_COUNT) {
+80005ad8:	4772                	lw	a4,28(sp)
+80005ada:	6785                	lui	a5,0x1
+80005adc:	38878793          	add	a5,a5,904 # 1388 <__AXI_SRAM_segment_used_size__+0x26b>
+80005ae0:	00e7f463          	bgeu	a5,a4,80005ae8 <.L69>
+        return status_timeout;
+80005ae4:	478d                	li	a5,3
+80005ae6:	a809                	j	80005af8 <.L70>
+
+80005ae8 <.L69>:
+    }
+
+    *byte = ptr->RBR & UART_RBR_RBR_MASK;
+80005ae8:	47b2                	lw	a5,12(sp)
+80005aea:	539c                	lw	a5,32(a5)
+80005aec:	0ff7f713          	zext.b	a4,a5
+80005af0:	47a2                	lw	a5,8(sp)
+80005af2:	00e78023          	sb	a4,0(a5)
+    return status_success;
+80005af6:	4781                	li	a5,0
+
+80005af8 <.L70>:
+}
+80005af8:	853e                	mv	a0,a5
+80005afa:	6105                	add	sp,sp,32
+80005afc:	8082                	ret
+
+Disassembly of section .text.read_pmp_cfg:
+
+80005afe <read_pmp_cfg>:
+ */
+#include "hpm_pmp_drv.h"
+#include "hpm_csr_drv.h"
+
+uint32_t read_pmp_cfg(uint32_t idx)
+{
+80005afe:	7179                	add	sp,sp,-48
+80005b00:	c62a                	sw	a0,12(sp)
+    uint32_t pmp_cfg = 0;
+80005b02:	d602                	sw	zero,44(sp)
+    switch (idx) {
+80005b04:	4732                	lw	a4,12(sp)
+80005b06:	478d                	li	a5,3
+80005b08:	04f70763          	beq	a4,a5,80005b56 <.L2>
+80005b0c:	4732                	lw	a4,12(sp)
+80005b0e:	478d                	li	a5,3
+80005b10:	04e7e963          	bltu	a5,a4,80005b62 <.L9>
+80005b14:	4732                	lw	a4,12(sp)
+80005b16:	4789                	li	a5,2
+80005b18:	02f70963          	beq	a4,a5,80005b4a <.L4>
+80005b1c:	4732                	lw	a4,12(sp)
+80005b1e:	4789                	li	a5,2
+80005b20:	04e7e163          	bltu	a5,a4,80005b62 <.L9>
+80005b24:	47b2                	lw	a5,12(sp)
+80005b26:	c791                	beqz	a5,80005b32 <.L5>
+80005b28:	4732                	lw	a4,12(sp)
+80005b2a:	4785                	li	a5,1
+80005b2c:	00f70963          	beq	a4,a5,80005b3e <.L6>
+    case 3:
+        pmp_cfg = read_csr(CSR_PMPCFG3);
+        break;
+    default:
+        /* Do nothing */
+        break;
+80005b30:	a80d                	j	80005b62 <.L9>
+
+80005b32 <.L5>:
+        pmp_cfg = read_csr(CSR_PMPCFG0);
+80005b32:	3a0027f3          	csrr	a5,pmpcfg0
+80005b36:	ce3e                	sw	a5,28(sp)
+80005b38:	47f2                	lw	a5,28(sp)
+
+80005b3a <.LBE2>:
+80005b3a:	d63e                	sw	a5,44(sp)
+        break;
+80005b3c:	a025                	j	80005b64 <.L7>
+
+80005b3e <.L6>:
+        pmp_cfg = read_csr(CSR_PMPCFG1);
+80005b3e:	3a1027f3          	csrr	a5,pmpcfg1
+80005b42:	d03e                	sw	a5,32(sp)
+80005b44:	5782                	lw	a5,32(sp)
+
+80005b46 <.LBE3>:
+80005b46:	d63e                	sw	a5,44(sp)
+        break;
+80005b48:	a831                	j	80005b64 <.L7>
+
+80005b4a <.L4>:
+        pmp_cfg = read_csr(CSR_PMPCFG2);
+80005b4a:	3a2027f3          	csrr	a5,pmpcfg2
+80005b4e:	d23e                	sw	a5,36(sp)
+80005b50:	5792                	lw	a5,36(sp)
+
+80005b52 <.LBE4>:
+80005b52:	d63e                	sw	a5,44(sp)
+        break;
+80005b54:	a801                	j	80005b64 <.L7>
+
+80005b56 <.L2>:
+        pmp_cfg = read_csr(CSR_PMPCFG3);
+80005b56:	3a3027f3          	csrr	a5,pmpcfg3
+80005b5a:	d43e                	sw	a5,40(sp)
+80005b5c:	57a2                	lw	a5,40(sp)
+
+80005b5e <.LBE5>:
+80005b5e:	d63e                	sw	a5,44(sp)
+        break;
+80005b60:	a011                	j	80005b64 <.L7>
+
+80005b62 <.L9>:
+        break;
+80005b62:	0001                	nop
+
+80005b64 <.L7>:
+    }
+    return pmp_cfg;
+80005b64:	57b2                	lw	a5,44(sp)
+}
+80005b66:	853e                	mv	a0,a5
+80005b68:	6145                	add	sp,sp,48
+80005b6a:	8082                	ret
+
+Disassembly of section .text.write_pmp_addr:
+
+80005b6c <write_pmp_addr>:
+        break;
+    }
+}
+
+void write_pmp_addr(uint32_t value, uint32_t idx)
+{
+80005b6c:	1141                	add	sp,sp,-16
+80005b6e:	c62a                	sw	a0,12(sp)
+80005b70:	c42e                	sw	a1,8(sp)
+    switch (idx) {
+80005b72:	4722                	lw	a4,8(sp)
+80005b74:	47bd                	li	a5,15
+80005b76:	08e7ec63          	bltu	a5,a4,80005c0e <.L38>
+80005b7a:	47a2                	lw	a5,8(sp)
+80005b7c:	00279713          	sll	a4,a5,0x2
+80005b80:	800037b7          	lui	a5,0x80003
+80005b84:	26078793          	add	a5,a5,608 # 80003260 <.L21>
+80005b88:	97ba                	add	a5,a5,a4
+80005b8a:	439c                	lw	a5,0(a5)
+80005b8c:	8782                	jr	a5
+
+80005b8e <.L36>:
+    case 0:
+        write_csr(CSR_PMPADDR0, value);
+80005b8e:	47b2                	lw	a5,12(sp)
+80005b90:	3b079073          	csrw	pmpaddr0,a5
+        break;
+80005b94:	a8b5                	j	80005c10 <.L37>
+
+80005b96 <.L35>:
+    case 1:
+        write_csr(CSR_PMPADDR1, value);
+80005b96:	47b2                	lw	a5,12(sp)
+80005b98:	3b179073          	csrw	pmpaddr1,a5
+        break;
+80005b9c:	a895                	j	80005c10 <.L37>
+
+80005b9e <.L34>:
+    case 2:
+        write_csr(CSR_PMPADDR2, value);
+80005b9e:	47b2                	lw	a5,12(sp)
+80005ba0:	3b279073          	csrw	pmpaddr2,a5
+        break;
+80005ba4:	a0b5                	j	80005c10 <.L37>
+
+80005ba6 <.L33>:
+    case 3:
+        write_csr(CSR_PMPADDR3, value);
+80005ba6:	47b2                	lw	a5,12(sp)
+80005ba8:	3b379073          	csrw	pmpaddr3,a5
+        break;
+80005bac:	a095                	j	80005c10 <.L37>
+
+80005bae <.L32>:
+    case 4:
+        write_csr(CSR_PMPADDR4, value);
+80005bae:	47b2                	lw	a5,12(sp)
+80005bb0:	3b479073          	csrw	pmpaddr4,a5
+        break;
+80005bb4:	a8b1                	j	80005c10 <.L37>
+
+80005bb6 <.L31>:
+    case 5:
+        write_csr(CSR_PMPADDR5, value);
+80005bb6:	47b2                	lw	a5,12(sp)
+80005bb8:	3b579073          	csrw	pmpaddr5,a5
+        break;
+80005bbc:	a891                	j	80005c10 <.L37>
+
+80005bbe <.L30>:
+    case 6:
+        write_csr(CSR_PMPADDR6, value);
+80005bbe:	47b2                	lw	a5,12(sp)
+80005bc0:	3b679073          	csrw	pmpaddr6,a5
+        break;
+80005bc4:	a0b1                	j	80005c10 <.L37>
+
+80005bc6 <.L29>:
+    case 7:
+        write_csr(CSR_PMPADDR7, value);
+80005bc6:	47b2                	lw	a5,12(sp)
+80005bc8:	3b779073          	csrw	pmpaddr7,a5
+        break;
+80005bcc:	a091                	j	80005c10 <.L37>
+
+80005bce <.L28>:
+    case 8:
+        write_csr(CSR_PMPADDR8, value);
+80005bce:	47b2                	lw	a5,12(sp)
+80005bd0:	3b879073          	csrw	pmpaddr8,a5
+        break;
+80005bd4:	a835                	j	80005c10 <.L37>
+
+80005bd6 <.L27>:
+    case 9:
+        write_csr(CSR_PMPADDR9, value);
+80005bd6:	47b2                	lw	a5,12(sp)
+80005bd8:	3b979073          	csrw	pmpaddr9,a5
+        break;
+80005bdc:	a815                	j	80005c10 <.L37>
+
+80005bde <.L26>:
+    case 10:
+        write_csr(CSR_PMPADDR10, value);
+80005bde:	47b2                	lw	a5,12(sp)
+80005be0:	3ba79073          	csrw	pmpaddr10,a5
+        break;
+80005be4:	a035                	j	80005c10 <.L37>
+
+80005be6 <.L25>:
+    case 11:
+        write_csr(CSR_PMPADDR11, value);
+80005be6:	47b2                	lw	a5,12(sp)
+80005be8:	3bb79073          	csrw	pmpaddr11,a5
+        break;
+80005bec:	a015                	j	80005c10 <.L37>
+
+80005bee <.L24>:
+    case 12:
+        write_csr(CSR_PMPADDR12, value);
+80005bee:	47b2                	lw	a5,12(sp)
+80005bf0:	3bc79073          	csrw	pmpaddr12,a5
+        break;
+80005bf4:	a831                	j	80005c10 <.L37>
+
+80005bf6 <.L23>:
+    case 13:
+        write_csr(CSR_PMPADDR13, value);
+80005bf6:	47b2                	lw	a5,12(sp)
+80005bf8:	3bd79073          	csrw	pmpaddr13,a5
+        break;
+80005bfc:	a811                	j	80005c10 <.L37>
+
+80005bfe <.L22>:
+    case 14:
+        write_csr(CSR_PMPADDR14, value);
+80005bfe:	47b2                	lw	a5,12(sp)
+80005c00:	3be79073          	csrw	pmpaddr14,a5
+        break;
+80005c04:	a031                	j	80005c10 <.L37>
+
+80005c06 <.L20>:
+    case 15:
+        write_csr(CSR_PMPADDR15, value);
+80005c06:	47b2                	lw	a5,12(sp)
+80005c08:	3bf79073          	csrw	pmpaddr15,a5
+        break;
+80005c0c:	a011                	j	80005c10 <.L37>
+
+80005c0e <.L38>:
+    default:
+        /* Do nothing */
+        break;
+80005c0e:	0001                	nop
+
+80005c10 <.L37>:
+    }
+}
+80005c10:	0001                	nop
+80005c12:	0141                	add	sp,sp,16
+80005c14:	8082                	ret
+
+Disassembly of section .text.read_pma_cfg:
+
+80005c16 <read_pma_cfg>:
+    return ret_val;
+}
+
+#if (!defined(PMP_SUPPORT_PMA)) || (defined(PMP_SUPPORT_PMA) && (PMP_SUPPORT_PMA == 1))
+uint32_t read_pma_cfg(uint32_t idx)
+{
+80005c16:	7179                	add	sp,sp,-48
+80005c18:	c62a                	sw	a0,12(sp)
+    uint32_t pma_cfg = 0;
+80005c1a:	d602                	sw	zero,44(sp)
+    switch (idx) {
+80005c1c:	4732                	lw	a4,12(sp)
+80005c1e:	478d                	li	a5,3
+80005c20:	04f70763          	beq	a4,a5,80005c6e <.L62>
+80005c24:	4732                	lw	a4,12(sp)
+80005c26:	478d                	li	a5,3
+80005c28:	04e7e963          	bltu	a5,a4,80005c7a <.L69>
+80005c2c:	4732                	lw	a4,12(sp)
+80005c2e:	4789                	li	a5,2
+80005c30:	02f70963          	beq	a4,a5,80005c62 <.L64>
+80005c34:	4732                	lw	a4,12(sp)
+80005c36:	4789                	li	a5,2
+80005c38:	04e7e163          	bltu	a5,a4,80005c7a <.L69>
+80005c3c:	47b2                	lw	a5,12(sp)
+80005c3e:	c791                	beqz	a5,80005c4a <.L65>
+80005c40:	4732                	lw	a4,12(sp)
+80005c42:	4785                	li	a5,1
+80005c44:	00f70963          	beq	a4,a5,80005c56 <.L66>
+    case 3:
+        pma_cfg = read_csr(CSR_PMACFG3);
+        break;
+    default:
+        /* Do nothing */
+        break;
+80005c48:	a80d                	j	80005c7a <.L69>
+
+80005c4a <.L65>:
+        pma_cfg = read_csr(CSR_PMACFG0);
+80005c4a:	bc0027f3          	csrr	a5,0xbc0
+80005c4e:	ce3e                	sw	a5,28(sp)
+80005c50:	47f2                	lw	a5,28(sp)
+
+80005c52 <.LBE22>:
+80005c52:	d63e                	sw	a5,44(sp)
+        break;
+80005c54:	a025                	j	80005c7c <.L67>
+
+80005c56 <.L66>:
+        pma_cfg = read_csr(CSR_PMACFG1);
+80005c56:	bc1027f3          	csrr	a5,0xbc1
+80005c5a:	d03e                	sw	a5,32(sp)
+80005c5c:	5782                	lw	a5,32(sp)
+
+80005c5e <.LBE23>:
+80005c5e:	d63e                	sw	a5,44(sp)
+        break;
+80005c60:	a831                	j	80005c7c <.L67>
+
+80005c62 <.L64>:
+        pma_cfg = read_csr(CSR_PMACFG2);
+80005c62:	bc2027f3          	csrr	a5,0xbc2
+80005c66:	d23e                	sw	a5,36(sp)
+80005c68:	5792                	lw	a5,36(sp)
+
+80005c6a <.LBE24>:
+80005c6a:	d63e                	sw	a5,44(sp)
+        break;
+80005c6c:	a801                	j	80005c7c <.L67>
+
+80005c6e <.L62>:
+        pma_cfg = read_csr(CSR_PMACFG3);
+80005c6e:	bc3027f3          	csrr	a5,0xbc3
+80005c72:	d43e                	sw	a5,40(sp)
+80005c74:	57a2                	lw	a5,40(sp)
+
+80005c76 <.LBE25>:
+80005c76:	d63e                	sw	a5,44(sp)
+        break;
+80005c78:	a011                	j	80005c7c <.L67>
+
+80005c7a <.L69>:
+        break;
+80005c7a:	0001                	nop
+
+80005c7c <.L67>:
+    }
+    return pma_cfg;
+80005c7c:	57b2                	lw	a5,44(sp)
+}
+80005c7e:	853e                	mv	a0,a5
+80005c80:	6145                	add	sp,sp,48
+80005c82:	8082                	ret
+
+Disassembly of section .text.write_pma_addr:
+
+80005c84 <write_pma_addr>:
+        /* Do nothing */
+        break;
+    }
+}
+void write_pma_addr(uint32_t value, uint32_t idx)
+{
+80005c84:	1141                	add	sp,sp,-16
+80005c86:	c62a                	sw	a0,12(sp)
+80005c88:	c42e                	sw	a1,8(sp)
+    switch (idx) {
+80005c8a:	4722                	lw	a4,8(sp)
+80005c8c:	47bd                	li	a5,15
+80005c8e:	08e7ec63          	bltu	a5,a4,80005d26 <.L98>
+80005c92:	47a2                	lw	a5,8(sp)
+80005c94:	00279713          	sll	a4,a5,0x2
+80005c98:	800037b7          	lui	a5,0x80003
+80005c9c:	2a078793          	add	a5,a5,672 # 800032a0 <.L81>
+80005ca0:	97ba                	add	a5,a5,a4
+80005ca2:	439c                	lw	a5,0(a5)
+80005ca4:	8782                	jr	a5
+
+80005ca6 <.L96>:
+    case 0:
+        write_csr(CSR_PMAADDR0, value);
+80005ca6:	47b2                	lw	a5,12(sp)
+80005ca8:	bd079073          	csrw	0xbd0,a5
+        break;
+80005cac:	a8b5                	j	80005d28 <.L97>
+
+80005cae <.L95>:
+    case 1:
+        write_csr(CSR_PMAADDR1, value);
+80005cae:	47b2                	lw	a5,12(sp)
+80005cb0:	bd179073          	csrw	0xbd1,a5
+        break;
+80005cb4:	a895                	j	80005d28 <.L97>
+
+80005cb6 <.L94>:
+    case 2:
+        write_csr(CSR_PMAADDR2, value);
+80005cb6:	47b2                	lw	a5,12(sp)
+80005cb8:	bd279073          	csrw	0xbd2,a5
+        break;
+80005cbc:	a0b5                	j	80005d28 <.L97>
+
+80005cbe <.L93>:
+    case 3:
+        write_csr(CSR_PMAADDR3, value);
+80005cbe:	47b2                	lw	a5,12(sp)
+80005cc0:	bd379073          	csrw	0xbd3,a5
+        break;
+80005cc4:	a095                	j	80005d28 <.L97>
+
+80005cc6 <.L92>:
+    case 4:
+        write_csr(CSR_PMAADDR4, value);
+80005cc6:	47b2                	lw	a5,12(sp)
+80005cc8:	bd479073          	csrw	0xbd4,a5
+        break;
+80005ccc:	a8b1                	j	80005d28 <.L97>
+
+80005cce <.L91>:
+    case 5:
+        write_csr(CSR_PMAADDR5, value);
+80005cce:	47b2                	lw	a5,12(sp)
+80005cd0:	bd579073          	csrw	0xbd5,a5
+        break;
+80005cd4:	a891                	j	80005d28 <.L97>
+
+80005cd6 <.L90>:
+    case 6:
+        write_csr(CSR_PMAADDR6, value);
+80005cd6:	47b2                	lw	a5,12(sp)
+80005cd8:	bd679073          	csrw	0xbd6,a5
+        break;
+80005cdc:	a0b1                	j	80005d28 <.L97>
+
+80005cde <.L89>:
+    case 7:
+        write_csr(CSR_PMAADDR7, value);
+80005cde:	47b2                	lw	a5,12(sp)
+80005ce0:	bd779073          	csrw	0xbd7,a5
+        break;
+80005ce4:	a091                	j	80005d28 <.L97>
+
+80005ce6 <.L88>:
+    case 8:
+        write_csr(CSR_PMAADDR8, value);
+80005ce6:	47b2                	lw	a5,12(sp)
+80005ce8:	bd879073          	csrw	0xbd8,a5
+        break;
+80005cec:	a835                	j	80005d28 <.L97>
+
+80005cee <.L87>:
+    case 9:
+        write_csr(CSR_PMAADDR9, value);
+80005cee:	47b2                	lw	a5,12(sp)
+80005cf0:	bd979073          	csrw	0xbd9,a5
+        break;
+80005cf4:	a815                	j	80005d28 <.L97>
+
+80005cf6 <.L86>:
+    case 10:
+        write_csr(CSR_PMAADDR10, value);
+80005cf6:	47b2                	lw	a5,12(sp)
+80005cf8:	bda79073          	csrw	0xbda,a5
+        break;
+80005cfc:	a035                	j	80005d28 <.L97>
+
+80005cfe <.L85>:
+    case 11:
+        write_csr(CSR_PMAADDR11, value);
+80005cfe:	47b2                	lw	a5,12(sp)
+80005d00:	bdb79073          	csrw	0xbdb,a5
+        break;
+80005d04:	a015                	j	80005d28 <.L97>
+
+80005d06 <.L84>:
+    case 12:
+        write_csr(CSR_PMAADDR12, value);
+80005d06:	47b2                	lw	a5,12(sp)
+80005d08:	bdc79073          	csrw	0xbdc,a5
+        break;
+80005d0c:	a831                	j	80005d28 <.L97>
+
+80005d0e <.L83>:
+    case 13:
+        write_csr(CSR_PMAADDR13, value);
+80005d0e:	47b2                	lw	a5,12(sp)
+80005d10:	bdd79073          	csrw	0xbdd,a5
+        break;
+80005d14:	a811                	j	80005d28 <.L97>
+
+80005d16 <.L82>:
+    case 14:
+        write_csr(CSR_PMAADDR14, value);
+80005d16:	47b2                	lw	a5,12(sp)
+80005d18:	bde79073          	csrw	0xbde,a5
+        break;
+80005d1c:	a031                	j	80005d28 <.L97>
+
+80005d1e <.L80>:
+    case 15:
+        write_csr(CSR_PMAADDR15, value);
+80005d1e:	47b2                	lw	a5,12(sp)
+80005d20:	bdf79073          	csrw	0xbdf,a5
+        break;
+80005d24:	a011                	j	80005d28 <.L97>
+
+80005d26 <.L98>:
+    default:
+        /* Do nothing */
+        break;
+80005d26:	0001                	nop
+
+80005d28 <.L97>:
+    }
+}
+80005d28:	0001                	nop
+80005d2a:	0141                	add	sp,sp,16
+80005d2c:	8082                	ret
+
+Disassembly of section .text.pmp_config:
+
+80005d2e <pmp_config>:
+
+    return status;
+}
+
+hpm_stat_t pmp_config(const pmp_entry_t *entry, uint32_t num_of_entries)
+{
+80005d2e:	7139                	add	sp,sp,-64
+80005d30:	de06                	sw	ra,60(sp)
+80005d32:	c62a                	sw	a0,12(sp)
+80005d34:	c42e                	sw	a1,8(sp)
+    hpm_stat_t status = status_invalid_argument;
+80005d36:	4789                	li	a5,2
+80005d38:	d63e                	sw	a5,44(sp)
+    do {
+        HPM_BREAK_IF((entry == NULL) || (num_of_entries < 1U) || (num_of_entries > 15U));
+80005d3a:	47b2                	lw	a5,12(sp)
+80005d3c:	cfcd                	beqz	a5,80005df6 <.L125>
+80005d3e:	47a2                	lw	a5,8(sp)
+80005d40:	cbdd                	beqz	a5,80005df6 <.L125>
+80005d42:	4722                	lw	a4,8(sp)
+80005d44:	47bd                	li	a5,15
+80005d46:	0ae7e863          	bltu	a5,a4,80005df6 <.L125>
+
+80005d4a <.LBB43>:
+
+        for (uint32_t i = 0; i < num_of_entries; i++) {
+80005d4a:	d402                	sw	zero,40(sp)
+80005d4c:	a871                	j	80005de8 <.L126>
+
+80005d4e <.L127>:
+            uint32_t idx = i / 4;
+80005d4e:	57a2                	lw	a5,40(sp)
+80005d50:	8389                	srl	a5,a5,0x2
+80005d52:	d23e                	sw	a5,36(sp)
+            uint32_t offset = (i * 8) & 0x1F;
+80005d54:	57a2                	lw	a5,40(sp)
+80005d56:	078e                	sll	a5,a5,0x3
+80005d58:	8be1                	and	a5,a5,24
+80005d5a:	d03e                	sw	a5,32(sp)
+            uint32_t pmp_cfg = read_pmp_cfg(idx);
+80005d5c:	5512                	lw	a0,36(sp)
+80005d5e:	3345                	jal	80005afe <read_pmp_cfg>
+80005d60:	ce2a                	sw	a0,28(sp)
+            pmp_cfg &= ~(0xFFUL << offset);
+80005d62:	5782                	lw	a5,32(sp)
+80005d64:	0ff00713          	li	a4,255
+80005d68:	00f717b3          	sll	a5,a4,a5
+80005d6c:	fff7c793          	not	a5,a5
+80005d70:	4772                	lw	a4,28(sp)
+80005d72:	8ff9                	and	a5,a5,a4
+80005d74:	ce3e                	sw	a5,28(sp)
+            pmp_cfg |= ((uint32_t) entry->pmp_cfg.val) << offset;
+80005d76:	47b2                	lw	a5,12(sp)
+80005d78:	0007c783          	lbu	a5,0(a5)
+80005d7c:	873e                	mv	a4,a5
+80005d7e:	5782                	lw	a5,32(sp)
+80005d80:	00f717b3          	sll	a5,a4,a5
+80005d84:	4772                	lw	a4,28(sp)
+80005d86:	8fd9                	or	a5,a5,a4
+80005d88:	ce3e                	sw	a5,28(sp)
+            write_pmp_addr(entry->pmp_addr, i);
+80005d8a:	47b2                	lw	a5,12(sp)
+80005d8c:	43dc                	lw	a5,4(a5)
+80005d8e:	55a2                	lw	a1,40(sp)
+80005d90:	853e                	mv	a0,a5
+80005d92:	3be9                	jal	80005b6c <write_pmp_addr>
+            write_pmp_cfg(pmp_cfg, idx);
+80005d94:	5592                	lw	a1,36(sp)
+80005d96:	4572                	lw	a0,28(sp)
+80005d98:	6a0020ef          	jal	80008438 <write_pmp_cfg>
+#if (!defined(PMP_SUPPORT_PMA)) || (defined(PMP_SUPPORT_PMA) && (PMP_SUPPORT_PMA == 1))
+            uint32_t pma_cfg = read_pma_cfg(idx);
+80005d9c:	5512                	lw	a0,36(sp)
+80005d9e:	3da5                	jal	80005c16 <read_pma_cfg>
+80005da0:	cc2a                	sw	a0,24(sp)
+            pma_cfg &= ~(0xFFUL << offset);
+80005da2:	5782                	lw	a5,32(sp)
+80005da4:	0ff00713          	li	a4,255
+80005da8:	00f717b3          	sll	a5,a4,a5
+80005dac:	fff7c793          	not	a5,a5
+80005db0:	4762                	lw	a4,24(sp)
+80005db2:	8ff9                	and	a5,a5,a4
+80005db4:	cc3e                	sw	a5,24(sp)
+            pma_cfg |= ((uint32_t) entry->pma_cfg.val) << offset;
+80005db6:	47b2                	lw	a5,12(sp)
+80005db8:	0087c783          	lbu	a5,8(a5)
+80005dbc:	873e                	mv	a4,a5
+80005dbe:	5782                	lw	a5,32(sp)
+80005dc0:	00f717b3          	sll	a5,a4,a5
+80005dc4:	4762                	lw	a4,24(sp)
+80005dc6:	8fd9                	or	a5,a5,a4
+80005dc8:	cc3e                	sw	a5,24(sp)
+            write_pma_cfg(pma_cfg, idx);
+80005dca:	5592                	lw	a1,36(sp)
+80005dcc:	4562                	lw	a0,24(sp)
+80005dce:	6c6020ef          	jal	80008494 <write_pma_cfg>
+            write_pma_addr(entry->pma_addr, i);
+80005dd2:	47b2                	lw	a5,12(sp)
+80005dd4:	47dc                	lw	a5,12(a5)
+80005dd6:	55a2                	lw	a1,40(sp)
+80005dd8:	853e                	mv	a0,a5
+80005dda:	356d                	jal	80005c84 <write_pma_addr>
+#endif
+            ++entry;
+80005ddc:	47b2                	lw	a5,12(sp)
+80005dde:	07c1                	add	a5,a5,16
+80005de0:	c63e                	sw	a5,12(sp)
+
+80005de2 <.LBE44>:
+        for (uint32_t i = 0; i < num_of_entries; i++) {
+80005de2:	57a2                	lw	a5,40(sp)
+80005de4:	0785                	add	a5,a5,1
+80005de6:	d43e                	sw	a5,40(sp)
+
+80005de8 <.L126>:
+80005de8:	5722                	lw	a4,40(sp)
+80005dea:	47a2                	lw	a5,8(sp)
+80005dec:	f6f761e3          	bltu	a4,a5,80005d4e <.L127>
+
+80005df0 <.LBE43>:
+        }
+        fencei();
+80005df0:	0000100f          	fence.i
+
+        status = status_success;
+80005df4:	d602                	sw	zero,44(sp)
+
+80005df6 <.L125>:
+
+    } while (false);
+
+    return status;
+80005df6:	57b2                	lw	a5,44(sp)
+}
+80005df8:	853e                	mv	a0,a5
+80005dfa:	50f2                	lw	ra,60(sp)
+80005dfc:	6121                	add	sp,sp,64
+80005dfe:	8082                	ret
+
+Disassembly of section .text.pllctl_pll_poweron:
+
+80005e00 <pllctl_pll_poweron>:
+{
+80005e00:	1101                	add	sp,sp,-32
+80005e02:	c62a                	sw	a0,12(sp)
+80005e04:	87ae                	mv	a5,a1
+80005e06:	00f105a3          	sb	a5,11(sp)
+    if (pll > (PLLCTL_SOC_PLL_MAX_COUNT - 1)) {
+80005e0a:	00b14703          	lbu	a4,11(sp)
+80005e0e:	4791                	li	a5,4
+80005e10:	00e7f463          	bgeu	a5,a4,80005e18 <.L8>
+        return status_invalid_argument;
+80005e14:	4789                	li	a5,2
+80005e16:	a849                	j	80005ea8 <.L9>
+
+80005e18 <.L8>:
+    cfg = ptr->PLL[pll].CFG1;
+80005e18:	00b14783          	lbu	a5,11(sp)
+80005e1c:	4732                	lw	a4,12(sp)
+80005e1e:	0785                	add	a5,a5,1
+80005e20:	079e                	sll	a5,a5,0x7
+80005e22:	97ba                	add	a5,a5,a4
+80005e24:	43dc                	lw	a5,4(a5)
+80005e26:	ce3e                	sw	a5,28(sp)
+    if (!(cfg & PLLCTL_PLL_CFG1_PLLPD_SW_MASK)) {
+80005e28:	4772                	lw	a4,28(sp)
+80005e2a:	020007b7          	lui	a5,0x2000
+80005e2e:	8ff9                	and	a5,a5,a4
+80005e30:	e399                	bnez	a5,80005e36 <.L10>
+        return status_success;
+80005e32:	4781                	li	a5,0
+80005e34:	a895                	j	80005ea8 <.L9>
+
+80005e36 <.L10>:
+    if (cfg & PLLCTL_PLL_CFG1_PLLCTRL_HW_EN_MASK) {
+80005e36:	47f2                	lw	a5,28(sp)
+80005e38:	0207d463          	bgez	a5,80005e60 <.L11>
+        ptr->PLL[pll].CFG1 &= ~PLLCTL_PLL_CFG1_PLLCTRL_HW_EN_MASK;
+80005e3c:	00b14783          	lbu	a5,11(sp)
+80005e40:	4732                	lw	a4,12(sp)
+80005e42:	0785                	add	a5,a5,1 # 2000001 <_extram_size+0x1>
+80005e44:	079e                	sll	a5,a5,0x7
+80005e46:	97ba                	add	a5,a5,a4
+80005e48:	43d4                	lw	a3,4(a5)
+80005e4a:	00b14783          	lbu	a5,11(sp)
+80005e4e:	80000737          	lui	a4,0x80000
+80005e52:	177d                	add	a4,a4,-1 # 7fffffff <_extram_size+0x7dffffff>
+80005e54:	8f75                	and	a4,a4,a3
+80005e56:	46b2                	lw	a3,12(sp)
+80005e58:	0785                	add	a5,a5,1
+80005e5a:	079e                	sll	a5,a5,0x7
+80005e5c:	97b6                	add	a5,a5,a3
+80005e5e:	c3d8                	sw	a4,4(a5)
+
+80005e60 <.L11>:
+    ptr->PLL[pll].CFG1 &= ~PLLCTL_PLL_CFG1_PLLPD_SW_MASK;
+80005e60:	00b14783          	lbu	a5,11(sp)
+80005e64:	4732                	lw	a4,12(sp)
+80005e66:	0785                	add	a5,a5,1
+80005e68:	079e                	sll	a5,a5,0x7
+80005e6a:	97ba                	add	a5,a5,a4
+80005e6c:	43d4                	lw	a3,4(a5)
+80005e6e:	00b14783          	lbu	a5,11(sp)
+80005e72:	fe000737          	lui	a4,0xfe000
+80005e76:	177d                	add	a4,a4,-1 # fdffffff <__APB_SRAM_segment_end__+0x9f0dfff>
+80005e78:	8f75                	and	a4,a4,a3
+80005e7a:	46b2                	lw	a3,12(sp)
+80005e7c:	0785                	add	a5,a5,1
+80005e7e:	079e                	sll	a5,a5,0x7
+80005e80:	97b6                	add	a5,a5,a3
+80005e82:	c3d8                	sw	a4,4(a5)
+    ptr->PLL[pll].CFG1 |= PLLCTL_PLL_CFG1_PLLCTRL_HW_EN_MASK;
+80005e84:	00b14783          	lbu	a5,11(sp)
+80005e88:	4732                	lw	a4,12(sp)
+80005e8a:	0785                	add	a5,a5,1
+80005e8c:	079e                	sll	a5,a5,0x7
+80005e8e:	97ba                	add	a5,a5,a4
+80005e90:	43d4                	lw	a3,4(a5)
+80005e92:	00b14783          	lbu	a5,11(sp)
+80005e96:	80000737          	lui	a4,0x80000
+80005e9a:	8f55                	or	a4,a4,a3
+80005e9c:	46b2                	lw	a3,12(sp)
+80005e9e:	0785                	add	a5,a5,1
+80005ea0:	079e                	sll	a5,a5,0x7
+80005ea2:	97b6                	add	a5,a5,a3
+80005ea4:	c3d8                	sw	a4,4(a5)
+    return status_success;
+80005ea6:	4781                	li	a5,0
+
+80005ea8 <.L9>:
+}
+80005ea8:	853e                	mv	a0,a5
+80005eaa:	6105                	add	sp,sp,32
+80005eac:	8082                	ret
+
+Disassembly of section .text.adc12_do_calibration:
+
+80005eae <adc12_do_calibration>:
+    config->thshdl             = 0x000;
+    config->wdog_int_en        = false;
+}
+
+static hpm_stat_t adc12_do_calibration(ADC12_Type *ptr, adc12_sample_signal_t diff_sel)
+{
+80005eae:	1101                	add	sp,sp,-32
+80005eb0:	c62a                	sw	a0,12(sp)
+80005eb2:	87ae                	mv	a5,a1
+80005eb4:	00f105a3          	sb	a5,11(sp)
+    uint8_t cal_out;
+    uint32_t loop_cnt = ADC12_SOC_CALIBRATION_WAITING_LOOP_CNT;
+80005eb8:	47a9                	li	a5,10
+80005eba:	ce3e                	sw	a5,28(sp)
+
+    if (ADC12_IS_SIGNAL_TYPE_INVALID(diff_sel)) {
+80005ebc:	00b14703          	lbu	a4,11(sp)
+80005ec0:	4789                	li	a5,2
+80005ec2:	00e7f463          	bgeu	a5,a4,80005eca <.L4>
+        return status_invalid_argument;
+80005ec6:	4789                	li	a5,2
+80005ec8:	a2a9                	j	80006012 <.L5>
+
+80005eca <.L4>:
+    }
+
+    /*Set diff_sel temporarily */
+    ptr->SAMPLE_CFG[0] &= ~ADC12_SAMPLE_CFG_DIFF_SEL_MASK;
+80005eca:	4732                	lw	a4,12(sp)
+80005ecc:	6785                	lui	a5,0x1
+80005ece:	97ba                	add	a5,a5,a4
+80005ed0:	4398                	lw	a4,0(a5)
+80005ed2:	77fd                	lui	a5,0xfffff
+80005ed4:	17fd                	add	a5,a5,-1 # ffffefff <__APB_SRAM_segment_end__+0xbf0cfff>
+80005ed6:	8f7d                	and	a4,a4,a5
+80005ed8:	46b2                	lw	a3,12(sp)
+80005eda:	6785                	lui	a5,0x1
+80005edc:	97b6                	add	a5,a5,a3
+80005ede:	c398                	sw	a4,0(a5)
+    ptr->SAMPLE_CFG[0] |= ADC12_SAMPLE_CFG_DIFF_SEL_SET(diff_sel);
+80005ee0:	4732                	lw	a4,12(sp)
+80005ee2:	6785                	lui	a5,0x1
+80005ee4:	97ba                	add	a5,a5,a4
+80005ee6:	4398                	lw	a4,0(a5)
+80005ee8:	00b14783          	lbu	a5,11(sp)
+80005eec:	00c79693          	sll	a3,a5,0xc
+80005ef0:	6785                	lui	a5,0x1
+80005ef2:	8ff5                	and	a5,a5,a3
+80005ef4:	8f5d                	or	a4,a4,a5
+80005ef6:	46b2                	lw	a3,12(sp)
+80005ef8:	6785                	lui	a5,0x1
+80005efa:	97b6                	add	a5,a5,a3
+80005efc:	c398                	sw	a4,0(a5)
+
+    /* Set resetcal and resetadc */
+    ptr->ANA_CTRL0 |= ADC12_ANA_CTRL0_RESETCAL_MASK | ADC12_ANA_CTRL0_RESETADC_MASK;
+80005efe:	4732                	lw	a4,12(sp)
+80005f00:	6785                	lui	a5,0x1
+80005f02:	97ba                	add	a5,a5,a4
+80005f04:	2007a783          	lw	a5,512(a5) # 1200 <__AXI_SRAM_segment_used_size__+0xe3>
+80005f08:	0187e713          	or	a4,a5,24
+80005f0c:	46b2                	lw	a3,12(sp)
+80005f0e:	6785                	lui	a5,0x1
+80005f10:	97b6                	add	a5,a5,a3
+80005f12:	20e7a023          	sw	a4,512(a5) # 1200 <__AXI_SRAM_segment_used_size__+0xe3>
+
+    /* Clear resetcal and resetadc */
+    ptr->ANA_CTRL0 &= ~(ADC12_ANA_CTRL0_RESETCAL_MASK | ADC12_ANA_CTRL0_RESETADC_MASK);
+80005f16:	4732                	lw	a4,12(sp)
+80005f18:	6785                	lui	a5,0x1
+80005f1a:	97ba                	add	a5,a5,a4
+80005f1c:	2007a783          	lw	a5,512(a5) # 1200 <__AXI_SRAM_segment_used_size__+0xe3>
+80005f20:	fe77f713          	and	a4,a5,-25
+80005f24:	46b2                	lw	a3,12(sp)
+80005f26:	6785                	lui	a5,0x1
+80005f28:	97b6                	add	a5,a5,a3
+80005f2a:	20e7a023          	sw	a4,512(a5) # 1200 <__AXI_SRAM_segment_used_size__+0xe3>
+
+    /* Set startcal */
+    ptr->ANA_CTRL0 |= ADC12_ANA_CTRL0_STARTCAL_MASK;
+80005f2e:	4732                	lw	a4,12(sp)
+80005f30:	6785                	lui	a5,0x1
+80005f32:	97ba                	add	a5,a5,a4
+80005f34:	2007a783          	lw	a5,512(a5) # 1200 <__AXI_SRAM_segment_used_size__+0xe3>
+80005f38:	0047e713          	or	a4,a5,4
+80005f3c:	46b2                	lw	a3,12(sp)
+80005f3e:	6785                	lui	a5,0x1
+80005f40:	97b6                	add	a5,a5,a3
+80005f42:	20e7a023          	sw	a4,512(a5) # 1200 <__AXI_SRAM_segment_used_size__+0xe3>
+
+    /* Clear startcal */
+    ptr->ANA_CTRL0 &= ~ADC12_ANA_CTRL0_STARTCAL_MASK;
+80005f46:	4732                	lw	a4,12(sp)
+80005f48:	6785                	lui	a5,0x1
+80005f4a:	97ba                	add	a5,a5,a4
+80005f4c:	2007a783          	lw	a5,512(a5) # 1200 <__AXI_SRAM_segment_used_size__+0xe3>
+80005f50:	ffb7f713          	and	a4,a5,-5
+80005f54:	46b2                	lw	a3,12(sp)
+80005f56:	6785                	lui	a5,0x1
+80005f58:	97b6                	add	a5,a5,a3
+80005f5a:	20e7a023          	sw	a4,512(a5) # 1200 <__AXI_SRAM_segment_used_size__+0xe3>
+
+    /* Set HW rearm_en */
+    ptr->ANA_CTRL0 |= ADC12_ANA_CTRL0_REARM_EN_MASK;
+80005f5e:	4732                	lw	a4,12(sp)
+80005f60:	6785                	lui	a5,0x1
+80005f62:	97ba                	add	a5,a5,a4
+80005f64:	2007a703          	lw	a4,512(a5) # 1200 <__AXI_SRAM_segment_used_size__+0xe3>
+80005f68:	6791                	lui	a5,0x4
+80005f6a:	8f5d                	or	a4,a4,a5
+80005f6c:	46b2                	lw	a3,12(sp)
+80005f6e:	6785                	lui	a5,0x1
+80005f70:	97b6                	add	a5,a5,a3
+80005f72:	20e7a023          	sw	a4,512(a5) # 1200 <__AXI_SRAM_segment_used_size__+0xe3>
+
+    /* Polling calibration status */
+    while (ADC12_ANA_STATUS_CALON_GET(ptr->ANA_STATUS) && loop_cnt--) {
+80005f76:	0001                	nop
+
+80005f78 <.L7>:
+80005f78:	4732                	lw	a4,12(sp)
+80005f7a:	6785                	lui	a5,0x1
+80005f7c:	97ba                	add	a5,a5,a4
+80005f7e:	2107a783          	lw	a5,528(a5) # 1210 <__AXI_SRAM_segment_used_size__+0xf3>
+80005f82:	0807f793          	and	a5,a5,128
+80005f86:	c791                	beqz	a5,80005f92 <.L6>
+80005f88:	47f2                	lw	a5,28(sp)
+80005f8a:	fff78713          	add	a4,a5,-1
+80005f8e:	ce3a                	sw	a4,28(sp)
+80005f90:	f7e5                	bnez	a5,80005f78 <.L7>
+
+80005f92 <.L6>:
+        /* TODO: Call a common delay function */
+    }
+
+    /* Check if the calibration is timeout */
+    if (loop_cnt == 0) {
+80005f92:	47f2                	lw	a5,28(sp)
+80005f94:	e399                	bnez	a5,80005f9a <.L8>
+        return status_timeout;
+80005f96:	478d                	li	a5,3
+80005f98:	a8ad                	j	80006012 <.L5>
+
+80005f9a <.L8>:
+    }
+
+    /* Read calculation result */
+    cal_out = ADC12_ANA_STATUS_CAL_OUT_GET(ptr->ANA_STATUS);
+80005f9a:	4732                	lw	a4,12(sp)
+80005f9c:	6785                	lui	a5,0x1
+80005f9e:	97ba                	add	a5,a5,a4
+80005fa0:	2107a783          	lw	a5,528(a5) # 1210 <__AXI_SRAM_segment_used_size__+0xf3>
+80005fa4:	0ff7f793          	zext.b	a5,a5
+80005fa8:	07f7f793          	and	a5,a5,127
+80005fac:	00f10da3          	sb	a5,27(sp)
+
+    /* Update cal_out */
+    if (diff_sel == adc12_sample_signal_single_ended) {
+80005fb0:	00b14783          	lbu	a5,11(sp)
+80005fb4:	eb85                	bnez	a5,80005fe4 <.L9>
+        ptr->ANA_CTRL0 = (ptr->ANA_CTRL0 & ~ADC12_ANA_CTRL0_CAL_VAL_SE_MASK)
+80005fb6:	4732                	lw	a4,12(sp)
+80005fb8:	6785                	lui	a5,0x1
+80005fba:	97ba                	add	a5,a5,a4
+80005fbc:	2007a703          	lw	a4,512(a5) # 1200 <__AXI_SRAM_segment_used_size__+0xe3>
+80005fc0:	ff8107b7          	lui	a5,0xff810
+80005fc4:	17fd                	add	a5,a5,-1 # ff80ffff <__APB_SRAM_segment_end__+0xb71dfff>
+80005fc6:	8f7d                	and	a4,a4,a5
+                       | ADC12_ANA_CTRL0_CAL_VAL_SE_SET(cal_out);
+80005fc8:	01b14783          	lbu	a5,27(sp)
+80005fcc:	01079693          	sll	a3,a5,0x10
+80005fd0:	007f07b7          	lui	a5,0x7f0
+80005fd4:	8ff5                	and	a5,a5,a3
+80005fd6:	8f5d                	or	a4,a4,a5
+        ptr->ANA_CTRL0 = (ptr->ANA_CTRL0 & ~ADC12_ANA_CTRL0_CAL_VAL_SE_MASK)
+80005fd8:	46b2                	lw	a3,12(sp)
+80005fda:	6785                	lui	a5,0x1
+80005fdc:	97b6                	add	a5,a5,a3
+80005fde:	20e7a023          	sw	a4,512(a5) # 1200 <__AXI_SRAM_segment_used_size__+0xe3>
+80005fe2:	a03d                	j	80006010 <.L10>
+
+80005fe4 <.L9>:
+    } else {
+        ptr->ANA_CTRL0 = (ptr->ANA_CTRL0 & ~ADC12_ANA_CTRL0_CAL_VAL_DIFF_MASK)
+80005fe4:	4732                	lw	a4,12(sp)
+80005fe6:	6785                	lui	a5,0x1
+80005fe8:	97ba                	add	a5,a5,a4
+80005fea:	2007a703          	lw	a4,512(a5) # 1200 <__AXI_SRAM_segment_used_size__+0xe3>
+80005fee:	810007b7          	lui	a5,0x81000
+80005ff2:	17fd                	add	a5,a5,-1 # 80ffffff <__XPI0_segment_used_end__+0xff5193>
+80005ff4:	8f7d                	and	a4,a4,a5
+                       | ADC12_ANA_CTRL0_CAL_VAL_DIFF_SET(cal_out);
+80005ff6:	01b14783          	lbu	a5,27(sp)
+80005ffa:	01879693          	sll	a3,a5,0x18
+80005ffe:	7f0007b7          	lui	a5,0x7f000
+80006002:	8ff5                	and	a5,a5,a3
+80006004:	8f5d                	or	a4,a4,a5
+        ptr->ANA_CTRL0 = (ptr->ANA_CTRL0 & ~ADC12_ANA_CTRL0_CAL_VAL_DIFF_MASK)
+80006006:	46b2                	lw	a3,12(sp)
+80006008:	6785                	lui	a5,0x1
+8000600a:	97b6                	add	a5,a5,a3
+8000600c:	20e7a023          	sw	a4,512(a5) # 1200 <__AXI_SRAM_segment_used_size__+0xe3>
+
+80006010 <.L10>:
+    }
+
+    return status_success;
+80006010:	4781                	li	a5,0
+
+80006012 <.L5>:
+}
+80006012:	853e                	mv	a0,a5
+80006014:	6105                	add	sp,sp,32
+80006016:	8082                	ret
+
+Disassembly of section .text.adc12_init_seq_dma:
+
+80006018 <adc12_init_seq_dma>:
+
+    return status_success;
+}
+
+hpm_stat_t adc12_init_seq_dma(ADC12_Type *ptr, adc12_dma_config_t *dma_config)
+{
+80006018:	1101                	add	sp,sp,-32
+8000601a:	ce06                	sw	ra,28(sp)
+8000601c:	c62a                	sw	a0,12(sp)
+8000601e:	c42e                	sw	a1,8(sp)
+    /* Check the DMA buffer length  */
+    if (ADC12_IS_SEQ_DMA_BUFF_LEN_INVLAID(dma_config->buff_len_in_4bytes)) {
+80006020:	47a2                	lw	a5,8(sp)
+80006022:	43dc                	lw	a5,4(a5)
+80006024:	c791                	beqz	a5,80006030 <.L28>
+80006026:	47a2                	lw	a5,8(sp)
+80006028:	43d8                	lw	a4,4(a5)
+8000602a:	6785                	lui	a5,0x1
+8000602c:	00e7f463          	bgeu	a5,a4,80006034 <.L29>
+
+80006030 <.L28>:
+        return status_invalid_argument;
+80006030:	4789                	li	a5,2
+80006032:	a875                	j	800060ee <.L30>
+
+80006034 <.L29>:
+    }
+
+    /* Reset ADC DMA  */
+    ptr->SEQ_DMA_CFG |= ADC12_SEQ_DMA_CFG_DMA_RST_MASK;
+80006034:	4732                	lw	a4,12(sp)
+80006036:	6785                	lui	a5,0x1
+80006038:	97ba                	add	a5,a5,a4
+8000603a:	80c7a703          	lw	a4,-2036(a5) # 80c <__ILM_segment_used_end__+0x326>
+8000603e:	6789                	lui	a5,0x2
+80006040:	8f5d                	or	a4,a4,a5
+80006042:	46b2                	lw	a3,12(sp)
+80006044:	6785                	lui	a5,0x1
+80006046:	97b6                	add	a5,a5,a3
+80006048:	80e7a623          	sw	a4,-2036(a5) # 80c <__ILM_segment_used_end__+0x326>
+
+    /* Reset memory to clear all of cycle bits */
+    memset(dma_config->start_addr, 0x00, dma_config->buff_len_in_4bytes * sizeof(uint32_t));
+8000604c:	47a2                	lw	a5,8(sp)
+8000604e:	4398                	lw	a4,0(a5)
+80006050:	47a2                	lw	a5,8(sp)
+80006052:	43dc                	lw	a5,4(a5)
+80006054:	078a                	sll	a5,a5,0x2
+80006056:	863e                	mv	a2,a5
+80006058:	4581                	li	a1,0
+8000605a:	853a                	mv	a0,a4
+8000605c:	0dd030ef          	jal	80009938 <memset>
+
+    /* De-reset ADC DMA */
+    ptr->SEQ_DMA_CFG &= ~ADC12_SEQ_DMA_CFG_DMA_RST_MASK;
+80006060:	4732                	lw	a4,12(sp)
+80006062:	6785                	lui	a5,0x1
+80006064:	97ba                	add	a5,a5,a4
+80006066:	80c7a703          	lw	a4,-2036(a5) # 80c <__ILM_segment_used_end__+0x326>
+8000606a:	77f9                	lui	a5,0xffffe
+8000606c:	17fd                	add	a5,a5,-1 # ffffdfff <__APB_SRAM_segment_end__+0xbf0bfff>
+8000606e:	8f7d                	and	a4,a4,a5
+80006070:	46b2                	lw	a3,12(sp)
+80006072:	6785                	lui	a5,0x1
+80006074:	97b6                	add	a5,a5,a3
+80006076:	80e7a623          	sw	a4,-2036(a5) # 80c <__ILM_segment_used_end__+0x326>
+
+    /* Set ADC DMA target address which should be 4-byte aligned */
+    ptr->SEQ_DMA_ADDR = (uint32_t)dma_config->start_addr & ADC12_SEQ_DMA_ADDR_TAR_ADDR_MASK;
+8000607a:	47a2                	lw	a5,8(sp)
+8000607c:	439c                	lw	a5,0(a5)
+8000607e:	ffc7f713          	and	a4,a5,-4
+80006082:	46b2                	lw	a3,12(sp)
+80006084:	6785                	lui	a5,0x1
+80006086:	97b6                	add	a5,a5,a3
+80006088:	80e7a223          	sw	a4,-2044(a5) # 804 <__ILM_segment_used_end__+0x31e>
+
+    /* Set ADC DMA memory dword length */
+    ptr->SEQ_DMA_CFG = (ptr->SEQ_DMA_CFG & ~ADC12_SEQ_DMA_CFG_BUF_LEN_MASK)
+8000608c:	4732                	lw	a4,12(sp)
+8000608e:	6785                	lui	a5,0x1
+80006090:	97ba                	add	a5,a5,a4
+80006092:	80c7a703          	lw	a4,-2036(a5) # 80c <__ILM_segment_used_end__+0x326>
+80006096:	77fd                	lui	a5,0xfffff
+80006098:	8f7d                	and	a4,a4,a5
+                     | ADC12_SEQ_DMA_CFG_BUF_LEN_SET(dma_config->buff_len_in_4bytes - 1);
+8000609a:	47a2                	lw	a5,8(sp)
+8000609c:	43dc                	lw	a5,4(a5)
+8000609e:	fff78693          	add	a3,a5,-1 # ffffefff <__APB_SRAM_segment_end__+0xbf0cfff>
+800060a2:	6785                	lui	a5,0x1
+800060a4:	17fd                	add	a5,a5,-1 # fff <__NOR_CFG_OPTION_segment_size__+0x3ff>
+800060a6:	8ff5                	and	a5,a5,a3
+800060a8:	8f5d                	or	a4,a4,a5
+    ptr->SEQ_DMA_CFG = (ptr->SEQ_DMA_CFG & ~ADC12_SEQ_DMA_CFG_BUF_LEN_MASK)
+800060aa:	46b2                	lw	a3,12(sp)
+800060ac:	6785                	lui	a5,0x1
+800060ae:	97b6                	add	a5,a5,a3
+800060b0:	80e7a623          	sw	a4,-2036(a5) # 80c <__ILM_segment_used_end__+0x326>
+
+    /* Set stop_en and stop_pos */
+    if (dma_config->stop_en) {
+800060b4:	47a2                	lw	a5,8(sp)
+800060b6:	00c7c783          	lbu	a5,12(a5)
+800060ba:	cb8d                	beqz	a5,800060ec <.L31>
+        ptr->SEQ_DMA_CFG = (ptr->SEQ_DMA_CFG & ~ADC12_SEQ_DMA_CFG_STOP_POS_MASK)
+800060bc:	4732                	lw	a4,12(sp)
+800060be:	6785                	lui	a5,0x1
+800060c0:	97ba                	add	a5,a5,a4
+800060c2:	80c7a703          	lw	a4,-2036(a5) # 80c <__ILM_segment_used_end__+0x326>
+                         | ADC12_SEQ_DMA_CFG_STOP_EN_MASK
+800060c6:	f000f7b7          	lui	a5,0xf000f
+800060ca:	17fd                	add	a5,a5,-1 # f000efff <__XPI0_segment_end__+0x6e00efff>
+800060cc:	8f7d                	and	a4,a4,a5
+                         | ADC12_SEQ_DMA_CFG_STOP_POS_SET(dma_config->stop_pos);
+800060ce:	47a2                	lw	a5,8(sp)
+800060d0:	479c                	lw	a5,8(a5)
+800060d2:	01079693          	sll	a3,a5,0x10
+800060d6:	0fff07b7          	lui	a5,0xfff0
+800060da:	8ff5                	and	a5,a5,a3
+800060dc:	8f5d                	or	a4,a4,a5
+800060de:	6785                	lui	a5,0x1
+800060e0:	8f5d                	or	a4,a4,a5
+        ptr->SEQ_DMA_CFG = (ptr->SEQ_DMA_CFG & ~ADC12_SEQ_DMA_CFG_STOP_POS_MASK)
+800060e2:	46b2                	lw	a3,12(sp)
+800060e4:	6785                	lui	a5,0x1
+800060e6:	97b6                	add	a5,a5,a3
+800060e8:	80e7a623          	sw	a4,-2036(a5) # 80c <__ILM_segment_used_end__+0x326>
+
+800060ec <.L31>:
+    }
+
+    return status_success;
+800060ec:	4781                	li	a5,0
+
+800060ee <.L30>:
+}
+800060ee:	853e                	mv	a0,a5
+800060f0:	40f2                	lw	ra,28(sp)
+800060f2:	6105                	add	sp,sp,32
+800060f4:	8082                	ret
+
+Disassembly of section .text.adc12_set_prd_config:
+
+800060f6 <adc12_set_prd_config>:
+
+hpm_stat_t adc12_set_prd_config(ADC12_Type *ptr, adc12_prd_config_t *config)
+{
+800060f6:	1141                	add	sp,sp,-16
+800060f8:	c62a                	sw	a0,12(sp)
+800060fa:	c42e                	sw	a1,8(sp)
+    /* Check the specified channel number */
+    if (ADC12_IS_CHANNEL_INVALID(config->ch)) {
+800060fc:	47a2                	lw	a5,8(sp)
+800060fe:	0007c703          	lbu	a4,0(a5)
+80006102:	47c5                	li	a5,17
+80006104:	00e7f463          	bgeu	a5,a4,8000610c <.L33>
+        return status_invalid_argument;
+80006108:	4789                	li	a5,2
+8000610a:	a071                	j	80006196 <.L34>
+
+8000610c <.L33>:
+    }
+
+    /* Check the prescale */
+    if (config->prescale > (ADC12_PRD_CFG_PRD_CFG_PRESCALE_MASK >> ADC12_PRD_CFG_PRD_CFG_PRESCALE_SHIFT)) {
+8000610c:	47a2                	lw	a5,8(sp)
+8000610e:	0017c703          	lbu	a4,1(a5)
+80006112:	47fd                	li	a5,31
+80006114:	00e7f463          	bgeu	a5,a4,8000611c <.L35>
+        return status_invalid_argument;
+80006118:	4789                	li	a5,2
+8000611a:	a8b5                	j	80006196 <.L34>
+
+8000611c <.L35>:
+    }
+
+    /* Set periodic prescale */
+    ptr->PRD_CFG[config->ch].PRD_CFG = (ptr->PRD_CFG[config->ch].PRD_CFG & ~ADC12_PRD_CFG_PRD_CFG_PRESCALE_MASK)
+8000611c:	47a2                	lw	a5,8(sp)
+8000611e:	0007c783          	lbu	a5,0(a5)
+80006122:	4732                	lw	a4,12(sp)
+80006124:	0c078793          	add	a5,a5,192
+80006128:	0792                	sll	a5,a5,0x4
+8000612a:	97ba                	add	a5,a5,a4
+8000612c:	4398                	lw	a4,0(a5)
+8000612e:	77f9                	lui	a5,0xffffe
+80006130:	0ff78793          	add	a5,a5,255 # ffffe0ff <__APB_SRAM_segment_end__+0xbf0c0ff>
+80006134:	8f7d                	and	a4,a4,a5
+                                     | ADC12_PRD_CFG_PRD_CFG_PRESCALE_SET(config->prescale);
+80006136:	47a2                	lw	a5,8(sp)
+80006138:	0017c783          	lbu	a5,1(a5)
+8000613c:	00879693          	sll	a3,a5,0x8
+80006140:	6789                	lui	a5,0x2
+80006142:	f0078793          	add	a5,a5,-256 # 1f00 <__AXI_SRAM_segment_used_size__+0xde3>
+80006146:	8ff5                	and	a5,a5,a3
+    ptr->PRD_CFG[config->ch].PRD_CFG = (ptr->PRD_CFG[config->ch].PRD_CFG & ~ADC12_PRD_CFG_PRD_CFG_PRESCALE_MASK)
+80006148:	46a2                	lw	a3,8(sp)
+8000614a:	0006c683          	lbu	a3,0(a3) # f4000000 <__AHB_SRAM_segment_end__+0x3cf8000>
+8000614e:	8636                	mv	a2,a3
+                                     | ADC12_PRD_CFG_PRD_CFG_PRESCALE_SET(config->prescale);
+80006150:	8f5d                	or	a4,a4,a5
+    ptr->PRD_CFG[config->ch].PRD_CFG = (ptr->PRD_CFG[config->ch].PRD_CFG & ~ADC12_PRD_CFG_PRD_CFG_PRESCALE_MASK)
+80006152:	46b2                	lw	a3,12(sp)
+80006154:	0c060793          	add	a5,a2,192
+80006158:	0792                	sll	a5,a5,0x4
+8000615a:	97b6                	add	a5,a5,a3
+8000615c:	c398                	sw	a4,0(a5)
+
+    /* Set period count */
+    ptr->PRD_CFG[config->ch].PRD_CFG = (ptr->PRD_CFG[config->ch].PRD_CFG & ~ADC12_PRD_CFG_PRD_CFG_PRD_MASK)
+8000615e:	47a2                	lw	a5,8(sp)
+80006160:	0007c783          	lbu	a5,0(a5)
+80006164:	4732                	lw	a4,12(sp)
+80006166:	0c078793          	add	a5,a5,192
+8000616a:	0792                	sll	a5,a5,0x4
+8000616c:	97ba                	add	a5,a5,a4
+8000616e:	439c                	lw	a5,0(a5)
+80006170:	f007f793          	and	a5,a5,-256
+                                     | ADC12_PRD_CFG_PRD_CFG_PRD_SET(config->period_count);
+80006174:	4722                	lw	a4,8(sp)
+80006176:	00274703          	lbu	a4,2(a4) # 80000002 <_extram_size+0x7e000002>
+8000617a:	86ba                	mv	a3,a4
+    ptr->PRD_CFG[config->ch].PRD_CFG = (ptr->PRD_CFG[config->ch].PRD_CFG & ~ADC12_PRD_CFG_PRD_CFG_PRD_MASK)
+8000617c:	4722                	lw	a4,8(sp)
+8000617e:	00074703          	lbu	a4,0(a4)
+80006182:	863a                	mv	a2,a4
+                                     | ADC12_PRD_CFG_PRD_CFG_PRD_SET(config->period_count);
+80006184:	00d7e733          	or	a4,a5,a3
+    ptr->PRD_CFG[config->ch].PRD_CFG = (ptr->PRD_CFG[config->ch].PRD_CFG & ~ADC12_PRD_CFG_PRD_CFG_PRD_MASK)
+80006188:	46b2                	lw	a3,12(sp)
+8000618a:	0c060793          	add	a5,a2,192
+8000618e:	0792                	sll	a5,a5,0x4
+80006190:	97b6                	add	a5,a5,a3
+80006192:	c398                	sw	a4,0(a5)
+
+    return status_success;
+80006194:	4781                	li	a5,0
+
+80006196 <.L34>:
+}
+80006196:	853e                	mv	a0,a5
+80006198:	0141                	add	sp,sp,16
+8000619a:	8082                	ret
+
+Disassembly of section .text.adc12_trigger_seq_by_sw:
+
+8000619c <adc12_trigger_seq_by_sw>:
+
+hpm_stat_t adc12_trigger_seq_by_sw(ADC12_Type *ptr)
+{
+8000619c:	1141                	add	sp,sp,-16
+8000619e:	c62a                	sw	a0,12(sp)
+    if (ADC12_INT_STS_SEQ_SW_CFLCT_GET(ptr->INT_STS)) {
+800061a0:	4732                	lw	a4,12(sp)
+800061a2:	6785                	lui	a5,0x1
+800061a4:	97ba                	add	a5,a5,a4
+800061a6:	1107a703          	lw	a4,272(a5) # 1110 <__fw_size__+0x110>
+800061aa:	080007b7          	lui	a5,0x8000
+800061ae:	8ff9                	and	a5,a5,a4
+800061b0:	c399                	beqz	a5,800061b6 <.L37>
+        return status_fail;
+800061b2:	4785                	li	a5,1
+800061b4:	a831                	j	800061d0 <.L38>
+
+800061b6 <.L37>:
+    }
+    ptr->SEQ_CFG0 |= ADC12_SEQ_CFG0_SW_TRIG_MASK;
+800061b6:	4732                	lw	a4,12(sp)
+800061b8:	6785                	lui	a5,0x1
+800061ba:	97ba                	add	a5,a5,a4
+800061bc:	8007a783          	lw	a5,-2048(a5) # 800 <__ILM_segment_used_end__+0x31a>
+800061c0:	0047e713          	or	a4,a5,4
+800061c4:	46b2                	lw	a3,12(sp)
+800061c6:	6785                	lui	a5,0x1
+800061c8:	97b6                	add	a5,a5,a3
+800061ca:	80e7a023          	sw	a4,-2048(a5) # 800 <__ILM_segment_used_end__+0x31a>
+
+    return status_success;
+800061ce:	4781                	li	a5,0
+
+800061d0 <.L38>:
+}
+800061d0:	853e                	mv	a0,a5
+800061d2:	0141                	add	sp,sp,16
+800061d4:	8082                	ret
+
+Disassembly of section .text.adc12_set_seq_config:
+
+800061d6 <adc12_set_seq_config>:
+
+/* Note: the sequence length can not be larger or equal than 2 in HPM6750EVK Revision A0 */
+hpm_stat_t adc12_set_seq_config(ADC12_Type *ptr, adc12_seq_config_t *config)
+{
+800061d6:	1101                	add	sp,sp,-32
+800061d8:	c62a                	sw	a0,12(sp)
+800061da:	c42e                	sw	a1,8(sp)
+    /* Check sequence length */
+    if (ADC12_IS_SEQ_LEN_INVLAID(config->seq_len)) {
+800061dc:	47a2                	lw	a5,8(sp)
+800061de:	0247c783          	lbu	a5,36(a5)
+800061e2:	c799                	beqz	a5,800061f0 <.L40>
+800061e4:	47a2                	lw	a5,8(sp)
+800061e6:	0247c703          	lbu	a4,36(a5)
+800061ea:	47c1                	li	a5,16
+800061ec:	00e7f463          	bgeu	a5,a4,800061f4 <.L41>
+
+800061f0 <.L40>:
+        return status_invalid_argument;
+800061f0:	4789                	li	a5,2
+800061f2:	a075                	j	8000629e <.L42>
+
+800061f4 <.L41>:
+    }
+
+    ptr->SEQ_CFG0 = ADC12_SEQ_CFG0_SEQ_LEN_SET(config->seq_len - 1)
+800061f4:	47a2                	lw	a5,8(sp)
+800061f6:	0247c783          	lbu	a5,36(a5)
+800061fa:	17fd                	add	a5,a5,-1
+800061fc:	00879713          	sll	a4,a5,0x8
+80006200:	6785                	lui	a5,0x1
+80006202:	f0078793          	add	a5,a5,-256 # f00 <__NOR_CFG_OPTION_segment_size__+0x300>
+80006206:	8f7d                	and	a4,a4,a5
+                  | ADC12_SEQ_CFG0_RESTART_EN_SET(config->restart_en)
+80006208:	47a2                	lw	a5,8(sp)
+8000620a:	0207c783          	lbu	a5,32(a5)
+8000620e:	0792                	sll	a5,a5,0x4
+80006210:	8bc1                	and	a5,a5,16
+80006212:	8f5d                	or	a4,a4,a5
+                  | ADC12_SEQ_CFG0_CONT_EN_SET(config->cont_en)
+80006214:	47a2                	lw	a5,8(sp)
+80006216:	0217c783          	lbu	a5,33(a5)
+8000621a:	078e                	sll	a5,a5,0x3
+8000621c:	8ba1                	and	a5,a5,8
+8000621e:	8f5d                	or	a4,a4,a5
+                  | ADC12_SEQ_CFG0_SW_TRIG_EN_SET(config->sw_trig_en)
+80006220:	47a2                	lw	a5,8(sp)
+80006222:	0227c783          	lbu	a5,34(a5)
+80006226:	0786                	sll	a5,a5,0x1
+80006228:	8b89                	and	a5,a5,2
+8000622a:	8fd9                	or	a5,a5,a4
+                  | ADC12_SEQ_CFG0_HW_TRIG_EN_SET(config->hw_trig_en);
+8000622c:	4722                	lw	a4,8(sp)
+8000622e:	02374703          	lbu	a4,35(a4)
+80006232:	8f5d                	or	a4,a4,a5
+    ptr->SEQ_CFG0 = ADC12_SEQ_CFG0_SEQ_LEN_SET(config->seq_len - 1)
+80006234:	46b2                	lw	a3,12(sp)
+80006236:	6785                	lui	a5,0x1
+80006238:	97b6                	add	a5,a5,a3
+8000623a:	80e7a023          	sw	a4,-2048(a5) # 800 <__ILM_segment_used_end__+0x31a>
+
+8000623e <.LBB2>:
+
+    /* Set sequence queue */
+    for (int i = 0; i < config->seq_len; i++) {
+8000623e:	ce02                	sw	zero,28(sp)
+80006240:	a0b9                	j	8000628e <.L43>
+
+80006242 <.L45>:
+        /* Check the specified channel number */
+        if (ADC12_IS_CHANNEL_INVALID(config->queue[i].ch)) {
+80006242:	4722                	lw	a4,8(sp)
+80006244:	47f2                	lw	a5,28(sp)
+80006246:	0786                	sll	a5,a5,0x1
+80006248:	97ba                	add	a5,a5,a4
+8000624a:	0017c703          	lbu	a4,1(a5)
+8000624e:	47c5                	li	a5,17
+80006250:	00e7f463          	bgeu	a5,a4,80006258 <.L44>
+            return status_invalid_argument;
+80006254:	4789                	li	a5,2
+80006256:	a0a1                	j	8000629e <.L42>
+
+80006258 <.L44>:
+        }
+
+        ptr->SEQ_QUE[i] = ADC12_SEQ_QUE_SEQ_INT_EN_SET(config->queue[i].seq_int_en)
+80006258:	4722                	lw	a4,8(sp)
+8000625a:	47f2                	lw	a5,28(sp)
+8000625c:	0786                	sll	a5,a5,0x1
+8000625e:	97ba                	add	a5,a5,a4
+80006260:	0007c783          	lbu	a5,0(a5)
+80006264:	0796                	sll	a5,a5,0x5
+80006266:	0207f713          	and	a4,a5,32
+                        | ADC12_SEQ_QUE_CHAN_NUM_4_0_SET(config->queue[i].ch);
+8000626a:	46a2                	lw	a3,8(sp)
+8000626c:	47f2                	lw	a5,28(sp)
+8000626e:	0786                	sll	a5,a5,0x1
+80006270:	97b6                	add	a5,a5,a3
+80006272:	0017c783          	lbu	a5,1(a5)
+80006276:	8bfd                	and	a5,a5,31
+80006278:	8f5d                	or	a4,a4,a5
+        ptr->SEQ_QUE[i] = ADC12_SEQ_QUE_SEQ_INT_EN_SET(config->queue[i].seq_int_en)
+8000627a:	46b2                	lw	a3,12(sp)
+8000627c:	47f2                	lw	a5,28(sp)
+8000627e:	20478793          	add	a5,a5,516
+80006282:	078a                	sll	a5,a5,0x2
+80006284:	97b6                	add	a5,a5,a3
+80006286:	c398                	sw	a4,0(a5)
+    for (int i = 0; i < config->seq_len; i++) {
+80006288:	47f2                	lw	a5,28(sp)
+8000628a:	0785                	add	a5,a5,1
+8000628c:	ce3e                	sw	a5,28(sp)
+
+8000628e <.L43>:
+8000628e:	47a2                	lw	a5,8(sp)
+80006290:	0247c783          	lbu	a5,36(a5)
+80006294:	873e                	mv	a4,a5
+80006296:	47f2                	lw	a5,28(sp)
+80006298:	fae7c5e3          	blt	a5,a4,80006242 <.L45>
+
+8000629c <.LBE2>:
+    }
+
+    return status_success;
+8000629c:	4781                	li	a5,0
+
+8000629e <.L42>:
+}
+8000629e:	853e                	mv	a0,a5
+800062a0:	6105                	add	sp,sp,32
+800062a2:	8082                	ret
+
+Disassembly of section .text.adc12_get_oneshot_result:
+
+800062a4 <adc12_get_oneshot_result>:
+
+    return status_success;
+}
+
+hpm_stat_t adc12_get_oneshot_result(ADC12_Type *ptr, uint8_t ch, uint16_t *result)
+{
+800062a4:	1101                	add	sp,sp,-32
+800062a6:	c62a                	sw	a0,12(sp)
+800062a8:	87ae                	mv	a5,a1
+800062aa:	c232                	sw	a2,4(sp)
+800062ac:	00f105a3          	sb	a5,11(sp)
+    uint32_t bus_res;
+
+    /* Check the specified channel number */
+    if (ADC12_IS_CHANNEL_INVALID(ch)) {
+800062b0:	00b14703          	lbu	a4,11(sp)
+800062b4:	47c5                	li	a5,17
+800062b6:	00e7f463          	bgeu	a5,a4,800062be <.L56>
+        return status_invalid_argument;
+800062ba:	4789                	li	a5,2
+800062bc:	a0a1                	j	80006304 <.L57>
+
+800062be <.L56>:
+    }
+
+    bus_res = ptr->BUS_RESULT[ch];
+800062be:	00b14783          	lbu	a5,11(sp)
+800062c2:	4732                	lw	a4,12(sp)
+800062c4:	10078793          	add	a5,a5,256
+800062c8:	078a                	sll	a5,a5,0x2
+800062ca:	97ba                	add	a5,a5,a4
+800062cc:	439c                	lw	a5,0(a5)
+800062ce:	ce3e                	sw	a5,28(sp)
+    *result = ADC12_BUS_RESULT_CHAN_RESULT_GET(bus_res);
+800062d0:	47f2                	lw	a5,28(sp)
+800062d2:	8391                	srl	a5,a5,0x4
+800062d4:	01079713          	sll	a4,a5,0x10
+800062d8:	8341                	srl	a4,a4,0x10
+800062da:	6785                	lui	a5,0x1
+800062dc:	17fd                	add	a5,a5,-1 # fff <__NOR_CFG_OPTION_segment_size__+0x3ff>
+800062de:	8ff9                	and	a5,a5,a4
+800062e0:	01079713          	sll	a4,a5,0x10
+800062e4:	8341                	srl	a4,a4,0x10
+800062e6:	4792                	lw	a5,4(sp)
+800062e8:	00e79023          	sh	a4,0(a5)
+
+    if (ADC12_BUF_CFG0_WAIT_DIS_GET(ptr->BUF_CFG0)) {
+800062ec:	47b2                	lw	a5,12(sp)
+800062ee:	5007a783          	lw	a5,1280(a5)
+800062f2:	8b85                	and	a5,a5,1
+800062f4:	c799                	beqz	a5,80006302 <.L58>
+        if (!ADC12_BUS_RESULT_VALID_GET(bus_res)) {
+800062f6:	4772                	lw	a4,28(sp)
+800062f8:	67c1                	lui	a5,0x10
+800062fa:	8ff9                	and	a5,a5,a4
+800062fc:	e399                	bnez	a5,80006302 <.L58>
+            return status_fail;
+800062fe:	4785                	li	a5,1
+80006300:	a011                	j	80006304 <.L57>
+
+80006302 <.L58>:
+        }
+    }
+
+    return status_success;
+80006302:	4781                	li	a5,0
+
+80006304 <.L57>:
+}
+80006304:	853e                	mv	a0,a5
+80006306:	6105                	add	sp,sp,32
+80006308:	8082                	ret
+
+Disassembly of section .text.__SEGGER_RTL_X_file_read:
+
+8000630a <__SEGGER_RTL_X_file_read>:
+    return count;
+
+}
+
+__attribute__((used)) int __SEGGER_RTL_X_file_read(__SEGGER_RTL_FILE *file, char *s, unsigned int size)
+{
+8000630a:	1101                	add	sp,sp,-32
+8000630c:	ce06                	sw	ra,28(sp)
+8000630e:	c62a                	sw	a0,12(sp)
+80006310:	c42e                	sw	a1,8(sp)
+80006312:	c232                	sw	a2,4(sp)
+    (void)file;
+    (void) size;
+    while (status_success != uart_receive_byte(g_console_uart, (uint8_t *)s)) {
+80006314:	0001                	nop
+
+80006316 <.L22>:
+80006316:	83822783          	lw	a5,-1992(tp) # fffff838 <__APB_SRAM_segment_end__+0xbf0d838>
+8000631a:	45a2                	lw	a1,8(sp)
+8000631c:	853e                	mv	a0,a5
+8000631e:	f92ff0ef          	jal	80005ab0 <uart_receive_byte>
+80006322:	87aa                	mv	a5,a0
+80006324:	fbed                	bnez	a5,80006316 <.L22>
+    }
+    return 1;
+80006326:	4785                	li	a5,1
+}
+80006328:	853e                	mv	a0,a5
+8000632a:	40f2                	lw	ra,28(sp)
+8000632c:	6105                	add	sp,sp,32
+8000632e:	8082                	ret
+
+Disassembly of section .text.libc.__SEGGER_RTL_xtoa:
+
+80006330 <__SEGGER_RTL_xltoa>:
+80006330:	882a                	mv	a6,a0
+80006332:	88ae                	mv	a7,a1
+80006334:	852e                	mv	a0,a1
+80006336:	ca89                	beqz	a3,80006348 <.L2>
+80006338:	02d00793          	li	a5,45
+8000633c:	00158893          	add	a7,a1,1
+80006340:	00f58023          	sb	a5,0(a1)
+80006344:	41000833          	neg	a6,a6
+
+80006348 <.L2>:
+80006348:	8746                	mv	a4,a7
+8000634a:	4325                	li	t1,9
+
+8000634c <.L5>:
+8000634c:	02c876b3          	remu	a3,a6,a2
+80006350:	85c2                	mv	a1,a6
+80006352:	0ff6f793          	zext.b	a5,a3
+80006356:	02c85833          	divu	a6,a6,a2
+8000635a:	02d37d63          	bgeu	t1,a3,80006394 <.L3>
+8000635e:	05778793          	add	a5,a5,87 # 10057 <__AHB_SRAM_segment_size__+0x8057>
+
+80006362 <.L11>:
+80006362:	0ff7f793          	zext.b	a5,a5
+80006366:	00f70023          	sb	a5,0(a4)
+8000636a:	00170693          	add	a3,a4,1
+8000636e:	02c5f163          	bgeu	a1,a2,80006390 <.L8>
+80006372:	000700a3          	sb	zero,1(a4)
+
+80006376 <.L6>:
+80006376:	0008c683          	lbu	a3,0(a7)
+8000637a:	00074783          	lbu	a5,0(a4)
+8000637e:	0885                	add	a7,a7,1
+80006380:	177d                	add	a4,a4,-1
+80006382:	00d700a3          	sb	a3,1(a4)
+80006386:	fef88fa3          	sb	a5,-1(a7)
+8000638a:	fee8e6e3          	bltu	a7,a4,80006376 <.L6>
+8000638e:	8082                	ret
+
+80006390 <.L8>:
+80006390:	8736                	mv	a4,a3
+80006392:	bf6d                	j	8000634c <.L5>
+
+80006394 <.L3>:
+80006394:	03078793          	add	a5,a5,48
+80006398:	b7e9                	j	80006362 <.L11>
+
+Disassembly of section .text.libc.itoa:
+
+8000639a <itoa>:
+8000639a:	46a9                	li	a3,10
+8000639c:	87aa                	mv	a5,a0
+8000639e:	882e                	mv	a6,a1
+800063a0:	8732                	mv	a4,a2
+800063a2:	00d61563          	bne	a2,a3,800063ac <.L301>
+800063a6:	4685                	li	a3,1
+800063a8:	00054663          	bltz	a0,800063b4 <.L302>
+
+800063ac <.L301>:
+800063ac:	4681                	li	a3,0
+800063ae:	863a                	mv	a2,a4
+800063b0:	85c2                	mv	a1,a6
+800063b2:	853e                	mv	a0,a5
+
+800063b4 <.L302>:
+800063b4:	bfb5                	j	80006330 <__SEGGER_RTL_xltoa>
+
+Disassembly of section .text.libc.fwrite:
+
+800063b6 <fwrite>:
+800063b6:	1101                	add	sp,sp,-32
+800063b8:	c64e                	sw	s3,12(sp)
+800063ba:	89aa                	mv	s3,a0
+800063bc:	8536                	mv	a0,a3
+800063be:	cc22                	sw	s0,24(sp)
+800063c0:	ca26                	sw	s1,20(sp)
+800063c2:	c84a                	sw	s2,16(sp)
+800063c4:	ce06                	sw	ra,28(sp)
+800063c6:	84ae                	mv	s1,a1
+800063c8:	8432                	mv	s0,a2
+800063ca:	8936                	mv	s2,a3
+800063cc:	281020ef          	jal	80008e4c <__SEGGER_RTL_X_file_stat>
+800063d0:	02054463          	bltz	a0,800063f8 <.L43>
+800063d4:	02848633          	mul	a2,s1,s0
+800063d8:	4501                	li	a0,0
+800063da:	00966863          	bltu	a2,s1,800063ea <.L41>
+800063de:	85ce                	mv	a1,s3
+800063e0:	854a                	mv	a0,s2
+800063e2:	1f7020ef          	jal	80008dd8 <__SEGGER_RTL_X_file_write>
+800063e6:	02955533          	divu	a0,a0,s1
+
+800063ea <.L41>:
+800063ea:	40f2                	lw	ra,28(sp)
+800063ec:	4462                	lw	s0,24(sp)
+800063ee:	44d2                	lw	s1,20(sp)
+800063f0:	4942                	lw	s2,16(sp)
+800063f2:	49b2                	lw	s3,12(sp)
+800063f4:	6105                	add	sp,sp,32
+800063f6:	8082                	ret
+
+800063f8 <.L43>:
+800063f8:	4501                	li	a0,0
+800063fa:	bfc5                	j	800063ea <.L41>
+
+Disassembly of section .text.libc.__subsf3:
+
+800063fc <__subsf3>:
+800063fc:	80000637          	lui	a2,0x80000
+80006400:	8db1                	xor	a1,a1,a2
+80006402:	a009                	j	80006404 <__addsf3>
+
+Disassembly of section .text.libc.__addsf3:
+
+80006404 <__addsf3>:
+80006404:	80000637          	lui	a2,0x80000
+80006408:	00b546b3          	xor	a3,a0,a1
+8000640c:	0806ca63          	bltz	a3,800064a0 <.L__addsf3_subtract>
+80006410:	00b57563          	bgeu	a0,a1,8000641a <.L__addsf3_add_already_ordered>
+80006414:	86aa                	mv	a3,a0
+80006416:	852e                	mv	a0,a1
+80006418:	85b6                	mv	a1,a3
+
+8000641a <.L__addsf3_add_already_ordered>:
+8000641a:	00151713          	sll	a4,a0,0x1
+8000641e:	8361                	srl	a4,a4,0x18
+80006420:	00159693          	sll	a3,a1,0x1
+80006424:	82e1                	srl	a3,a3,0x18
+80006426:	0ff00293          	li	t0,255
+8000642a:	06570563          	beq	a4,t0,80006494 <.L__addsf3_add_inf_or_nan>
+8000642e:	c325                	beqz	a4,8000648e <.L__addsf3_zero>
+80006430:	ceb1                	beqz	a3,8000648c <.L__addsf3_add_done>
+80006432:	40d706b3          	sub	a3,a4,a3
+80006436:	42e1                	li	t0,24
+80006438:	04d2ca63          	blt	t0,a3,8000648c <.L__addsf3_add_done>
+8000643c:	05a2                	sll	a1,a1,0x8
+8000643e:	8dd1                	or	a1,a1,a2
+80006440:	01755713          	srl	a4,a0,0x17
+80006444:	0522                	sll	a0,a0,0x8
+80006446:	8d51                	or	a0,a0,a2
+80006448:	47e5                	li	a5,25
+8000644a:	8f95                	sub	a5,a5,a3
+8000644c:	00f59633          	sll	a2,a1,a5
+80006450:	821d                	srl	a2,a2,0x7
+80006452:	00d5d5b3          	srl	a1,a1,a3
+80006456:	00b507b3          	add	a5,a0,a1
+8000645a:	00a7f463          	bgeu	a5,a0,80006462 <.L__addsf3_add_no_normalization>
+8000645e:	8385                	srl	a5,a5,0x1
+80006460:	0709                	add	a4,a4,2
+
+80006462 <.L__addsf3_add_no_normalization>:
+80006462:	177d                	add	a4,a4,-1
+80006464:	0ff77593          	zext.b	a1,a4
+80006468:	f0158593          	add	a1,a1,-255
+8000646c:	cd91                	beqz	a1,80006488 <.L__addsf3_inf>
+8000646e:	075e                	sll	a4,a4,0x17
+80006470:	0087d513          	srl	a0,a5,0x8
+80006474:	07e2                	sll	a5,a5,0x18
+80006476:	8fd1                	or	a5,a5,a2
+80006478:	0007d663          	bgez	a5,80006484 <.L__addsf3_no_tie>
+8000647c:	0786                	sll	a5,a5,0x1
+8000647e:	0505                	add	a0,a0,1 # f4100001 <__APB_SRAM_segment_end__+0xe001>
+80006480:	e391                	bnez	a5,80006484 <.L__addsf3_no_tie>
+80006482:	9979                	and	a0,a0,-2
+
+80006484 <.L__addsf3_no_tie>:
+80006484:	953a                	add	a0,a0,a4
+80006486:	8082                	ret
+
+80006488 <.L__addsf3_inf>:
+80006488:	01771513          	sll	a0,a4,0x17
+
+8000648c <.L__addsf3_add_done>:
+8000648c:	8082                	ret
+
+8000648e <.L__addsf3_zero>:
+8000648e:	817d                	srl	a0,a0,0x1f
+80006490:	057e                	sll	a0,a0,0x1f
+80006492:	8082                	ret
+
+80006494 <.L__addsf3_add_inf_or_nan>:
+80006494:	00951613          	sll	a2,a0,0x9
+80006498:	da75                	beqz	a2,8000648c <.L__addsf3_add_done>
+
+8000649a <.L__addsf3_return_nan>:
+8000649a:	7fc00537          	lui	a0,0x7fc00
+8000649e:	8082                	ret
+
+800064a0 <.L__addsf3_subtract>:
+800064a0:	8db1                	xor	a1,a1,a2
+800064a2:	40b506b3          	sub	a3,a0,a1
+800064a6:	00b57563          	bgeu	a0,a1,800064b0 <.L__addsf3_sub_already_ordered>
+800064aa:	8eb1                	xor	a3,a3,a2
+800064ac:	8d15                	sub	a0,a0,a3
+800064ae:	95b6                	add	a1,a1,a3
+
+800064b0 <.L__addsf3_sub_already_ordered>:
+800064b0:	00159693          	sll	a3,a1,0x1
+800064b4:	82e1                	srl	a3,a3,0x18
+800064b6:	00151713          	sll	a4,a0,0x1
+800064ba:	8361                	srl	a4,a4,0x18
+800064bc:	05a2                	sll	a1,a1,0x8
+800064be:	8dd1                	or	a1,a1,a2
+800064c0:	0ff00293          	li	t0,255
+800064c4:	0c570c63          	beq	a4,t0,8000659c <.L__addsf3_sub_inf_or_nan>
+800064c8:	c2f5                	beqz	a3,800065ac <.L__addsf3_sub_zero>
+800064ca:	40d706b3          	sub	a3,a4,a3
+800064ce:	c695                	beqz	a3,800064fa <.L__addsf3_exponents_equal>
+800064d0:	4285                	li	t0,1
+800064d2:	08569063          	bne	a3,t0,80006552 <.L__addsf3_exponents_differ_by_more_than_1>
+800064d6:	01755693          	srl	a3,a0,0x17
+800064da:	0526                	sll	a0,a0,0x9
+800064dc:	00b532b3          	sltu	t0,a0,a1
+800064e0:	8d0d                	sub	a0,a0,a1
+800064e2:	02029263          	bnez	t0,80006506 <.L__addsf3_normalization_steps>
+800064e6:	06de                	sll	a3,a3,0x17
+800064e8:	01751593          	sll	a1,a0,0x17
+800064ec:	8125                	srl	a0,a0,0x9
+800064ee:	0005d463          	bgez	a1,800064f6 <.L__addsf3_sub_no_tie_single>
+800064f2:	0505                	add	a0,a0,1 # 7fc00001 <_extram_size+0x7dc00001>
+800064f4:	9979                	and	a0,a0,-2
+
+800064f6 <.L__addsf3_sub_no_tie_single>:
+800064f6:	9536                	add	a0,a0,a3
+
+800064f8 <.L__addsf3_sub_done>:
+800064f8:	8082                	ret
+
+800064fa <.L__addsf3_exponents_equal>:
+800064fa:	01755693          	srl	a3,a0,0x17
+800064fe:	0526                	sll	a0,a0,0x9
+80006500:	0586                	sll	a1,a1,0x1
+80006502:	8d0d                	sub	a0,a0,a1
+80006504:	d975                	beqz	a0,800064f8 <.L__addsf3_sub_done>
+
+80006506 <.L__addsf3_normalization_steps>:
+80006506:	4581                	li	a1,0
+80006508:	01055793          	srl	a5,a0,0x10
+8000650c:	e399                	bnez	a5,80006512 <.L1^B1>
+8000650e:	0542                	sll	a0,a0,0x10
+80006510:	05c1                	add	a1,a1,16
+
+80006512 <.L1^B1>:
+80006512:	01855793          	srl	a5,a0,0x18
+80006516:	e399                	bnez	a5,8000651c <.L2^B1>
+80006518:	0522                	sll	a0,a0,0x8
+8000651a:	05a1                	add	a1,a1,8
+
+8000651c <.L2^B1>:
+8000651c:	01c55793          	srl	a5,a0,0x1c
+80006520:	e399                	bnez	a5,80006526 <.L3^B1>
+80006522:	0512                	sll	a0,a0,0x4
+80006524:	0591                	add	a1,a1,4
+
+80006526 <.L3^B1>:
+80006526:	01e55793          	srl	a5,a0,0x1e
+8000652a:	e399                	bnez	a5,80006530 <.L4^B1>
+8000652c:	050a                	sll	a0,a0,0x2
+8000652e:	0589                	add	a1,a1,2
+
+80006530 <.L4^B1>:
+80006530:	00054463          	bltz	a0,80006538 <.L5^B1>
+80006534:	0506                	sll	a0,a0,0x1
+80006536:	0585                	add	a1,a1,1
+
+80006538 <.L5^B1>:
+80006538:	0585                	add	a1,a1,1
+8000653a:	0506                	sll	a0,a0,0x1
+8000653c:	00e5f763          	bgeu	a1,a4,8000654a <.L__addsf3_underflow>
+80006540:	8e8d                	sub	a3,a3,a1
+80006542:	06de                	sll	a3,a3,0x17
+80006544:	8125                	srl	a0,a0,0x9
+80006546:	9536                	add	a0,a0,a3
+80006548:	8082                	ret
+
+8000654a <.L__addsf3_underflow>:
+8000654a:	0086d513          	srl	a0,a3,0x8
+8000654e:	057e                	sll	a0,a0,0x1f
+80006550:	8082                	ret
+
+80006552 <.L__addsf3_exponents_differ_by_more_than_1>:
+80006552:	42e5                	li	t0,25
+80006554:	fad2e2e3          	bltu	t0,a3,800064f8 <.L__addsf3_sub_done>
+80006558:	0685                	add	a3,a3,1
+8000655a:	40d00733          	neg	a4,a3
+8000655e:	00e59733          	sll	a4,a1,a4
+80006562:	00d5d5b3          	srl	a1,a1,a3
+80006566:	00e03733          	snez	a4,a4
+8000656a:	95ae                	add	a1,a1,a1
+8000656c:	95ba                	add	a1,a1,a4
+8000656e:	01755693          	srl	a3,a0,0x17
+80006572:	0522                	sll	a0,a0,0x8
+80006574:	8d51                	or	a0,a0,a2
+80006576:	40b50733          	sub	a4,a0,a1
+8000657a:	00074463          	bltz	a4,80006582 <.L__addsf3_sub_already_normalized>
+8000657e:	070a                	sll	a4,a4,0x2
+80006580:	8305                	srl	a4,a4,0x1
+
+80006582 <.L__addsf3_sub_already_normalized>:
+80006582:	16fd                	add	a3,a3,-1
+80006584:	06de                	sll	a3,a3,0x17
+80006586:	00875513          	srl	a0,a4,0x8
+8000658a:	0762                	sll	a4,a4,0x18
+8000658c:	00075663          	bgez	a4,80006598 <.L__addsf3_sub_no_tie>
+80006590:	0706                	sll	a4,a4,0x1
+80006592:	0505                	add	a0,a0,1
+80006594:	e311                	bnez	a4,80006598 <.L__addsf3_sub_no_tie>
+80006596:	9979                	and	a0,a0,-2
+
+80006598 <.L__addsf3_sub_no_tie>:
+80006598:	9536                	add	a0,a0,a3
+8000659a:	8082                	ret
+
+8000659c <.L__addsf3_sub_inf_or_nan>:
+8000659c:	0ff00293          	li	t0,255
+800065a0:	ee568de3          	beq	a3,t0,8000649a <.L__addsf3_return_nan>
+800065a4:	00951593          	sll	a1,a0,0x9
+800065a8:	d9a1                	beqz	a1,800064f8 <.L__addsf3_sub_done>
+800065aa:	bdc5                	j	8000649a <.L__addsf3_return_nan>
+
+800065ac <.L__addsf3_sub_zero>:
+800065ac:	f731                	bnez	a4,800064f8 <.L__addsf3_sub_done>
+800065ae:	4501                	li	a0,0
+800065b0:	8082                	ret
+
+Disassembly of section .text.libc.__ltsf2:
+
+800065b2 <__ltsf2>:
+800065b2:	ff000637          	lui	a2,0xff000
+800065b6:	00151693          	sll	a3,a0,0x1
+800065ba:	02d66763          	bltu	a2,a3,800065e8 <.L__ltsf2_zero>
+800065be:	00159693          	sll	a3,a1,0x1
+800065c2:	02d66363          	bltu	a2,a3,800065e8 <.L__ltsf2_zero>
+800065c6:	00b56633          	or	a2,a0,a1
+800065ca:	00161693          	sll	a3,a2,0x1
+800065ce:	ce89                	beqz	a3,800065e8 <.L__ltsf2_zero>
+800065d0:	00064763          	bltz	a2,800065de <.L__ltsf2_negative>
+800065d4:	00b53533          	sltu	a0,a0,a1
+800065d8:	40a00533          	neg	a0,a0
+800065dc:	8082                	ret
+
+800065de <.L__ltsf2_negative>:
+800065de:	00a5b533          	sltu	a0,a1,a0
+800065e2:	40a00533          	neg	a0,a0
+800065e6:	8082                	ret
+
+800065e8 <.L__ltsf2_zero>:
+800065e8:	4501                	li	a0,0
+800065ea:	8082                	ret
+
+Disassembly of section .text.libc.__lesf2:
+
+800065ec <__lesf2>:
+800065ec:	ff000637          	lui	a2,0xff000
+800065f0:	00151693          	sll	a3,a0,0x1
+800065f4:	02d66363          	bltu	a2,a3,8000661a <.L__lesf2_nan>
+800065f8:	00159693          	sll	a3,a1,0x1
+800065fc:	00d66f63          	bltu	a2,a3,8000661a <.L__lesf2_nan>
+80006600:	00b56633          	or	a2,a0,a1
+80006604:	00161693          	sll	a3,a2,0x1
+80006608:	ca99                	beqz	a3,8000661e <.L__lesf2_zero>
+8000660a:	00064563          	bltz	a2,80006614 <.L__lesf2_negative>
+8000660e:	00a5b533          	sltu	a0,a1,a0
+80006612:	8082                	ret
+
+80006614 <.L__lesf2_negative>:
+80006614:	00b53533          	sltu	a0,a0,a1
+80006618:	8082                	ret
+
+8000661a <.L__lesf2_nan>:
+8000661a:	4505                	li	a0,1
+8000661c:	8082                	ret
+
+8000661e <.L__lesf2_zero>:
+8000661e:	4501                	li	a0,0
+80006620:	8082                	ret
+
+Disassembly of section .text.libc.__gtsf2:
+
+80006622 <__gtsf2>:
+80006622:	ff000637          	lui	a2,0xff000
+80006626:	00151693          	sll	a3,a0,0x1
+8000662a:	02d66363          	bltu	a2,a3,80006650 <.L__gtsf2_zero>
+8000662e:	00159693          	sll	a3,a1,0x1
+80006632:	00d66f63          	bltu	a2,a3,80006650 <.L__gtsf2_zero>
+80006636:	00b56633          	or	a2,a0,a1
+8000663a:	00161693          	sll	a3,a2,0x1
+8000663e:	ca89                	beqz	a3,80006650 <.L__gtsf2_zero>
+80006640:	00064563          	bltz	a2,8000664a <.L__gtsf2_negative>
+80006644:	00a5b533          	sltu	a0,a1,a0
+80006648:	8082                	ret
+
+8000664a <.L__gtsf2_negative>:
+8000664a:	00b53533          	sltu	a0,a0,a1
+8000664e:	8082                	ret
+
+80006650 <.L__gtsf2_zero>:
+80006650:	4501                	li	a0,0
+80006652:	8082                	ret
+
+Disassembly of section .text.libc.__gesf2:
+
+80006654 <__gesf2>:
+80006654:	ff000637          	lui	a2,0xff000
+80006658:	00151693          	sll	a3,a0,0x1
+8000665c:	02d66763          	bltu	a2,a3,8000668a <.L__gesf2_nan>
+80006660:	00159693          	sll	a3,a1,0x1
+80006664:	02d66363          	bltu	a2,a3,8000668a <.L__gesf2_nan>
+80006668:	00b56633          	or	a2,a0,a1
+8000666c:	00161693          	sll	a3,a2,0x1
+80006670:	ce99                	beqz	a3,8000668e <.L__gesf2_zero>
+80006672:	00064763          	bltz	a2,80006680 <.L__gesf2_negative>
+80006676:	00b53533          	sltu	a0,a0,a1
+8000667a:	40a00533          	neg	a0,a0
+8000667e:	8082                	ret
+
+80006680 <.L__gesf2_negative>:
+80006680:	00a5b533          	sltu	a0,a1,a0
+80006684:	40a00533          	neg	a0,a0
+80006688:	8082                	ret
+
+8000668a <.L__gesf2_nan>:
+8000668a:	557d                	li	a0,-1
+8000668c:	8082                	ret
+
+8000668e <.L__gesf2_zero>:
+8000668e:	4501                	li	a0,0
+80006690:	8082                	ret
+
+Disassembly of section .text.libc.__fixunssfsi:
+
+80006692 <__fixunssfsi>:
+80006692:	02a05763          	blez	a0,800066c0 <.L__fixunssfsi_zero_result>
+80006696:	00151593          	sll	a1,a0,0x1
+8000669a:	81e1                	srl	a1,a1,0x18
+8000669c:	f8158593          	add	a1,a1,-127
+800066a0:	0205c063          	bltz	a1,800066c0 <.L__fixunssfsi_zero_result>
+800066a4:	40b005b3          	neg	a1,a1
+800066a8:	05fd                	add	a1,a1,31
+800066aa:	0005c963          	bltz	a1,800066bc <.L__fixunssfsi_max_result>
+800066ae:	0522                	sll	a0,a0,0x8
+800066b0:	800006b7          	lui	a3,0x80000
+800066b4:	8d55                	or	a0,a0,a3
+800066b6:	00b55533          	srl	a0,a0,a1
+800066ba:	8082                	ret
+
+800066bc <.L__fixunssfsi_max_result>:
+800066bc:	557d                	li	a0,-1
+800066be:	8082                	ret
+
+800066c0 <.L__fixunssfsi_zero_result>:
+800066c0:	4501                	li	a0,0
+800066c2:	8082                	ret
+
+Disassembly of section .text.libc.__fixunsdfsi:
+
+800066c4 <__fixunsdfsi>:
+800066c4:	0205c563          	bltz	a1,800066ee <.L__fixunsdfsi_zero_result>
+800066c8:	0145d613          	srl	a2,a1,0x14
+800066cc:	c0160613          	add	a2,a2,-1023 # fefffc01 <__APB_SRAM_segment_end__+0xaf0dc01>
+800066d0:	00064f63          	bltz	a2,800066ee <.L__fixunsdfsi_zero_result>
+800066d4:	477d                	li	a4,31
+800066d6:	8f11                	sub	a4,a4,a2
+800066d8:	00074d63          	bltz	a4,800066f2 <.L__fixunsdfsi_overflow_result>
+800066dc:	8155                	srl	a0,a0,0x15
+800066de:	05ae                	sll	a1,a1,0xb
+800066e0:	8d4d                	or	a0,a0,a1
+800066e2:	800006b7          	lui	a3,0x80000
+800066e6:	8d55                	or	a0,a0,a3
+800066e8:	00e55533          	srl	a0,a0,a4
+800066ec:	8082                	ret
+
+800066ee <.L__fixunsdfsi_zero_result>:
+800066ee:	4501                	li	a0,0
+800066f0:	8082                	ret
+
+800066f2 <.L__fixunsdfsi_overflow_result>:
+800066f2:	557d                	li	a0,-1
+800066f4:	8082                	ret
+
+Disassembly of section .text.libc.__floatsisf:
+
+800066f6 <__floatsisf>:
+800066f6:	01f55613          	srl	a2,a0,0x1f
+800066fa:	0622                	sll	a2,a2,0x8
+800066fc:	09d60613          	add	a2,a2,157
+80006700:	cd29                	beqz	a0,8000675a <.L__floatsisf_done>
+80006702:	41f55693          	sra	a3,a0,0x1f
+80006706:	00d545b3          	xor	a1,a0,a3
+8000670a:	8d95                	sub	a1,a1,a3
+8000670c:	0105d693          	srl	a3,a1,0x10
+80006710:	e299                	bnez	a3,80006716 <.L1^B2>
+80006712:	05c2                	sll	a1,a1,0x10
+80006714:	1641                	add	a2,a2,-16
+
+80006716 <.L1^B2>:
+80006716:	0185d693          	srl	a3,a1,0x18
+8000671a:	e299                	bnez	a3,80006720 <.L2^B2>
+8000671c:	05a2                	sll	a1,a1,0x8
+8000671e:	1661                	add	a2,a2,-8
+
+80006720 <.L2^B2>:
+80006720:	01c5d693          	srl	a3,a1,0x1c
+80006724:	e299                	bnez	a3,8000672a <.L3^B2>
+80006726:	0592                	sll	a1,a1,0x4
+80006728:	1671                	add	a2,a2,-4
+
+8000672a <.L3^B2>:
+8000672a:	01e5d693          	srl	a3,a1,0x1e
+8000672e:	e299                	bnez	a3,80006734 <.L4^B2>
+80006730:	058a                	sll	a1,a1,0x2
+80006732:	1679                	add	a2,a2,-2
+
+80006734 <.L4^B2>:
+80006734:	0005c463          	bltz	a1,8000673c <.L5^B2>
+80006738:	0586                	sll	a1,a1,0x1
+8000673a:	167d                	add	a2,a2,-1
+
+8000673c <.L5^B2>:
+8000673c:	065e                	sll	a2,a2,0x17
+8000673e:	0085d513          	srl	a0,a1,0x8
+80006742:	05de                	sll	a1,a1,0x17
+80006744:	0005a333          	sltz	t1,a1
+80006748:	95ae                	add	a1,a1,a1
+8000674a:	959a                	add	a1,a1,t1
+8000674c:	0005d663          	bgez	a1,80006758 <.L__floatsisf_round_down>
+80006750:	95ae                	add	a1,a1,a1
+80006752:	00b035b3          	snez	a1,a1
+80006756:	952e                	add	a0,a0,a1
+
+80006758 <.L__floatsisf_round_down>:
+80006758:	9532                	add	a0,a0,a2
+
+8000675a <.L__floatsisf_done>:
+8000675a:	8082                	ret
+
+Disassembly of section .text.libc.__floatunsisf:
+
+8000675c <__floatunsisf>:
+8000675c:	c931                	beqz	a0,800067b0 <.L__floatunsisf_done>
+8000675e:	09d00613          	li	a2,157
+80006762:	01055693          	srl	a3,a0,0x10
+80006766:	e299                	bnez	a3,8000676c <.L1^B8>
+80006768:	0542                	sll	a0,a0,0x10
+8000676a:	1641                	add	a2,a2,-16
+
+8000676c <.L1^B8>:
+8000676c:	01855693          	srl	a3,a0,0x18
+80006770:	e299                	bnez	a3,80006776 <.L2^B8>
+80006772:	0522                	sll	a0,a0,0x8
+80006774:	1661                	add	a2,a2,-8
+
+80006776 <.L2^B8>:
+80006776:	01c55693          	srl	a3,a0,0x1c
+8000677a:	e299                	bnez	a3,80006780 <.L3^B6>
+8000677c:	0512                	sll	a0,a0,0x4
+8000677e:	1671                	add	a2,a2,-4
+
+80006780 <.L3^B6>:
+80006780:	01e55693          	srl	a3,a0,0x1e
+80006784:	e299                	bnez	a3,8000678a <.L4^B8>
+80006786:	050a                	sll	a0,a0,0x2
+80006788:	1679                	add	a2,a2,-2
+
+8000678a <.L4^B8>:
+8000678a:	00054463          	bltz	a0,80006792 <.L5^B6>
+8000678e:	0506                	sll	a0,a0,0x1
+80006790:	167d                	add	a2,a2,-1
+
+80006792 <.L5^B6>:
+80006792:	065e                	sll	a2,a2,0x17
+80006794:	01751593          	sll	a1,a0,0x17
+80006798:	8121                	srl	a0,a0,0x8
+8000679a:	0005a333          	sltz	t1,a1
+8000679e:	95ae                	add	a1,a1,a1
+800067a0:	959a                	add	a1,a1,t1
+800067a2:	0005d663          	bgez	a1,800067ae <.L__floatunsisf_round_down>
+800067a6:	95ae                	add	a1,a1,a1
+800067a8:	00b035b3          	snez	a1,a1
+800067ac:	952e                	add	a0,a0,a1
+
+800067ae <.L__floatunsisf_round_down>:
+800067ae:	9532                	add	a0,a0,a2
+
+800067b0 <.L__floatunsisf_done>:
+800067b0:	8082                	ret
+
+Disassembly of section .text.libc.__floatundisf:
+
+800067b2 <__floatundisf>:
+800067b2:	c5bd                	beqz	a1,80006820 <.L__floatundisf_high_word_zero>
+800067b4:	4701                	li	a4,0
+800067b6:	0105d693          	srl	a3,a1,0x10
+800067ba:	e299                	bnez	a3,800067c0 <.L8^B3>
+800067bc:	0741                	add	a4,a4,16
+800067be:	05c2                	sll	a1,a1,0x10
+
+800067c0 <.L8^B3>:
+800067c0:	0185d693          	srl	a3,a1,0x18
+800067c4:	e299                	bnez	a3,800067ca <.L4^B10>
+800067c6:	0721                	add	a4,a4,8
+800067c8:	05a2                	sll	a1,a1,0x8
+
+800067ca <.L4^B10>:
+800067ca:	01c5d693          	srl	a3,a1,0x1c
+800067ce:	e299                	bnez	a3,800067d4 <.L2^B10>
+800067d0:	0711                	add	a4,a4,4
+800067d2:	0592                	sll	a1,a1,0x4
+
+800067d4 <.L2^B10>:
+800067d4:	01e5d693          	srl	a3,a1,0x1e
+800067d8:	e299                	bnez	a3,800067de <.L1^B10>
+800067da:	0709                	add	a4,a4,2
+800067dc:	058a                	sll	a1,a1,0x2
+
+800067de <.L1^B10>:
+800067de:	0005c463          	bltz	a1,800067e6 <.L0^B3>
+800067e2:	0705                	add	a4,a4,1
+800067e4:	0586                	sll	a1,a1,0x1
+
+800067e6 <.L0^B3>:
+800067e6:	fff74613          	not	a2,a4
+800067ea:	00c556b3          	srl	a3,a0,a2
+800067ee:	8285                	srl	a3,a3,0x1
+800067f0:	8dd5                	or	a1,a1,a3
+800067f2:	00e51533          	sll	a0,a0,a4
+800067f6:	0be60613          	add	a2,a2,190
+800067fa:	00a03533          	snez	a0,a0
+800067fe:	8dc9                	or	a1,a1,a0
+
+80006800 <.L__floatundisf_round_and_pack>:
+80006800:	065e                	sll	a2,a2,0x17
+80006802:	0085d513          	srl	a0,a1,0x8
+80006806:	05de                	sll	a1,a1,0x17
+80006808:	0005a333          	sltz	t1,a1
+8000680c:	95ae                	add	a1,a1,a1
+8000680e:	959a                	add	a1,a1,t1
+80006810:	0005d663          	bgez	a1,8000681c <.L__floatundisf_round_down>
+80006814:	95ae                	add	a1,a1,a1
+80006816:	00b035b3          	snez	a1,a1
+8000681a:	952e                	add	a0,a0,a1
+
+8000681c <.L__floatundisf_round_down>:
+8000681c:	9532                	add	a0,a0,a2
+
+8000681e <.L__floatundisf_done>:
+8000681e:	8082                	ret
+
+80006820 <.L__floatundisf_high_word_zero>:
+80006820:	dd7d                	beqz	a0,8000681e <.L__floatundisf_done>
+80006822:	09d00613          	li	a2,157
+80006826:	01055693          	srl	a3,a0,0x10
+8000682a:	e299                	bnez	a3,80006830 <.L1^B11>
+8000682c:	0542                	sll	a0,a0,0x10
+8000682e:	1641                	add	a2,a2,-16
+
+80006830 <.L1^B11>:
+80006830:	01855693          	srl	a3,a0,0x18
+80006834:	e299                	bnez	a3,8000683a <.L2^B11>
+80006836:	0522                	sll	a0,a0,0x8
+80006838:	1661                	add	a2,a2,-8
+
+8000683a <.L2^B11>:
+8000683a:	01c55693          	srl	a3,a0,0x1c
+8000683e:	e299                	bnez	a3,80006844 <.L3^B8>
+80006840:	0512                	sll	a0,a0,0x4
+80006842:	1671                	add	a2,a2,-4
+
+80006844 <.L3^B8>:
+80006844:	01e55693          	srl	a3,a0,0x1e
+80006848:	e299                	bnez	a3,8000684e <.L4^B11>
+8000684a:	050a                	sll	a0,a0,0x2
+8000684c:	1679                	add	a2,a2,-2
+
+8000684e <.L4^B11>:
+8000684e:	00054463          	bltz	a0,80006856 <.L5^B8>
+80006852:	0506                	sll	a0,a0,0x1
+80006854:	167d                	add	a2,a2,-1
+
+80006856 <.L5^B8>:
+80006856:	85aa                	mv	a1,a0
+80006858:	4501                	li	a0,0
+8000685a:	b75d                	j	80006800 <.L__floatundisf_round_and_pack>
+
+Disassembly of section .text.libc.__truncdfsf2:
+
+8000685c <__truncdfsf2>:
+8000685c:	00159693          	sll	a3,a1,0x1
+80006860:	82d5                	srl	a3,a3,0x15
+80006862:	7ff00613          	li	a2,2047
+80006866:	04c68663          	beq	a3,a2,800068b2 <.L__truncdfsf2_inf_nan>
+8000686a:	c8068693          	add	a3,a3,-896 # 7ffffc80 <_extram_size+0x7dfffc80>
+8000686e:	02d05e63          	blez	a3,800068aa <.L__truncdfsf2_underflow>
+80006872:	0ff00613          	li	a2,255
+80006876:	04c6f263          	bgeu	a3,a2,800068ba <.L__truncdfsf2_inf>
+8000687a:	06de                	sll	a3,a3,0x17
+8000687c:	01f5d613          	srl	a2,a1,0x1f
+80006880:	067e                	sll	a2,a2,0x1f
+80006882:	8ed1                	or	a3,a3,a2
+80006884:	05b2                	sll	a1,a1,0xc
+80006886:	01455613          	srl	a2,a0,0x14
+8000688a:	8dd1                	or	a1,a1,a2
+8000688c:	81a5                	srl	a1,a1,0x9
+8000688e:	00251613          	sll	a2,a0,0x2
+80006892:	00062733          	sltz	a4,a2
+80006896:	9632                	add	a2,a2,a2
+80006898:	000627b3          	sltz	a5,a2
+8000689c:	9632                	add	a2,a2,a2
+8000689e:	963a                	add	a2,a2,a4
+800068a0:	c211                	beqz	a2,800068a4 <.L__truncdfsf2_no_round_tie>
+800068a2:	95be                	add	a1,a1,a5
+
+800068a4 <.L__truncdfsf2_no_round_tie>:
+800068a4:	00d58533          	add	a0,a1,a3
+800068a8:	8082                	ret
+
+800068aa <.L__truncdfsf2_underflow>:
+800068aa:	01f5d513          	srl	a0,a1,0x1f
+800068ae:	057e                	sll	a0,a0,0x1f
+800068b0:	8082                	ret
+
+800068b2 <.L__truncdfsf2_inf_nan>:
+800068b2:	00c59693          	sll	a3,a1,0xc
+800068b6:	8ec9                	or	a3,a3,a0
+800068b8:	ea81                	bnez	a3,800068c8 <.L__truncdfsf2_nan>
+
+800068ba <.L__truncdfsf2_inf>:
+800068ba:	81fd                	srl	a1,a1,0x1f
+800068bc:	05fe                	sll	a1,a1,0x1f
+800068be:	7f800537          	lui	a0,0x7f800
+800068c2:	8d4d                	or	a0,a0,a1
+800068c4:	4581                	li	a1,0
+800068c6:	8082                	ret
+
+800068c8 <.L__truncdfsf2_nan>:
+800068c8:	800006b7          	lui	a3,0x80000
+800068cc:	00d5f633          	and	a2,a1,a3
+800068d0:	058e                	sll	a1,a1,0x3
+800068d2:	8175                	srl	a0,a0,0x1d
+800068d4:	8d4d                	or	a0,a0,a1
+800068d6:	0506                	sll	a0,a0,0x1
+800068d8:	8105                	srl	a0,a0,0x1
+800068da:	8d51                	or	a0,a0,a2
+800068dc:	82a5                	srl	a3,a3,0x9
+800068de:	8d55                	or	a0,a0,a3
+800068e0:	8082                	ret
+
+Disassembly of section .text.libc.__SEGGER_RTL_ldouble_to_double:
+
+800068e2 <__SEGGER_RTL_ldouble_to_double>:
+800068e2:	4158                	lw	a4,4(a0)
+800068e4:	451c                	lw	a5,8(a0)
+800068e6:	4554                	lw	a3,12(a0)
+800068e8:	1141                	add	sp,sp,-16
+800068ea:	c23a                	sw	a4,4(sp)
+800068ec:	c43e                	sw	a5,8(sp)
+800068ee:	7771                	lui	a4,0xffffc
+800068f0:	00169793          	sll	a5,a3,0x1
+800068f4:	83c5                	srl	a5,a5,0x11
+800068f6:	40070713          	add	a4,a4,1024 # ffffc400 <__APB_SRAM_segment_end__+0xbf0a400>
+800068fa:	c636                	sw	a3,12(sp)
+800068fc:	97ba                	add	a5,a5,a4
+800068fe:	00f04a63          	bgtz	a5,80006912 <.L27>
+80006902:	800007b7          	lui	a5,0x80000
+80006906:	4701                	li	a4,0
+80006908:	8ff5                	and	a5,a5,a3
+
+8000690a <.L28>:
+8000690a:	853a                	mv	a0,a4
+8000690c:	85be                	mv	a1,a5
+8000690e:	0141                	add	sp,sp,16
+80006910:	8082                	ret
+
+80006912 <.L27>:
+80006912:	6711                	lui	a4,0x4
+80006914:	3ff70713          	add	a4,a4,1023 # 43ff <__HEAPSIZE__+0x3ff>
+80006918:	00e78c63          	beq	a5,a4,80006930 <.L29>
+8000691c:	7ff00713          	li	a4,2047
+80006920:	00f75a63          	bge	a4,a5,80006934 <.L30>
+80006924:	4781                	li	a5,0
+80006926:	4801                	li	a6,0
+80006928:	c43e                	sw	a5,8(sp)
+8000692a:	c642                	sw	a6,12(sp)
+8000692c:	c03e                	sw	a5,0(sp)
+8000692e:	c242                	sw	a6,4(sp)
+
+80006930 <.L29>:
+80006930:	7ff00793          	li	a5,2047
+
+80006934 <.L30>:
+80006934:	45a2                	lw	a1,8(sp)
+80006936:	4732                	lw	a4,12(sp)
+80006938:	80000637          	lui	a2,0x80000
+8000693c:	01c5d513          	srl	a0,a1,0x1c
+80006940:	8e79                	and	a2,a2,a4
+80006942:	0712                	sll	a4,a4,0x4
+80006944:	4692                	lw	a3,4(sp)
+80006946:	8f49                	or	a4,a4,a0
+80006948:	0732                	sll	a4,a4,0xc
+8000694a:	8331                	srl	a4,a4,0xc
+8000694c:	8e59                	or	a2,a2,a4
+8000694e:	82f1                	srl	a3,a3,0x1c
+80006950:	0592                	sll	a1,a1,0x4
+80006952:	07d2                	sll	a5,a5,0x14
+80006954:	00b6e733          	or	a4,a3,a1
+80006958:	8fd1                	or	a5,a5,a2
+8000695a:	bf45                	j	8000690a <.L28>
+
+Disassembly of section .text.libc.__SEGGER_RTL_float32_isnan:
+
+8000695c <__SEGGER_RTL_float32_isnan>:
+8000695c:	ff0007b7          	lui	a5,0xff000
+80006960:	0785                	add	a5,a5,1 # ff000001 <__APB_SRAM_segment_end__+0xaf0e001>
+80006962:	0506                	sll	a0,a0,0x1
+80006964:	00f53533          	sltu	a0,a0,a5
+80006968:	00154513          	xor	a0,a0,1
+8000696c:	8082                	ret
+
+Disassembly of section .text.libc.__SEGGER_RTL_float32_isinf:
+
+8000696e <__SEGGER_RTL_float32_isinf>:
+8000696e:	010007b7          	lui	a5,0x1000
+80006972:	0506                	sll	a0,a0,0x1
+80006974:	953e                	add	a0,a0,a5
+80006976:	00153513          	seqz	a0,a0
+8000697a:	8082                	ret
+
+Disassembly of section .text.libc.__SEGGER_RTL_float32_isnormal:
+
+8000697c <__SEGGER_RTL_float32_isnormal>:
+8000697c:	ff0007b7          	lui	a5,0xff000
+80006980:	0506                	sll	a0,a0,0x1
+80006982:	953e                	add	a0,a0,a5
+80006984:	fe0007b7          	lui	a5,0xfe000
+80006988:	00f53533          	sltu	a0,a0,a5
+8000698c:	8082                	ret
+
+Disassembly of section .text.libc.floorf:
+
+8000698e <floorf>:
+8000698e:	00151693          	sll	a3,a0,0x1
+80006992:	82e1                	srl	a3,a3,0x18
+80006994:	01755793          	srl	a5,a0,0x17
+80006998:	16fd                	add	a3,a3,-1 # 7fffffff <_extram_size+0x7dffffff>
+8000699a:	0fd00613          	li	a2,253
+8000699e:	872a                	mv	a4,a0
+800069a0:	0ff7f793          	zext.b	a5,a5
+800069a4:	00d67963          	bgeu	a2,a3,800069b6 <.L1240>
+800069a8:	e789                	bnez	a5,800069b2 <.L1241>
+800069aa:	800007b7          	lui	a5,0x80000
+800069ae:	00f57733          	and	a4,a0,a5
+
+800069b2 <.L1241>:
+800069b2:	853a                	mv	a0,a4
+800069b4:	8082                	ret
+
+800069b6 <.L1240>:
+800069b6:	f8178793          	add	a5,a5,-127 # 7fffff81 <_extram_size+0x7dffff81>
+800069ba:	0007d963          	bgez	a5,800069cc <.L1243>
+800069be:	00000513          	li	a0,0
+800069c2:	02075863          	bgez	a4,800069f2 <.L1242>
+800069c6:	a241a503          	lw	a0,-1500(gp) # 80003a2c <.Lmerged_single+0x18>
+800069ca:	8082                	ret
+
+800069cc <.L1243>:
+800069cc:	46d9                	li	a3,22
+800069ce:	02f6c263          	blt	a3,a5,800069f2 <.L1242>
+800069d2:	008006b7          	lui	a3,0x800
+800069d6:	fff68613          	add	a2,a3,-1 # 7fffff <__DLM_segment_end__+0x73ffff>
+800069da:	00f65633          	srl	a2,a2,a5
+800069de:	fff64513          	not	a0,a2
+800069e2:	8d79                	and	a0,a0,a4
+800069e4:	8f71                	and	a4,a4,a2
+800069e6:	c711                	beqz	a4,800069f2 <.L1242>
+800069e8:	00055563          	bgez	a0,800069f2 <.L1242>
+800069ec:	00f6d6b3          	srl	a3,a3,a5
+800069f0:	9536                	add	a0,a0,a3
+
+800069f2 <.L1242>:
+800069f2:	8082                	ret
+
+Disassembly of section .text.libc.__ashldi3:
+
+800069f4 <__ashldi3>:
+800069f4:	02067793          	and	a5,a2,32
+800069f8:	ef89                	bnez	a5,80006a12 <.L__ashldi3LongShift>
+800069fa:	00155793          	srl	a5,a0,0x1
+800069fe:	fff64713          	not	a4,a2
+80006a02:	00e7d7b3          	srl	a5,a5,a4
+80006a06:	00c595b3          	sll	a1,a1,a2
+80006a0a:	8ddd                	or	a1,a1,a5
+80006a0c:	00c51533          	sll	a0,a0,a2
+80006a10:	8082                	ret
+
+80006a12 <.L__ashldi3LongShift>:
+80006a12:	00c515b3          	sll	a1,a0,a2
+80006a16:	4501                	li	a0,0
+80006a18:	8082                	ret
+
+Disassembly of section .text.libc.__udivdi3:
+
+80006a1a <__udivdi3>:
+80006a1a:	1101                	add	sp,sp,-32
+80006a1c:	cc22                	sw	s0,24(sp)
+80006a1e:	ca26                	sw	s1,20(sp)
+80006a20:	c84a                	sw	s2,16(sp)
+80006a22:	c64e                	sw	s3,12(sp)
+80006a24:	ce06                	sw	ra,28(sp)
+80006a26:	c452                	sw	s4,8(sp)
+80006a28:	c256                	sw	s5,4(sp)
+80006a2a:	c05a                	sw	s6,0(sp)
+80006a2c:	842a                	mv	s0,a0
+80006a2e:	892e                	mv	s2,a1
+80006a30:	89b2                	mv	s3,a2
+80006a32:	84b6                	mv	s1,a3
+80006a34:	2e069263          	bnez	a3,80006d18 <.L47>
+80006a38:	ed99                	bnez	a1,80006a56 <.L48>
+80006a3a:	02c55433          	divu	s0,a0,a2
+
+80006a3e <.L49>:
+80006a3e:	40f2                	lw	ra,28(sp)
+80006a40:	8522                	mv	a0,s0
+80006a42:	4462                	lw	s0,24(sp)
+80006a44:	44d2                	lw	s1,20(sp)
+80006a46:	49b2                	lw	s3,12(sp)
+80006a48:	4a22                	lw	s4,8(sp)
+80006a4a:	4a92                	lw	s5,4(sp)
+80006a4c:	4b02                	lw	s6,0(sp)
+80006a4e:	85ca                	mv	a1,s2
+80006a50:	4942                	lw	s2,16(sp)
+80006a52:	6105                	add	sp,sp,32
+80006a54:	8082                	ret
+
+80006a56 <.L48>:
+80006a56:	010007b7          	lui	a5,0x1000
+80006a5a:	12f67863          	bgeu	a2,a5,80006b8a <.L50>
+80006a5e:	4791                	li	a5,4
+80006a60:	08c7e763          	bltu	a5,a2,80006aee <.L52>
+80006a64:	470d                	li	a4,3
+80006a66:	02e60263          	beq	a2,a4,80006a8a <.L54>
+80006a6a:	06f60a63          	beq	a2,a5,80006ade <.L55>
+80006a6e:	4785                	li	a5,1
+80006a70:	fcf607e3          	beq	a2,a5,80006a3e <.L49>
+80006a74:	4789                	li	a5,2
+80006a76:	3cf61063          	bne	a2,a5,80006e36 <.L88>
+80006a7a:	01f59793          	sll	a5,a1,0x1f
+80006a7e:	00155413          	srl	s0,a0,0x1
+80006a82:	8c5d                	or	s0,s0,a5
+80006a84:	0015d913          	srl	s2,a1,0x1
+80006a88:	bf5d                	j	80006a3e <.L49>
+
+80006a8a <.L54>:
+80006a8a:	555557b7          	lui	a5,0x55555
+80006a8e:	55578793          	add	a5,a5,1365 # 55555555 <_extram_size+0x53555555>
+80006a92:	02b7b6b3          	mulhu	a3,a5,a1
+80006a96:	02a7b633          	mulhu	a2,a5,a0
+80006a9a:	02a78733          	mul	a4,a5,a0
+80006a9e:	02b787b3          	mul	a5,a5,a1
+80006aa2:	97b2                	add	a5,a5,a2
+80006aa4:	00c7b633          	sltu	a2,a5,a2
+80006aa8:	9636                	add	a2,a2,a3
+80006aaa:	00f706b3          	add	a3,a4,a5
+80006aae:	00e6b733          	sltu	a4,a3,a4
+80006ab2:	9732                	add	a4,a4,a2
+80006ab4:	97ba                	add	a5,a5,a4
+80006ab6:	00e7b5b3          	sltu	a1,a5,a4
+80006aba:	9736                	add	a4,a4,a3
+80006abc:	00d736b3          	sltu	a3,a4,a3
+80006ac0:	0705                	add	a4,a4,1
+80006ac2:	97b6                	add	a5,a5,a3
+80006ac4:	00173713          	seqz	a4,a4
+80006ac8:	00d7b6b3          	sltu	a3,a5,a3
+80006acc:	962e                	add	a2,a2,a1
+80006ace:	97ba                	add	a5,a5,a4
+80006ad0:	00c68933          	add	s2,a3,a2
+80006ad4:	00e7b733          	sltu	a4,a5,a4
+80006ad8:	843e                	mv	s0,a5
+80006ada:	993a                	add	s2,s2,a4
+80006adc:	b78d                	j	80006a3e <.L49>
+
+80006ade <.L55>:
+80006ade:	01e59793          	sll	a5,a1,0x1e
+80006ae2:	00255413          	srl	s0,a0,0x2
+80006ae6:	8c5d                	or	s0,s0,a5
+80006ae8:	0025d913          	srl	s2,a1,0x2
+80006aec:	bf89                	j	80006a3e <.L49>
+
+80006aee <.L52>:
+80006aee:	67c1                	lui	a5,0x10
+80006af0:	02c5d6b3          	divu	a3,a1,a2
+80006af4:	01055713          	srl	a4,a0,0x10
+80006af8:	02f67a63          	bgeu	a2,a5,80006b2c <.L62>
+80006afc:	01051413          	sll	s0,a0,0x10
+80006b00:	8041                	srl	s0,s0,0x10
+80006b02:	02c687b3          	mul	a5,a3,a2
+80006b06:	40f587b3          	sub	a5,a1,a5
+80006b0a:	07c2                	sll	a5,a5,0x10
+80006b0c:	97ba                	add	a5,a5,a4
+80006b0e:	02c7d933          	divu	s2,a5,a2
+80006b12:	02c90733          	mul	a4,s2,a2
+80006b16:	0942                	sll	s2,s2,0x10
+80006b18:	8f99                	sub	a5,a5,a4
+80006b1a:	07c2                	sll	a5,a5,0x10
+80006b1c:	943e                	add	s0,s0,a5
+80006b1e:	02c45433          	divu	s0,s0,a2
+80006b22:	944a                	add	s0,s0,s2
+80006b24:	01243933          	sltu	s2,s0,s2
+80006b28:	9936                	add	s2,s2,a3
+80006b2a:	bf11                	j	80006a3e <.L49>
+
+80006b2c <.L62>:
+80006b2c:	02c687b3          	mul	a5,a3,a2
+80006b30:	01855613          	srl	a2,a0,0x18
+80006b34:	0ff77713          	zext.b	a4,a4
+80006b38:	0ff47413          	zext.b	s0,s0
+80006b3c:	8936                	mv	s2,a3
+80006b3e:	40f587b3          	sub	a5,a1,a5
+80006b42:	07a2                	sll	a5,a5,0x8
+80006b44:	963e                	add	a2,a2,a5
+80006b46:	033657b3          	divu	a5,a2,s3
+80006b4a:	033785b3          	mul	a1,a5,s3
+80006b4e:	07a2                	sll	a5,a5,0x8
+80006b50:	8e0d                	sub	a2,a2,a1
+80006b52:	0622                	sll	a2,a2,0x8
+80006b54:	9732                	add	a4,a4,a2
+80006b56:	033755b3          	divu	a1,a4,s3
+80006b5a:	97ae                	add	a5,a5,a1
+80006b5c:	07a2                	sll	a5,a5,0x8
+80006b5e:	03358633          	mul	a2,a1,s3
+80006b62:	8f11                	sub	a4,a4,a2
+80006b64:	00855613          	srl	a2,a0,0x8
+80006b68:	0ff67613          	zext.b	a2,a2
+80006b6c:	0722                	sll	a4,a4,0x8
+80006b6e:	9732                	add	a4,a4,a2
+80006b70:	03375633          	divu	a2,a4,s3
+80006b74:	97b2                	add	a5,a5,a2
+80006b76:	07a2                	sll	a5,a5,0x8
+80006b78:	03360533          	mul	a0,a2,s3
+80006b7c:	8f09                	sub	a4,a4,a0
+80006b7e:	0722                	sll	a4,a4,0x8
+80006b80:	943a                	add	s0,s0,a4
+80006b82:	03345433          	divu	s0,s0,s3
+80006b86:	943e                	add	s0,s0,a5
+80006b88:	bd5d                	j	80006a3e <.L49>
+
+80006b8a <.L50>:
+80006b8a:	80003ab7          	lui	s5,0x80003
+80006b8e:	3e0a8a93          	add	s5,s5,992 # 800033e0 <__SEGGER_RTL_Moeller_inverse_lut>
+80006b92:	0cc5f063          	bgeu	a1,a2,80006c52 <.L64>
+80006b96:	10000737          	lui	a4,0x10000
+80006b9a:	87b2                	mv	a5,a2
+80006b9c:	00e67563          	bgeu	a2,a4,80006ba6 <.L65>
+80006ba0:	00461793          	sll	a5,a2,0x4
+80006ba4:	4491                	li	s1,4
+
+80006ba6 <.L65>:
+80006ba6:	40000737          	lui	a4,0x40000
+80006baa:	00e7f463          	bgeu	a5,a4,80006bb2 <.L66>
+80006bae:	0489                	add	s1,s1,2
+80006bb0:	078a                	sll	a5,a5,0x2
+
+80006bb2 <.L66>:
+80006bb2:	0007c363          	bltz	a5,80006bb8 <.L67>
+80006bb6:	0485                	add	s1,s1,1
+
+80006bb8 <.L67>:
+80006bb8:	8626                	mv	a2,s1
+80006bba:	8522                	mv	a0,s0
+80006bbc:	85ca                	mv	a1,s2
+80006bbe:	3d1d                	jal	800069f4 <__ashldi3>
+80006bc0:	009994b3          	sll	s1,s3,s1
+80006bc4:	0164d793          	srl	a5,s1,0x16
+80006bc8:	e0078793          	add	a5,a5,-512 # fe00 <__AHB_SRAM_segment_size__+0x7e00>
+80006bcc:	0786                	sll	a5,a5,0x1
+80006bce:	97d6                	add	a5,a5,s5
+80006bd0:	0007d783          	lhu	a5,0(a5)
+80006bd4:	00b4d813          	srl	a6,s1,0xb
+80006bd8:	0014f713          	and	a4,s1,1
+80006bdc:	02f78633          	mul	a2,a5,a5
+80006be0:	0792                	sll	a5,a5,0x4
+80006be2:	0014d693          	srl	a3,s1,0x1
+80006be6:	0805                	add	a6,a6,1
+80006be8:	03063633          	mulhu	a2,a2,a6
+80006bec:	8f91                	sub	a5,a5,a2
+80006bee:	96ba                	add	a3,a3,a4
+80006bf0:	17fd                	add	a5,a5,-1
+80006bf2:	c319                	beqz	a4,80006bf8 <.L68>
+80006bf4:	0017d713          	srl	a4,a5,0x1
+
+80006bf8 <.L68>:
+80006bf8:	02f686b3          	mul	a3,a3,a5
+80006bfc:	8f15                	sub	a4,a4,a3
+80006bfe:	02e7b733          	mulhu	a4,a5,a4
+80006c02:	07be                	sll	a5,a5,0xf
+80006c04:	8305                	srl	a4,a4,0x1
+80006c06:	97ba                	add	a5,a5,a4
+80006c08:	8726                	mv	a4,s1
+80006c0a:	029786b3          	mul	a3,a5,s1
+80006c0e:	9736                	add	a4,a4,a3
+80006c10:	00d736b3          	sltu	a3,a4,a3
+80006c14:	8726                	mv	a4,s1
+80006c16:	9736                	add	a4,a4,a3
+80006c18:	0297b6b3          	mulhu	a3,a5,s1
+80006c1c:	9736                	add	a4,a4,a3
+80006c1e:	8f99                	sub	a5,a5,a4
+80006c20:	02b7b733          	mulhu	a4,a5,a1
+80006c24:	02b787b3          	mul	a5,a5,a1
+80006c28:	00a786b3          	add	a3,a5,a0
+80006c2c:	00f6b7b3          	sltu	a5,a3,a5
+80006c30:	95be                	add	a1,a1,a5
+80006c32:	00b707b3          	add	a5,a4,a1
+80006c36:	00178413          	add	s0,a5,1
+80006c3a:	02848733          	mul	a4,s1,s0
+80006c3e:	8d19                	sub	a0,a0,a4
+80006c40:	00a6f463          	bgeu	a3,a0,80006c48 <.L69>
+80006c44:	9526                	add	a0,a0,s1
+80006c46:	843e                	mv	s0,a5
+
+80006c48 <.L69>:
+80006c48:	00956363          	bltu	a0,s1,80006c4e <.L109>
+80006c4c:	0405                	add	s0,s0,1
+
+80006c4e <.L109>:
+80006c4e:	4901                	li	s2,0
+80006c50:	b3fd                	j	80006a3e <.L49>
+
+80006c52 <.L64>:
+80006c52:	02c5da33          	divu	s4,a1,a2
+80006c56:	10000737          	lui	a4,0x10000
+80006c5a:	87b2                	mv	a5,a2
+80006c5c:	02ca05b3          	mul	a1,s4,a2
+80006c60:	40b905b3          	sub	a1,s2,a1
+80006c64:	00e67563          	bgeu	a2,a4,80006c6e <.L71>
+80006c68:	00461793          	sll	a5,a2,0x4
+80006c6c:	4491                	li	s1,4
+
+80006c6e <.L71>:
+80006c6e:	40000737          	lui	a4,0x40000
+80006c72:	00e7f463          	bgeu	a5,a4,80006c7a <.L72>
+80006c76:	0489                	add	s1,s1,2
+80006c78:	078a                	sll	a5,a5,0x2
+
+80006c7a <.L72>:
+80006c7a:	0007c363          	bltz	a5,80006c80 <.L73>
+80006c7e:	0485                	add	s1,s1,1
+
+80006c80 <.L73>:
+80006c80:	8626                	mv	a2,s1
+80006c82:	8522                	mv	a0,s0
+80006c84:	3b85                	jal	800069f4 <__ashldi3>
+80006c86:	009994b3          	sll	s1,s3,s1
+80006c8a:	0164d793          	srl	a5,s1,0x16
+80006c8e:	e0078793          	add	a5,a5,-512
+80006c92:	0786                	sll	a5,a5,0x1
+80006c94:	9abe                	add	s5,s5,a5
+80006c96:	000ad783          	lhu	a5,0(s5)
+80006c9a:	00b4d813          	srl	a6,s1,0xb
+80006c9e:	0014f713          	and	a4,s1,1
+80006ca2:	02f78633          	mul	a2,a5,a5
+80006ca6:	0792                	sll	a5,a5,0x4
+80006ca8:	0014d693          	srl	a3,s1,0x1
+80006cac:	0805                	add	a6,a6,1
+80006cae:	03063633          	mulhu	a2,a2,a6
+80006cb2:	8f91                	sub	a5,a5,a2
+80006cb4:	96ba                	add	a3,a3,a4
+80006cb6:	17fd                	add	a5,a5,-1
+80006cb8:	c319                	beqz	a4,80006cbe <.L74>
+80006cba:	0017d713          	srl	a4,a5,0x1
+
+80006cbe <.L74>:
+80006cbe:	02f686b3          	mul	a3,a3,a5
+80006cc2:	8f15                	sub	a4,a4,a3
+80006cc4:	02e7b733          	mulhu	a4,a5,a4
+80006cc8:	07be                	sll	a5,a5,0xf
+80006cca:	8305                	srl	a4,a4,0x1
+80006ccc:	97ba                	add	a5,a5,a4
+80006cce:	8726                	mv	a4,s1
+80006cd0:	029786b3          	mul	a3,a5,s1
+80006cd4:	9736                	add	a4,a4,a3
+80006cd6:	00d736b3          	sltu	a3,a4,a3
+80006cda:	8726                	mv	a4,s1
+80006cdc:	9736                	add	a4,a4,a3
+80006cde:	0297b6b3          	mulhu	a3,a5,s1
+80006ce2:	9736                	add	a4,a4,a3
+80006ce4:	8f99                	sub	a5,a5,a4
+80006ce6:	02b7b733          	mulhu	a4,a5,a1
+80006cea:	02b787b3          	mul	a5,a5,a1
+80006cee:	00a786b3          	add	a3,a5,a0
+80006cf2:	00f6b7b3          	sltu	a5,a3,a5
+80006cf6:	95be                	add	a1,a1,a5
+80006cf8:	00b707b3          	add	a5,a4,a1
+80006cfc:	00178413          	add	s0,a5,1
+80006d00:	02848733          	mul	a4,s1,s0
+80006d04:	8d19                	sub	a0,a0,a4
+80006d06:	00a6f463          	bgeu	a3,a0,80006d0e <.L75>
+80006d0a:	9526                	add	a0,a0,s1
+80006d0c:	843e                	mv	s0,a5
+
+80006d0e <.L75>:
+80006d0e:	00956363          	bltu	a0,s1,80006d14 <.L76>
+80006d12:	0405                	add	s0,s0,1
+
+80006d14 <.L76>:
+80006d14:	8952                	mv	s2,s4
+80006d16:	b325                	j	80006a3e <.L49>
+
+80006d18 <.L47>:
+80006d18:	67c1                	lui	a5,0x10
+80006d1a:	8ab6                	mv	s5,a3
+80006d1c:	4a01                	li	s4,0
+80006d1e:	00f6f563          	bgeu	a3,a5,80006d28 <.L77>
+80006d22:	01069493          	sll	s1,a3,0x10
+80006d26:	4a41                	li	s4,16
+
+80006d28 <.L77>:
+80006d28:	010007b7          	lui	a5,0x1000
+80006d2c:	00f4f463          	bgeu	s1,a5,80006d34 <.L78>
+80006d30:	0a21                	add	s4,s4,8
+80006d32:	04a2                	sll	s1,s1,0x8
+
+80006d34 <.L78>:
+80006d34:	100007b7          	lui	a5,0x10000
+80006d38:	00f4f463          	bgeu	s1,a5,80006d40 <.L79>
+80006d3c:	0a11                	add	s4,s4,4
+80006d3e:	0492                	sll	s1,s1,0x4
+
+80006d40 <.L79>:
+80006d40:	400007b7          	lui	a5,0x40000
+80006d44:	00f4f463          	bgeu	s1,a5,80006d4c <.L80>
+80006d48:	0a09                	add	s4,s4,2
+80006d4a:	048a                	sll	s1,s1,0x2
+
+80006d4c <.L80>:
+80006d4c:	0004c363          	bltz	s1,80006d52 <.L81>
+80006d50:	0a05                	add	s4,s4,1
+
+80006d52 <.L81>:
+80006d52:	01f91793          	sll	a5,s2,0x1f
+80006d56:	8652                	mv	a2,s4
+80006d58:	00145493          	srl	s1,s0,0x1
+80006d5c:	854e                	mv	a0,s3
+80006d5e:	85d6                	mv	a1,s5
+80006d60:	8cdd                	or	s1,s1,a5
+80006d62:	3949                	jal	800069f4 <__ashldi3>
+80006d64:	0165d613          	srl	a2,a1,0x16
+80006d68:	800037b7          	lui	a5,0x80003
+80006d6c:	e0060613          	add	a2,a2,-512 # 7ffffe00 <_extram_size+0x7dfffe00>
+80006d70:	0606                	sll	a2,a2,0x1
+80006d72:	3e078793          	add	a5,a5,992 # 800033e0 <__SEGGER_RTL_Moeller_inverse_lut>
+80006d76:	97b2                	add	a5,a5,a2
+80006d78:	0007d783          	lhu	a5,0(a5)
+80006d7c:	00b5d513          	srl	a0,a1,0xb
+80006d80:	0015f713          	and	a4,a1,1
+80006d84:	02f78633          	mul	a2,a5,a5
+80006d88:	0792                	sll	a5,a5,0x4
+80006d8a:	0015d693          	srl	a3,a1,0x1
+80006d8e:	0505                	add	a0,a0,1 # 7f800001 <_extram_size+0x7d800001>
+80006d90:	02a63633          	mulhu	a2,a2,a0
+80006d94:	8f91                	sub	a5,a5,a2
+80006d96:	00195b13          	srl	s6,s2,0x1
+80006d9a:	96ba                	add	a3,a3,a4
+80006d9c:	17fd                	add	a5,a5,-1
+80006d9e:	c319                	beqz	a4,80006da4 <.L82>
+80006da0:	0017d713          	srl	a4,a5,0x1
+
+80006da4 <.L82>:
+80006da4:	02f686b3          	mul	a3,a3,a5
+80006da8:	8f15                	sub	a4,a4,a3
+80006daa:	02e7b733          	mulhu	a4,a5,a4
+80006dae:	07be                	sll	a5,a5,0xf
+80006db0:	8305                	srl	a4,a4,0x1
+80006db2:	97ba                	add	a5,a5,a4
+80006db4:	872e                	mv	a4,a1
+80006db6:	02b786b3          	mul	a3,a5,a1
+80006dba:	9736                	add	a4,a4,a3
+80006dbc:	00d736b3          	sltu	a3,a4,a3
+80006dc0:	872e                	mv	a4,a1
+80006dc2:	9736                	add	a4,a4,a3
+80006dc4:	02b7b6b3          	mulhu	a3,a5,a1
+80006dc8:	9736                	add	a4,a4,a3
+80006dca:	8f99                	sub	a5,a5,a4
+80006dcc:	0367b733          	mulhu	a4,a5,s6
+80006dd0:	036787b3          	mul	a5,a5,s6
+80006dd4:	009786b3          	add	a3,a5,s1
+80006dd8:	00f6b7b3          	sltu	a5,a3,a5
+80006ddc:	97da                	add	a5,a5,s6
+80006dde:	973e                	add	a4,a4,a5
+80006de0:	00170793          	add	a5,a4,1 # 40000001 <_extram_size+0x3e000001>
+80006de4:	02f58633          	mul	a2,a1,a5
+80006de8:	8c91                	sub	s1,s1,a2
+80006dea:	0096f463          	bgeu	a3,s1,80006df2 <.L83>
+80006dee:	94ae                	add	s1,s1,a1
+80006df0:	87ba                	mv	a5,a4
+
+80006df2 <.L83>:
+80006df2:	00b4e363          	bltu	s1,a1,80006df8 <.L84>
+80006df6:	0785                	add	a5,a5,1
+
+80006df8 <.L84>:
+80006df8:	477d                	li	a4,31
+80006dfa:	41470733          	sub	a4,a4,s4
+80006dfe:	00e7d633          	srl	a2,a5,a4
+80006e02:	c211                	beqz	a2,80006e06 <.L85>
+80006e04:	167d                	add	a2,a2,-1
+
+80006e06 <.L85>:
+80006e06:	02ca87b3          	mul	a5,s5,a2
+80006e0a:	03360733          	mul	a4,a2,s3
+80006e0e:	033636b3          	mulhu	a3,a2,s3
+80006e12:	40e40733          	sub	a4,s0,a4
+80006e16:	00e43433          	sltu	s0,s0,a4
+80006e1a:	97b6                	add	a5,a5,a3
+80006e1c:	40f907b3          	sub	a5,s2,a5
+80006e20:	40878433          	sub	s0,a5,s0
+80006e24:	01546763          	bltu	s0,s5,80006e32 <.L86>
+80006e28:	008a9463          	bne	s5,s0,80006e30 <.L95>
+80006e2c:	01376363          	bltu	a4,s3,80006e32 <.L86>
+
+80006e30 <.L95>:
+80006e30:	0605                	add	a2,a2,1
+
+80006e32 <.L86>:
+80006e32:	8432                	mv	s0,a2
+80006e34:	bd29                	j	80006c4e <.L109>
+
+80006e36 <.L88>:
+80006e36:	4401                	li	s0,0
+80006e38:	bd19                	j	80006c4e <.L109>
+
+Disassembly of section .text.libc.__umoddi3:
+
+80006e3a <__umoddi3>:
+80006e3a:	1101                	add	sp,sp,-32
+80006e3c:	cc22                	sw	s0,24(sp)
+80006e3e:	ca26                	sw	s1,20(sp)
+80006e40:	c84a                	sw	s2,16(sp)
+80006e42:	c64e                	sw	s3,12(sp)
+80006e44:	c452                	sw	s4,8(sp)
+80006e46:	ce06                	sw	ra,28(sp)
+80006e48:	c256                	sw	s5,4(sp)
+80006e4a:	c05a                	sw	s6,0(sp)
+80006e4c:	892a                	mv	s2,a0
+80006e4e:	84ae                	mv	s1,a1
+80006e50:	8432                	mv	s0,a2
+80006e52:	89b6                	mv	s3,a3
+80006e54:	8a36                	mv	s4,a3
+80006e56:	2e069e63          	bnez	a3,80007152 <.L111>
+80006e5a:	e589                	bnez	a1,80006e64 <.L112>
+80006e5c:	02c557b3          	divu	a5,a0,a2
+
+80006e60 <.L174>:
+80006e60:	4701                	li	a4,0
+80006e62:	a815                	j	80006e96 <.L113>
+
+80006e64 <.L112>:
+80006e64:	010007b7          	lui	a5,0x1000
+80006e68:	16f67163          	bgeu	a2,a5,80006fca <.L114>
+80006e6c:	4791                	li	a5,4
+80006e6e:	0cc7e063          	bltu	a5,a2,80006f2e <.L116>
+80006e72:	470d                	li	a4,3
+80006e74:	04e60d63          	beq	a2,a4,80006ece <.L118>
+80006e78:	0af60363          	beq	a2,a5,80006f1e <.L119>
+80006e7c:	4785                	li	a5,1
+80006e7e:	3ef60763          	beq	a2,a5,8000726c <.L152>
+80006e82:	4789                	li	a5,2
+80006e84:	3ef61763          	bne	a2,a5,80007272 <.L153>
+80006e88:	01f59713          	sll	a4,a1,0x1f
+80006e8c:	00155793          	srl	a5,a0,0x1
+80006e90:	8fd9                	or	a5,a5,a4
+80006e92:	0015d713          	srl	a4,a1,0x1
+
+80006e96 <.L113>:
+80006e96:	02870733          	mul	a4,a4,s0
+80006e9a:	40f2                	lw	ra,28(sp)
+80006e9c:	4a22                	lw	s4,8(sp)
+80006e9e:	4a92                	lw	s5,4(sp)
+80006ea0:	4b02                	lw	s6,0(sp)
+80006ea2:	02f989b3          	mul	s3,s3,a5
+80006ea6:	02f40533          	mul	a0,s0,a5
+80006eaa:	99ba                	add	s3,s3,a4
+80006eac:	02f43433          	mulhu	s0,s0,a5
+80006eb0:	40a90533          	sub	a0,s2,a0
+80006eb4:	00a935b3          	sltu	a1,s2,a0
+80006eb8:	4942                	lw	s2,16(sp)
+80006eba:	99a2                	add	s3,s3,s0
+80006ebc:	4462                	lw	s0,24(sp)
+80006ebe:	413484b3          	sub	s1,s1,s3
+80006ec2:	40b485b3          	sub	a1,s1,a1
+80006ec6:	49b2                	lw	s3,12(sp)
+80006ec8:	44d2                	lw	s1,20(sp)
+80006eca:	6105                	add	sp,sp,32
+80006ecc:	8082                	ret
+
+80006ece <.L118>:
+80006ece:	555557b7          	lui	a5,0x55555
+80006ed2:	55578793          	add	a5,a5,1365 # 55555555 <_extram_size+0x53555555>
+80006ed6:	02b7b6b3          	mulhu	a3,a5,a1
+80006eda:	02a7b633          	mulhu	a2,a5,a0
+80006ede:	02a78733          	mul	a4,a5,a0
+80006ee2:	02b787b3          	mul	a5,a5,a1
+80006ee6:	97b2                	add	a5,a5,a2
+80006ee8:	00c7b633          	sltu	a2,a5,a2
+80006eec:	9636                	add	a2,a2,a3
+80006eee:	00f706b3          	add	a3,a4,a5
+80006ef2:	00e6b733          	sltu	a4,a3,a4
+80006ef6:	9732                	add	a4,a4,a2
+80006ef8:	97ba                	add	a5,a5,a4
+80006efa:	00e7b5b3          	sltu	a1,a5,a4
+80006efe:	9736                	add	a4,a4,a3
+80006f00:	00d736b3          	sltu	a3,a4,a3
+80006f04:	0705                	add	a4,a4,1
+80006f06:	97b6                	add	a5,a5,a3
+80006f08:	00173713          	seqz	a4,a4
+80006f0c:	00d7b6b3          	sltu	a3,a5,a3
+80006f10:	962e                	add	a2,a2,a1
+80006f12:	97ba                	add	a5,a5,a4
+80006f14:	96b2                	add	a3,a3,a2
+80006f16:	00e7b733          	sltu	a4,a5,a4
+80006f1a:	9736                	add	a4,a4,a3
+80006f1c:	bfad                	j	80006e96 <.L113>
+
+80006f1e <.L119>:
+80006f1e:	01e59713          	sll	a4,a1,0x1e
+80006f22:	00255793          	srl	a5,a0,0x2
+80006f26:	8fd9                	or	a5,a5,a4
+80006f28:	0025d713          	srl	a4,a1,0x2
+80006f2c:	b7ad                	j	80006e96 <.L113>
+
+80006f2e <.L116>:
+80006f2e:	67c1                	lui	a5,0x10
+80006f30:	02c5d733          	divu	a4,a1,a2
+80006f34:	01055693          	srl	a3,a0,0x10
+80006f38:	02f67b63          	bgeu	a2,a5,80006f6e <.L126>
+80006f3c:	02c707b3          	mul	a5,a4,a2
+80006f40:	40f587b3          	sub	a5,a1,a5
+80006f44:	07c2                	sll	a5,a5,0x10
+80006f46:	97b6                	add	a5,a5,a3
+80006f48:	02c7d633          	divu	a2,a5,a2
+80006f4c:	028606b3          	mul	a3,a2,s0
+80006f50:	0642                	sll	a2,a2,0x10
+80006f52:	8f95                	sub	a5,a5,a3
+80006f54:	01079693          	sll	a3,a5,0x10
+80006f58:	01051793          	sll	a5,a0,0x10
+80006f5c:	83c1                	srl	a5,a5,0x10
+80006f5e:	97b6                	add	a5,a5,a3
+80006f60:	0287d7b3          	divu	a5,a5,s0
+80006f64:	97b2                	add	a5,a5,a2
+80006f66:	00c7b633          	sltu	a2,a5,a2
+80006f6a:	9732                	add	a4,a4,a2
+80006f6c:	b72d                	j	80006e96 <.L113>
+
+80006f6e <.L126>:
+80006f6e:	02c707b3          	mul	a5,a4,a2
+80006f72:	01855613          	srl	a2,a0,0x18
+80006f76:	0ff6f693          	zext.b	a3,a3
+80006f7a:	40f587b3          	sub	a5,a1,a5
+80006f7e:	07a2                	sll	a5,a5,0x8
+80006f80:	963e                	add	a2,a2,a5
+80006f82:	028657b3          	divu	a5,a2,s0
+80006f86:	028785b3          	mul	a1,a5,s0
+80006f8a:	07a2                	sll	a5,a5,0x8
+80006f8c:	8e0d                	sub	a2,a2,a1
+80006f8e:	0622                	sll	a2,a2,0x8
+80006f90:	96b2                	add	a3,a3,a2
+80006f92:	0286d5b3          	divu	a1,a3,s0
+80006f96:	97ae                	add	a5,a5,a1
+80006f98:	07a2                	sll	a5,a5,0x8
+80006f9a:	02858633          	mul	a2,a1,s0
+80006f9e:	8e91                	sub	a3,a3,a2
+80006fa0:	00855613          	srl	a2,a0,0x8
+80006fa4:	0ff67613          	zext.b	a2,a2
+80006fa8:	06a2                	sll	a3,a3,0x8
+80006faa:	96b2                	add	a3,a3,a2
+80006fac:	0286d633          	divu	a2,a3,s0
+80006fb0:	97b2                	add	a5,a5,a2
+80006fb2:	07a2                	sll	a5,a5,0x8
+80006fb4:	02860533          	mul	a0,a2,s0
+80006fb8:	0ff97613          	zext.b	a2,s2
+80006fbc:	8e89                	sub	a3,a3,a0
+80006fbe:	06a2                	sll	a3,a3,0x8
+80006fc0:	96b2                	add	a3,a3,a2
+80006fc2:	0286d6b3          	divu	a3,a3,s0
+80006fc6:	97b6                	add	a5,a5,a3
+80006fc8:	b5f9                	j	80006e96 <.L113>
+
+80006fca <.L114>:
+80006fca:	80003b37          	lui	s6,0x80003
+80006fce:	3e0b0b13          	add	s6,s6,992 # 800033e0 <__SEGGER_RTL_Moeller_inverse_lut>
+80006fd2:	0ac5fe63          	bgeu	a1,a2,8000708e <.L128>
+80006fd6:	10000737          	lui	a4,0x10000
+80006fda:	87b2                	mv	a5,a2
+80006fdc:	00e67563          	bgeu	a2,a4,80006fe6 <.L129>
+80006fe0:	00461793          	sll	a5,a2,0x4
+80006fe4:	4a11                	li	s4,4
+
+80006fe6 <.L129>:
+80006fe6:	40000737          	lui	a4,0x40000
+80006fea:	00e7f463          	bgeu	a5,a4,80006ff2 <.L130>
+80006fee:	0a09                	add	s4,s4,2
+80006ff0:	078a                	sll	a5,a5,0x2
+
+80006ff2 <.L130>:
+80006ff2:	0007c363          	bltz	a5,80006ff8 <.L131>
+80006ff6:	0a05                	add	s4,s4,1
+
+80006ff8 <.L131>:
+80006ff8:	8652                	mv	a2,s4
+80006ffa:	854a                	mv	a0,s2
+80006ffc:	85a6                	mv	a1,s1
+80006ffe:	3add                	jal	800069f4 <__ashldi3>
+80007000:	01441a33          	sll	s4,s0,s4
+80007004:	016a5793          	srl	a5,s4,0x16
+80007008:	e0078793          	add	a5,a5,-512 # fe00 <__AHB_SRAM_segment_size__+0x7e00>
+8000700c:	0786                	sll	a5,a5,0x1
+8000700e:	97da                	add	a5,a5,s6
+80007010:	0007d783          	lhu	a5,0(a5)
+80007014:	00ba5813          	srl	a6,s4,0xb
+80007018:	001a7713          	and	a4,s4,1
+8000701c:	02f78633          	mul	a2,a5,a5
+80007020:	0792                	sll	a5,a5,0x4
+80007022:	001a5693          	srl	a3,s4,0x1
+80007026:	0805                	add	a6,a6,1
+80007028:	03063633          	mulhu	a2,a2,a6
+8000702c:	8f91                	sub	a5,a5,a2
+8000702e:	96ba                	add	a3,a3,a4
+80007030:	17fd                	add	a5,a5,-1
+80007032:	c319                	beqz	a4,80007038 <.L132>
+80007034:	0017d713          	srl	a4,a5,0x1
+
+80007038 <.L132>:
+80007038:	02f686b3          	mul	a3,a3,a5
+8000703c:	8f15                	sub	a4,a4,a3
+8000703e:	02e7b733          	mulhu	a4,a5,a4
+80007042:	07be                	sll	a5,a5,0xf
+80007044:	8305                	srl	a4,a4,0x1
+80007046:	97ba                	add	a5,a5,a4
+80007048:	8752                	mv	a4,s4
+8000704a:	034786b3          	mul	a3,a5,s4
+8000704e:	9736                	add	a4,a4,a3
+80007050:	00d736b3          	sltu	a3,a4,a3
+80007054:	8752                	mv	a4,s4
+80007056:	9736                	add	a4,a4,a3
+80007058:	0347b6b3          	mulhu	a3,a5,s4
+8000705c:	9736                	add	a4,a4,a3
+8000705e:	8f99                	sub	a5,a5,a4
+80007060:	02b7b733          	mulhu	a4,a5,a1
+80007064:	02b787b3          	mul	a5,a5,a1
+80007068:	00a786b3          	add	a3,a5,a0
+8000706c:	00f6b7b3          	sltu	a5,a3,a5
+80007070:	95be                	add	a1,a1,a5
+80007072:	972e                	add	a4,a4,a1
+80007074:	00170793          	add	a5,a4,1 # 40000001 <_extram_size+0x3e000001>
+80007078:	02fa0633          	mul	a2,s4,a5
+8000707c:	8d11                	sub	a0,a0,a2
+8000707e:	00a6f463          	bgeu	a3,a0,80007086 <.L133>
+80007082:	9552                	add	a0,a0,s4
+80007084:	87ba                	mv	a5,a4
+
+80007086 <.L133>:
+80007086:	dd456de3          	bltu	a0,s4,80006e60 <.L174>
+
+8000708a <.L160>:
+8000708a:	0785                	add	a5,a5,1
+8000708c:	bbd1                	j	80006e60 <.L174>
+
+8000708e <.L128>:
+8000708e:	02c5dab3          	divu	s5,a1,a2
+80007092:	10000737          	lui	a4,0x10000
+80007096:	87b2                	mv	a5,a2
+80007098:	02ca85b3          	mul	a1,s5,a2
+8000709c:	40b485b3          	sub	a1,s1,a1
+800070a0:	00e67563          	bgeu	a2,a4,800070aa <.L135>
+800070a4:	00461793          	sll	a5,a2,0x4
+800070a8:	4a11                	li	s4,4
+
+800070aa <.L135>:
+800070aa:	40000737          	lui	a4,0x40000
+800070ae:	00e7f463          	bgeu	a5,a4,800070b6 <.L136>
+800070b2:	0a09                	add	s4,s4,2
+800070b4:	078a                	sll	a5,a5,0x2
+
+800070b6 <.L136>:
+800070b6:	0007c363          	bltz	a5,800070bc <.L137>
+800070ba:	0a05                	add	s4,s4,1
+
+800070bc <.L137>:
+800070bc:	8652                	mv	a2,s4
+800070be:	854a                	mv	a0,s2
+800070c0:	3a15                	jal	800069f4 <__ashldi3>
+800070c2:	01441a33          	sll	s4,s0,s4
+800070c6:	016a5793          	srl	a5,s4,0x16
+800070ca:	e0078793          	add	a5,a5,-512
+800070ce:	0786                	sll	a5,a5,0x1
+800070d0:	9b3e                	add	s6,s6,a5
+800070d2:	000b5783          	lhu	a5,0(s6)
+800070d6:	00ba5813          	srl	a6,s4,0xb
+800070da:	001a7713          	and	a4,s4,1
+800070de:	02f78633          	mul	a2,a5,a5
+800070e2:	0792                	sll	a5,a5,0x4
+800070e4:	001a5693          	srl	a3,s4,0x1
+800070e8:	0805                	add	a6,a6,1
+800070ea:	03063633          	mulhu	a2,a2,a6
+800070ee:	8f91                	sub	a5,a5,a2
+800070f0:	96ba                	add	a3,a3,a4
+800070f2:	17fd                	add	a5,a5,-1
+800070f4:	c319                	beqz	a4,800070fa <.L138>
+800070f6:	0017d713          	srl	a4,a5,0x1
+
+800070fa <.L138>:
+800070fa:	02f686b3          	mul	a3,a3,a5
+800070fe:	8f15                	sub	a4,a4,a3
+80007100:	02e7b733          	mulhu	a4,a5,a4
+80007104:	07be                	sll	a5,a5,0xf
+80007106:	8305                	srl	a4,a4,0x1
+80007108:	97ba                	add	a5,a5,a4
+8000710a:	8752                	mv	a4,s4
+8000710c:	034786b3          	mul	a3,a5,s4
+80007110:	9736                	add	a4,a4,a3
+80007112:	00d736b3          	sltu	a3,a4,a3
+80007116:	8752                	mv	a4,s4
+80007118:	9736                	add	a4,a4,a3
+8000711a:	0347b6b3          	mulhu	a3,a5,s4
+8000711e:	9736                	add	a4,a4,a3
+80007120:	8f99                	sub	a5,a5,a4
+80007122:	02b7b733          	mulhu	a4,a5,a1
+80007126:	02b787b3          	mul	a5,a5,a1
+8000712a:	00a786b3          	add	a3,a5,a0
+8000712e:	00f6b7b3          	sltu	a5,a3,a5
+80007132:	95be                	add	a1,a1,a5
+80007134:	972e                	add	a4,a4,a1
+80007136:	00170793          	add	a5,a4,1 # 40000001 <_extram_size+0x3e000001>
+8000713a:	02fa0633          	mul	a2,s4,a5
+8000713e:	8d11                	sub	a0,a0,a2
+80007140:	00a6f463          	bgeu	a3,a0,80007148 <.L139>
+80007144:	9552                	add	a0,a0,s4
+80007146:	87ba                	mv	a5,a4
+
+80007148 <.L139>:
+80007148:	01456363          	bltu	a0,s4,8000714e <.L140>
+8000714c:	0785                	add	a5,a5,1
+
+8000714e <.L140>:
+8000714e:	8756                	mv	a4,s5
+80007150:	b399                	j	80006e96 <.L113>
+
+80007152 <.L111>:
+80007152:	67c1                	lui	a5,0x10
+80007154:	4a81                	li	s5,0
+80007156:	00f6f563          	bgeu	a3,a5,80007160 <.L141>
+8000715a:	01069a13          	sll	s4,a3,0x10
+8000715e:	4ac1                	li	s5,16
+
+80007160 <.L141>:
+80007160:	010007b7          	lui	a5,0x1000
+80007164:	00fa7463          	bgeu	s4,a5,8000716c <.L142>
+80007168:	0aa1                	add	s5,s5,8
+8000716a:	0a22                	sll	s4,s4,0x8
+
+8000716c <.L142>:
+8000716c:	100007b7          	lui	a5,0x10000
+80007170:	00fa7463          	bgeu	s4,a5,80007178 <.L143>
+80007174:	0a91                	add	s5,s5,4
+80007176:	0a12                	sll	s4,s4,0x4
+
+80007178 <.L143>:
+80007178:	400007b7          	lui	a5,0x40000
+8000717c:	00fa7463          	bgeu	s4,a5,80007184 <.L144>
+80007180:	0a89                	add	s5,s5,2
+80007182:	0a0a                	sll	s4,s4,0x2
+
+80007184 <.L144>:
+80007184:	000a4363          	bltz	s4,8000718a <.L145>
+80007188:	0a85                	add	s5,s5,1
+
+8000718a <.L145>:
+8000718a:	01f49793          	sll	a5,s1,0x1f
+8000718e:	8656                	mv	a2,s5
+80007190:	00195a13          	srl	s4,s2,0x1
+80007194:	8522                	mv	a0,s0
+80007196:	85ce                	mv	a1,s3
+80007198:	0147ea33          	or	s4,a5,s4
+8000719c:	38a1                	jal	800069f4 <__ashldi3>
+8000719e:	0165d613          	srl	a2,a1,0x16
+800071a2:	800037b7          	lui	a5,0x80003
+800071a6:	e0060613          	add	a2,a2,-512
+800071aa:	0606                	sll	a2,a2,0x1
+800071ac:	3e078793          	add	a5,a5,992 # 800033e0 <__SEGGER_RTL_Moeller_inverse_lut>
+800071b0:	97b2                	add	a5,a5,a2
+800071b2:	0007d783          	lhu	a5,0(a5)
+800071b6:	00b5d513          	srl	a0,a1,0xb
+800071ba:	0015f713          	and	a4,a1,1
+800071be:	02f78633          	mul	a2,a5,a5
+800071c2:	0792                	sll	a5,a5,0x4
+800071c4:	0015d693          	srl	a3,a1,0x1
+800071c8:	0505                	add	a0,a0,1
+800071ca:	02a63633          	mulhu	a2,a2,a0
+800071ce:	8f91                	sub	a5,a5,a2
+800071d0:	0014db13          	srl	s6,s1,0x1
+800071d4:	96ba                	add	a3,a3,a4
+800071d6:	17fd                	add	a5,a5,-1
+800071d8:	c319                	beqz	a4,800071de <.L146>
+800071da:	0017d713          	srl	a4,a5,0x1
+
+800071de <.L146>:
+800071de:	02f686b3          	mul	a3,a3,a5
+800071e2:	8f15                	sub	a4,a4,a3
+800071e4:	02e7b733          	mulhu	a4,a5,a4
+800071e8:	07be                	sll	a5,a5,0xf
+800071ea:	8305                	srl	a4,a4,0x1
+800071ec:	97ba                	add	a5,a5,a4
+800071ee:	872e                	mv	a4,a1
+800071f0:	02b786b3          	mul	a3,a5,a1
+800071f4:	9736                	add	a4,a4,a3
+800071f6:	00d736b3          	sltu	a3,a4,a3
+800071fa:	872e                	mv	a4,a1
+800071fc:	9736                	add	a4,a4,a3
+800071fe:	02b7b6b3          	mulhu	a3,a5,a1
+80007202:	9736                	add	a4,a4,a3
+80007204:	8f99                	sub	a5,a5,a4
+80007206:	0367b733          	mulhu	a4,a5,s6
+8000720a:	036787b3          	mul	a5,a5,s6
+8000720e:	014786b3          	add	a3,a5,s4
+80007212:	00f6b7b3          	sltu	a5,a3,a5
+80007216:	97da                	add	a5,a5,s6
+80007218:	973e                	add	a4,a4,a5
+8000721a:	00170793          	add	a5,a4,1
+8000721e:	02f58633          	mul	a2,a1,a5
+80007222:	40ca0a33          	sub	s4,s4,a2
+80007226:	0146f463          	bgeu	a3,s4,8000722e <.L147>
+8000722a:	9a2e                	add	s4,s4,a1
+8000722c:	87ba                	mv	a5,a4
+
+8000722e <.L147>:
+8000722e:	00ba6363          	bltu	s4,a1,80007234 <.L148>
+80007232:	0785                	add	a5,a5,1
+
+80007234 <.L148>:
+80007234:	477d                	li	a4,31
+80007236:	41570733          	sub	a4,a4,s5
+8000723a:	00e7d7b3          	srl	a5,a5,a4
+8000723e:	c391                	beqz	a5,80007242 <.L149>
+80007240:	17fd                	add	a5,a5,-1
+
+80007242 <.L149>:
+80007242:	0287b633          	mulhu	a2,a5,s0
+80007246:	02f98733          	mul	a4,s3,a5
+8000724a:	028786b3          	mul	a3,a5,s0
+8000724e:	9732                	add	a4,a4,a2
+80007250:	40e48733          	sub	a4,s1,a4
+80007254:	40d906b3          	sub	a3,s2,a3
+80007258:	00d93633          	sltu	a2,s2,a3
+8000725c:	8f11                	sub	a4,a4,a2
+8000725e:	c13761e3          	bltu	a4,s3,80006e60 <.L174>
+80007262:	e2e994e3          	bne	s3,a4,8000708a <.L160>
+80007266:	be86ede3          	bltu	a3,s0,80006e60 <.L174>
+8000726a:	b505                	j	8000708a <.L160>
+
+8000726c <.L152>:
+8000726c:	87aa                	mv	a5,a0
+8000726e:	872e                	mv	a4,a1
+80007270:	b11d                	j	80006e96 <.L113>
+
+80007272 <.L153>:
+80007272:	4781                	li	a5,0
+80007274:	b6f5                	j	80006e60 <.L174>
+
+Disassembly of section .text.libc.abs:
+
+80007276 <abs>:
+80007276:	41f55793          	sra	a5,a0,0x1f
+8000727a:	8d3d                	xor	a0,a0,a5
+8000727c:	8d1d                	sub	a0,a0,a5
+8000727e:	8082                	ret
+
+Disassembly of section .text.libc.memcpy:
+
+80007280 <memcpy>:
+80007280:	c251                	beqz	a2,80007304 <.Lmemcpy_done>
+80007282:	87aa                	mv	a5,a0
+80007284:	00b546b3          	xor	a3,a0,a1
+80007288:	06fa                	sll	a3,a3,0x1e
+8000728a:	e2bd                	bnez	a3,800072f0 <.Lmemcpy_byte_copy>
+8000728c:	01e51693          	sll	a3,a0,0x1e
+80007290:	ce81                	beqz	a3,800072a8 <.Lmemcpy_aligned>
+
+80007292 <.Lmemcpy_word_align>:
+80007292:	00058683          	lb	a3,0(a1)
+80007296:	00d50023          	sb	a3,0(a0)
+8000729a:	0585                	add	a1,a1,1
+8000729c:	0505                	add	a0,a0,1
+8000729e:	167d                	add	a2,a2,-1
+800072a0:	c22d                	beqz	a2,80007302 <.Lmemcpy_memcpy_end>
+800072a2:	01e51693          	sll	a3,a0,0x1e
+800072a6:	f6f5                	bnez	a3,80007292 <.Lmemcpy_word_align>
+
+800072a8 <.Lmemcpy_aligned>:
+800072a8:	02000693          	li	a3,32
+800072ac:	02d66763          	bltu	a2,a3,800072da <.Lmemcpy_word_copy>
+
+800072b0 <.Lmemcpy_aligned_block_copy_loop>:
+800072b0:	4198                	lw	a4,0(a1)
+800072b2:	c118                	sw	a4,0(a0)
+800072b4:	41d8                	lw	a4,4(a1)
+800072b6:	c158                	sw	a4,4(a0)
+800072b8:	4598                	lw	a4,8(a1)
+800072ba:	c518                	sw	a4,8(a0)
+800072bc:	45d8                	lw	a4,12(a1)
+800072be:	c558                	sw	a4,12(a0)
+800072c0:	4998                	lw	a4,16(a1)
+800072c2:	c918                	sw	a4,16(a0)
+800072c4:	49d8                	lw	a4,20(a1)
+800072c6:	c958                	sw	a4,20(a0)
+800072c8:	4d98                	lw	a4,24(a1)
+800072ca:	cd18                	sw	a4,24(a0)
+800072cc:	4dd8                	lw	a4,28(a1)
+800072ce:	cd58                	sw	a4,28(a0)
+800072d0:	9536                	add	a0,a0,a3
+800072d2:	95b6                	add	a1,a1,a3
+800072d4:	8e15                	sub	a2,a2,a3
+800072d6:	fcd67de3          	bgeu	a2,a3,800072b0 <.Lmemcpy_aligned_block_copy_loop>
+
+800072da <.Lmemcpy_word_copy>:
+800072da:	c605                	beqz	a2,80007302 <.Lmemcpy_memcpy_end>
+800072dc:	4691                	li	a3,4
+800072de:	00d66963          	bltu	a2,a3,800072f0 <.Lmemcpy_byte_copy>
+
+800072e2 <.Lmemcpy_word_copy_loop>:
+800072e2:	4198                	lw	a4,0(a1)
+800072e4:	c118                	sw	a4,0(a0)
+800072e6:	9536                	add	a0,a0,a3
+800072e8:	95b6                	add	a1,a1,a3
+800072ea:	8e15                	sub	a2,a2,a3
+800072ec:	fed67be3          	bgeu	a2,a3,800072e2 <.Lmemcpy_word_copy_loop>
+
+800072f0 <.Lmemcpy_byte_copy>:
+800072f0:	ca09                	beqz	a2,80007302 <.Lmemcpy_memcpy_end>
+
+800072f2 <.Lmemcpy_byte_copy_loop>:
+800072f2:	00058703          	lb	a4,0(a1)
+800072f6:	00e50023          	sb	a4,0(a0)
+800072fa:	0585                	add	a1,a1,1
+800072fc:	0505                	add	a0,a0,1
+800072fe:	167d                	add	a2,a2,-1
+80007300:	fa6d                	bnez	a2,800072f2 <.Lmemcpy_byte_copy_loop>
+
+80007302 <.Lmemcpy_memcpy_end>:
+80007302:	853e                	mv	a0,a5
+
+80007304 <.Lmemcpy_done>:
+80007304:	8082                	ret
+
+Disassembly of section .text.libc.__SEGGER_RTL_pow10f:
+
+80007306 <__SEGGER_RTL_pow10f>:
+80007306:	1101                	add	sp,sp,-32
+80007308:	cc22                	sw	s0,24(sp)
+8000730a:	c64e                	sw	s3,12(sp)
+8000730c:	ce06                	sw	ra,28(sp)
+8000730e:	ca26                	sw	s1,20(sp)
+80007310:	c84a                	sw	s2,16(sp)
+80007312:	842a                	mv	s0,a0
+80007314:	4981                	li	s3,0
+80007316:	00055563          	bgez	a0,80007320 <.L17>
+8000731a:	40a00433          	neg	s0,a0
+8000731e:	4985                	li	s3,1
+
+80007320 <.L17>:
+80007320:	a101a503          	lw	a0,-1520(gp) # 80003a18 <.Lmerged_single+0x4>
+80007324:	800034b7          	lui	s1,0x80003
+80007328:	7e048493          	add	s1,s1,2016 # 800037e0 <__SEGGER_RTL_aPower2f>
+
+8000732c <.L18>:
+8000732c:	ec19                	bnez	s0,8000734a <.L20>
+8000732e:	00098763          	beqz	s3,8000733c <.L16>
+80007332:	85aa                	mv	a1,a0
+80007334:	a101a503          	lw	a0,-1520(gp) # 80003a18 <.Lmerged_single+0x4>
+80007338:	0d0020ef          	jal	80009408 <__divsf3>
+
+8000733c <.L16>:
+8000733c:	40f2                	lw	ra,28(sp)
+8000733e:	4462                	lw	s0,24(sp)
+80007340:	44d2                	lw	s1,20(sp)
+80007342:	4942                	lw	s2,16(sp)
+80007344:	49b2                	lw	s3,12(sp)
+80007346:	6105                	add	sp,sp,32
+80007348:	8082                	ret
+
+8000734a <.L20>:
+8000734a:	00147793          	and	a5,s0,1
+8000734e:	c781                	beqz	a5,80007356 <.L19>
+80007350:	408c                	lw	a1,0(s1)
+80007352:	6f7010ef          	jal	80009248 <__mulsf3>
+
+80007356 <.L19>:
+80007356:	8405                	sra	s0,s0,0x1
+80007358:	0491                	add	s1,s1,4
+8000735a:	bfc9                	j	8000732c <.L18>
+
+Disassembly of section .text.libc.__SEGGER_RTL_prin_flush:
+
+8000735c <__SEGGER_RTL_prin_flush>:
+8000735c:	4950                	lw	a2,20(a0)
+8000735e:	ce19                	beqz	a2,8000737c <.L20>
+80007360:	511c                	lw	a5,32(a0)
+80007362:	1141                	add	sp,sp,-16
+80007364:	c422                	sw	s0,8(sp)
+80007366:	c606                	sw	ra,12(sp)
+80007368:	842a                	mv	s0,a0
+8000736a:	c399                	beqz	a5,80007370 <.L12>
+8000736c:	490c                	lw	a1,16(a0)
+8000736e:	9782                	jalr	a5
+
+80007370 <.L12>:
+80007370:	40b2                	lw	ra,12(sp)
+80007372:	00042a23          	sw	zero,20(s0)
+80007376:	4422                	lw	s0,8(sp)
+80007378:	0141                	add	sp,sp,16
+8000737a:	8082                	ret
+
+8000737c <.L20>:
+8000737c:	8082                	ret
+
+Disassembly of section .text.libc.__SEGGER_RTL_pre_padding:
+
+8000737e <__SEGGER_RTL_pre_padding>:
+8000737e:	0105f793          	and	a5,a1,16
+80007382:	eb91                	bnez	a5,80007396 <.L40>
+80007384:	2005f793          	and	a5,a1,512
+80007388:	02000593          	li	a1,32
+8000738c:	c399                	beqz	a5,80007392 <.L42>
+8000738e:	03000593          	li	a1,48
+
+80007392 <.L42>:
+80007392:	7b60206f          	j	80009b48 <__SEGGER_RTL_print_padding>
+
+80007396 <.L40>:
+80007396:	8082                	ret
+
+Disassembly of section .text.libc.__SEGGER_RTL_init_prin_l:
+
+80007398 <__SEGGER_RTL_init_prin_l>:
+80007398:	1141                	add	sp,sp,-16
+8000739a:	c226                	sw	s1,4(sp)
+8000739c:	02400613          	li	a2,36
+800073a0:	84ae                	mv	s1,a1
+800073a2:	4581                	li	a1,0
+800073a4:	c422                	sw	s0,8(sp)
+800073a6:	c606                	sw	ra,12(sp)
+800073a8:	842a                	mv	s0,a0
+800073aa:	58e020ef          	jal	80009938 <memset>
+800073ae:	40b2                	lw	ra,12(sp)
+800073b0:	cc44                	sw	s1,28(s0)
+800073b2:	4422                	lw	s0,8(sp)
+800073b4:	4492                	lw	s1,4(sp)
+800073b6:	0141                	add	sp,sp,16
+800073b8:	8082                	ret
+
+Disassembly of section .text.libc.vfprintf:
+
+800073ba <vfprintf>:
+800073ba:	1101                	add	sp,sp,-32
+800073bc:	cc22                	sw	s0,24(sp)
+800073be:	ca26                	sw	s1,20(sp)
+800073c0:	ce06                	sw	ra,28(sp)
+800073c2:	84ae                	mv	s1,a1
+800073c4:	842a                	mv	s0,a0
+800073c6:	c632                	sw	a2,12(sp)
+800073c8:	4f4030ef          	jal	8000a8bc <__SEGGER_RTL_current_locale>
+800073cc:	85aa                	mv	a1,a0
+800073ce:	8522                	mv	a0,s0
+800073d0:	4462                	lw	s0,24(sp)
+800073d2:	46b2                	lw	a3,12(sp)
+800073d4:	40f2                	lw	ra,28(sp)
+800073d6:	8626                	mv	a2,s1
+800073d8:	44d2                	lw	s1,20(sp)
+800073da:	6105                	add	sp,sp,32
+800073dc:	7960206f          	j	80009b72 <vfprintf_l>
+
+Disassembly of section .text.libc.printf:
+
+800073e0 <printf>:
+800073e0:	7139                	add	sp,sp,-64
+800073e2:	da3e                	sw	a5,52(sp)
+800073e4:	010817b7          	lui	a5,0x1081
+800073e8:	d22e                	sw	a1,36(sp)
+800073ea:	85aa                	mv	a1,a0
+800073ec:	1107a503          	lw	a0,272(a5) # 1081110 <stdout>
+800073f0:	d432                	sw	a2,40(sp)
+800073f2:	1050                	add	a2,sp,36
+800073f4:	ce06                	sw	ra,28(sp)
+800073f6:	d636                	sw	a3,44(sp)
+800073f8:	d83a                	sw	a4,48(sp)
+800073fa:	dc42                	sw	a6,56(sp)
+800073fc:	de46                	sw	a7,60(sp)
+800073fe:	c632                	sw	a2,12(sp)
+80007400:	3f6d                	jal	800073ba <vfprintf>
+80007402:	40f2                	lw	ra,28(sp)
+80007404:	6121                	add	sp,sp,64
+80007406:	8082                	ret
+
+Disassembly of section .segger.init.__SEGGER_init_heap:
+
+80007408 <__SEGGER_init_heap>:
+80007408:	00080537          	lui	a0,0x80
+8000740c:	00050513          	mv	a0,a0
+80007410:	000845b7          	lui	a1,0x84
+80007414:	00058593          	mv	a1,a1
+80007418:	8d89                	sub	a1,a1,a0
+8000741a:	a009                	j	8000741c <__SEGGER_RTL_init_heap>
+
+Disassembly of section .text.libc.__SEGGER_RTL_init_heap:
+
+8000741c <__SEGGER_RTL_init_heap>:
+8000741c:	479d                	li	a5,7
+8000741e:	00b7f763          	bgeu	a5,a1,8000742c <.L68>
+80007422:	84a22423          	sw	a0,-1976(tp) # fffff848 <__APB_SRAM_segment_end__+0xbf0d848>
+80007426:	00052023          	sw	zero,0(a0) # 80000 <__AXI_SRAM_segment_size__>
+8000742a:	c14c                	sw	a1,4(a0)
+
+8000742c <.L68>:
+8000742c:	8082                	ret
+
+Disassembly of section .text.libc.__SEGGER_RTL_ascii_toupper:
+
+8000742e <__SEGGER_RTL_ascii_toupper>:
+8000742e:	f9f50713          	add	a4,a0,-97
+80007432:	47e5                	li	a5,25
+80007434:	00e7e363          	bltu	a5,a4,8000743a <.L5>
+80007438:	1501                	add	a0,a0,-32
+
+8000743a <.L5>:
+8000743a:	8082                	ret
+
+Disassembly of section .text.libc.__SEGGER_RTL_ascii_towupper:
+
+8000743c <__SEGGER_RTL_ascii_towupper>:
+8000743c:	f9f50713          	add	a4,a0,-97
+80007440:	47e5                	li	a5,25
+80007442:	00e7e363          	bltu	a5,a4,80007448 <.L12>
+80007446:	1501                	add	a0,a0,-32
+
+80007448 <.L12>:
+80007448:	8082                	ret
+
+Disassembly of section .text.libc.__SEGGER_RTL_ascii_mbtowc:
+
+8000744a <__SEGGER_RTL_ascii_mbtowc>:
+8000744a:	87aa                	mv	a5,a0
+8000744c:	4501                	li	a0,0
+8000744e:	c195                	beqz	a1,80007472 <.L55>
+80007450:	c20d                	beqz	a2,80007472 <.L55>
+80007452:	0005c703          	lbu	a4,0(a1) # 84000 <__heap_end__>
+80007456:	07f00613          	li	a2,127
+8000745a:	5579                	li	a0,-2
+8000745c:	00e66b63          	bltu	a2,a4,80007472 <.L55>
+80007460:	c391                	beqz	a5,80007464 <.L57>
+80007462:	c398                	sw	a4,0(a5)
+
+80007464 <.L57>:
+80007464:	0006a023          	sw	zero,0(a3)
+80007468:	0006a223          	sw	zero,4(a3)
+8000746c:	00e03533          	snez	a0,a4
+80007470:	8082                	ret
+
+80007472 <.L55>:
+80007472:	8082                	ret
+
+Disassembly of section .text.core_local_mem_to_sys_address:
+
+80007474 <core_local_mem_to_sys_address>:
+#define HPM_CORE0 (0U)
+#define HPM_CORE1 (1U)
+
+/* map core local memory(DLM/ILM) to system address */
+static inline uint32_t core_local_mem_to_sys_address(uint8_t core_id, uint32_t addr)
+{
+80007474:	1101                	add	sp,sp,-32
+80007476:	87aa                	mv	a5,a0
+80007478:	c42e                	sw	a1,8(sp)
+8000747a:	00f107a3          	sb	a5,15(sp)
+    uint32_t sys_addr;
+    if (ADDRESS_IN_ILM(addr)) {
+8000747e:	4722                	lw	a4,8(sp)
+80007480:	000407b7          	lui	a5,0x40
+80007484:	00f77863          	bgeu	a4,a5,80007494 <.L2>
+        sys_addr = ILM_TO_SYSTEM(addr);
+80007488:	4722                	lw	a4,8(sp)
+8000748a:	010007b7          	lui	a5,0x1000
+8000748e:	97ba                	add	a5,a5,a4
+80007490:	ce3e                	sw	a5,28(sp)
+80007492:	a01d                	j	800074b8 <.L3>
+
+80007494 <.L2>:
+    } else if (ADDRESS_IN_DLM(addr)) {
+80007494:	4722                	lw	a4,8(sp)
+80007496:	000807b7          	lui	a5,0x80
+8000749a:	00f76d63          	bltu	a4,a5,800074b4 <.L4>
+8000749e:	4722                	lw	a4,8(sp)
+800074a0:	000c07b7          	lui	a5,0xc0
+800074a4:	00f77863          	bgeu	a4,a5,800074b4 <.L4>
+        sys_addr = DLM_TO_SYSTEM(addr);
+800074a8:	4722                	lw	a4,8(sp)
+800074aa:	00fc07b7          	lui	a5,0xfc0
+800074ae:	97ba                	add	a5,a5,a4
+800074b0:	ce3e                	sw	a5,28(sp)
+800074b2:	a019                	j	800074b8 <.L3>
+
+800074b4 <.L4>:
+    } else {
+        return addr;
+800074b4:	47a2                	lw	a5,8(sp)
+800074b6:	a821                	j	800074ce <.L5>
+
+800074b8 <.L3>:
+    }
+    if (core_id == HPM_CORE1) {
+800074b8:	00f14703          	lbu	a4,15(sp)
+800074bc:	4785                	li	a5,1
+800074be:	00f71763          	bne	a4,a5,800074cc <.L6>
+        sys_addr += CORE1_ILM_SYSTEM_BASE - CORE0_ILM_SYSTEM_BASE;
+800074c2:	4772                	lw	a4,28(sp)
+800074c4:	001807b7          	lui	a5,0x180
+800074c8:	97ba                	add	a5,a5,a4
+800074ca:	ce3e                	sw	a5,28(sp)
+
+800074cc <.L6>:
+    }
+
+    return sys_addr;
+800074cc:	47f2                	lw	a5,28(sp)
+
+800074ce <.L5>:
+}
+800074ce:	853e                	mv	a0,a5
+800074d0:	6105                	add	sp,sp,32
+800074d2:	8082                	ret
+
+Disassembly of section .text.adc12_get_status_flags:
+
+800074d4 <adc12_get_status_flags>:
+{
+800074d4:	1141                	add	sp,sp,-16
+800074d6:	c62a                	sw	a0,12(sp)
+    return ptr->INT_STS;
+800074d8:	4732                	lw	a4,12(sp)
+800074da:	6785                	lui	a5,0x1
+800074dc:	97ba                	add	a5,a5,a4
+800074de:	1107a783          	lw	a5,272(a5) # 1110 <__fw_size__+0x110>
+}
+800074e2:	853e                	mv	a0,a5
+800074e4:	0141                	add	sp,sp,16
+800074e6:	8082                	ret
+
+Disassembly of section .text.adc12_clear_status_flags:
+
+800074e8 <adc12_clear_status_flags>:
+ * @param[in] mask A mask that means the specified flags to be cleared. Please refer to @ref adc12_irq_event_t.
+ *
+ * @note Only the specified flags can be cleared by writing the INT_STS register.
+ */
+static inline void adc12_clear_status_flags(ADC12_Type *ptr, uint32_t mask)
+{
+800074e8:	1141                	add	sp,sp,-16
+800074ea:	c62a                	sw	a0,12(sp)
+800074ec:	c42e                	sw	a1,8(sp)
+    ptr->INT_STS = mask;
+800074ee:	4732                	lw	a4,12(sp)
+800074f0:	6785                	lui	a5,0x1
+800074f2:	97ba                	add	a5,a5,a4
+800074f4:	4722                	lw	a4,8(sp)
+800074f6:	10e7a823          	sw	a4,272(a5) # 1110 <__fw_size__+0x110>
+}
+800074fa:	0001                	nop
+800074fc:	0141                	add	sp,sp,16
+800074fe:	8082                	ret
+
+Disassembly of section .text.adc12_enable_interrupts:
+
+80007500 <adc12_enable_interrupts>:
+ *
+ * @param[in] ptr An ADC12 peripheral base address.
+ * @param[in] mask A mask indicating the specified ADC interrupt events. Please refer to @ref adc12_irq_event_t.
+ */
+static inline void adc12_enable_interrupts(ADC12_Type *ptr, uint32_t mask)
+{
+80007500:	1141                	add	sp,sp,-16
+80007502:	c62a                	sw	a0,12(sp)
+80007504:	c42e                	sw	a1,8(sp)
+    ptr->INT_EN |= mask;
+80007506:	4732                	lw	a4,12(sp)
+80007508:	6785                	lui	a5,0x1
+8000750a:	97ba                	add	a5,a5,a4
+8000750c:	1147a703          	lw	a4,276(a5) # 1114 <__fw_size__+0x114>
+80007510:	47a2                	lw	a5,8(sp)
+80007512:	8f5d                	or	a4,a4,a5
+80007514:	46b2                	lw	a3,12(sp)
+80007516:	6785                	lui	a5,0x1
+80007518:	97b6                	add	a5,a5,a3
+8000751a:	10e7aa23          	sw	a4,276(a5) # 1114 <__fw_size__+0x114>
+}
+8000751e:	0001                	nop
+80007520:	0141                	add	sp,sp,16
+80007522:	8082                	ret
+
+Disassembly of section .text.adc12_disable_interrupts:
+
+80007524 <adc12_disable_interrupts>:
+ *
+ * @param[in] ptr An ADC12 peripheral base address.
+ * @param[in] mask A mask indicating the specified interrupt events. Please refer to @ref adc12_irq_event_t.
+ */
+static inline void adc12_disable_interrupts(ADC12_Type *ptr, uint32_t mask)
+{
+80007524:	1141                	add	sp,sp,-16
+80007526:	c62a                	sw	a0,12(sp)
+80007528:	c42e                	sw	a1,8(sp)
+    ptr->INT_EN &= ~mask;
+8000752a:	4732                	lw	a4,12(sp)
+8000752c:	6785                	lui	a5,0x1
+8000752e:	97ba                	add	a5,a5,a4
+80007530:	1147a703          	lw	a4,276(a5) # 1114 <__fw_size__+0x114>
+80007534:	47a2                	lw	a5,8(sp)
+80007536:	fff7c793          	not	a5,a5
+8000753a:	8f7d                	and	a4,a4,a5
+8000753c:	46b2                	lw	a3,12(sp)
+8000753e:	6785                	lui	a5,0x1
+80007540:	97b6                	add	a5,a5,a3
+80007542:	10e7aa23          	sw	a4,276(a5) # 1114 <__fw_size__+0x114>
+}
+80007546:	0001                	nop
+80007548:	0141                	add	sp,sp,16
+8000754a:	8082                	ret
+
+Disassembly of section .text.get_adc_conv_mode:
+
+8000754c <get_adc_conv_mode>:
+{
+8000754c:	1101                	add	sp,sp,-32
+8000754e:	ce06                	sw	ra,28(sp)
+
+80007550 <.L33>:
+        printf("1. Oneshot    mode\n");
+80007550:	42418513          	add	a0,gp,1060 # 8000442c <.LC0>
+80007554:	3571                	jal	800073e0 <printf>
+        printf("2. Period     mode\n");
+80007556:	43818513          	add	a0,gp,1080 # 80004440 <.LC1>
+8000755a:	3559                	jal	800073e0 <printf>
+        printf("3. Sequence   mode\n");
+8000755c:	44c18513          	add	a0,gp,1100 # 80004454 <.LC2>
+80007560:	3541                	jal	800073e0 <printf>
+        printf("4. Preemption mode\n");
+80007562:	46018513          	add	a0,gp,1120 # 80004468 <.LC3>
+80007566:	3dad                	jal	800073e0 <printf>
+        printf("Please enter one of ADC conversion modes above (e.g. 1 or 2 ...): ");
+80007568:	47418513          	add	a0,gp,1140 # 8000447c <.LC4>
+8000756c:	3d95                	jal	800073e0 <printf>
+        printf("%c\n", ch = getchar());
+8000756e:	1f9010ef          	jal	80008f66 <getchar>
+80007572:	87aa                	mv	a5,a0
+80007574:	00f107a3          	sb	a5,15(sp)
+80007578:	00f14783          	lbu	a5,15(sp)
+8000757c:	85be                	mv	a1,a5
+8000757e:	4b818513          	add	a0,gp,1208 # 800044c0 <.LC5>
+80007582:	3db9                	jal	800073e0 <printf>
+        ch -= '0' + 1;
+80007584:	00f14783          	lbu	a5,15(sp)
+80007588:	fcf78793          	add	a5,a5,-49
+8000758c:	00f107a3          	sb	a5,15(sp)
+        if (ch > adc12_conv_mode_preemption) {
+80007590:	00f14703          	lbu	a4,15(sp)
+80007594:	478d                	li	a5,3
+80007596:	00e7f663          	bgeu	a5,a4,800075a2 <.L30>
+            printf("The ADC mode is not supported!\n");
+8000759a:	4bc18513          	add	a0,gp,1212 # 800044c4 <.LC6>
+8000759e:	3589                	jal	800073e0 <printf>
+800075a0:	bf45                	j	80007550 <.L33>
+
+800075a2 <.L30>:
+            return ch;
+800075a2:	00f14783          	lbu	a5,15(sp)
+}
+800075a6:	853e                	mv	a0,a5
+800075a8:	40f2                	lw	ra,28(sp)
+800075aa:	6105                	add	sp,sp,32
+800075ac:	8082                	ret
+
+Disassembly of section .text.process_seq_data:
+
+800075ae <process_seq_data>:
+{
+800075ae:	7179                	add	sp,sp,-48
+800075b0:	d606                	sw	ra,44(sp)
+800075b2:	c62a                	sw	a0,12(sp)
+800075b4:	c42e                	sw	a1,8(sp)
+800075b6:	c232                	sw	a2,4(sp)
+    adc12_seq_dma_data_t *dma_data = (adc12_seq_dma_data_t *)buff;
+800075b8:	47b2                	lw	a5,12(sp)
+800075ba:	cc3e                	sw	a5,24(sp)
+    if (ADC12_IS_SEQ_DMA_BUFF_LEN_INVLAID(len)) {
+800075bc:	4792                	lw	a5,4(sp)
+800075be:	c789                	beqz	a5,800075c8 <.L43>
+800075c0:	4712                	lw	a4,4(sp)
+800075c2:	6785                	lui	a5,0x1
+800075c4:	00e7f463          	bgeu	a5,a4,800075cc <.L44>
+
+800075c8 <.L43>:
+        return status_invalid_argument;
+800075c8:	4789                	li	a5,2
+800075ca:	a849                	j	8000765c <.L45>
+
+800075cc <.L44>:
+    for (uint32_t i = start_pos; i < start_pos + len; i++) {
+800075cc:	47a2                	lw	a5,8(sp)
+800075ce:	ce3e                	sw	a5,28(sp)
+800075d0:	a8bd                	j	8000764e <.L46>
+
+800075d2 <.L47>:
+        printf("Sequence Mode - %s - ", BOARD_APP_ADC12_NAME);
+800075d2:	4dc18593          	add	a1,gp,1244 # 800044e4 <.LC7>
+800075d6:	4e418513          	add	a0,gp,1252 # 800044ec <.LC8>
+800075da:	3519                	jal	800073e0 <printf>
+        printf("Cycle Bit: %02d - ",   dma_data[i].cycle_bit);
+800075dc:	47f2                	lw	a5,28(sp)
+800075de:	078a                	sll	a5,a5,0x2
+800075e0:	4762                	lw	a4,24(sp)
+800075e2:	97ba                	add	a5,a5,a4
+800075e4:	439c                	lw	a5,0(a5)
+800075e6:	83fd                	srl	a5,a5,0x1f
+800075e8:	0ff7f793          	zext.b	a5,a5
+800075ec:	85be                	mv	a1,a5
+800075ee:	4fc18513          	add	a0,gp,1276 # 80004504 <.LC9>
+800075f2:	33fd                	jal	800073e0 <printf>
+        printf("Sequence Number:%02d - ", dma_data[i].seq_num);
+800075f4:	47f2                	lw	a5,28(sp)
+800075f6:	078a                	sll	a5,a5,0x2
+800075f8:	4762                	lw	a4,24(sp)
+800075fa:	97ba                	add	a5,a5,a4
+800075fc:	439c                	lw	a5,0(a5)
+800075fe:	83c1                	srl	a5,a5,0x10
+80007600:	8bbd                	and	a5,a5,15
+80007602:	0ff7f793          	zext.b	a5,a5
+80007606:	85be                	mv	a1,a5
+80007608:	51018513          	add	a0,gp,1296 # 80004518 <.LC10>
+8000760c:	3bd1                	jal	800073e0 <printf>
+        printf("ADC Channel: %02d - ",  dma_data[i].adc_ch);
+8000760e:	47f2                	lw	a5,28(sp)
+80007610:	078a                	sll	a5,a5,0x2
+80007612:	4762                	lw	a4,24(sp)
+80007614:	97ba                	add	a5,a5,a4
+80007616:	439c                	lw	a5,0(a5)
+80007618:	83e1                	srl	a5,a5,0x18
+8000761a:	8bfd                	and	a5,a5,31
+8000761c:	0ff7f793          	zext.b	a5,a5
+80007620:	85be                	mv	a1,a5
+80007622:	52818513          	add	a0,gp,1320 # 80004530 <.LC11>
+80007626:	3b6d                	jal	800073e0 <printf>
+        printf("Result: 0x%04x\n", dma_data[i].result);
+80007628:	47f2                	lw	a5,28(sp)
+8000762a:	078a                	sll	a5,a5,0x2
+8000762c:	4762                	lw	a4,24(sp)
+8000762e:	97ba                	add	a5,a5,a4
+80007630:	439c                	lw	a5,0(a5)
+80007632:	8391                	srl	a5,a5,0x4
+80007634:	873e                	mv	a4,a5
+80007636:	6785                	lui	a5,0x1
+80007638:	17fd                	add	a5,a5,-1 # fff <__NOR_CFG_OPTION_segment_size__+0x3ff>
+8000763a:	8ff9                	and	a5,a5,a4
+8000763c:	07c2                	sll	a5,a5,0x10
+8000763e:	83c1                	srl	a5,a5,0x10
+80007640:	85be                	mv	a1,a5
+80007642:	54018513          	add	a0,gp,1344 # 80004548 <.LC12>
+80007646:	3b69                	jal	800073e0 <printf>
+    for (uint32_t i = start_pos; i < start_pos + len; i++) {
+80007648:	47f2                	lw	a5,28(sp)
+8000764a:	0785                	add	a5,a5,1
+8000764c:	ce3e                	sw	a5,28(sp)
+
+8000764e <.L46>:
+8000764e:	4722                	lw	a4,8(sp)
+80007650:	4792                	lw	a5,4(sp)
+80007652:	97ba                	add	a5,a5,a4
+80007654:	4772                	lw	a4,28(sp)
+80007656:	f6f76ee3          	bltu	a4,a5,800075d2 <.L47>
+
+8000765a <.LBE14>:
+    return status_success;
+8000765a:	4781                	li	a5,0
+
+8000765c <.L45>:
+}
+8000765c:	853e                	mv	a0,a5
+8000765e:	50b2                	lw	ra,44(sp)
+80007660:	6145                	add	sp,sp,48
+80007662:	8082                	ret
+
+Disassembly of section .text.init_trigger_target:
+
+80007664 <init_trigger_target>:
+{
+80007664:	7179                	add	sp,sp,-48
+80007666:	d606                	sw	ra,44(sp)
+80007668:	c62a                	sw	a0,12(sp)
+8000766a:	87ae                	mv	a5,a1
+8000766c:	00f105a3          	sb	a5,11(sp)
+    pmt_cfg.trig_len = sizeof(trig_adc_channel);
+80007670:	4785                	li	a5,1
+80007672:	00f10ca3          	sb	a5,25(sp)
+    pmt_cfg.trig_ch = trig_ch;
+80007676:	00b14783          	lbu	a5,11(sp)
+8000767a:	00f10c23          	sb	a5,24(sp)
+
+8000767e <.LBB16>:
+    for (int i = 0; i < pmt_cfg.trig_len; i++) {
+8000767e:	ce02                	sw	zero,28(sp)
+80007680:	a805                	j	800076b0 <.L59>
+
+80007682 <.L60>:
+        pmt_cfg.adc_ch[i] = trig_adc_channel[i];
+80007682:	010817b7          	lui	a5,0x1081
+80007686:	11878713          	add	a4,a5,280 # 1081118 <trig_adc_channel>
+8000768a:	47f2                	lw	a5,28(sp)
+8000768c:	97ba                	add	a5,a5,a4
+8000768e:	0007c703          	lbu	a4,0(a5)
+80007692:	47f2                	lw	a5,28(sp)
+80007694:	02078793          	add	a5,a5,32
+80007698:	978a                	add	a5,a5,sp
+8000769a:	fee78a23          	sb	a4,-12(a5)
+        pmt_cfg.inten[i] = false;
+8000769e:	47f2                	lw	a5,28(sp)
+800076a0:	02078793          	add	a5,a5,32
+800076a4:	978a                	add	a5,a5,sp
+800076a6:	fe078823          	sb	zero,-16(a5)
+    for (int i = 0; i < pmt_cfg.trig_len; i++) {
+800076aa:	47f2                	lw	a5,28(sp)
+800076ac:	0785                	add	a5,a5,1
+800076ae:	ce3e                	sw	a5,28(sp)
+
+800076b0 <.L59>:
+800076b0:	01914783          	lbu	a5,25(sp)
+800076b4:	873e                	mv	a4,a5
+800076b6:	47f2                	lw	a5,28(sp)
+800076b8:	fce7c5e3          	blt	a5,a4,80007682 <.L60>
+
+800076bc <.LBE16>:
+    pmt_cfg.inten[pmt_cfg.trig_len - 1] = true;
+800076bc:	01914783          	lbu	a5,25(sp)
+800076c0:	17fd                	add	a5,a5,-1
+800076c2:	02078793          	add	a5,a5,32
+800076c6:	978a                	add	a5,a5,sp
+800076c8:	4705                	li	a4,1
+800076ca:	fee78823          	sb	a4,-16(a5)
+    adc12_set_pmt_config(ptr, &pmt_cfg);
+800076ce:	081c                	add	a5,sp,16
+800076d0:	85be                	mv	a1,a5
+800076d2:	4532                	lw	a0,12(sp)
+800076d4:	53c010ef          	jal	80008c10 <adc12_set_pmt_config>
+}
+800076d8:	0001                	nop
+800076da:	50b2                	lw	ra,44(sp)
+800076dc:	6145                	add	sp,sp,48
+800076de:	8082                	ret
+
+Disassembly of section .text.oneshot_handler:
+
+800076e0 <oneshot_handler>:
+{
+800076e0:	1101                	add	sp,sp,-32
+800076e2:	ce06                	sw	ra,28(sp)
+    if (adc12_get_oneshot_result(BOARD_APP_ADC12_BASE, BOARD_APP_ADC12_CH_1, &result) == status_success) {
+800076e4:	00e10793          	add	a5,sp,14
+800076e8:	863e                	mv	a2,a5
+800076ea:	459d                	li	a1,7
+800076ec:	f0010537          	lui	a0,0xf0010
+800076f0:	bb5fe0ef          	jal	800062a4 <adc12_get_oneshot_result>
+800076f4:	87aa                	mv	a5,a0
+800076f6:	eb85                	bnez	a5,80007726 <.L76>
+        if (adc12_is_nonblocking_mode(BOARD_APP_ADC12_BASE)) {
+800076f8:	f0010537          	lui	a0,0xf0010
+800076fc:	8e3fc0ef          	jal	80003fde <adc12_is_nonblocking_mode>
+80007700:	87aa                	mv	a5,a0
+80007702:	cb89                	beqz	a5,80007714 <.L75>
+            adc12_get_oneshot_result(BOARD_APP_ADC12_BASE, BOARD_APP_ADC12_CH_1, &result);
+80007704:	00e10793          	add	a5,sp,14
+80007708:	863e                	mv	a2,a5
+8000770a:	459d                	li	a1,7
+8000770c:	f0010537          	lui	a0,0xf0010
+80007710:	b95fe0ef          	jal	800062a4 <adc12_get_oneshot_result>
+
+80007714 <.L75>:
+        printf("Oneshot Mode - %s [channel %02d] - Result: 0x%04x\n", BOARD_APP_ADC12_NAME, BOARD_APP_ADC12_CH_1, result);
+80007714:	00e15783          	lhu	a5,14(sp)
+80007718:	86be                	mv	a3,a5
+8000771a:	461d                	li	a2,7
+8000771c:	4dc18593          	add	a1,gp,1244 # 800044e4 <.LC7>
+80007720:	63018513          	add	a0,gp,1584 # 80004638 <.LC19>
+80007724:	3975                	jal	800073e0 <printf>
+
+80007726 <.L76>:
+}
+80007726:	0001                	nop
+80007728:	40f2                	lw	ra,28(sp)
+8000772a:	6105                	add	sp,sp,32
+8000772c:	8082                	ret
+
+Disassembly of section .text.init_period_config:
+
+8000772e <init_period_config>:
+{
+8000772e:	1101                	add	sp,sp,-32
+80007730:	ce06                	sw	ra,28(sp)
+    adc12_get_channel_default_config(&ch_cfg);
+80007732:	005c                	add	a5,sp,4
+80007734:	853e                	mv	a0,a5
+80007736:	1de010ef          	jal	80008914 <adc12_get_channel_default_config>
+    ch_cfg.ch           = BOARD_APP_ADC12_CH_1;
+8000773a:	479d                	li	a5,7
+8000773c:	00f10223          	sb	a5,4(sp)
+    ch_cfg.diff_sel     = adc12_sample_signal_single_ended;
+80007740:	000102a3          	sb	zero,5(sp)
+    ch_cfg.sample_cycle = APP_ADC12_CH_SAMPLE_CYCLE;
+80007744:	47d1                	li	a5,20
+80007746:	c63e                	sw	a5,12(sp)
+    adc12_init_channel(BOARD_APP_ADC12_BASE, &ch_cfg);
+80007748:	005c                	add	a5,sp,4
+8000774a:	85be                	mv	a1,a5
+8000774c:	f0010537          	lui	a0,0xf0010
+80007750:	35c010ef          	jal	80008aac <adc12_init_channel>
+    prd_cfg.ch           = BOARD_APP_ADC12_CH_1;
+80007754:	479d                	li	a5,7
+80007756:	00f10023          	sb	a5,0(sp)
+    prd_cfg.prescale     = 22;    /* Set divider: 2^22 clocks */
+8000775a:	47d9                	li	a5,22
+8000775c:	00f100a3          	sb	a5,1(sp)
+    prd_cfg.period_count = 5;     /* 104.86ms when AHB clock at 200MHz is ADC clock source */
+80007760:	4795                	li	a5,5
+80007762:	00f10123          	sb	a5,2(sp)
+    adc12_set_prd_config(BOARD_APP_ADC12_BASE, &prd_cfg);
+80007766:	878a                	mv	a5,sp
+80007768:	85be                	mv	a1,a5
+8000776a:	f0010537          	lui	a0,0xf0010
+8000776e:	989fe0ef          	jal	800060f6 <adc12_set_prd_config>
+}
+80007772:	0001                	nop
+80007774:	40f2                	lw	ra,28(sp)
+80007776:	6105                	add	sp,sp,32
+80007778:	8082                	ret
+
+Disassembly of section .text.period_handler:
+
+8000777a <period_handler>:
+{
+8000777a:	1101                	add	sp,sp,-32
+8000777c:	ce06                	sw	ra,28(sp)
+    adc12_get_prd_result(BOARD_APP_ADC12_BASE, BOARD_APP_ADC12_CH_1, &result);
+8000777e:	00e10793          	add	a5,sp,14
+80007782:	863e                	mv	a2,a5
+80007784:	459d                	li	a1,7
+80007786:	f0010537          	lui	a0,0xf0010
+8000778a:	536010ef          	jal	80008cc0 <adc12_get_prd_result>
+    printf("Period Mode - %s [channel %02d] - Result: 0x%04x\n", BOARD_APP_ADC12_NAME, BOARD_APP_ADC12_CH_1, result);
+8000778e:	00e15783          	lhu	a5,14(sp)
+80007792:	86be                	mv	a3,a5
+80007794:	461d                	li	a2,7
+80007796:	4dc18593          	add	a1,gp,1244 # 800044e4 <.LC7>
+8000779a:	66418513          	add	a0,gp,1636 # 8000466c <.LC20>
+8000779e:	3189                	jal	800073e0 <printf>
+}
+800077a0:	0001                	nop
+800077a2:	40f2                	lw	ra,28(sp)
+800077a4:	6105                	add	sp,sp,32
+800077a6:	8082                	ret
+
+Disassembly of section .text.init_sequence_config:
+
+800077a8 <init_sequence_config>:
+{
+800077a8:	711d                	add	sp,sp,-96
+800077aa:	ce86                	sw	ra,92(sp)
+    adc12_get_channel_default_config(&ch_cfg);
+800077ac:	005c                	add	a5,sp,4
+800077ae:	853e                	mv	a0,a5
+800077b0:	164010ef          	jal	80008914 <adc12_get_channel_default_config>
+    ch_cfg.diff_sel     = adc12_sample_signal_single_ended;
+800077b4:	000102a3          	sb	zero,5(sp)
+    ch_cfg.sample_cycle = APP_ADC12_CH_SAMPLE_CYCLE;
+800077b8:	47d1                	li	a5,20
+800077ba:	c63e                	sw	a5,12(sp)
+
+800077bc <.LBB25>:
+    for (uint32_t i = 0; i < sizeof(seq_adc_channel); i++) {
+800077bc:	c682                	sw	zero,76(sp)
+800077be:	a025                	j	800077e6 <.L80>
+
+800077c0 <.L81>:
+        ch_cfg.ch           = seq_adc_channel[i];
+800077c0:	010817b7          	lui	a5,0x1081
+800077c4:	11c78713          	add	a4,a5,284 # 108111c <seq_adc_channel>
+800077c8:	47b6                	lw	a5,76(sp)
+800077ca:	97ba                	add	a5,a5,a4
+800077cc:	0007c783          	lbu	a5,0(a5)
+800077d0:	00f10223          	sb	a5,4(sp)
+        adc12_init_channel(BOARD_APP_ADC12_BASE, &ch_cfg);
+800077d4:	005c                	add	a5,sp,4
+800077d6:	85be                	mv	a1,a5
+800077d8:	f0010537          	lui	a0,0xf0010
+800077dc:	2d0010ef          	jal	80008aac <adc12_init_channel>
+    for (uint32_t i = 0; i < sizeof(seq_adc_channel); i++) {
+800077e0:	47b6                	lw	a5,76(sp)
+800077e2:	0785                	add	a5,a5,1
+800077e4:	c6be                	sw	a5,76(sp)
+
+800077e6 <.L80>:
+800077e6:	47b6                	lw	a5,76(sp)
+800077e8:	dfe1                	beqz	a5,800077c0 <.L81>
+
+800077ea <.LBE25>:
+    seq_cfg.seq_len    = sizeof(seq_adc_channel);
+800077ea:	4785                	li	a5,1
+800077ec:	04f10223          	sb	a5,68(sp)
+    seq_cfg.restart_en = false;
+800077f0:	04010023          	sb	zero,64(sp)
+    seq_cfg.cont_en    = true;
+800077f4:	4785                	li	a5,1
+800077f6:	04f100a3          	sb	a5,65(sp)
+    seq_cfg.hw_trig_en = false;
+800077fa:	040101a3          	sb	zero,67(sp)
+    seq_cfg.sw_trig_en = true;
+800077fe:	4785                	li	a5,1
+80007800:	04f10123          	sb	a5,66(sp)
+
+80007804 <.LBB26>:
+    for (int i = APP_ADC12_SEQ_START_POS; i < seq_cfg.seq_len; i++) {
+80007804:	c482                	sw	zero,72(sp)
+80007806:	a815                	j	8000783a <.L82>
+
+80007808 <.L83>:
+        seq_cfg.queue[i].seq_int_en = false;
+80007808:	47a6                	lw	a5,72(sp)
+8000780a:	0786                	sll	a5,a5,0x1
+8000780c:	05078793          	add	a5,a5,80
+80007810:	978a                	add	a5,a5,sp
+80007812:	fc078823          	sb	zero,-48(a5)
+        seq_cfg.queue[i].ch = seq_adc_channel[i];
+80007816:	010817b7          	lui	a5,0x1081
+8000781a:	11c78713          	add	a4,a5,284 # 108111c <seq_adc_channel>
+8000781e:	47a6                	lw	a5,72(sp)
+80007820:	97ba                	add	a5,a5,a4
+80007822:	0007c703          	lbu	a4,0(a5)
+80007826:	47a6                	lw	a5,72(sp)
+80007828:	0786                	sll	a5,a5,0x1
+8000782a:	05078793          	add	a5,a5,80
+8000782e:	978a                	add	a5,a5,sp
+80007830:	fce788a3          	sb	a4,-47(a5)
+    for (int i = APP_ADC12_SEQ_START_POS; i < seq_cfg.seq_len; i++) {
+80007834:	47a6                	lw	a5,72(sp)
+80007836:	0785                	add	a5,a5,1
+80007838:	c4be                	sw	a5,72(sp)
+
+8000783a <.L82>:
+8000783a:	04414783          	lbu	a5,68(sp)
+8000783e:	873e                	mv	a4,a5
+80007840:	47a6                	lw	a5,72(sp)
+80007842:	fce7c3e3          	blt	a5,a4,80007808 <.L83>
+
+80007846 <.LBE26>:
+    seq_cfg.queue[seq_cfg.seq_len - 1].seq_int_en = true;
+80007846:	04414783          	lbu	a5,68(sp)
+8000784a:	17fd                	add	a5,a5,-1
+8000784c:	0786                	sll	a5,a5,0x1
+8000784e:	05078793          	add	a5,a5,80
+80007852:	978a                	add	a5,a5,sp
+80007854:	4705                	li	a4,1
+80007856:	fce78823          	sb	a4,-48(a5)
+    adc12_set_seq_config(BOARD_APP_ADC12_BASE, &seq_cfg);
+8000785a:	101c                	add	a5,sp,32
+8000785c:	85be                	mv	a1,a5
+8000785e:	f0010537          	lui	a0,0xf0010
+80007862:	975fe0ef          	jal	800061d6 <adc12_set_seq_config>
+    dma_cfg.start_addr         = (uint32_t *)core_local_mem_to_sys_address(APP_ADC12_CORE, (uint32_t)seq_buff);
+80007866:	85020793          	add	a5,tp,-1968 # fffff850 <__APB_SRAM_segment_end__+0xbf0d850>
+8000786a:	85be                	mv	a1,a5
+8000786c:	4501                	li	a0,0
+8000786e:	3119                	jal	80007474 <core_local_mem_to_sys_address>
+80007870:	87aa                	mv	a5,a0
+80007872:	c83e                	sw	a5,16(sp)
+    dma_cfg.buff_len_in_4bytes = sizeof(seq_adc_channel);
+80007874:	4785                	li	a5,1
+80007876:	ca3e                	sw	a5,20(sp)
+    dma_cfg.stop_en            = false;
+80007878:	00010e23          	sb	zero,28(sp)
+    dma_cfg.stop_pos           = 0;
+8000787c:	cc02                	sw	zero,24(sp)
+    adc12_init_seq_dma(BOARD_APP_ADC12_BASE, &dma_cfg);
+8000787e:	081c                	add	a5,sp,16
+80007880:	85be                	mv	a1,a5
+80007882:	f0010537          	lui	a0,0xf0010
+80007886:	f92fe0ef          	jal	80006018 <adc12_init_seq_dma>
+    adc12_enable_interrupts(BOARD_APP_ADC12_BASE, APP_ADC12_SEQ_IRQ_EVENT);
+8000788a:	008005b7          	lui	a1,0x800
+8000788e:	f0010537          	lui	a0,0xf0010
+80007892:	31bd                	jal	80007500 <adc12_enable_interrupts>
+}
+80007894:	0001                	nop
+80007896:	40f6                	lw	ra,92(sp)
+80007898:	6125                	add	sp,sp,96
+8000789a:	8082                	ret
+
+Disassembly of section .text.sequence_handler:
+
+8000789c <sequence_handler>:
+{
+8000789c:	1141                	add	sp,sp,-16
+8000789e:	c606                	sw	ra,12(sp)
+    adc12_trigger_seq_by_sw(BOARD_APP_ADC12_BASE);
+800078a0:	f0010537          	lui	a0,0xf0010
+800078a4:	8f9fe0ef          	jal	8000619c <adc12_trigger_seq_by_sw>
+    while (seq_complete_flag == 0) {
+800078a8:	0001                	nop
+
+800078aa <.L85>:
+800078aa:	84d24783          	lbu	a5,-1971(tp) # fffff84d <__APB_SRAM_segment_end__+0xbf0d84d>
+800078ae:	0ff7f793          	zext.b	a5,a5
+800078b2:	dfe5                	beqz	a5,800078aa <.L85>
+    process_seq_data(seq_buff, APP_ADC12_SEQ_START_POS, sizeof(seq_adc_channel));
+800078b4:	4605                	li	a2,1
+800078b6:	4581                	li	a1,0
+800078b8:	85020513          	add	a0,tp,-1968 # fffff850 <__APB_SRAM_segment_end__+0xbf0d850>
+800078bc:	39cd                	jal	800075ae <process_seq_data>
+    seq_complete_flag = 0;
+800078be:	840206a3          	sb	zero,-1971(tp) # fffff84d <__APB_SRAM_segment_end__+0xbf0d84d>
+}
+800078c2:	0001                	nop
+800078c4:	40b2                	lw	ra,12(sp)
+800078c6:	0141                	add	sp,sp,16
+800078c8:	8082                	ret
+
+Disassembly of section .text.init_preemption_config:
+
+800078ca <init_preemption_config>:
+{
+800078ca:	1101                	add	sp,sp,-32
+800078cc:	ce06                	sw	ra,28(sp)
+    adc12_get_channel_default_config(&ch_cfg);
+800078ce:	878a                	mv	a5,sp
+800078d0:	853e                	mv	a0,a5
+800078d2:	042010ef          	jal	80008914 <adc12_get_channel_default_config>
+    ch_cfg.diff_sel     = adc12_sample_signal_single_ended;
+800078d6:	000100a3          	sb	zero,1(sp)
+    ch_cfg.sample_cycle = APP_ADC12_CH_SAMPLE_CYCLE;
+800078da:	47d1                	li	a5,20
+800078dc:	c43e                	sw	a5,8(sp)
+
+800078de <.LBB27>:
+    for (uint32_t i = 0; i < sizeof(trig_adc_channel); i++) {
+800078de:	c602                	sw	zero,12(sp)
+800078e0:	a025                	j	80007908 <.L87>
+
+800078e2 <.L88>:
+        ch_cfg.ch = trig_adc_channel[i];
+800078e2:	010817b7          	lui	a5,0x1081
+800078e6:	11878713          	add	a4,a5,280 # 1081118 <trig_adc_channel>
+800078ea:	47b2                	lw	a5,12(sp)
+800078ec:	97ba                	add	a5,a5,a4
+800078ee:	0007c783          	lbu	a5,0(a5)
+800078f2:	00f10023          	sb	a5,0(sp)
+        adc12_init_channel(BOARD_APP_ADC12_BASE, &ch_cfg);
+800078f6:	878a                	mv	a5,sp
+800078f8:	85be                	mv	a1,a5
+800078fa:	f0010537          	lui	a0,0xf0010
+800078fe:	1ae010ef          	jal	80008aac <adc12_init_channel>
+    for (uint32_t i = 0; i < sizeof(trig_adc_channel); i++) {
+80007902:	47b2                	lw	a5,12(sp)
+80007904:	0785                	add	a5,a5,1
+80007906:	c63e                	sw	a5,12(sp)
+
+80007908 <.L87>:
+80007908:	47b2                	lw	a5,12(sp)
+8000790a:	dfe1                	beqz	a5,800078e2 <.L88>
+
+8000790c <.LBE27>:
+    init_trigger_target(BOARD_APP_ADC12_BASE, APP_ADC12_PMT_TRIG_CH);
+8000790c:	4581                	li	a1,0
+8000790e:	f0010537          	lui	a0,0xf0010
+80007912:	3b89                	jal	80007664 <init_trigger_target>
+    adc12_init_pmt_dma(BOARD_APP_ADC12_BASE, core_local_mem_to_sys_address(APP_ADC12_CORE, (uint32_t)pmt_buff));
+80007914:	010817b7          	lui	a5,0x1081
+80007918:	05078793          	add	a5,a5,80 # 1081050 <pmt_buff>
+8000791c:	85be                	mv	a1,a5
+8000791e:	4501                	li	a0,0
+80007920:	3e91                	jal	80007474 <core_local_mem_to_sys_address>
+80007922:	87aa                	mv	a5,a0
+80007924:	85be                	mv	a1,a5
+80007926:	f0010537          	lui	a0,0xf0010
+8000792a:	e5cfc0ef          	jal	80003f86 <adc12_init_pmt_dma>
+    adc12_enable_interrupts(BOARD_APP_ADC12_BASE, APP_ADC12_PMT_IRQ_EVENT);
+8000792e:	800005b7          	lui	a1,0x80000
+80007932:	f0010537          	lui	a0,0xf0010
+80007936:	36e9                	jal	80007500 <adc12_enable_interrupts>
+}
+80007938:	0001                	nop
+8000793a:	40f2                	lw	ra,28(sp)
+8000793c:	6105                	add	sp,sp,32
+8000793e:	8082                	ret
+
+Disassembly of section .text.main:
+
+80007940 <main>:
+
+int main(void)
+{
+80007940:	1101                	add	sp,sp,-32
+80007942:	ce06                	sw	ra,28(sp)
+    uint8_t conv_mode;
+
+    /* Bsp initialization */
+    board_init();
+80007944:	0a1000ef          	jal	800081e4 <board_init>
+
+    /* ADC pin initialization */
+    board_init_adc12_pins();
+80007948:	0bd000ef          	jal	80008204 <board_init_adc12_pins>
+
+    /* ADC clock initialization */
+    board_init_adc_clock(BOARD_APP_ADC12_BASE, true);
+8000794c:	4585                	li	a1,1
+8000794e:	f0010537          	lui	a0,0xf0010
+80007952:	db7fd0ef          	jal	80005708 <board_init_adc_clock>
+
+    printf("This is an ADC12 demo:\n");
+80007956:	69818513          	add	a0,gp,1688 # 800046a0 <.LC21>
+8000795a:	3459                	jal	800073e0 <printf>
+
+8000795c <.L106>:
+
+    while (1) {
+        /* Get a conversion mode from a console window */
+        conv_mode = get_adc_conv_mode();
+8000795c:	3ec5                	jal	8000754c <get_adc_conv_mode>
+8000795e:	87aa                	mv	a5,a0
+80007960:	00f107a3          	sb	a5,15(sp)
+
+        /* ADC12 common initialization */
+        init_common_config(conv_mode);
+80007964:	00f14783          	lbu	a5,15(sp)
+80007968:	853e                	mv	a0,a5
+8000796a:	fd8fc0ef          	jal	80004142 <init_common_config>
+
+        /* ADC12 read patter and DMA initialization */
+        switch (conv_mode) {
+8000796e:	00f14783          	lbu	a5,15(sp)
+80007972:	470d                	li	a4,3
+80007974:	02e78763          	beq	a5,a4,800079a2 <.L92>
+80007978:	470d                	li	a4,3
+8000797a:	02f74663          	blt	a4,a5,800079a6 <.L108>
+8000797e:	4709                	li	a4,2
+80007980:	00e78f63          	beq	a5,a4,8000799e <.L94>
+80007984:	4709                	li	a4,2
+80007986:	02f74063          	blt	a4,a5,800079a6 <.L108>
+8000798a:	c789                	beqz	a5,80007994 <.L95>
+8000798c:	4705                	li	a4,1
+8000798e:	00e78663          	beq	a5,a4,8000799a <.L96>
+        case adc12_conv_mode_preemption:
+            init_preemption_config();
+            break;
+
+        default:
+            break;
+80007992:	a811                	j	800079a6 <.L108>
+
+80007994 <.L95>:
+            init_oneshot_config();
+80007994:	957fc0ef          	jal	800042ea <init_oneshot_config>
+            break;
+80007998:	a801                	j	800079a8 <.L105>
+
+8000799a <.L96>:
+            init_period_config();
+8000799a:	3b51                	jal	8000772e <init_period_config>
+            break;
+8000799c:	a031                	j	800079a8 <.L105>
+
+8000799e <.L94>:
+            init_sequence_config();
+8000799e:	3529                	jal	800077a8 <init_sequence_config>
+            break;
+800079a0:	a021                	j	800079a8 <.L105>
+
+800079a2 <.L92>:
+            init_preemption_config();
+800079a2:	3725                	jal	800078ca <init_preemption_config>
+            break;
+800079a4:	a011                	j	800079a8 <.L105>
+
+800079a6 <.L108>:
+            break;
+800079a6:	0001                	nop
+
+800079a8 <.L105>:
+        }
+
+        /* Main loop */
+        while (1) {
+            channel_result_out_of_threshold_handler();
+800079a8:	8a3fc0ef          	jal	8000424a <channel_result_out_of_threshold_handler>
+
+            if (conv_mode == adc12_conv_mode_oneshot) {
+800079ac:	00f14783          	lbu	a5,15(sp)
+800079b0:	e399                	bnez	a5,800079b6 <.L98>
+                oneshot_handler();
+800079b2:	333d                	jal	800076e0 <oneshot_handler>
+800079b4:	a815                	j	800079e8 <.L99>
+
+800079b6 <.L98>:
+            } else if (conv_mode == adc12_conv_mode_period) {
+800079b6:	00f14703          	lbu	a4,15(sp)
+800079ba:	4785                	li	a5,1
+800079bc:	00f71463          	bne	a4,a5,800079c4 <.L100>
+                period_handler();
+800079c0:	3b6d                	jal	8000777a <period_handler>
+800079c2:	a01d                	j	800079e8 <.L99>
+
+800079c4 <.L100>:
+            } else if (conv_mode == adc12_conv_mode_sequence) {
+800079c4:	00f14703          	lbu	a4,15(sp)
+800079c8:	4789                	li	a5,2
+800079ca:	00f71463          	bne	a4,a5,800079d2 <.L101>
+                sequence_handler();
+800079ce:	35f9                	jal	8000789c <sequence_handler>
+800079d0:	a821                	j	800079e8 <.L99>
+
+800079d2 <.L101>:
+            } else if (conv_mode == adc12_conv_mode_preemption) {
+800079d2:	00f14703          	lbu	a4,15(sp)
+800079d6:	478d                	li	a5,3
+800079d8:	00f71563          	bne	a4,a5,800079e2 <.L102>
+                preemption_handler();
+800079dc:	963fc0ef          	jal	8000433e <preemption_handler>
+800079e0:	a021                	j	800079e8 <.L99>
+
+800079e2 <.L102>:
+            } else {
+                printf("Conversion mode is not supported!\n");
+800079e2:	6b018513          	add	a0,gp,1712 # 800046b8 <.LC22>
+800079e6:	3aed                	jal	800073e0 <printf>
+
+800079e8 <.L99>:
+            }
+
+            if (console_try_receive_byte() == ' ') {
+800079e8:	3cc010ef          	jal	80008db4 <console_try_receive_byte>
+800079ec:	87aa                	mv	a5,a0
+800079ee:	873e                	mv	a4,a5
+800079f0:	02000793          	li	a5,32
+800079f4:	00f70363          	beq	a4,a5,800079fa <.L109>
+            channel_result_out_of_threshold_handler();
+800079f8:	bf45                	j	800079a8 <.L105>
+
+800079fa <.L109>:
+                break;
+800079fa:	0001                	nop
+        conv_mode = get_adc_conv_mode();
+800079fc:	b785                	j	8000795c <.L106>
+
+Disassembly of section .text._clean_up:
+
+800079fe <_clean_up>:
+#define MAIN_ENTRY main
+#endif
+extern int MAIN_ENTRY(void);
+
+__attribute__((weak)) void _clean_up(void)
+{
+800079fe:	7139                	add	sp,sp,-64
+
+80007a00 <.LBB18>:
+    clear_csr(CSR_MIE, CSR_MIE_MEIE_MASK);
+80007a00:	6785                	lui	a5,0x1
+80007a02:	80078793          	add	a5,a5,-2048 # 800 <__ILM_segment_used_end__+0x31a>
+80007a06:	3047b073          	csrc	mie,a5
+}
+80007a0a:	0001                	nop
+80007a0c:	da02                	sw	zero,52(sp)
+80007a0e:	d802                	sw	zero,48(sp)
+80007a10:	e40007b7          	lui	a5,0xe4000
+80007a14:	d63e                	sw	a5,44(sp)
+80007a16:	57d2                	lw	a5,52(sp)
+80007a18:	d43e                	sw	a5,40(sp)
+80007a1a:	57c2                	lw	a5,48(sp)
+80007a1c:	d23e                	sw	a5,36(sp)
+
+80007a1e <.LBB20>:
+            (target << HPM_PLIC_THRESHOLD_SHIFT_PER_TARGET));
+80007a1e:	57a2                	lw	a5,40(sp)
+80007a20:	00c79713          	sll	a4,a5,0xc
+            HPM_PLIC_THRESHOLD_OFFSET +
+80007a24:	57b2                	lw	a5,44(sp)
+80007a26:	973e                	add	a4,a4,a5
+80007a28:	002007b7          	lui	a5,0x200
+80007a2c:	97ba                	add	a5,a5,a4
+    volatile uint32_t *threshold_ptr = (volatile uint32_t *)(base +
+80007a2e:	d03e                	sw	a5,32(sp)
+    *threshold_ptr = threshold;
+80007a30:	5782                	lw	a5,32(sp)
+80007a32:	5712                	lw	a4,36(sp)
+80007a34:	c398                	sw	a4,0(a5)
+}
+80007a36:	0001                	nop
+
+80007a38 <.LBE22>:
+ * @param[in] threshold Threshold of IRQ can be serviced
+ */
+ATTR_ALWAYS_INLINE static inline void intc_set_threshold(uint32_t target, uint32_t threshold)
+{
+    __plic_set_threshold(HPM_PLIC_BASE, target, threshold);
+}
+80007a38:	0001                	nop
+
+80007a3a <.LBB24>:
+    /* clean up plic, it will help while debugging */
+    disable_irq_from_intc();
+    intc_m_set_threshold(0);
+    for (uint32_t irq = 0; irq < 128; irq++) {
+80007a3a:	de02                	sw	zero,60(sp)
+80007a3c:	a82d                	j	80007a76 <.L2>
+
+80007a3e <.L3>:
+80007a3e:	ce02                	sw	zero,28(sp)
+80007a40:	57f2                	lw	a5,60(sp)
+80007a42:	cc3e                	sw	a5,24(sp)
+80007a44:	e40007b7          	lui	a5,0xe4000
+80007a48:	ca3e                	sw	a5,20(sp)
+80007a4a:	47f2                	lw	a5,28(sp)
+80007a4c:	c83e                	sw	a5,16(sp)
+80007a4e:	47e2                	lw	a5,24(sp)
+80007a50:	c63e                	sw	a5,12(sp)
+
+80007a52 <.LBB25>:
+                                                          uint32_t target,
+                                                          uint32_t irq)
+{
+    volatile uint32_t *claim_addr = (volatile uint32_t *)(base +
+            HPM_PLIC_CLAIM_OFFSET +
+            (target << HPM_PLIC_CLAIM_SHIFT_PER_TARGET));
+80007a52:	47c2                	lw	a5,16(sp)
+80007a54:	00c79713          	sll	a4,a5,0xc
+            HPM_PLIC_CLAIM_OFFSET +
+80007a58:	47d2                	lw	a5,20(sp)
+80007a5a:	973e                	add	a4,a4,a5
+80007a5c:	002007b7          	lui	a5,0x200
+80007a60:	0791                	add	a5,a5,4 # 200004 <__DLM_segment_end__+0x140004>
+80007a62:	97ba                	add	a5,a5,a4
+    volatile uint32_t *claim_addr = (volatile uint32_t *)(base +
+80007a64:	c43e                	sw	a5,8(sp)
+    *claim_addr = irq;
+80007a66:	47a2                	lw	a5,8(sp)
+80007a68:	4732                	lw	a4,12(sp)
+80007a6a:	c398                	sw	a4,0(a5)
+}
+80007a6c:	0001                	nop
+
+80007a6e <.LBE27>:
+ *
+ */
+ATTR_ALWAYS_INLINE static inline void intc_complete_irq(uint32_t target, uint32_t irq)
+{
+    __plic_complete_irq(HPM_PLIC_BASE, target, irq);
+}
+80007a6e:	0001                	nop
+
+80007a70 <.LBE25>:
+80007a70:	57f2                	lw	a5,60(sp)
+80007a72:	0785                	add	a5,a5,1
+80007a74:	de3e                	sw	a5,60(sp)
+
+80007a76 <.L2>:
+80007a76:	5772                	lw	a4,60(sp)
+80007a78:	07f00793          	li	a5,127
+80007a7c:	fce7f1e3          	bgeu	a5,a4,80007a3e <.L3>
+
+80007a80 <.LBB29>:
+        intc_m_complete_irq(irq);
+    }
+    /* clear any bits left in plic enable register */
+    for (uint32_t i = 0; i < 4; i++) {
+80007a80:	dc02                	sw	zero,56(sp)
+80007a82:	a821                	j	80007a9a <.L4>
+
+80007a84 <.L5>:
+        *(volatile uint32_t *)(HPM_PLIC_BASE + HPM_PLIC_ENABLE_OFFSET + (i << 2)) = 0;
+80007a84:	57e2                	lw	a5,56(sp)
+80007a86:	00279713          	sll	a4,a5,0x2
+80007a8a:	e40027b7          	lui	a5,0xe4002
+80007a8e:	97ba                	add	a5,a5,a4
+80007a90:	0007a023          	sw	zero,0(a5) # e4002000 <__XPI0_segment_end__+0x62002000>
+    for (uint32_t i = 0; i < 4; i++) {
+80007a94:	57e2                	lw	a5,56(sp)
+80007a96:	0785                	add	a5,a5,1
+80007a98:	dc3e                	sw	a5,56(sp)
+
+80007a9a <.L4>:
+80007a9a:	5762                	lw	a4,56(sp)
+80007a9c:	478d                	li	a5,3
+80007a9e:	fee7f3e3          	bgeu	a5,a4,80007a84 <.L5>
+
+80007aa2 <.LBE29>:
+    }
+}
+80007aa2:	0001                	nop
+80007aa4:	0001                	nop
+80007aa6:	6121                	add	sp,sp,64
+80007aa8:	8082                	ret
+
+Disassembly of section .text.reset_handler:
+
+80007aaa <reset_handler>:
+        ;
+    }
+}
+
+__attribute__((weak)) void reset_handler(void)
+{
+80007aaa:	1141                	add	sp,sp,-16
+80007aac:	c606                	sw	ra,12(sp)
+    fencei();
+80007aae:	0000100f          	fence.i
+
+    /* Call platform specific hardware initialization */
+    system_init();
+80007ab2:	8edfc0ef          	jal	8000439e <system_init>
+
+    /* Entry function */
+    MAIN_ENTRY();
+80007ab6:	3569                	jal	80007940 <main>
+}
+80007ab8:	0001                	nop
+80007aba:	40b2                	lw	ra,12(sp)
+80007abc:	0141                	add	sp,sp,16
+80007abe:	8082                	ret
+
+Disassembly of section .text._init:
+
+80007ac0 <_init>:
+__attribute__((weak)) void *__dso_handle = (void *) &__dso_handle;
+#endif
+
+__attribute__((weak)) void _init(void)
+{
+}
+80007ac0:	0001                	nop
+80007ac2:	8082                	ret
+
+Disassembly of section .text.mchtmr_isr:
+
+80007ac4 <mchtmr_isr>:
+}
+80007ac4:	0001                	nop
+80007ac6:	8082                	ret
+
+Disassembly of section .text.swi_isr:
+
+80007ac8 <swi_isr>:
+}
+80007ac8:	0001                	nop
+80007aca:	8082                	ret
+
+Disassembly of section .text.exception_handler:
+
+80007acc <exception_handler>:
+
+__attribute__((weak)) long exception_handler(long cause, long epc)
+{
+80007acc:	1141                	add	sp,sp,-16
+80007ace:	c62a                	sw	a0,12(sp)
+80007ad0:	c42e                	sw	a1,8(sp)
+    switch (cause) {
+80007ad2:	4732                	lw	a4,12(sp)
+80007ad4:	47bd                	li	a5,15
+80007ad6:	00e7ec63          	bltu	a5,a4,80007aee <.L23>
+80007ada:	47b2                	lw	a5,12(sp)
+80007adc:	00279713          	sll	a4,a5,0x2
+80007ae0:	800037b7          	lui	a5,0x80003
+80007ae4:	13878793          	add	a5,a5,312 # 80003138 <.L7>
+80007ae8:	97ba                	add	a5,a5,a4
+80007aea:	439c                	lw	a5,0(a5)
+80007aec:	8782                	jr	a5
+
+80007aee <.L23>:
+        case MCAUSE_LOAD_PAGE_FAULT:
+            break;
+        case MCAUSE_STORE_AMO_PAGE_FAULT:
+            break;
+        default:
+            break;
+80007aee:	0001                	nop
+    }
+    /* Unhandled Trap */
+    return epc;
+80007af0:	47a2                	lw	a5,8(sp)
+}
+80007af2:	853e                	mv	a0,a5
+80007af4:	0141                	add	sp,sp,16
+80007af6:	8082                	ret
+
+Disassembly of section .text.enable_plic_feature:
+
+80007af8 <enable_plic_feature>:
+{
+80007af8:	1141                	add	sp,sp,-16
+    uint32_t plic_feature = 0;
+80007afa:	c602                	sw	zero,12(sp)
+    plic_feature |= HPM_PLIC_FEATURE_VECTORED_MODE;
+80007afc:	47b2                	lw	a5,12(sp)
+80007afe:	0027e793          	or	a5,a5,2
+80007b02:	c63e                	sw	a5,12(sp)
+    plic_feature |= HPM_PLIC_FEATURE_PREEMPTIVE_PRIORITY_IRQ;
+80007b04:	47b2                	lw	a5,12(sp)
+80007b06:	0017e793          	or	a5,a5,1
+80007b0a:	c63e                	sw	a5,12(sp)
+80007b0c:	e40007b7          	lui	a5,0xe4000
+80007b10:	c43e                	sw	a5,8(sp)
+80007b12:	47b2                	lw	a5,12(sp)
+80007b14:	c23e                	sw	a5,4(sp)
+
+80007b16 <.LBB14>:
+    *(volatile uint32_t *)(base + HPM_PLIC_FEATURE_OFFSET) = feature;
+80007b16:	47a2                	lw	a5,8(sp)
+80007b18:	4712                	lw	a4,4(sp)
+80007b1a:	c398                	sw	a4,0(a5)
+}
+80007b1c:	0001                	nop
+
+80007b1e <.LBE14>:
+}
+80007b1e:	0001                	nop
+80007b20:	0141                	add	sp,sp,16
+80007b22:	8082                	ret
+
+Disassembly of section .text.sysctl_enable_group_resource:
+
+80007b24 <sysctl_enable_group_resource>:
+{
+80007b24:	7179                	add	sp,sp,-48
+80007b26:	d606                	sw	ra,44(sp)
+80007b28:	c62a                	sw	a0,12(sp)
+80007b2a:	87ae                	mv	a5,a1
+80007b2c:	8736                	mv	a4,a3
+80007b2e:	00f105a3          	sb	a5,11(sp)
+80007b32:	87b2                	mv	a5,a2
+80007b34:	00f11423          	sh	a5,8(sp)
+80007b38:	87ba                	mv	a5,a4
+80007b3a:	00f10523          	sb	a5,10(sp)
+    if (resource < sysctl_resource_linkable_start) {
+80007b3e:	00815703          	lhu	a4,8(sp)
+80007b42:	0ff00793          	li	a5,255
+80007b46:	00e7e463          	bltu	a5,a4,80007b4e <.L60>
+        return status_invalid_argument;
+80007b4a:	4789                	li	a5,2
+80007b4c:	a8e5                	j	80007c44 <.L61>
+
+80007b4e <.L60>:
+    index = (resource - sysctl_resource_linkable_start) / 32;
+80007b4e:	00815783          	lhu	a5,8(sp)
+80007b52:	f0078793          	add	a5,a5,-256 # e3ffff00 <__XPI0_segment_end__+0x61ffff00>
+80007b56:	41f7d713          	sra	a4,a5,0x1f
+80007b5a:	8b7d                	and	a4,a4,31
+80007b5c:	97ba                	add	a5,a5,a4
+80007b5e:	8795                	sra	a5,a5,0x5
+80007b60:	ce3e                	sw	a5,28(sp)
+    offset = (resource - sysctl_resource_linkable_start) % 32;
+80007b62:	00815783          	lhu	a5,8(sp)
+80007b66:	f0078713          	add	a4,a5,-256
+80007b6a:	41f75793          	sra	a5,a4,0x1f
+80007b6e:	83ed                	srl	a5,a5,0x1b
+80007b70:	973e                	add	a4,a4,a5
+80007b72:	8b7d                	and	a4,a4,31
+80007b74:	40f707b3          	sub	a5,a4,a5
+80007b78:	cc3e                	sw	a5,24(sp)
+    switch (group) {
+80007b7a:	00b14783          	lbu	a5,11(sp)
+80007b7e:	c789                	beqz	a5,80007b88 <.L62>
+80007b80:	4705                	li	a4,1
+80007b82:	04e78f63          	beq	a5,a4,80007be0 <.L63>
+80007b86:	a84d                	j	80007c38 <.L74>
+
+80007b88 <.L62>:
+        ptr->GROUP0[index].VALUE = (ptr->GROUP0[index].VALUE & ~(1UL << offset))
+80007b88:	4732                	lw	a4,12(sp)
+80007b8a:	47f2                	lw	a5,28(sp)
+80007b8c:	08078793          	add	a5,a5,128
+80007b90:	0792                	sll	a5,a5,0x4
+80007b92:	97ba                	add	a5,a5,a4
+80007b94:	4398                	lw	a4,0(a5)
+80007b96:	47e2                	lw	a5,24(sp)
+80007b98:	4685                	li	a3,1
+80007b9a:	00f697b3          	sll	a5,a3,a5
+80007b9e:	fff7c793          	not	a5,a5
+80007ba2:	8f7d                	and	a4,a4,a5
+            | (enable ? (1UL << offset) : 0);
+80007ba4:	00a14783          	lbu	a5,10(sp)
+80007ba8:	c791                	beqz	a5,80007bb4 <.L65>
+80007baa:	47e2                	lw	a5,24(sp)
+80007bac:	4685                	li	a3,1
+80007bae:	00f697b3          	sll	a5,a3,a5
+80007bb2:	a011                	j	80007bb6 <.L66>
+
+80007bb4 <.L65>:
+80007bb4:	4781                	li	a5,0
+
+80007bb6 <.L66>:
+80007bb6:	8f5d                	or	a4,a4,a5
+        ptr->GROUP0[index].VALUE = (ptr->GROUP0[index].VALUE & ~(1UL << offset))
+80007bb8:	46b2                	lw	a3,12(sp)
+80007bba:	47f2                	lw	a5,28(sp)
+80007bbc:	08078793          	add	a5,a5,128
+80007bc0:	0792                	sll	a5,a5,0x4
+80007bc2:	97b6                	add	a5,a5,a3
+80007bc4:	c398                	sw	a4,0(a5)
+        if (enable) {
+80007bc6:	00a14783          	lbu	a5,10(sp)
+80007bca:	cbad                	beqz	a5,80007c3c <.L75>
+            while (sysctl_resource_target_is_busy(ptr, resource)) {
+80007bcc:	0001                	nop
+
+80007bce <.L68>:
+80007bce:	00815783          	lhu	a5,8(sp)
+80007bd2:	85be                	mv	a1,a5
+80007bd4:	4532                	lw	a0,12(sp)
+80007bd6:	82dfc0ef          	jal	80004402 <sysctl_resource_target_is_busy>
+80007bda:	87aa                	mv	a5,a0
+80007bdc:	fbed                	bnez	a5,80007bce <.L68>
+        break;
+80007bde:	a8b9                	j	80007c3c <.L75>
+
+80007be0 <.L63>:
+        ptr->GROUP1[index].VALUE = (ptr->GROUP1[index].VALUE & ~(1UL << offset))
+80007be0:	4732                	lw	a4,12(sp)
+80007be2:	47f2                	lw	a5,28(sp)
+80007be4:	08478793          	add	a5,a5,132
+80007be8:	0792                	sll	a5,a5,0x4
+80007bea:	97ba                	add	a5,a5,a4
+80007bec:	4398                	lw	a4,0(a5)
+80007bee:	47e2                	lw	a5,24(sp)
+80007bf0:	4685                	li	a3,1
+80007bf2:	00f697b3          	sll	a5,a3,a5
+80007bf6:	fff7c793          	not	a5,a5
+80007bfa:	8f7d                	and	a4,a4,a5
+            | (enable ? (1UL << offset) : 0);
+80007bfc:	00a14783          	lbu	a5,10(sp)
+80007c00:	c791                	beqz	a5,80007c0c <.L70>
+80007c02:	47e2                	lw	a5,24(sp)
+80007c04:	4685                	li	a3,1
+80007c06:	00f697b3          	sll	a5,a3,a5
+80007c0a:	a011                	j	80007c0e <.L71>
+
+80007c0c <.L70>:
+80007c0c:	4781                	li	a5,0
+
+80007c0e <.L71>:
+80007c0e:	8f5d                	or	a4,a4,a5
+        ptr->GROUP1[index].VALUE = (ptr->GROUP1[index].VALUE & ~(1UL << offset))
+80007c10:	46b2                	lw	a3,12(sp)
+80007c12:	47f2                	lw	a5,28(sp)
+80007c14:	08478793          	add	a5,a5,132
+80007c18:	0792                	sll	a5,a5,0x4
+80007c1a:	97b6                	add	a5,a5,a3
+80007c1c:	c398                	sw	a4,0(a5)
+        if (enable) {
+80007c1e:	00a14783          	lbu	a5,10(sp)
+80007c22:	cf99                	beqz	a5,80007c40 <.L76>
+            while (sysctl_resource_target_is_busy(ptr, resource)) {
+80007c24:	0001                	nop
+
+80007c26 <.L73>:
+80007c26:	00815783          	lhu	a5,8(sp)
+80007c2a:	85be                	mv	a1,a5
+80007c2c:	4532                	lw	a0,12(sp)
+80007c2e:	fd4fc0ef          	jal	80004402 <sysctl_resource_target_is_busy>
+80007c32:	87aa                	mv	a5,a0
+80007c34:	fbed                	bnez	a5,80007c26 <.L73>
+        break;
+80007c36:	a029                	j	80007c40 <.L76>
+
+80007c38 <.L74>:
+        return status_invalid_argument;
+80007c38:	4789                	li	a5,2
+80007c3a:	a029                	j	80007c44 <.L61>
+
+80007c3c <.L75>:
+        break;
+80007c3c:	0001                	nop
+80007c3e:	a011                	j	80007c42 <.L69>
+
+80007c40 <.L76>:
+        break;
+80007c40:	0001                	nop
+
+80007c42 <.L69>:
+    return status_success;
+80007c42:	4781                	li	a5,0
+
+80007c44 <.L61>:
+}
+80007c44:	853e                	mv	a0,a5
+80007c46:	50b2                	lw	ra,44(sp)
+80007c48:	6145                	add	sp,sp,48
+80007c4a:	8082                	ret
+
+Disassembly of section .text.l1c_dc_invalidate_all:
+
+80007c4c <l1c_dc_invalidate_all>:
+{
+    __asm("fence.i");
+}
+
+void l1c_dc_invalidate_all(void)
+{
+80007c4c:	1141                	add	sp,sp,-16
+80007c4e:	47dd                	li	a5,23
+80007c50:	00f107a3          	sb	a5,15(sp)
+
+80007c54 <.LBB76>:
+}
+
+/* send command */
+__attribute__((always_inline)) static inline void l1c_cctl_cmd(uint8_t cmd)
+{
+    write_csr(CSR_MCCTLCOMMAND, cmd);
+80007c54:	00f14783          	lbu	a5,15(sp)
+80007c58:	7cc79073          	csrw	0x7cc,a5
+}
+80007c5c:	0001                	nop
+
+80007c5e <.LBE76>:
+    l1c_cctl_cmd(HPM_L1C_CCTL_CMD_L1D_INVAL_ALL);
+}
+80007c5e:	0001                	nop
+80007c60:	0141                	add	sp,sp,16
+80007c62:	8082                	ret
+
+Disassembly of section .text.get_frequency_for_source:
+
+80007c64 <get_frequency_for_source>:
+{
+80007c64:	7179                	add	sp,sp,-48
+80007c66:	d606                	sw	ra,44(sp)
+80007c68:	87aa                	mv	a5,a0
+80007c6a:	00f107a3          	sb	a5,15(sp)
+    uint32_t clk_freq = 0UL;
+80007c6e:	ce02                	sw	zero,28(sp)
+    uint32_t div = 1;
+80007c70:	4785                	li	a5,1
+80007c72:	cc3e                	sw	a5,24(sp)
+    switch (source) {
+80007c74:	00f14783          	lbu	a5,15(sp)
+80007c78:	471d                	li	a4,7
+80007c7a:	0cf76e63          	bltu	a4,a5,80007d56 <.L36>
+80007c7e:	00279713          	sll	a4,a5,0x2
+80007c82:	800037b7          	lui	a5,0x80003
+80007c86:	1c078793          	add	a5,a5,448 # 800031c0 <.L38>
+80007c8a:	97ba                	add	a5,a5,a4
+80007c8c:	439c                	lw	a5,0(a5)
+80007c8e:	8782                	jr	a5
+
+80007c90 <.L45>:
+        clk_freq = FREQ_PRESET1_OSC0_CLK0;
+80007c90:	016e37b7          	lui	a5,0x16e3
+80007c94:	60078793          	add	a5,a5,1536 # 16e3600 <__SHARE_RAM_segment_end__+0x563600>
+80007c98:	ce3e                	sw	a5,28(sp)
+        break;
+80007c9a:	a0c1                	j	80007d5a <.L46>
+
+80007c9c <.L44>:
+        clk_freq = pllctl_get_pll_freq_in_hz(HPM_PLLCTL, 0U);
+80007c9c:	4581                	li	a1,0
+80007c9e:	f4100537          	lui	a0,0xf4100
+80007ca2:	2d3000ef          	jal	80008774 <pllctl_get_pll_freq_in_hz>
+80007ca6:	ce2a                	sw	a0,28(sp)
+        break;
+80007ca8:	a84d                	j	80007d5a <.L46>
+
+80007caa <.L43>:
+        div = pllctl_get_div(HPM_PLLCTL, 1, 0);
+80007caa:	4601                	li	a2,0
+80007cac:	4585                	li	a1,1
+80007cae:	f4100537          	lui	a0,0xf4100
+80007cb2:	bcffc0ef          	jal	80004880 <pllctl_get_div>
+80007cb6:	cc2a                	sw	a0,24(sp)
+        clk_freq = pllctl_get_pll_freq_in_hz(HPM_PLLCTL, 1U) / div;
+80007cb8:	4585                	li	a1,1
+80007cba:	f4100537          	lui	a0,0xf4100
+80007cbe:	2b7000ef          	jal	80008774 <pllctl_get_pll_freq_in_hz>
+80007cc2:	872a                	mv	a4,a0
+80007cc4:	47e2                	lw	a5,24(sp)
+80007cc6:	02f757b3          	divu	a5,a4,a5
+80007cca:	ce3e                	sw	a5,28(sp)
+        break;
+80007ccc:	a079                	j	80007d5a <.L46>
+
+80007cce <.L42>:
+        div = pllctl_get_div(HPM_PLLCTL, 1, 1);
+80007cce:	4605                	li	a2,1
+80007cd0:	4585                	li	a1,1
+80007cd2:	f4100537          	lui	a0,0xf4100
+80007cd6:	babfc0ef          	jal	80004880 <pllctl_get_div>
+80007cda:	cc2a                	sw	a0,24(sp)
+        clk_freq = pllctl_get_pll_freq_in_hz(HPM_PLLCTL, 1U) / div;
+80007cdc:	4585                	li	a1,1
+80007cde:	f4100537          	lui	a0,0xf4100
+80007ce2:	293000ef          	jal	80008774 <pllctl_get_pll_freq_in_hz>
+80007ce6:	872a                	mv	a4,a0
+80007ce8:	47e2                	lw	a5,24(sp)
+80007cea:	02f757b3          	divu	a5,a4,a5
+80007cee:	ce3e                	sw	a5,28(sp)
+        break;
+80007cf0:	a0ad                	j	80007d5a <.L46>
+
+80007cf2 <.L41>:
+        div = pllctl_get_div(HPM_PLLCTL, 2, 0);
+80007cf2:	4601                	li	a2,0
+80007cf4:	4589                	li	a1,2
+80007cf6:	f4100537          	lui	a0,0xf4100
+80007cfa:	b87fc0ef          	jal	80004880 <pllctl_get_div>
+80007cfe:	cc2a                	sw	a0,24(sp)
+        clk_freq = pllctl_get_pll_freq_in_hz(HPM_PLLCTL, 2U) / div;
+80007d00:	4589                	li	a1,2
+80007d02:	f4100537          	lui	a0,0xf4100
+80007d06:	26f000ef          	jal	80008774 <pllctl_get_pll_freq_in_hz>
+80007d0a:	872a                	mv	a4,a0
+80007d0c:	47e2                	lw	a5,24(sp)
+80007d0e:	02f757b3          	divu	a5,a4,a5
+80007d12:	ce3e                	sw	a5,28(sp)
+        break;
+80007d14:	a099                	j	80007d5a <.L46>
+
+80007d16 <.L40>:
+        div = pllctl_get_div(HPM_PLLCTL, 2, 1);
+80007d16:	4605                	li	a2,1
+80007d18:	4589                	li	a1,2
+80007d1a:	f4100537          	lui	a0,0xf4100
+80007d1e:	b63fc0ef          	jal	80004880 <pllctl_get_div>
+80007d22:	cc2a                	sw	a0,24(sp)
+        clk_freq = pllctl_get_pll_freq_in_hz(HPM_PLLCTL, 2U) / div;
+80007d24:	4589                	li	a1,2
+80007d26:	f4100537          	lui	a0,0xf4100
+80007d2a:	24b000ef          	jal	80008774 <pllctl_get_pll_freq_in_hz>
+80007d2e:	872a                	mv	a4,a0
+80007d30:	47e2                	lw	a5,24(sp)
+80007d32:	02f757b3          	divu	a5,a4,a5
+80007d36:	ce3e                	sw	a5,28(sp)
+        break;
+80007d38:	a00d                	j	80007d5a <.L46>
+
+80007d3a <.L39>:
+        clk_freq = pllctl_get_pll_freq_in_hz(HPM_PLLCTL, 3U);
+80007d3a:	458d                	li	a1,3
+80007d3c:	f4100537          	lui	a0,0xf4100
+80007d40:	235000ef          	jal	80008774 <pllctl_get_pll_freq_in_hz>
+80007d44:	ce2a                	sw	a0,28(sp)
+        break;
+80007d46:	a811                	j	80007d5a <.L46>
+
+80007d48 <.L37>:
+        clk_freq = pllctl_get_pll_freq_in_hz(HPM_PLLCTL, 4U);
+80007d48:	4591                	li	a1,4
+80007d4a:	f4100537          	lui	a0,0xf4100
+80007d4e:	227000ef          	jal	80008774 <pllctl_get_pll_freq_in_hz>
+80007d52:	ce2a                	sw	a0,28(sp)
+        break;
+80007d54:	a019                	j	80007d5a <.L46>
+
+80007d56 <.L36>:
+        clk_freq = 0UL;
+80007d56:	ce02                	sw	zero,28(sp)
+        break;
+80007d58:	0001                	nop
+
+80007d5a <.L46>:
+    return clk_freq;
+80007d5a:	47f2                	lw	a5,28(sp)
+}
+80007d5c:	853e                	mv	a0,a5
+80007d5e:	50b2                	lw	ra,44(sp)
+80007d60:	6145                	add	sp,sp,48
+80007d62:	8082                	ret
+
+Disassembly of section .text.get_frequency_for_i2s_or_adc:
+
+80007d64 <get_frequency_for_i2s_or_adc>:
+{
+80007d64:	7139                	add	sp,sp,-64
+80007d66:	de06                	sw	ra,60(sp)
+80007d68:	c62a                	sw	a0,12(sp)
+80007d6a:	c42e                	sw	a1,8(sp)
+    uint32_t clk_freq = 0UL;
+80007d6c:	d602                	sw	zero,44(sp)
+    bool is_mux_valid = false;
+80007d6e:	020105a3          	sb	zero,43(sp)
+    clock_node_t node = clock_node_end;
+80007d72:	04b00793          	li	a5,75
+80007d76:	02f10523          	sb	a5,42(sp)
+    if (clk_src_type == CLK_SRC_GROUP_ADC) {
+80007d7a:	4732                	lw	a4,12(sp)
+80007d7c:	4785                	li	a5,1
+80007d7e:	04f71563          	bne	a4,a5,80007dc8 <.L52>
+
+80007d82 <.LBB7>:
+        uint32_t adc_index = instance;
+80007d82:	47a2                	lw	a5,8(sp)
+80007d84:	ce3e                	sw	a5,28(sp)
+        if (adc_index < ADC_INSTANCE_NUM) {
+80007d86:	4772                	lw	a4,28(sp)
+80007d88:	478d                	li	a5,3
+80007d8a:	08e7e163          	bltu	a5,a4,80007e0c <.L53>
+
+80007d8e <.LBB8>:
+            uint32_t mux_in_reg = SYSCTL_ADCCLK_MUX_GET(HPM_SYSCTL->ADCCLK[adc_index]);
+80007d8e:	f4000737          	lui	a4,0xf4000
+80007d92:	47f2                	lw	a5,28(sp)
+80007d94:	70078793          	add	a5,a5,1792
+80007d98:	078a                	sll	a5,a5,0x2
+80007d9a:	97ba                	add	a5,a5,a4
+80007d9c:	439c                	lw	a5,0(a5)
+80007d9e:	83a1                	srl	a5,a5,0x8
+80007da0:	8b9d                	and	a5,a5,7
+80007da2:	cc3e                	sw	a5,24(sp)
+            if (mux_in_reg < ARRAY_SIZE(s_adc_clk_mux_node)) {
+80007da4:	4762                	lw	a4,24(sp)
+80007da6:	478d                	li	a5,3
+80007da8:	06e7e263          	bltu	a5,a4,80007e0c <.L53>
+                node = s_adc_clk_mux_node[mux_in_reg];
+80007dac:	800037b7          	lui	a5,0x80003
+80007db0:	07c78713          	add	a4,a5,124 # 8000307c <s_adc_clk_mux_node>
+80007db4:	47e2                	lw	a5,24(sp)
+80007db6:	97ba                	add	a5,a5,a4
+80007db8:	0007c783          	lbu	a5,0(a5)
+80007dbc:	02f10523          	sb	a5,42(sp)
+                is_mux_valid = true;
+80007dc0:	4785                	li	a5,1
+80007dc2:	02f105a3          	sb	a5,43(sp)
+80007dc6:	a099                	j	80007e0c <.L53>
+
+80007dc8 <.L52>:
+        uint32_t i2s_index = instance;
+80007dc8:	47a2                	lw	a5,8(sp)
+80007dca:	d23e                	sw	a5,36(sp)
+        if (i2s_index < I2S_INSTANCE_NUM) {
+80007dcc:	5712                	lw	a4,36(sp)
+80007dce:	478d                	li	a5,3
+80007dd0:	02e7ee63          	bltu	a5,a4,80007e0c <.L53>
+
+80007dd4 <.LBB10>:
+            uint32_t mux_in_reg = SYSCTL_I2SCLK_MUX_GET(HPM_SYSCTL->I2SCLK[i2s_index]);
+80007dd4:	f4000737          	lui	a4,0xf4000
+80007dd8:	5792                	lw	a5,36(sp)
+80007dda:	70478793          	add	a5,a5,1796
+80007dde:	078a                	sll	a5,a5,0x2
+80007de0:	97ba                	add	a5,a5,a4
+80007de2:	439c                	lw	a5,0(a5)
+80007de4:	83a1                	srl	a5,a5,0x8
+80007de6:	8b9d                	and	a5,a5,7
+80007de8:	d03e                	sw	a5,32(sp)
+            if (mux_in_reg < ARRAY_SIZE(s_i2s_clk_mux_node)) {
+80007dea:	5702                	lw	a4,32(sp)
+80007dec:	478d                	li	a5,3
+80007dee:	00e7ef63          	bltu	a5,a4,80007e0c <.L53>
+                node = s_i2s_clk_mux_node[mux_in_reg];
+80007df2:	800037b7          	lui	a5,0x80003
+80007df6:	17878713          	add	a4,a5,376 # 80003178 <s_i2s_clk_mux_node>
+80007dfa:	5782                	lw	a5,32(sp)
+80007dfc:	97ba                	add	a5,a5,a4
+80007dfe:	0007c783          	lbu	a5,0(a5)
+80007e02:	02f10523          	sb	a5,42(sp)
+                is_mux_valid = true;
+80007e06:	4785                	li	a5,1
+80007e08:	02f105a3          	sb	a5,43(sp)
+
+80007e0c <.L53>:
+    if (is_mux_valid) {
+80007e0c:	02b14783          	lbu	a5,43(sp)
+80007e10:	c38d                	beqz	a5,80007e32 <.L54>
+        if (node == clock_node_ahb0) {
+80007e12:	02a14703          	lbu	a4,42(sp)
+80007e16:	479d                	li	a5,7
+80007e18:	00f71763          	bne	a4,a5,80007e26 <.L55>
+            clk_freq = get_frequency_for_ip_in_common_group(clock_node_ahb0);
+80007e1c:	451d                	li	a0,7
+80007e1e:	b95fc0ef          	jal	800049b2 <get_frequency_for_ip_in_common_group>
+80007e22:	d62a                	sw	a0,44(sp)
+80007e24:	a039                	j	80007e32 <.L54>
+
+80007e26 <.L55>:
+            clk_freq = get_frequency_for_ip_in_common_group(node);
+80007e26:	02a14783          	lbu	a5,42(sp)
+80007e2a:	853e                	mv	a0,a5
+80007e2c:	b87fc0ef          	jal	800049b2 <get_frequency_for_ip_in_common_group>
+80007e30:	d62a                	sw	a0,44(sp)
+
+80007e32 <.L54>:
+    return clk_freq;
+80007e32:	57b2                	lw	a5,44(sp)
+}
+80007e34:	853e                	mv	a0,a5
+80007e36:	50f2                	lw	ra,60(sp)
+80007e38:	6121                	add	sp,sp,64
+80007e3a:	8082                	ret
+
+Disassembly of section .text.get_frequency_for_wdg:
+
+80007e3c <get_frequency_for_wdg>:
+{
+80007e3c:	7179                	add	sp,sp,-48
+80007e3e:	d606                	sw	ra,44(sp)
+80007e40:	c62a                	sw	a0,12(sp)
+    if (WDG_CTRL_CLKSEL_GET(s_wdgs[instance]->CTRL) == 0) {
+80007e42:	800037b7          	lui	a5,0x80003
+80007e46:	17c78713          	add	a4,a5,380 # 8000317c <s_wdgs>
+80007e4a:	47b2                	lw	a5,12(sp)
+80007e4c:	078a                	sll	a5,a5,0x2
+80007e4e:	97ba                	add	a5,a5,a4
+80007e50:	439c                	lw	a5,0(a5)
+80007e52:	4b9c                	lw	a5,16(a5)
+80007e54:	8b89                	and	a5,a5,2
+80007e56:	e791                	bnez	a5,80007e62 <.L58>
+        freq_in_hz = get_frequency_for_ip_in_common_group(clock_node_ahb0);
+80007e58:	451d                	li	a0,7
+80007e5a:	b59fc0ef          	jal	800049b2 <get_frequency_for_ip_in_common_group>
+80007e5e:	ce2a                	sw	a0,28(sp)
+80007e60:	a019                	j	80007e66 <.L59>
+
+80007e62 <.L58>:
+        freq_in_hz = FREQ_32KHz;
+80007e62:	67a1                	lui	a5,0x8
+80007e64:	ce3e                	sw	a5,28(sp)
+
+80007e66 <.L59>:
+    return freq_in_hz;
+80007e66:	47f2                	lw	a5,28(sp)
+}
+80007e68:	853e                	mv	a0,a5
+80007e6a:	50b2                	lw	ra,44(sp)
+80007e6c:	6145                	add	sp,sp,48
+80007e6e:	8082                	ret
+
+Disassembly of section .text.get_frequency_for_pwdg:
+
+80007e70 <get_frequency_for_pwdg>:
+{
+80007e70:	1141                	add	sp,sp,-16
+    if (WDG_CTRL_CLKSEL_GET(HPM_PWDG->CTRL) == 0) {
+80007e72:	f40e87b7          	lui	a5,0xf40e8
+80007e76:	4b9c                	lw	a5,16(a5)
+80007e78:	8b89                	and	a5,a5,2
+80007e7a:	e799                	bnez	a5,80007e88 <.L62>
+        freq_in_hz = FREQ_PRESET1_OSC0_CLK0;
+80007e7c:	016e37b7          	lui	a5,0x16e3
+80007e80:	60078793          	add	a5,a5,1536 # 16e3600 <__SHARE_RAM_segment_end__+0x563600>
+80007e84:	c63e                	sw	a5,12(sp)
+80007e86:	a019                	j	80007e8c <.L63>
+
+80007e88 <.L62>:
+        freq_in_hz = FREQ_32KHz;
+80007e88:	67a1                	lui	a5,0x8
+80007e8a:	c63e                	sw	a5,12(sp)
+
+80007e8c <.L63>:
+    return freq_in_hz;
+80007e8c:	47b2                	lw	a5,12(sp)
+}
+80007e8e:	853e                	mv	a0,a5
+80007e90:	0141                	add	sp,sp,16
+80007e92:	8082                	ret
+
+Disassembly of section .text.clock_connect_group_to_cpu:
+
+80007e94 <clock_connect_group_to_cpu>:
+{
+80007e94:	1141                	add	sp,sp,-16
+80007e96:	c62a                	sw	a0,12(sp)
+80007e98:	c42e                	sw	a1,8(sp)
+    if (cpu < 2U) {
+80007e9a:	4722                	lw	a4,8(sp)
+80007e9c:	4785                	li	a5,1
+80007e9e:	00e7ee63          	bltu	a5,a4,80007eba <.L173>
+        HPM_SYSCTL->AFFILIATE[cpu].SET = (1UL << group);
+80007ea2:	f40006b7          	lui	a3,0xf4000
+80007ea6:	47b2                	lw	a5,12(sp)
+80007ea8:	4705                	li	a4,1
+80007eaa:	00f71733          	sll	a4,a4,a5
+80007eae:	47a2                	lw	a5,8(sp)
+80007eb0:	09078793          	add	a5,a5,144 # 8090 <__AHB_SRAM_segment_size__+0x90>
+80007eb4:	0792                	sll	a5,a5,0x4
+80007eb6:	97b6                	add	a5,a5,a3
+80007eb8:	c3d8                	sw	a4,4(a5)
+
+80007eba <.L173>:
+}
+80007eba:	0001                	nop
+80007ebc:	0141                	add	sp,sp,16
+80007ebe:	8082                	ret
+
+Disassembly of section .text.init_uart_pins:
+
+80007ec0 <init_uart_pins>:
+ */
+
+#include "board.h"
+
+void init_uart_pins(UART_Type *ptr)
+{
+80007ec0:	1141                	add	sp,sp,-16
+80007ec2:	c62a                	sw	a0,12(sp)
+    if (ptr == HPM_UART0) {
+80007ec4:	4732                	lw	a4,12(sp)
+80007ec6:	f00407b7          	lui	a5,0xf0040
+80007eca:	02f71f63          	bne	a4,a5,80007f08 <.L4>
+        HPM_IOC->PAD[IOC_PAD_PY07].FUNC_CTL = IOC_PY07_FUNC_CTL_UART0_RXD;
+80007ece:	f4040737          	lui	a4,0xf4040
+80007ed2:	6785                	lui	a5,0x1
+80007ed4:	97ba                	add	a5,a5,a4
+80007ed6:	4709                	li	a4,2
+80007ed8:	e2e7ac23          	sw	a4,-456(a5) # e38 <__NOR_CFG_OPTION_segment_size__+0x238>
+        HPM_IOC->PAD[IOC_PAD_PY06].FUNC_CTL = IOC_PY06_FUNC_CTL_UART0_TXD;
+80007edc:	f4040737          	lui	a4,0xf4040
+80007ee0:	6785                	lui	a5,0x1
+80007ee2:	97ba                	add	a5,a5,a4
+80007ee4:	4709                	li	a4,2
+80007ee6:	e2e7a823          	sw	a4,-464(a5) # e30 <__NOR_CFG_OPTION_segment_size__+0x230>
+        /* PY port IO needs to configure PIOC as well */
+        HPM_PIOC->PAD[IOC_PAD_PY07].FUNC_CTL = PIOC_PY07_FUNC_CTL_SOC_PY_07;
+80007eea:	f40d8737          	lui	a4,0xf40d8
+80007eee:	6785                	lui	a5,0x1
+80007ef0:	97ba                	add	a5,a5,a4
+80007ef2:	470d                	li	a4,3
+80007ef4:	e2e7ac23          	sw	a4,-456(a5) # e38 <__NOR_CFG_OPTION_segment_size__+0x238>
+        HPM_PIOC->PAD[IOC_PAD_PY06].FUNC_CTL = PIOC_PY06_FUNC_CTL_SOC_PY_06;
+80007ef8:	f40d8737          	lui	a4,0xf40d8
+80007efc:	6785                	lui	a5,0x1
+80007efe:	97ba                	add	a5,a5,a4
+80007f00:	470d                	li	a4,3
+80007f02:	e2e7a823          	sw	a4,-464(a5) # e30 <__NOR_CFG_OPTION_segment_size__+0x230>
+        HPM_PIOC->PAD[IOC_PAD_PY07].FUNC_CTL = PIOC_PY07_FUNC_CTL_PUART_RXD;
+        HPM_PIOC->PAD[IOC_PAD_PY06].FUNC_CTL = PIOC_PY06_FUNC_CTL_PUART_TXD;
+    }
+
+
+}
+80007f06:	aa01                	j	80008016 <.L11>
+
+80007f08 <.L4>:
+    }else if (ptr == HPM_UART3){
+80007f08:	4732                	lw	a4,12(sp)
+80007f0a:	f004c7b7          	lui	a5,0xf004c
+80007f0e:	00f71d63          	bne	a4,a5,80007f28 <.L6>
+        HPM_IOC->PAD[IOC_PAD_PB24].FUNC_CTL = IOC_PB24_FUNC_CTL_UART3_RXD;
+80007f12:	f40407b7          	lui	a5,0xf4040
+80007f16:	4709                	li	a4,2
+80007f18:	1ce7a023          	sw	a4,448(a5) # f40401c0 <__AHB_SRAM_segment_end__+0x3d381c0>
+        HPM_IOC->PAD[IOC_PAD_PB25].FUNC_CTL = IOC_PB25_FUNC_CTL_UART3_TXD;
+80007f1c:	f40407b7          	lui	a5,0xf4040
+80007f20:	4709                	li	a4,2
+80007f22:	1ce7a423          	sw	a4,456(a5) # f40401c8 <__AHB_SRAM_segment_end__+0x3d381c8>
+}
+80007f26:	a8c5                	j	80008016 <.L11>
+
+80007f28 <.L6>:
+    }else if (ptr == HPM_UART6) {
+80007f28:	4732                	lw	a4,12(sp)
+80007f2a:	f00587b7          	lui	a5,0xf0058
+80007f2e:	00f71d63          	bne	a4,a5,80007f48 <.L7>
+        HPM_IOC->PAD[IOC_PAD_PE27].FUNC_CTL = IOC_PE27_FUNC_CTL_UART6_RXD;
+80007f32:	f40407b7          	lui	a5,0xf4040
+80007f36:	4709                	li	a4,2
+80007f38:	4ce7ac23          	sw	a4,1240(a5) # f40404d8 <__AHB_SRAM_segment_end__+0x3d384d8>
+        HPM_IOC->PAD[IOC_PAD_PE28].FUNC_CTL = IOC_PE28_FUNC_CTL_UART6_TXD;
+80007f3c:	f40407b7          	lui	a5,0xf4040
+80007f40:	4709                	li	a4,2
+80007f42:	4ee7a023          	sw	a4,1248(a5) # f40404e0 <__AHB_SRAM_segment_end__+0x3d384e0>
+}
+80007f46:	a8c1                	j	80008016 <.L11>
+
+80007f48 <.L7>:
+    } else if (ptr == HPM_UART7) {
+80007f48:	4732                	lw	a4,12(sp)
+80007f4a:	f005c7b7          	lui	a5,0xf005c
+80007f4e:	00f71d63          	bne	a4,a5,80007f68 <.L8>
+        HPM_IOC->PAD[IOC_PAD_PC02].FUNC_CTL = IOC_PC02_FUNC_CTL_UART7_RXD;
+80007f52:	f40407b7          	lui	a5,0xf4040
+80007f56:	4709                	li	a4,2
+80007f58:	20e7a823          	sw	a4,528(a5) # f4040210 <__AHB_SRAM_segment_end__+0x3d38210>
+        HPM_IOC->PAD[IOC_PAD_PC03].FUNC_CTL = IOC_PC03_FUNC_CTL_UART7_TXD;
+80007f5c:	f40407b7          	lui	a5,0xf4040
+80007f60:	4709                	li	a4,2
+80007f62:	20e7ac23          	sw	a4,536(a5) # f4040218 <__AHB_SRAM_segment_end__+0x3d38218>
+}
+80007f66:	a845                	j	80008016 <.L11>
+
+80007f68 <.L8>:
+    } else if (ptr == HPM_UART13) {
+80007f68:	4732                	lw	a4,12(sp)
+80007f6a:	f00747b7          	lui	a5,0xf0074
+80007f6e:	02f71f63          	bne	a4,a5,80007fac <.L9>
+        HPM_IOC->PAD[IOC_PAD_PZ08].FUNC_CTL = IOC_PZ08_FUNC_CTL_UART13_RXD;
+80007f72:	f4040737          	lui	a4,0xf4040
+80007f76:	6785                	lui	a5,0x1
+80007f78:	97ba                	add	a5,a5,a4
+80007f7a:	4709                	li	a4,2
+80007f7c:	f4e7a023          	sw	a4,-192(a5) # f40 <__NOR_CFG_OPTION_segment_size__+0x340>
+        HPM_IOC->PAD[IOC_PAD_PZ09].FUNC_CTL = IOC_PZ09_FUNC_CTL_UART13_TXD;
+80007f80:	f4040737          	lui	a4,0xf4040
+80007f84:	6785                	lui	a5,0x1
+80007f86:	97ba                	add	a5,a5,a4
+80007f88:	4709                	li	a4,2
+80007f8a:	f4e7a423          	sw	a4,-184(a5) # f48 <__NOR_CFG_OPTION_segment_size__+0x348>
+        HPM_BIOC->PAD[IOC_PAD_PZ08].FUNC_CTL = BIOC_PZ08_FUNC_CTL_SOC_PZ_08;
+80007f8e:	f5010737          	lui	a4,0xf5010
+80007f92:	6785                	lui	a5,0x1
+80007f94:	97ba                	add	a5,a5,a4
+80007f96:	470d                	li	a4,3
+80007f98:	f4e7a023          	sw	a4,-192(a5) # f40 <__NOR_CFG_OPTION_segment_size__+0x340>
+        HPM_BIOC->PAD[IOC_PAD_PZ09].FUNC_CTL = BIOC_PZ09_FUNC_CTL_SOC_PZ_09;
+80007f9c:	f5010737          	lui	a4,0xf5010
+80007fa0:	6785                	lui	a5,0x1
+80007fa2:	97ba                	add	a5,a5,a4
+80007fa4:	470d                	li	a4,3
+80007fa6:	f4e7a423          	sw	a4,-184(a5) # f48 <__NOR_CFG_OPTION_segment_size__+0x348>
+}
+80007faa:	a0b5                	j	80008016 <.L11>
+
+80007fac <.L9>:
+    } else if (ptr == HPM_UART14) {
+80007fac:	4732                	lw	a4,12(sp)
+80007fae:	f00787b7          	lui	a5,0xf0078
+80007fb2:	02f71f63          	bne	a4,a5,80007ff0 <.L10>
+        HPM_IOC->PAD[IOC_PAD_PZ10].FUNC_CTL = IOC_PZ10_FUNC_CTL_UART14_RXD;
+80007fb6:	f4040737          	lui	a4,0xf4040
+80007fba:	6785                	lui	a5,0x1
+80007fbc:	97ba                	add	a5,a5,a4
+80007fbe:	4709                	li	a4,2
+80007fc0:	f4e7a823          	sw	a4,-176(a5) # f50 <__NOR_CFG_OPTION_segment_size__+0x350>
+        HPM_IOC->PAD[IOC_PAD_PZ11].FUNC_CTL = IOC_PZ11_FUNC_CTL_UART14_TXD;
+80007fc4:	f4040737          	lui	a4,0xf4040
+80007fc8:	6785                	lui	a5,0x1
+80007fca:	97ba                	add	a5,a5,a4
+80007fcc:	4709                	li	a4,2
+80007fce:	f4e7ac23          	sw	a4,-168(a5) # f58 <__NOR_CFG_OPTION_segment_size__+0x358>
+        HPM_BIOC->PAD[IOC_PAD_PZ10].FUNC_CTL = BIOC_PZ10_FUNC_CTL_SOC_PZ_10;
+80007fd2:	f5010737          	lui	a4,0xf5010
+80007fd6:	6785                	lui	a5,0x1
+80007fd8:	97ba                	add	a5,a5,a4
+80007fda:	470d                	li	a4,3
+80007fdc:	f4e7a823          	sw	a4,-176(a5) # f50 <__NOR_CFG_OPTION_segment_size__+0x350>
+        HPM_BIOC->PAD[IOC_PAD_PZ11].FUNC_CTL = BIOC_PZ11_FUNC_CTL_SOC_PZ_11;
+80007fe0:	f5010737          	lui	a4,0xf5010
+80007fe4:	6785                	lui	a5,0x1
+80007fe6:	97ba                	add	a5,a5,a4
+80007fe8:	470d                	li	a4,3
+80007fea:	f4e7ac23          	sw	a4,-168(a5) # f58 <__NOR_CFG_OPTION_segment_size__+0x358>
+}
+80007fee:	a025                	j	80008016 <.L11>
+
+80007ff0 <.L10>:
+    } else if (ptr == HPM_PUART) {
+80007ff0:	4732                	lw	a4,12(sp)
+80007ff2:	f40e47b7          	lui	a5,0xf40e4
+80007ff6:	02f71063          	bne	a4,a5,80008016 <.L11>
+        HPM_PIOC->PAD[IOC_PAD_PY07].FUNC_CTL = PIOC_PY07_FUNC_CTL_PUART_RXD;
+80007ffa:	f40d8737          	lui	a4,0xf40d8
+80007ffe:	6785                	lui	a5,0x1
+80008000:	97ba                	add	a5,a5,a4
+80008002:	4705                	li	a4,1
+80008004:	e2e7ac23          	sw	a4,-456(a5) # e38 <__NOR_CFG_OPTION_segment_size__+0x238>
+        HPM_PIOC->PAD[IOC_PAD_PY06].FUNC_CTL = PIOC_PY06_FUNC_CTL_PUART_TXD;
+80008008:	f40d8737          	lui	a4,0xf40d8
+8000800c:	6785                	lui	a5,0x1
+8000800e:	97ba                	add	a5,a5,a4
+80008010:	4705                	li	a4,1
+80008012:	e2e7a823          	sw	a4,-464(a5) # e30 <__NOR_CFG_OPTION_segment_size__+0x230>
+
+80008016 <.L11>:
+}
+80008016:	0001                	nop
+80008018:	0141                	add	sp,sp,16
+8000801a:	8082                	ret
+
+Disassembly of section .text.init_adc12_pins:
+
+8000801c <init_adc12_pins>:
+
+void init_adc12_pins(void)
+{
+    /* ADC0.VINP14 */
+    // HPM_IOC->PAD[IOC_PAD_PE28].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK;
+      HPM_IOC->PAD[IOC_PAD_PE21].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK;
+8000801c:	f40407b7          	lui	a5,0xf4040
+80008020:	10000713          	li	a4,256
+80008024:	4ae7a423          	sw	a4,1192(a5) # f40404a8 <__AHB_SRAM_segment_end__+0x3d384a8>
+  
+}
+80008028:	0001                	nop
+8000802a:	8082                	ret
+
+Disassembly of section .text.sysctl_clock_set_preset:
+
+8000802c <sysctl_clock_set_preset>:
+ * @param[in] ptr SYSCTL_Type base address
+ * @param[in] preset preset
+ */
+static inline void sysctl_clock_set_preset(SYSCTL_Type *ptr,
+                                           sysctl_preset_t preset)
+{
+8000802c:	1141                	add	sp,sp,-16
+8000802e:	c62a                	sw	a0,12(sp)
+80008030:	87ae                	mv	a5,a1
+80008032:	00f105a3          	sb	a5,11(sp)
+    ptr->GLOBAL00 = (ptr->GLOBAL00 & ~SYSCTL_GLOBAL00_PRESET_MASK)
+80008036:	4732                	lw	a4,12(sp)
+80008038:	6789                	lui	a5,0x2
+8000803a:	97ba                	add	a5,a5,a4
+8000803c:	439c                	lw	a5,0(a5)
+8000803e:	ff07f713          	and	a4,a5,-16
+                | SYSCTL_GLOBAL00_PRESET_SET(preset);
+80008042:	00b14783          	lbu	a5,11(sp)
+80008046:	8bbd                	and	a5,a5,15
+80008048:	8f5d                	or	a4,a4,a5
+    ptr->GLOBAL00 = (ptr->GLOBAL00 & ~SYSCTL_GLOBAL00_PRESET_MASK)
+8000804a:	46b2                	lw	a3,12(sp)
+8000804c:	6789                	lui	a5,0x2
+8000804e:	97b6                	add	a5,a5,a3
+80008050:	c398                	sw	a4,0(a5)
+}
+80008052:	0001                	nop
+80008054:	0141                	add	sp,sp,16
+80008056:	8082                	ret
+
+Disassembly of section .text.gptmr_check_status:
+
+80008058 <gptmr_check_status>:
+ *
+ * @param [in] ptr GPTMR base address
+ * @param [in] mask channel flag mask
+ */
+static inline bool gptmr_check_status(GPTMR_Type *ptr, uint32_t mask)
+{
+80008058:	1141                	add	sp,sp,-16
+8000805a:	c62a                	sw	a0,12(sp)
+8000805c:	c42e                	sw	a1,8(sp)
+    return (ptr->SR & mask) == mask;
+8000805e:	47b2                	lw	a5,12(sp)
+80008060:	2007a703          	lw	a4,512(a5) # 2200 <__APB_SRAM_segment_size__+0x200>
+80008064:	47a2                	lw	a5,8(sp)
+80008066:	8ff9                	and	a5,a5,a4
+80008068:	4722                	lw	a4,8(sp)
+8000806a:	40f707b3          	sub	a5,a4,a5
+8000806e:	0017b793          	seqz	a5,a5
+80008072:	0ff7f793          	zext.b	a5,a5
+}
+80008076:	853e                	mv	a0,a5
+80008078:	0141                	add	sp,sp,16
+8000807a:	8082                	ret
+
+Disassembly of section .text.gptmr_clear_status:
+
+8000807c <gptmr_clear_status>:
+ *
+ * @param [in] ptr GPTMR base address
+ * @param [in] mask channel flag mask
+ */
+static inline void gptmr_clear_status(GPTMR_Type *ptr, uint32_t mask)
+{
+8000807c:	1141                	add	sp,sp,-16
+8000807e:	c62a                	sw	a0,12(sp)
+80008080:	c42e                	sw	a1,8(sp)
+    ptr->SR = mask;
+80008082:	47b2                	lw	a5,12(sp)
+80008084:	4722                	lw	a4,8(sp)
+80008086:	20e7a023          	sw	a4,512(a5)
+}
+8000808a:	0001                	nop
+8000808c:	0141                	add	sp,sp,16
+8000808e:	8082                	ret
+
+Disassembly of section .text.gpio_read_pin:
+
+80008090 <gpio_read_pin>:
+ * @param pin Pin index
+ *
+ * @return Pin status mask
+ */
+static inline uint8_t gpio_read_pin(GPIO_Type *ptr, uint32_t port, uint8_t pin)
+{
+80008090:	1141                	add	sp,sp,-16
+80008092:	c62a                	sw	a0,12(sp)
+80008094:	c42e                	sw	a1,8(sp)
+80008096:	87b2                	mv	a5,a2
+80008098:	00f103a3          	sb	a5,7(sp)
+    return (ptr->DI[port].VALUE & (1 << pin)) >> pin;
+8000809c:	4732                	lw	a4,12(sp)
+8000809e:	47a2                	lw	a5,8(sp)
+800080a0:	0792                	sll	a5,a5,0x4
+800080a2:	97ba                	add	a5,a5,a4
+800080a4:	439c                	lw	a5,0(a5)
+800080a6:	00714703          	lbu	a4,7(sp)
+800080aa:	4685                	li	a3,1
+800080ac:	00e69733          	sll	a4,a3,a4
+800080b0:	8f7d                	and	a4,a4,a5
+800080b2:	00714783          	lbu	a5,7(sp)
+800080b6:	00f757b3          	srl	a5,a4,a5
+800080ba:	0ff7f793          	zext.b	a5,a5
+}
+800080be:	853e                	mv	a0,a5
+800080c0:	0141                	add	sp,sp,16
+800080c2:	8082                	ret
+
+Disassembly of section .text.board_init_console:
+
+800080c4 <board_init_console>:
+{
+800080c4:	1101                	add	sp,sp,-32
+800080c6:	ce06                	sw	ra,28(sp)
+    init_uart_pins((UART_Type *) BOARD_CONSOLE_UART_BASE);
+800080c8:	f0040537          	lui	a0,0xf0040
+800080cc:	3bd5                	jal	80007ec0 <init_uart_pins>
+    clock_set_source_divider(BOARD_CONSOLE_UART_CLK_NAME, clk_src_osc24m, 1U);
+800080ce:	4605                	li	a2,1
+800080d0:	4581                	li	a1,0
+800080d2:	012207b7          	lui	a5,0x1220
+800080d6:	01378513          	add	a0,a5,19 # 1220013 <__SHARE_RAM_segment_end__+0xa0013>
+800080da:	be3fc0ef          	jal	80004cbc <clock_set_source_divider>
+    clock_add_to_group(BOARD_CONSOLE_UART_CLK_NAME, 0);
+800080de:	4581                	li	a1,0
+800080e0:	012207b7          	lui	a5,0x1220
+800080e4:	01378513          	add	a0,a5,19 # 1220013 <__SHARE_RAM_segment_end__+0xa0013>
+800080e8:	cb1fc0ef          	jal	80004d98 <clock_add_to_group>
+    cfg.type = BOARD_CONSOLE_TYPE;
+800080ec:	c002                	sw	zero,0(sp)
+    cfg.base = (uint32_t) BOARD_CONSOLE_UART_BASE;
+800080ee:	f00407b7          	lui	a5,0xf0040
+800080f2:	c23e                	sw	a5,4(sp)
+    cfg.src_freq_in_hz = clock_get_frequency(BOARD_CONSOLE_UART_CLK_NAME);
+800080f4:	012207b7          	lui	a5,0x1220
+800080f8:	01378513          	add	a0,a5,19 # 1220013 <__SHARE_RAM_segment_end__+0xa0013>
+800080fc:	feefc0ef          	jal	800048ea <clock_get_frequency>
+80008100:	87aa                	mv	a5,a0
+80008102:	c43e                	sw	a5,8(sp)
+    cfg.baudrate = BOARD_CONSOLE_UART_BAUDRATE;
+80008104:	67f1                	lui	a5,0x1c
+80008106:	20078793          	add	a5,a5,512 # 1c200 <__AHB_SRAM_segment_size__+0x14200>
+8000810a:	c63e                	sw	a5,12(sp)
+    if (status_success != console_init(&cfg)) {
+8000810c:	878a                	mv	a5,sp
+8000810e:	853e                	mv	a0,a5
+80008110:	445000ef          	jal	80008d54 <console_init>
+80008114:	87aa                	mv	a5,a0
+80008116:	c391                	beqz	a5,8000811a <.L61>
+
+80008118 <.L60>:
+        while (1) {
+80008118:	a001                	j	80008118 <.L60>
+
+8000811a <.L61>:
+}
+8000811a:	0001                	nop
+8000811c:	40f2                	lw	ra,28(sp)
+8000811e:	6105                	add	sp,sp,32
+80008120:	8082                	ret
+
+Disassembly of section .text.board_turnoff_rgb_led:
+
+80008122 <board_turnoff_rgb_led>:
+{
+80008122:	1101                	add	sp,sp,-32
+80008124:	ce06                	sw	ra,28(sp)
+    uint32_t pad_ctl = IOC_PAD_PAD_CTL_PE_SET(1) | IOC_PAD_PAD_CTL_PS_SET(1);
+80008126:	6785                	lui	a5,0x1
+80008128:	81078793          	add	a5,a5,-2032 # 810 <__ILM_segment_used_end__+0x32a>
+8000812c:	c63e                	sw	a5,12(sp)
+    HPM_IOC->PAD[IOC_PAD_PB18].FUNC_CTL = IOC_PB18_FUNC_CTL_GPIO_B_18;
+8000812e:	f40407b7          	lui	a5,0xf4040
+80008132:	1807a823          	sw	zero,400(a5) # f4040190 <__AHB_SRAM_segment_end__+0x3d38190>
+    HPM_IOC->PAD[IOC_PAD_PB19].FUNC_CTL = IOC_PB19_FUNC_CTL_GPIO_B_19;
+80008136:	f40407b7          	lui	a5,0xf4040
+8000813a:	1807ac23          	sw	zero,408(a5) # f4040198 <__AHB_SRAM_segment_end__+0x3d38198>
+    HPM_IOC->PAD[IOC_PAD_PB20].FUNC_CTL = IOC_PB20_FUNC_CTL_GPIO_B_20;
+8000813e:	f40407b7          	lui	a5,0xf4040
+80008142:	1a07a023          	sw	zero,416(a5) # f40401a0 <__AHB_SRAM_segment_end__+0x3d381a0>
+    HPM_IOC->PAD[IOC_PAD_PB18].PAD_CTL = pad_ctl;
+80008146:	f40407b7          	lui	a5,0xf4040
+8000814a:	4732                	lw	a4,12(sp)
+8000814c:	18e7aa23          	sw	a4,404(a5) # f4040194 <__AHB_SRAM_segment_end__+0x3d38194>
+    HPM_IOC->PAD[IOC_PAD_PB19].PAD_CTL = pad_ctl;
+80008150:	f40407b7          	lui	a5,0xf4040
+80008154:	4732                	lw	a4,12(sp)
+80008156:	18e7ae23          	sw	a4,412(a5) # f404019c <__AHB_SRAM_segment_end__+0x3d3819c>
+    HPM_IOC->PAD[IOC_PAD_PB20].PAD_CTL = pad_ctl;
+8000815a:	f40407b7          	lui	a5,0xf4040
+8000815e:	4732                	lw	a4,12(sp)
+80008160:	1ae7a223          	sw	a4,420(a5) # f40401a4 <__AHB_SRAM_segment_end__+0x3d381a4>
+    port_pin18_status = gpio_read_pin(BOARD_G_GPIO_CTRL, GPIO_DI_GPIOB, 18);
+80008164:	4649                	li	a2,18
+80008166:	4585                	li	a1,1
+80008168:	f0000537          	lui	a0,0xf0000
+8000816c:	3715                	jal	80008090 <gpio_read_pin>
+8000816e:	87aa                	mv	a5,a0
+80008170:	00f105a3          	sb	a5,11(sp)
+    port_pin19_status = gpio_read_pin(BOARD_G_GPIO_CTRL, GPIO_DI_GPIOB, 19);
+80008174:	464d                	li	a2,19
+80008176:	4585                	li	a1,1
+80008178:	f0000537          	lui	a0,0xf0000
+8000817c:	3f11                	jal	80008090 <gpio_read_pin>
+8000817e:	87aa                	mv	a5,a0
+80008180:	00f10523          	sb	a5,10(sp)
+    port_pin20_status = gpio_read_pin(BOARD_G_GPIO_CTRL, GPIO_DI_GPIOB, 20);
+80008184:	4651                	li	a2,20
+80008186:	4585                	li	a1,1
+80008188:	f0000537          	lui	a0,0xf0000
+8000818c:	3711                	jal	80008090 <gpio_read_pin>
+8000818e:	87aa                	mv	a5,a0
+80008190:	00f104a3          	sb	a5,9(sp)
+    invert_led_level = false;
+80008194:	84020723          	sb	zero,-1970(tp) # fffff84e <__APB_SRAM_segment_end__+0xbf0d84e>
+    if ((port_pin18_status & port_pin19_status & port_pin20_status) == 0) {
+80008198:	00b14783          	lbu	a5,11(sp)
+8000819c:	873e                	mv	a4,a5
+8000819e:	00a14783          	lbu	a5,10(sp)
+800081a2:	8ff9                	and	a5,a5,a4
+800081a4:	0ff7f793          	zext.b	a5,a5
+800081a8:	00914703          	lbu	a4,9(sp)
+800081ac:	8ff9                	and	a5,a5,a4
+800081ae:	0ff7f793          	zext.b	a5,a5
+800081b2:	e78d                	bnez	a5,800081dc <.L67>
+        invert_led_level = true;
+800081b4:	4705                	li	a4,1
+800081b6:	84e20723          	sb	a4,-1970(tp) # fffff84e <__APB_SRAM_segment_end__+0xbf0d84e>
+        pad_ctl = IOC_PAD_PAD_CTL_PE_SET(1) | IOC_PAD_PAD_CTL_PS_SET(0);
+800081ba:	47c1                	li	a5,16
+800081bc:	c63e                	sw	a5,12(sp)
+        HPM_IOC->PAD[IOC_PAD_PB18].PAD_CTL = pad_ctl;
+800081be:	f40407b7          	lui	a5,0xf4040
+800081c2:	4732                	lw	a4,12(sp)
+800081c4:	18e7aa23          	sw	a4,404(a5) # f4040194 <__AHB_SRAM_segment_end__+0x3d38194>
+        HPM_IOC->PAD[IOC_PAD_PB19].PAD_CTL = pad_ctl;
+800081c8:	f40407b7          	lui	a5,0xf4040
+800081cc:	4732                	lw	a4,12(sp)
+800081ce:	18e7ae23          	sw	a4,412(a5) # f404019c <__AHB_SRAM_segment_end__+0x3d3819c>
+        HPM_IOC->PAD[IOC_PAD_PB20].PAD_CTL = pad_ctl;
+800081d2:	f40407b7          	lui	a5,0xf4040
+800081d6:	4732                	lw	a4,12(sp)
+800081d8:	1ae7a223          	sw	a4,420(a5) # f40401a4 <__AHB_SRAM_segment_end__+0x3d381a4>
+
+800081dc <.L67>:
+}
+800081dc:	0001                	nop
+800081de:	40f2                	lw	ra,28(sp)
+800081e0:	6105                	add	sp,sp,32
+800081e2:	8082                	ret
+
+Disassembly of section .text.board_init:
+
+800081e4 <board_init>:
+{
+800081e4:	1141                	add	sp,sp,-16
+800081e6:	c606                	sw	ra,12(sp)
+    board_turnoff_rgb_led();
+800081e8:	3f2d                	jal	80008122 <board_turnoff_rgb_led>
+    board_init_clock();
+800081ea:	8c6fd0ef          	jal	800052b0 <board_init_clock>
+    board_init_console();
+800081ee:	3dd9                	jal	800080c4 <board_init_console>
+    board_init_pmp();
+800081f0:	ed7fc0ef          	jal	800050c6 <board_init_pmp>
+    board_print_clock_freq();
+800081f4:	d07fc0ef          	jal	80004efa <board_print_clock_freq>
+    board_print_banner();
+800081f8:	e8dfc0ef          	jal	80005084 <board_print_banner>
+}
+800081fc:	0001                	nop
+800081fe:	40b2                	lw	ra,12(sp)
+80008200:	0141                	add	sp,sp,16
+80008202:	8082                	ret
+
+Disassembly of section .text.board_init_adc12_pins:
+
+80008204 <board_init_adc12_pins>:
+{
+80008204:	1141                	add	sp,sp,-16
+80008206:	c606                	sw	ra,12(sp)
+    init_adc12_pins();
+80008208:	3d11                	jal	8000801c <init_adc12_pins>
+}
+8000820a:	0001                	nop
+8000820c:	40b2                	lw	ra,12(sp)
+8000820e:	0141                	add	sp,sp,16
+80008210:	8082                	ret
+
+Disassembly of section .text.uart_modem_config:
+
+80008212 <uart_modem_config>:
+ *
+ * @param [in] ptr UART base address
+ * @param config Pointer to modem config struct
+ */
+static inline void uart_modem_config(UART_Type *ptr, uart_modem_config_t *config)
+{
+80008212:	1141                	add	sp,sp,-16
+80008214:	c62a                	sw	a0,12(sp)
+80008216:	c42e                	sw	a1,8(sp)
+    ptr->MCR = UART_MCR_AFE_SET(config->auto_flow_ctrl_en)
+80008218:	47a2                	lw	a5,8(sp)
+8000821a:	0007c783          	lbu	a5,0(a5)
+8000821e:	0796                	sll	a5,a5,0x5
+80008220:	0207f713          	and	a4,a5,32
+        | UART_MCR_LOOP_SET(config->loop_back_en)
+80008224:	47a2                	lw	a5,8(sp)
+80008226:	0017c783          	lbu	a5,1(a5)
+8000822a:	0792                	sll	a5,a5,0x4
+8000822c:	8bc1                	and	a5,a5,16
+8000822e:	8f5d                	or	a4,a4,a5
+        | UART_MCR_RTS_SET(!config->set_rts_high);
+80008230:	47a2                	lw	a5,8(sp)
+80008232:	0027c783          	lbu	a5,2(a5)
+80008236:	0017c793          	xor	a5,a5,1
+8000823a:	0ff7f793          	zext.b	a5,a5
+8000823e:	0786                	sll	a5,a5,0x1
+80008240:	8b89                	and	a5,a5,2
+80008242:	8f5d                	or	a4,a4,a5
+    ptr->MCR = UART_MCR_AFE_SET(config->auto_flow_ctrl_en)
+80008244:	47b2                	lw	a5,12(sp)
+80008246:	db98                	sw	a4,48(a5)
+}
+80008248:	0001                	nop
+8000824a:	0141                	add	sp,sp,16
+8000824c:	8082                	ret
+
+Disassembly of section .text.uart_init:
+
+8000824e <uart_init>:
+{
+8000824e:	7179                	add	sp,sp,-48
+80008250:	d606                	sw	ra,44(sp)
+80008252:	c62a                	sw	a0,12(sp)
+80008254:	c42e                	sw	a1,8(sp)
+    ptr->IER = 0;
+80008256:	47b2                	lw	a5,12(sp)
+80008258:	0207a223          	sw	zero,36(a5)
+    ptr->LCR |= UART_LCR_DLAB_MASK;
+8000825c:	47b2                	lw	a5,12(sp)
+8000825e:	57dc                	lw	a5,44(a5)
+80008260:	0807e713          	or	a4,a5,128
+80008264:	47b2                	lw	a5,12(sp)
+80008266:	d7d8                	sw	a4,44(a5)
+    if (!uart_calculate_baudrate(config->src_freq_in_hz, config->baudrate, &div, &osc)) {
+80008268:	47a2                	lw	a5,8(sp)
+8000826a:	4398                	lw	a4,0(a5)
+8000826c:	47a2                	lw	a5,8(sp)
+8000826e:	43dc                	lw	a5,4(a5)
+80008270:	01b10693          	add	a3,sp,27
+80008274:	0830                	add	a2,sp,24
+80008276:	85be                	mv	a1,a5
+80008278:	853a                	mv	a0,a4
+8000827a:	e2afd0ef          	jal	800058a4 <uart_calculate_baudrate>
+8000827e:	87aa                	mv	a5,a0
+80008280:	0017c793          	xor	a5,a5,1
+80008284:	0ff7f793          	zext.b	a5,a5
+80008288:	c781                	beqz	a5,80008290 <.L25>
+        return status_uart_no_suitable_baudrate_parameter_found;
+8000828a:	3e900793          	li	a5,1001
+8000828e:	aa2d                	j	800083c8 <.L41>
+
+80008290 <.L25>:
+    ptr->OSCR = (ptr->OSCR & ~UART_OSCR_OSC_MASK)
+80008290:	47b2                	lw	a5,12(sp)
+80008292:	4bdc                	lw	a5,20(a5)
+80008294:	fe07f713          	and	a4,a5,-32
+        | UART_OSCR_OSC_SET(osc);
+80008298:	01b14783          	lbu	a5,27(sp)
+8000829c:	8bfd                	and	a5,a5,31
+8000829e:	8f5d                	or	a4,a4,a5
+    ptr->OSCR = (ptr->OSCR & ~UART_OSCR_OSC_MASK)
+800082a0:	47b2                	lw	a5,12(sp)
+800082a2:	cbd8                	sw	a4,20(a5)
+    ptr->DLL = UART_DLL_DLL_SET(div >> 0);
+800082a4:	01815783          	lhu	a5,24(sp)
+800082a8:	0ff7f713          	zext.b	a4,a5
+800082ac:	47b2                	lw	a5,12(sp)
+800082ae:	d398                	sw	a4,32(a5)
+    ptr->DLM = UART_DLM_DLM_SET(div >> 8);
+800082b0:	01815783          	lhu	a5,24(sp)
+800082b4:	83a1                	srl	a5,a5,0x8
+800082b6:	07c2                	sll	a5,a5,0x10
+800082b8:	83c1                	srl	a5,a5,0x10
+800082ba:	0ff7f713          	zext.b	a4,a5
+800082be:	47b2                	lw	a5,12(sp)
+800082c0:	d3d8                	sw	a4,36(a5)
+    tmp = ptr->LCR & (~UART_LCR_DLAB_MASK);
+800082c2:	47b2                	lw	a5,12(sp)
+800082c4:	57dc                	lw	a5,44(a5)
+800082c6:	f7f7f793          	and	a5,a5,-129
+800082ca:	ce3e                	sw	a5,28(sp)
+    tmp &= ~(UART_LCR_SPS_MASK | UART_LCR_EPS_MASK | UART_LCR_PEN_MASK);
+800082cc:	47f2                	lw	a5,28(sp)
+800082ce:	fc77f793          	and	a5,a5,-57
+800082d2:	ce3e                	sw	a5,28(sp)
+    switch (config->parity) {
+800082d4:	47a2                	lw	a5,8(sp)
+800082d6:	00a7c783          	lbu	a5,10(a5)
+800082da:	4711                	li	a4,4
+800082dc:	02f76f63          	bltu	a4,a5,8000831a <.L27>
+800082e0:	00279713          	sll	a4,a5,0x2
+800082e4:	800037b7          	lui	a5,0x80003
+800082e8:	24878793          	add	a5,a5,584 # 80003248 <.L29>
+800082ec:	97ba                	add	a5,a5,a4
+800082ee:	439c                	lw	a5,0(a5)
+800082f0:	8782                	jr	a5
+
+800082f2 <.L32>:
+        tmp |= UART_LCR_PEN_MASK;
+800082f2:	47f2                	lw	a5,28(sp)
+800082f4:	0087e793          	or	a5,a5,8
+800082f8:	ce3e                	sw	a5,28(sp)
+        break;
+800082fa:	a01d                	j	80008320 <.L34>
+
+800082fc <.L31>:
+        tmp |= UART_LCR_PEN_MASK | UART_LCR_EPS_MASK;
+800082fc:	47f2                	lw	a5,28(sp)
+800082fe:	0187e793          	or	a5,a5,24
+80008302:	ce3e                	sw	a5,28(sp)
+        break;
+80008304:	a831                	j	80008320 <.L34>
+
+80008306 <.L30>:
+        tmp |= UART_LCR_PEN_MASK | UART_LCR_SPS_MASK;
+80008306:	47f2                	lw	a5,28(sp)
+80008308:	0287e793          	or	a5,a5,40
+8000830c:	ce3e                	sw	a5,28(sp)
+        break;
+8000830e:	a809                	j	80008320 <.L34>
+
+80008310 <.L28>:
+        tmp |= UART_LCR_EPS_MASK | UART_LCR_PEN_MASK
+80008310:	47f2                	lw	a5,28(sp)
+80008312:	0387e793          	or	a5,a5,56
+80008316:	ce3e                	sw	a5,28(sp)
+        break;
+80008318:	a021                	j	80008320 <.L34>
+
+8000831a <.L27>:
+        return status_invalid_argument;
+8000831a:	4789                	li	a5,2
+8000831c:	a075                	j	800083c8 <.L41>
+
+8000831e <.L42>:
+        break;
+8000831e:	0001                	nop
+
+80008320 <.L34>:
+    tmp &= ~(UART_LCR_STB_MASK | UART_LCR_WLS_MASK);
+80008320:	47f2                	lw	a5,28(sp)
+80008322:	9be1                	and	a5,a5,-8
+80008324:	ce3e                	sw	a5,28(sp)
+    switch (config->num_of_stop_bits) {
+80008326:	47a2                	lw	a5,8(sp)
+80008328:	0087c783          	lbu	a5,8(a5)
+8000832c:	4709                	li	a4,2
+8000832e:	00e78e63          	beq	a5,a4,8000834a <.L35>
+80008332:	4709                	li	a4,2
+80008334:	02f74663          	blt	a4,a5,80008360 <.L36>
+80008338:	c795                	beqz	a5,80008364 <.L43>
+8000833a:	4705                	li	a4,1
+8000833c:	02e79263          	bne	a5,a4,80008360 <.L36>
+        tmp |= UART_LCR_STB_MASK;
+80008340:	47f2                	lw	a5,28(sp)
+80008342:	0047e793          	or	a5,a5,4
+80008346:	ce3e                	sw	a5,28(sp)
+        break;
+80008348:	a839                	j	80008366 <.L39>
+
+8000834a <.L35>:
+        if (config->word_length < word_length_6_bits) {
+8000834a:	47a2                	lw	a5,8(sp)
+8000834c:	0097c783          	lbu	a5,9(a5)
+80008350:	e399                	bnez	a5,80008356 <.L40>
+            return status_invalid_argument;
+80008352:	4789                	li	a5,2
+80008354:	a895                	j	800083c8 <.L41>
+
+80008356 <.L40>:
+        tmp |= UART_LCR_STB_MASK;
+80008356:	47f2                	lw	a5,28(sp)
+80008358:	0047e793          	or	a5,a5,4
+8000835c:	ce3e                	sw	a5,28(sp)
+        break;
+8000835e:	a021                	j	80008366 <.L39>
+
+80008360 <.L36>:
+        return status_invalid_argument;
+80008360:	4789                	li	a5,2
+80008362:	a09d                	j	800083c8 <.L41>
+
+80008364 <.L43>:
+        break;
+80008364:	0001                	nop
+
+80008366 <.L39>:
+    ptr->LCR = tmp | UART_LCR_WLS_SET(config->word_length);
+80008366:	47a2                	lw	a5,8(sp)
+80008368:	0097c783          	lbu	a5,9(a5)
+8000836c:	0037f713          	and	a4,a5,3
+80008370:	47f2                	lw	a5,28(sp)
+80008372:	8f5d                	or	a4,a4,a5
+80008374:	47b2                	lw	a5,12(sp)
+80008376:	d7d8                	sw	a4,44(a5)
+    ptr->FCR = UART_FCR_TFIFORST_MASK | UART_FCR_RFIFORST_MASK;
+80008378:	47b2                	lw	a5,12(sp)
+8000837a:	4719                	li	a4,6
+8000837c:	d798                	sw	a4,40(a5)
+    tmp = UART_FCR_FIFOE_SET(config->fifo_enable)
+8000837e:	47a2                	lw	a5,8(sp)
+80008380:	00e7c783          	lbu	a5,14(a5)
+80008384:	873e                	mv	a4,a5
+        | UART_FCR_TFIFOT_SET(config->tx_fifo_level)
+80008386:	47a2                	lw	a5,8(sp)
+80008388:	00b7c783          	lbu	a5,11(a5)
+8000838c:	0792                	sll	a5,a5,0x4
+8000838e:	0307f793          	and	a5,a5,48
+80008392:	8f5d                	or	a4,a4,a5
+        | UART_FCR_RFIFOT_SET(config->rx_fifo_level)
+80008394:	47a2                	lw	a5,8(sp)
+80008396:	00c7c783          	lbu	a5,12(a5)
+8000839a:	079a                	sll	a5,a5,0x6
+8000839c:	0ff7f793          	zext.b	a5,a5
+800083a0:	8f5d                	or	a4,a4,a5
+        | UART_FCR_DMAE_SET(config->dma_enable);
+800083a2:	47a2                	lw	a5,8(sp)
+800083a4:	00d7c783          	lbu	a5,13(a5)
+800083a8:	078e                	sll	a5,a5,0x3
+800083aa:	8ba1                	and	a5,a5,8
+    tmp = UART_FCR_FIFOE_SET(config->fifo_enable)
+800083ac:	8fd9                	or	a5,a5,a4
+800083ae:	ce3e                	sw	a5,28(sp)
+    ptr->FCR = tmp;
+800083b0:	47b2                	lw	a5,12(sp)
+800083b2:	4772                	lw	a4,28(sp)
+800083b4:	d798                	sw	a4,40(a5)
+    ptr->GPR = tmp;
+800083b6:	47b2                	lw	a5,12(sp)
+800083b8:	4772                	lw	a4,28(sp)
+800083ba:	dfd8                	sw	a4,60(a5)
+    uart_modem_config(ptr, &config->modem_config);
+800083bc:	47a2                	lw	a5,8(sp)
+800083be:	07bd                	add	a5,a5,15
+800083c0:	85be                	mv	a1,a5
+800083c2:	4532                	lw	a0,12(sp)
+800083c4:	35b9                	jal	80008212 <uart_modem_config>
+    return status_success;
+800083c6:	4781                	li	a5,0
+
+800083c8 <.L41>:
+}
+800083c8:	853e                	mv	a0,a5
+800083ca:	50b2                	lw	ra,44(sp)
+800083cc:	6145                	add	sp,sp,48
+800083ce:	8082                	ret
+
+Disassembly of section .text.uart_flush:
+
+800083d0 <uart_flush>:
+{
+800083d0:	1101                	add	sp,sp,-32
+800083d2:	c62a                	sw	a0,12(sp)
+    uint32_t retry = 0;
+800083d4:	ce02                	sw	zero,28(sp)
+    while (!(ptr->LSR & UART_LSR_TEMT_MASK)) {
+800083d6:	a811                	j	800083ea <.L57>
+
+800083d8 <.L60>:
+        if (retry > HPM_UART_DRV_RETRY_COUNT) {
+800083d8:	4772                	lw	a4,28(sp)
+800083da:	6785                	lui	a5,0x1
+800083dc:	38878793          	add	a5,a5,904 # 1388 <__AXI_SRAM_segment_used_size__+0x26b>
+800083e0:	00e7eb63          	bltu	a5,a4,800083f6 <.L63>
+        retry++;
+800083e4:	47f2                	lw	a5,28(sp)
+800083e6:	0785                	add	a5,a5,1
+800083e8:	ce3e                	sw	a5,28(sp)
+
+800083ea <.L57>:
+    while (!(ptr->LSR & UART_LSR_TEMT_MASK)) {
+800083ea:	47b2                	lw	a5,12(sp)
+800083ec:	5bdc                	lw	a5,52(a5)
+800083ee:	0407f793          	and	a5,a5,64
+800083f2:	d3fd                	beqz	a5,800083d8 <.L60>
+800083f4:	a011                	j	800083f8 <.L59>
+
+800083f6 <.L63>:
+            break;
+800083f6:	0001                	nop
+
+800083f8 <.L59>:
+    if (retry > HPM_UART_DRV_RETRY_COUNT) {
+800083f8:	4772                	lw	a4,28(sp)
+800083fa:	6785                	lui	a5,0x1
+800083fc:	38878793          	add	a5,a5,904 # 1388 <__AXI_SRAM_segment_used_size__+0x26b>
+80008400:	00e7f463          	bgeu	a5,a4,80008408 <.L61>
+        return status_timeout;
+80008404:	478d                	li	a5,3
+80008406:	a011                	j	8000840a <.L62>
+
+80008408 <.L61>:
+    return status_success;
+80008408:	4781                	li	a5,0
+
+8000840a <.L62>:
+}
+8000840a:	853e                	mv	a0,a5
+8000840c:	6105                	add	sp,sp,32
+8000840e:	8082                	ret
+
+Disassembly of section .text.uart_try_receive_byte:
+
+80008410 <uart_try_receive_byte>:
+
+hpm_stat_t uart_try_receive_byte(UART_Type *ptr, uint8_t *byte)
+{
+80008410:	1141                	add	sp,sp,-16
+80008412:	c62a                	sw	a0,12(sp)
+80008414:	c42e                	sw	a1,8(sp)
+    if (!(ptr->LSR & UART_LSR_DR_MASK)) {
+80008416:	47b2                	lw	a5,12(sp)
+80008418:	5bdc                	lw	a5,52(a5)
+8000841a:	8b85                	and	a5,a5,1
+8000841c:	e399                	bnez	a5,80008422 <.L73>
+        return status_fail;
+8000841e:	4785                	li	a5,1
+80008420:	a809                	j	80008432 <.L74>
+
+80008422 <.L73>:
+    } else {
+        *byte = ptr->RBR & UART_RBR_RBR_MASK;
+80008422:	47b2                	lw	a5,12(sp)
+80008424:	539c                	lw	a5,32(a5)
+80008426:	0ff7f713          	zext.b	a4,a5
+8000842a:	47a2                	lw	a5,8(sp)
+8000842c:	00e78023          	sb	a4,0(a5)
+        return status_success;
+80008430:	4781                	li	a5,0
+
+80008432 <.L74>:
+    }
+}
+80008432:	853e                	mv	a0,a5
+80008434:	0141                	add	sp,sp,16
+80008436:	8082                	ret
+
+Disassembly of section .text.write_pmp_cfg:
+
+80008438 <write_pmp_cfg>:
+{
+80008438:	1141                	add	sp,sp,-16
+8000843a:	c62a                	sw	a0,12(sp)
+8000843c:	c42e                	sw	a1,8(sp)
+    switch (idx) {
+8000843e:	4722                	lw	a4,8(sp)
+80008440:	478d                	li	a5,3
+80008442:	04f70163          	beq	a4,a5,80008484 <.L11>
+80008446:	4722                	lw	a4,8(sp)
+80008448:	478d                	li	a5,3
+8000844a:	04e7e163          	bltu	a5,a4,8000848c <.L17>
+8000844e:	4722                	lw	a4,8(sp)
+80008450:	4789                	li	a5,2
+80008452:	02f70563          	beq	a4,a5,8000847c <.L13>
+80008456:	4722                	lw	a4,8(sp)
+80008458:	4789                	li	a5,2
+8000845a:	02e7e963          	bltu	a5,a4,8000848c <.L17>
+8000845e:	47a2                	lw	a5,8(sp)
+80008460:	c791                	beqz	a5,8000846c <.L14>
+80008462:	4722                	lw	a4,8(sp)
+80008464:	4785                	li	a5,1
+80008466:	00f70763          	beq	a4,a5,80008474 <.L15>
+        break;
+8000846a:	a00d                	j	8000848c <.L17>
+
+8000846c <.L14>:
+        write_csr(CSR_PMPCFG0, value);
+8000846c:	47b2                	lw	a5,12(sp)
+8000846e:	3a079073          	csrw	pmpcfg0,a5
+        break;
+80008472:	a831                	j	8000848e <.L16>
+
+80008474 <.L15>:
+        write_csr(CSR_PMPCFG1, value);
+80008474:	47b2                	lw	a5,12(sp)
+80008476:	3a179073          	csrw	pmpcfg1,a5
+        break;
+8000847a:	a811                	j	8000848e <.L16>
+
+8000847c <.L13>:
+        write_csr(CSR_PMPCFG2, value);
+8000847c:	47b2                	lw	a5,12(sp)
+8000847e:	3a279073          	csrw	pmpcfg2,a5
+        break;
+80008482:	a031                	j	8000848e <.L16>
+
+80008484 <.L11>:
+        write_csr(CSR_PMPCFG3, value);
+80008484:	47b2                	lw	a5,12(sp)
+80008486:	3a379073          	csrw	pmpcfg3,a5
+        break;
+8000848a:	a011                	j	8000848e <.L16>
+
+8000848c <.L17>:
+        break;
+8000848c:	0001                	nop
+
+8000848e <.L16>:
+}
+8000848e:	0001                	nop
+80008490:	0141                	add	sp,sp,16
+80008492:	8082                	ret
+
+Disassembly of section .text.write_pma_cfg:
+
+80008494 <write_pma_cfg>:
+{
+80008494:	1141                	add	sp,sp,-16
+80008496:	c62a                	sw	a0,12(sp)
+80008498:	c42e                	sw	a1,8(sp)
+    switch (idx) {
+8000849a:	4722                	lw	a4,8(sp)
+8000849c:	478d                	li	a5,3
+8000849e:	04f70163          	beq	a4,a5,800084e0 <.L71>
+800084a2:	4722                	lw	a4,8(sp)
+800084a4:	478d                	li	a5,3
+800084a6:	04e7e163          	bltu	a5,a4,800084e8 <.L77>
+800084aa:	4722                	lw	a4,8(sp)
+800084ac:	4789                	li	a5,2
+800084ae:	02f70563          	beq	a4,a5,800084d8 <.L73>
+800084b2:	4722                	lw	a4,8(sp)
+800084b4:	4789                	li	a5,2
+800084b6:	02e7e963          	bltu	a5,a4,800084e8 <.L77>
+800084ba:	47a2                	lw	a5,8(sp)
+800084bc:	c791                	beqz	a5,800084c8 <.L74>
+800084be:	4722                	lw	a4,8(sp)
+800084c0:	4785                	li	a5,1
+800084c2:	00f70763          	beq	a4,a5,800084d0 <.L75>
+        break;
+800084c6:	a00d                	j	800084e8 <.L77>
+
+800084c8 <.L74>:
+        write_csr(CSR_PMACFG0, value);
+800084c8:	47b2                	lw	a5,12(sp)
+800084ca:	bc079073          	csrw	0xbc0,a5
+        break;
+800084ce:	a831                	j	800084ea <.L76>
+
+800084d0 <.L75>:
+        write_csr(CSR_PMACFG1, value);
+800084d0:	47b2                	lw	a5,12(sp)
+800084d2:	bc179073          	csrw	0xbc1,a5
+        break;
+800084d6:	a811                	j	800084ea <.L76>
+
+800084d8 <.L73>:
+        write_csr(CSR_PMACFG2, value);
+800084d8:	47b2                	lw	a5,12(sp)
+800084da:	bc279073          	csrw	0xbc2,a5
+        break;
+800084de:	a031                	j	800084ea <.L76>
+
+800084e0 <.L71>:
+        write_csr(CSR_PMACFG3, value);
+800084e0:	47b2                	lw	a5,12(sp)
+800084e2:	bc379073          	csrw	0xbc3,a5
+        break;
+800084e6:	a011                	j	800084ea <.L76>
+
+800084e8 <.L77>:
+        break;
+800084e8:	0001                	nop
+
+800084ea <.L76>:
+}
+800084ea:	0001                	nop
+800084ec:	0141                	add	sp,sp,16
+800084ee:	8082                	ret
+
+Disassembly of section .text.pllctl_pll_powerdown:
+
+800084f0 <pllctl_pll_powerdown>:
+{
+800084f0:	1141                	add	sp,sp,-16
+800084f2:	c62a                	sw	a0,12(sp)
+800084f4:	87ae                	mv	a5,a1
+800084f6:	00f105a3          	sb	a5,11(sp)
+    if (pll > (PLLCTL_SOC_PLL_MAX_COUNT - 1)) {
+800084fa:	00b14703          	lbu	a4,11(sp)
+800084fe:	4791                	li	a5,4
+80008500:	00e7f463          	bgeu	a5,a4,80008508 <.L5>
+        return status_invalid_argument;
+80008504:	4789                	li	a5,2
+80008506:	a805                	j	80008536 <.L6>
+
+80008508 <.L5>:
+    ptr->PLL[pll].CFG1 = (ptr->PLL[pll].CFG1 &
+80008508:	00b14783          	lbu	a5,11(sp)
+8000850c:	4732                	lw	a4,12(sp)
+8000850e:	0785                	add	a5,a5,1
+80008510:	079e                	sll	a5,a5,0x7
+80008512:	97ba                	add	a5,a5,a4
+80008514:	43d8                	lw	a4,4(a5)
+            | PLLCTL_PLL_CFG1_PLLPD_SW_MASK;
+80008516:	7a0007b7          	lui	a5,0x7a000
+8000851a:	17fd                	add	a5,a5,-1 # 79ffffff <_extram_size+0x77ffffff>
+8000851c:	00f776b3          	and	a3,a4,a5
+    ptr->PLL[pll].CFG1 = (ptr->PLL[pll].CFG1 &
+80008520:	00b14783          	lbu	a5,11(sp)
+            | PLLCTL_PLL_CFG1_PLLPD_SW_MASK;
+80008524:	02000737          	lui	a4,0x2000
+80008528:	8f55                	or	a4,a4,a3
+    ptr->PLL[pll].CFG1 = (ptr->PLL[pll].CFG1 &
+8000852a:	46b2                	lw	a3,12(sp)
+8000852c:	0785                	add	a5,a5,1
+8000852e:	079e                	sll	a5,a5,0x7
+80008530:	97b6                	add	a5,a5,a3
+80008532:	c3d8                	sw	a4,4(a5)
+    return status_success;
+80008534:	4781                	li	a5,0
+
+80008536 <.L6>:
+}
+80008536:	853e                	mv	a0,a5
+80008538:	0141                	add	sp,sp,16
+8000853a:	8082                	ret
+
+Disassembly of section .text.pllctl_init_int_pll_with_freq:
+
+8000853c <pllctl_init_int_pll_with_freq>:
+    return status_success;
+}
+
+hpm_stat_t pllctl_init_int_pll_with_freq(PLLCTL_Type *ptr, uint8_t pll,
+                                    uint32_t freq_in_hz)
+{
+8000853c:	7179                	add	sp,sp,-48
+8000853e:	d606                	sw	ra,44(sp)
+80008540:	c62a                	sw	a0,12(sp)
+80008542:	87ae                	mv	a5,a1
+80008544:	c232                	sw	a2,4(sp)
+80008546:	00f105a3          	sb	a5,11(sp)
+    if ((ptr == NULL) || (pll >= PLLCTL_SOC_PLL_MAX_COUNT)) {
+8000854a:	47b2                	lw	a5,12(sp)
+8000854c:	c791                	beqz	a5,80008558 <.L27>
+8000854e:	00b14703          	lbu	a4,11(sp)
+80008552:	4791                	li	a5,4
+80008554:	00e7f463          	bgeu	a5,a4,8000855c <.L28>
+
+80008558 <.L27>:
+        return status_invalid_argument;
+80008558:	4789                	li	a5,2
+8000855a:	ac09                	j	8000876c <.L29>
+
+8000855c <.L28>:
+    }
+    uint32_t freq, fbdiv, refdiv, postdiv;
+    if ((freq_in_hz < PLLCTL_PLL_VCO_FREQ_MIN)
+8000855c:	4712                	lw	a4,4(sp)
+8000855e:	165a17b7          	lui	a5,0x165a1
+80008562:	bbf78793          	add	a5,a5,-1089 # 165a0bbf <_extram_size+0x145a0bbf>
+80008566:	00e7f963          	bgeu	a5,a4,80008578 <.L30>
+            || (freq_in_hz > PLLCTL_PLL_VCO_FREQ_MAX)) {
+8000856a:	4712                	lw	a4,4(sp)
+8000856c:	832157b7          	lui	a5,0x83215
+80008570:	60078793          	add	a5,a5,1536 # 83215600 <__XPI0_segment_end__+0x1215600>
+80008574:	00e7f463          	bgeu	a5,a4,8000857c <.L31>
+
+80008578 <.L30>:
+        return status_invalid_argument;
+80008578:	4789                	li	a5,2
+8000857a:	aacd                	j	8000876c <.L29>
+
+8000857c <.L31>:
+    }
+
+    freq = freq_in_hz;
+8000857c:	4792                	lw	a5,4(sp)
+8000857e:	ca3e                	sw	a5,20(sp)
+    refdiv = PLLCTL_PLL_CFG0_REFDIV_GET(ptr->PLL[pll].CFG0);
+80008580:	00b14783          	lbu	a5,11(sp)
+80008584:	4732                	lw	a4,12(sp)
+80008586:	0785                	add	a5,a5,1
+80008588:	079e                	sll	a5,a5,0x7
+8000858a:	97ba                	add	a5,a5,a4
+8000858c:	439c                	lw	a5,0(a5)
+8000858e:	83e1                	srl	a5,a5,0x18
+80008590:	03f7f793          	and	a5,a5,63
+80008594:	cc3e                	sw	a5,24(sp)
+    postdiv = PLLCTL_PLL_CFG0_POSTDIV1_GET(ptr->PLL[pll].CFG0);
+80008596:	00b14783          	lbu	a5,11(sp)
+8000859a:	4732                	lw	a4,12(sp)
+8000859c:	0785                	add	a5,a5,1
+8000859e:	079e                	sll	a5,a5,0x7
+800085a0:	97ba                	add	a5,a5,a4
+800085a2:	439c                	lw	a5,0(a5)
+800085a4:	83d1                	srl	a5,a5,0x14
+800085a6:	8b9d                	and	a5,a5,7
+800085a8:	c83e                	sw	a5,16(sp)
+    fbdiv = freq / (PLLCTL_SOC_PLL_REFCLK_FREQ / (refdiv * postdiv));
+800085aa:	4762                	lw	a4,24(sp)
+800085ac:	47c2                	lw	a5,16(sp)
+800085ae:	02f707b3          	mul	a5,a4,a5
+800085b2:	016e3737          	lui	a4,0x16e3
+800085b6:	60070713          	add	a4,a4,1536 # 16e3600 <__SHARE_RAM_segment_end__+0x563600>
+800085ba:	02f757b3          	divu	a5,a4,a5
+800085be:	4752                	lw	a4,20(sp)
+800085c0:	02f757b3          	divu	a5,a4,a5
+800085c4:	ce3e                	sw	a5,28(sp)
+    if (fbdiv > PLLCTL_INT_PLL_MAX_FBDIV) {
+800085c6:	4772                	lw	a4,28(sp)
+800085c8:	6785                	lui	a5,0x1
+800085ca:	96078793          	add	a5,a5,-1696 # 960 <__ILM_segment_used_end__+0x47a>
+800085ce:	04e7f163          	bgeu	a5,a4,80008610 <.L32>
+        /* current refdiv can't be used for the given frequency */
+        refdiv--;
+800085d2:	47e2                	lw	a5,24(sp)
+800085d4:	17fd                	add	a5,a5,-1
+800085d6:	cc3e                	sw	a5,24(sp)
+
+800085d8 <.L36>:
+        do {
+            fbdiv = freq / (PLLCTL_SOC_PLL_REFCLK_FREQ / (refdiv * postdiv));
+800085d8:	4762                	lw	a4,24(sp)
+800085da:	47c2                	lw	a5,16(sp)
+800085dc:	02f707b3          	mul	a5,a4,a5
+800085e0:	016e3737          	lui	a4,0x16e3
+800085e4:	60070713          	add	a4,a4,1536 # 16e3600 <__SHARE_RAM_segment_end__+0x563600>
+800085e8:	02f757b3          	divu	a5,a4,a5
+800085ec:	4752                	lw	a4,20(sp)
+800085ee:	02f757b3          	divu	a5,a4,a5
+800085f2:	ce3e                	sw	a5,28(sp)
+            if (fbdiv > PLLCTL_INT_PLL_MAX_FBDIV) {
+800085f4:	4772                	lw	a4,28(sp)
+800085f6:	6785                	lui	a5,0x1
+800085f8:	96078793          	add	a5,a5,-1696 # 960 <__ILM_segment_used_end__+0x47a>
+800085fc:	04e7fc63          	bgeu	a5,a4,80008654 <.L45>
+                refdiv--;
+80008600:	47e2                	lw	a5,24(sp)
+80008602:	17fd                	add	a5,a5,-1
+80008604:	cc3e                	sw	a5,24(sp)
+            } else {
+                break;
+            }
+        } while (refdiv > PLLCTL_PLL_MIN_REFDIV);
+80008606:	4762                	lw	a4,24(sp)
+80008608:	4785                	li	a5,1
+8000860a:	fce7e7e3          	bltu	a5,a4,800085d8 <.L36>
+8000860e:	a0b1                	j	8000865a <.L37>
+
+80008610 <.L32>:
+    } else if (fbdiv < PLLCTL_INT_PLL_MIN_FBDIV) {
+80008610:	4772                	lw	a4,28(sp)
+80008612:	47bd                	li	a5,15
+80008614:	04e7e363          	bltu	a5,a4,8000865a <.L37>
+        /* current refdiv can't be used for the given frequency */
+        refdiv++;
+80008618:	47e2                	lw	a5,24(sp)
+8000861a:	0785                	add	a5,a5,1
+8000861c:	cc3e                	sw	a5,24(sp)
+
+8000861e <.L40>:
+        do {
+            fbdiv = freq / (PLLCTL_SOC_PLL_REFCLK_FREQ / (refdiv * postdiv));
+8000861e:	4762                	lw	a4,24(sp)
+80008620:	47c2                	lw	a5,16(sp)
+80008622:	02f707b3          	mul	a5,a4,a5
+80008626:	016e3737          	lui	a4,0x16e3
+8000862a:	60070713          	add	a4,a4,1536 # 16e3600 <__SHARE_RAM_segment_end__+0x563600>
+8000862e:	02f757b3          	divu	a5,a4,a5
+80008632:	4752                	lw	a4,20(sp)
+80008634:	02f757b3          	divu	a5,a4,a5
+80008638:	ce3e                	sw	a5,28(sp)
+            if (fbdiv < PLLCTL_INT_PLL_MIN_FBDIV) {
+8000863a:	4772                	lw	a4,28(sp)
+8000863c:	47bd                	li	a5,15
+8000863e:	00e7ed63          	bltu	a5,a4,80008658 <.L46>
+                refdiv++;
+80008642:	47e2                	lw	a5,24(sp)
+80008644:	0785                	add	a5,a5,1
+80008646:	cc3e                	sw	a5,24(sp)
+            } else {
+                break;
+            }
+        } while (refdiv < PLLCTL_PLL_MAX_REFDIV);
+80008648:	4762                	lw	a4,24(sp)
+8000864a:	03e00793          	li	a5,62
+8000864e:	fce7f8e3          	bgeu	a5,a4,8000861e <.L40>
+80008652:	a021                	j	8000865a <.L37>
+
+80008654 <.L45>:
+                break;
+80008654:	0001                	nop
+80008656:	a011                	j	8000865a <.L37>
+
+80008658 <.L46>:
+                break;
+80008658:	0001                	nop
+
+8000865a <.L37>:
+    }
+
+    if ((refdiv > PLLCTL_PLL_MAX_REFDIV)
+8000865a:	4762                	lw	a4,24(sp)
+8000865c:	03f00793          	li	a5,63
+80008660:	02e7eb63          	bltu	a5,a4,80008696 <.L41>
+            || (refdiv < PLLCTL_PLL_MIN_REFDIV)
+80008664:	47e2                	lw	a5,24(sp)
+80008666:	cb85                	beqz	a5,80008696 <.L41>
+            || (fbdiv > PLLCTL_INT_PLL_MAX_FBDIV)
+80008668:	4772                	lw	a4,28(sp)
+8000866a:	6785                	lui	a5,0x1
+8000866c:	96078793          	add	a5,a5,-1696 # 960 <__ILM_segment_used_end__+0x47a>
+80008670:	02e7e363          	bltu	a5,a4,80008696 <.L41>
+            || (fbdiv < PLLCTL_INT_PLL_MIN_FBDIV)
+80008674:	4772                	lw	a4,28(sp)
+80008676:	47bd                	li	a5,15
+80008678:	00e7ff63          	bgeu	a5,a4,80008696 <.L41>
+            || (((PLLCTL_SOC_PLL_REFCLK_FREQ / refdiv) < PLLCTL_INT_PLL_MIN_REF))) {
+8000867c:	016e37b7          	lui	a5,0x16e3
+80008680:	60078713          	add	a4,a5,1536 # 16e3600 <__SHARE_RAM_segment_end__+0x563600>
+80008684:	47e2                	lw	a5,24(sp)
+80008686:	02f75733          	divu	a4,a4,a5
+8000868a:	000f47b7          	lui	a5,0xf4
+8000868e:	23f78793          	add	a5,a5,575 # f423f <__DLM_segment_end__+0x3423f>
+80008692:	00e7e663          	bltu	a5,a4,8000869e <.L42>
+
+80008696 <.L41>:
+        return status_pllctl_out_of_range;
+80008696:	6799                	lui	a5,0x6
+80008698:	9da78793          	add	a5,a5,-1574 # 59da <__HEAPSIZE__+0x19da>
+8000869c:	a8c1                	j	8000876c <.L29>
+
+8000869e <.L42>:
+    }
+
+    if (!(ptr->PLL[pll].CFG0 & PLLCTL_PLL_CFG0_DSMPD_MASK)) {
+8000869e:	00b14783          	lbu	a5,11(sp)
+800086a2:	4732                	lw	a4,12(sp)
+800086a4:	0785                	add	a5,a5,1
+800086a6:	079e                	sll	a5,a5,0x7
+800086a8:	97ba                	add	a5,a5,a4
+800086aa:	439c                	lw	a5,0(a5)
+800086ac:	8ba1                	and	a5,a5,8
+800086ae:	e795                	bnez	a5,800086da <.L43>
+        /* it was at frac mode, then it needs to be power down */
+        pllctl_pll_powerdown(ptr, pll);
+800086b0:	00b14783          	lbu	a5,11(sp)
+800086b4:	85be                	mv	a1,a5
+800086b6:	4532                	lw	a0,12(sp)
+800086b8:	3d25                	jal	800084f0 <pllctl_pll_powerdown>
+        ptr->PLL[pll].CFG0 |= PLLCTL_PLL_CFG0_DSMPD_MASK;
+800086ba:	00b14783          	lbu	a5,11(sp)
+800086be:	4732                	lw	a4,12(sp)
+800086c0:	0785                	add	a5,a5,1
+800086c2:	079e                	sll	a5,a5,0x7
+800086c4:	97ba                	add	a5,a5,a4
+800086c6:	4398                	lw	a4,0(a5)
+800086c8:	00b14783          	lbu	a5,11(sp)
+800086cc:	00876713          	or	a4,a4,8
+800086d0:	46b2                	lw	a3,12(sp)
+800086d2:	0785                	add	a5,a5,1
+800086d4:	079e                	sll	a5,a5,0x7
+800086d6:	97b6                	add	a5,a5,a3
+800086d8:	c398                	sw	a4,0(a5)
+
+800086da <.L43>:
+    }
+
+    if (PLLCTL_PLL_CFG0_REFDIV_GET(ptr->PLL[pll].CFG0) != refdiv) {
+800086da:	00b14783          	lbu	a5,11(sp)
+800086de:	4732                	lw	a4,12(sp)
+800086e0:	0785                	add	a5,a5,1
+800086e2:	079e                	sll	a5,a5,0x7
+800086e4:	97ba                	add	a5,a5,a4
+800086e6:	439c                	lw	a5,0(a5)
+800086e8:	83e1                	srl	a5,a5,0x18
+800086ea:	03f7f793          	and	a5,a5,63
+800086ee:	4762                	lw	a4,24(sp)
+800086f0:	04f70163          	beq	a4,a5,80008732 <.L44>
+        /* if refdiv is different, it needs to be power down */
+        pllctl_pll_powerdown(ptr, pll);
+800086f4:	00b14783          	lbu	a5,11(sp)
+800086f8:	85be                	mv	a1,a5
+800086fa:	4532                	lw	a0,12(sp)
+800086fc:	3bd5                	jal	800084f0 <pllctl_pll_powerdown>
+        ptr->PLL[pll].CFG0 = (ptr->PLL[pll].CFG0 & ~PLLCTL_PLL_CFG0_REFDIV_MASK)
+800086fe:	00b14783          	lbu	a5,11(sp)
+80008702:	4732                	lw	a4,12(sp)
+80008704:	0785                	add	a5,a5,1
+80008706:	079e                	sll	a5,a5,0x7
+80008708:	97ba                	add	a5,a5,a4
+8000870a:	4398                	lw	a4,0(a5)
+8000870c:	c10007b7          	lui	a5,0xc1000
+80008710:	17fd                	add	a5,a5,-1 # c0ffffff <__XPI0_segment_end__+0x3effffff>
+80008712:	00f776b3          	and	a3,a4,a5
+            | PLLCTL_PLL_CFG0_REFDIV_SET(refdiv);
+80008716:	47e2                	lw	a5,24(sp)
+80008718:	01879713          	sll	a4,a5,0x18
+8000871c:	3f0007b7          	lui	a5,0x3f000
+80008720:	8f7d                	and	a4,a4,a5
+        ptr->PLL[pll].CFG0 = (ptr->PLL[pll].CFG0 & ~PLLCTL_PLL_CFG0_REFDIV_MASK)
+80008722:	00b14783          	lbu	a5,11(sp)
+            | PLLCTL_PLL_CFG0_REFDIV_SET(refdiv);
+80008726:	8f55                	or	a4,a4,a3
+        ptr->PLL[pll].CFG0 = (ptr->PLL[pll].CFG0 & ~PLLCTL_PLL_CFG0_REFDIV_MASK)
+80008728:	46b2                	lw	a3,12(sp)
+8000872a:	0785                	add	a5,a5,1 # 3f000001 <_extram_size+0x3d000001>
+8000872c:	079e                	sll	a5,a5,0x7
+8000872e:	97b6                	add	a5,a5,a3
+80008730:	c398                	sw	a4,0(a5)
+
+80008732 <.L44>:
+    }
+
+    ptr->PLL[pll].CFG2 = (ptr->PLL[pll].CFG2 & ~(PLLCTL_PLL_CFG2_FBDIV_INT_MASK)) | PLLCTL_PLL_CFG2_FBDIV_INT_SET(fbdiv);
+80008732:	00b14783          	lbu	a5,11(sp)
+80008736:	4732                	lw	a4,12(sp)
+80008738:	0785                	add	a5,a5,1
+8000873a:	079e                	sll	a5,a5,0x7
+8000873c:	97ba                	add	a5,a5,a4
+8000873e:	4798                	lw	a4,8(a5)
+80008740:	77fd                	lui	a5,0xfffff
+80008742:	00f776b3          	and	a3,a4,a5
+80008746:	4772                	lw	a4,28(sp)
+80008748:	6785                	lui	a5,0x1
+8000874a:	17fd                	add	a5,a5,-1 # fff <__NOR_CFG_OPTION_segment_size__+0x3ff>
+8000874c:	8f7d                	and	a4,a4,a5
+8000874e:	00b14783          	lbu	a5,11(sp)
+80008752:	8f55                	or	a4,a4,a3
+80008754:	46b2                	lw	a3,12(sp)
+80008756:	0785                	add	a5,a5,1
+80008758:	079e                	sll	a5,a5,0x7
+8000875a:	97b6                	add	a5,a5,a3
+8000875c:	c798                	sw	a4,8(a5)
+
+    pllctl_pll_poweron(ptr, pll);
+8000875e:	00b14783          	lbu	a5,11(sp)
+80008762:	85be                	mv	a1,a5
+80008764:	4532                	lw	a0,12(sp)
+80008766:	e9afd0ef          	jal	80005e00 <pllctl_pll_poweron>
+    return status_success;
+8000876a:	4781                	li	a5,0
+
+8000876c <.L29>:
+}
+8000876c:	853e                	mv	a0,a5
+8000876e:	50b2                	lw	ra,44(sp)
+80008770:	6145                	add	sp,sp,48
+80008772:	8082                	ret
+
+Disassembly of section .text.pllctl_get_pll_freq_in_hz:
+
+80008774 <pllctl_get_pll_freq_in_hz>:
+    pllctl_pll_poweron(ptr, pll);
+    return status_success;
+}
+
+uint32_t pllctl_get_pll_freq_in_hz(PLLCTL_Type *ptr, uint8_t pll)
+{
+80008774:	715d                	add	sp,sp,-80
+80008776:	c686                	sw	ra,76(sp)
+80008778:	c4a2                	sw	s0,72(sp)
+8000877a:	c2a6                	sw	s1,68(sp)
+8000877c:	c0ca                	sw	s2,64(sp)
+8000877e:	de4e                	sw	s3,60(sp)
+80008780:	c62a                	sw	a0,12(sp)
+80008782:	87ae                	mv	a5,a1
+80008784:	00f105a3          	sb	a5,11(sp)
+    if ((ptr == NULL) || (pll >= PLLCTL_SOC_PLL_MAX_COUNT)) {
+80008788:	47b2                	lw	a5,12(sp)
+8000878a:	c791                	beqz	a5,80008796 <.L67>
+8000878c:	00b14703          	lbu	a4,11(sp)
+80008790:	4791                	li	a5,4
+80008792:	00e7f463          	bgeu	a5,a4,8000879a <.L68>
+
+80008796 <.L67>:
+        return status_invalid_argument;
+80008796:	4789                	li	a5,2
+80008798:	aa25                	j	800088d0 <.L69>
+
+8000879a <.L68>:
+    }
+    uint32_t fbdiv, frac, refdiv, postdiv, refclk, freq;
+    if (ptr->PLL[pll].CFG1 & PLLCTL_PLL_CFG1_PLLPD_SW_MASK) {
+8000879a:	00b14783          	lbu	a5,11(sp)
+8000879e:	4732                	lw	a4,12(sp)
+800087a0:	0785                	add	a5,a5,1
+800087a2:	079e                	sll	a5,a5,0x7
+800087a4:	97ba                	add	a5,a5,a4
+800087a6:	43d8                	lw	a4,4(a5)
+800087a8:	020007b7          	lui	a5,0x2000
+800087ac:	8ff9                	and	a5,a5,a4
+800087ae:	c399                	beqz	a5,800087b4 <.L70>
+        /* pll is powered down */
+        return 0;
+800087b0:	4781                	li	a5,0
+800087b2:	aa39                	j	800088d0 <.L69>
+
+800087b4 <.L70>:
+    }
+
+    refdiv = PLLCTL_PLL_CFG0_REFDIV_GET(ptr->PLL[pll].CFG0);
+800087b4:	00b14783          	lbu	a5,11(sp)
+800087b8:	4732                	lw	a4,12(sp)
+800087ba:	0785                	add	a5,a5,1 # 2000001 <_extram_size+0x1>
+800087bc:	079e                	sll	a5,a5,0x7
+800087be:	97ba                	add	a5,a5,a4
+800087c0:	439c                	lw	a5,0(a5)
+800087c2:	83e1                	srl	a5,a5,0x18
+800087c4:	03f7f793          	and	a5,a5,63
+800087c8:	d43e                	sw	a5,40(sp)
+    postdiv = PLLCTL_PLL_CFG0_POSTDIV1_GET(ptr->PLL[pll].CFG0);
+800087ca:	00b14783          	lbu	a5,11(sp)
+800087ce:	4732                	lw	a4,12(sp)
+800087d0:	0785                	add	a5,a5,1
+800087d2:	079e                	sll	a5,a5,0x7
+800087d4:	97ba                	add	a5,a5,a4
+800087d6:	439c                	lw	a5,0(a5)
+800087d8:	83d1                	srl	a5,a5,0x14
+800087da:	8b9d                	and	a5,a5,7
+800087dc:	d23e                	sw	a5,36(sp)
+    refclk = PLLCTL_SOC_PLL_REFCLK_FREQ / (refdiv * postdiv);
+800087de:	5722                	lw	a4,40(sp)
+800087e0:	5792                	lw	a5,36(sp)
+800087e2:	02f707b3          	mul	a5,a4,a5
+800087e6:	016e3737          	lui	a4,0x16e3
+800087ea:	60070713          	add	a4,a4,1536 # 16e3600 <__SHARE_RAM_segment_end__+0x563600>
+800087ee:	02f757b3          	divu	a5,a4,a5
+800087f2:	d03e                	sw	a5,32(sp)
+
+    if (ptr->PLL[pll].CFG0 & PLLCTL_PLL_CFG0_DSMPD_MASK) {
+800087f4:	00b14783          	lbu	a5,11(sp)
+800087f8:	4732                	lw	a4,12(sp)
+800087fa:	0785                	add	a5,a5,1
+800087fc:	079e                	sll	a5,a5,0x7
+800087fe:	97ba                	add	a5,a5,a4
+80008800:	439c                	lw	a5,0(a5)
+80008802:	8ba1                	and	a5,a5,8
+80008804:	c395                	beqz	a5,80008828 <.L71>
+        /* pll int mode */
+        fbdiv = PLLCTL_PLL_CFG2_FBDIV_INT_GET(ptr->PLL[pll].CFG2);
+80008806:	00b14783          	lbu	a5,11(sp)
+8000880a:	4732                	lw	a4,12(sp)
+8000880c:	0785                	add	a5,a5,1
+8000880e:	079e                	sll	a5,a5,0x7
+80008810:	97ba                	add	a5,a5,a4
+80008812:	4798                	lw	a4,8(a5)
+80008814:	6785                	lui	a5,0x1
+80008816:	17fd                	add	a5,a5,-1 # fff <__NOR_CFG_OPTION_segment_size__+0x3ff>
+80008818:	8ff9                	and	a5,a5,a4
+8000881a:	ce3e                	sw	a5,28(sp)
+        freq = refclk * fbdiv;
+8000881c:	5702                	lw	a4,32(sp)
+8000881e:	47f2                	lw	a5,28(sp)
+80008820:	02f707b3          	mul	a5,a4,a5
+80008824:	d63e                	sw	a5,44(sp)
+80008826:	a065                	j	800088ce <.L72>
+
+80008828 <.L71>:
+    } else {
+        /* pll frac mode */
+        fbdiv = PLLCTL_PLL_FREQ_FBDIV_FRAC_GET(ptr->PLL[pll].FREQ);
+80008828:	00b14783          	lbu	a5,11(sp)
+8000882c:	4732                	lw	a4,12(sp)
+8000882e:	0785                	add	a5,a5,1
+80008830:	079e                	sll	a5,a5,0x7
+80008832:	97ba                	add	a5,a5,a4
+80008834:	47dc                	lw	a5,12(a5)
+80008836:	0ff7f793          	zext.b	a5,a5
+8000883a:	ce3e                	sw	a5,28(sp)
+        frac = PLLCTL_PLL_FREQ_FRAC_GET(ptr->PLL[pll].FREQ);
+8000883c:	00b14783          	lbu	a5,11(sp)
+80008840:	4732                	lw	a4,12(sp)
+80008842:	0785                	add	a5,a5,1
+80008844:	079e                	sll	a5,a5,0x7
+80008846:	97ba                	add	a5,a5,a4
+80008848:	47dc                	lw	a5,12(a5)
+8000884a:	0087d713          	srl	a4,a5,0x8
+8000884e:	010007b7          	lui	a5,0x1000
+80008852:	17fd                	add	a5,a5,-1 # ffffff <__DLM_segment_end__+0xf3ffff>
+80008854:	8ff9                	and	a5,a5,a4
+80008856:	cc3e                	sw	a5,24(sp)
+        freq = (uint32_t)((refclk * (fbdiv + ((double) frac / (1 << 24)))) + 0.5);
+80008858:	5502                	lw	a0,32(sp)
+8000885a:	6ff000ef          	jal	80009758 <__floatunsidf>
+8000885e:	842a                	mv	s0,a0
+80008860:	84ae                	mv	s1,a1
+80008862:	4572                	lw	a0,28(sp)
+80008864:	6f5000ef          	jal	80009758 <__floatunsidf>
+80008868:	892a                	mv	s2,a0
+8000886a:	89ae                	mv	s3,a1
+8000886c:	4562                	lw	a0,24(sp)
+8000886e:	6eb000ef          	jal	80009758 <__floatunsidf>
+80008872:	872a                	mv	a4,a0
+80008874:	87ae                	mv	a5,a1
+80008876:	800036b7          	lui	a3,0x80003
+8000887a:	0886a603          	lw	a2,136(a3) # 80003088 <.LC1>
+8000887e:	08c6a683          	lw	a3,140(a3)
+80008882:	853a                	mv	a0,a4
+80008884:	85be                	mv	a1,a5
+80008886:	487000ef          	jal	8000950c <__divdf3>
+8000888a:	872a                	mv	a4,a0
+8000888c:	87ae                	mv	a5,a1
+8000888e:	863a                	mv	a2,a4
+80008890:	86be                	mv	a3,a5
+80008892:	854a                	mv	a0,s2
+80008894:	85ce                	mv	a1,s3
+80008896:	2de9                	jal	80008f70 <__adddf3>
+80008898:	872a                	mv	a4,a0
+8000889a:	87ae                	mv	a5,a1
+8000889c:	863a                	mv	a2,a4
+8000889e:	86be                	mv	a3,a5
+800088a0:	8522                	mv	a0,s0
+800088a2:	85a6                	mv	a1,s1
+800088a4:	255000ef          	jal	800092f8 <__muldf3>
+800088a8:	872a                	mv	a4,a0
+800088aa:	87ae                	mv	a5,a1
+800088ac:	853a                	mv	a0,a4
+800088ae:	85be                	mv	a1,a5
+800088b0:	800037b7          	lui	a5,0x80003
+800088b4:	0907a603          	lw	a2,144(a5) # 80003090 <.LC2>
+800088b8:	0947a683          	lw	a3,148(a5)
+800088bc:	2d55                	jal	80008f70 <__adddf3>
+800088be:	872a                	mv	a4,a0
+800088c0:	87ae                	mv	a5,a1
+800088c2:	853a                	mv	a0,a4
+800088c4:	85be                	mv	a1,a5
+800088c6:	dfffd0ef          	jal	800066c4 <__fixunsdfsi>
+800088ca:	87aa                	mv	a5,a0
+800088cc:	d63e                	sw	a5,44(sp)
+
+800088ce <.L72>:
+    }
+    return freq;
+800088ce:	57b2                	lw	a5,44(sp)
+
+800088d0 <.L69>:
+}
+800088d0:	853e                	mv	a0,a5
+800088d2:	40b6                	lw	ra,76(sp)
+800088d4:	4426                	lw	s0,72(sp)
+800088d6:	4496                	lw	s1,68(sp)
+800088d8:	4906                	lw	s2,64(sp)
+800088da:	59f2                	lw	s3,60(sp)
+800088dc:	6161                	add	sp,sp,80
+800088de:	8082                	ret
+
+Disassembly of section .text.adc12_get_default_config:
+
+800088e0 <adc12_get_default_config>:
+{
+800088e0:	1141                	add	sp,sp,-16
+800088e2:	c62a                	sw	a0,12(sp)
+    config->res                = adc12_res_12_bits;
+800088e4:	47b2                	lw	a5,12(sp)
+800088e6:	470d                	li	a4,3
+800088e8:	00e78023          	sb	a4,0(a5)
+    config->conv_mode          = adc12_conv_mode_oneshot;
+800088ec:	47b2                	lw	a5,12(sp)
+800088ee:	000780a3          	sb	zero,1(a5)
+    config->adc_clk_div        = adc12_clock_divider_1;
+800088f2:	47b2                	lw	a5,12(sp)
+800088f4:	4705                	li	a4,1
+800088f6:	c3d8                	sw	a4,4(a5)
+    config->wait_dis           = true;
+800088f8:	47b2                	lw	a5,12(sp)
+800088fa:	4705                	li	a4,1
+800088fc:	00e78423          	sb	a4,8(a5)
+    config->sel_sync_ahb       = true;
+80008900:	47b2                	lw	a5,12(sp)
+80008902:	4705                	li	a4,1
+80008904:	00e784a3          	sb	a4,9(a5)
+    config->adc_ahb_en         = false;
+80008908:	47b2                	lw	a5,12(sp)
+8000890a:	00078523          	sb	zero,10(a5)
+}
+8000890e:	0001                	nop
+80008910:	0141                	add	sp,sp,16
+80008912:	8082                	ret
+
+Disassembly of section .text.adc12_get_channel_default_config:
+
+80008914 <adc12_get_channel_default_config>:
+{
+80008914:	1141                	add	sp,sp,-16
+80008916:	c62a                	sw	a0,12(sp)
+    config->ch                 = 0;
+80008918:	47b2                	lw	a5,12(sp)
+8000891a:	00078023          	sb	zero,0(a5)
+    config->diff_sel           = adc12_sample_signal_single_ended;
+8000891e:	47b2                	lw	a5,12(sp)
+80008920:	000780a3          	sb	zero,1(a5)
+    config->sample_cycle       = 10;
+80008924:	47b2                	lw	a5,12(sp)
+80008926:	4729                	li	a4,10
+80008928:	c798                	sw	a4,8(a5)
+    config->sample_cycle_shift = 0;
+8000892a:	47b2                	lw	a5,12(sp)
+8000892c:	000783a3          	sb	zero,7(a5)
+    config->thshdh             = 0xfff;
+80008930:	47b2                	lw	a5,12(sp)
+80008932:	6705                	lui	a4,0x1
+80008934:	177d                	add	a4,a4,-1 # fff <__NOR_CFG_OPTION_segment_size__+0x3ff>
+80008936:	00e79123          	sh	a4,2(a5)
+    config->thshdl             = 0x000;
+8000893a:	47b2                	lw	a5,12(sp)
+8000893c:	00079223          	sh	zero,4(a5)
+    config->wdog_int_en        = false;
+80008940:	47b2                	lw	a5,12(sp)
+80008942:	00078323          	sb	zero,6(a5)
+}
+80008946:	0001                	nop
+80008948:	0141                	add	sp,sp,16
+8000894a:	8082                	ret
+
+Disassembly of section .text.adc12_init:
+
+8000894c <adc12_init>:
+{
+8000894c:	7179                	add	sp,sp,-48
+8000894e:	d606                	sw	ra,44(sp)
+80008950:	c62a                	sw	a0,12(sp)
+80008952:	c42e                	sw	a1,8(sp)
+    ptr->ANA_CTRL0 &= ~(ADC12_ANA_CTRL0_ENADC_MASK);
+80008954:	4732                	lw	a4,12(sp)
+80008956:	6785                	lui	a5,0x1
+80008958:	97ba                	add	a5,a5,a4
+8000895a:	2007a783          	lw	a5,512(a5) # 1200 <__AXI_SRAM_segment_used_size__+0xe3>
+8000895e:	fdf7f713          	and	a4,a5,-33
+80008962:	46b2                	lw	a3,12(sp)
+80008964:	6785                	lui	a5,0x1
+80008966:	97b6                	add	a5,a5,a3
+80008968:	20e7a023          	sw	a4,512(a5) # 1200 <__AXI_SRAM_segment_used_size__+0xe3>
+    if (config->res > adc12_res_12_bits) {
+8000896c:	47a2                	lw	a5,8(sp)
+8000896e:	0007c703          	lbu	a4,0(a5)
+80008972:	478d                	li	a5,3
+80008974:	00e7f463          	bgeu	a5,a4,8000897c <.L14>
+        return status_invalid_argument;
+80008978:	4789                	li	a5,2
+8000897a:	a22d                	j	80008aa4 <.L15>
+
+8000897c <.L14>:
+    ptr->ANA_CTRL1 = (ptr->ANA_CTRL1 & ~ADC12_ANA_CTRL1_SELRES_MASK)
+8000897c:	4732                	lw	a4,12(sp)
+8000897e:	6785                	lui	a5,0x1
+80008980:	97ba                	add	a5,a5,a4
+80008982:	2047a783          	lw	a5,516(a5) # 1204 <__AXI_SRAM_segment_used_size__+0xe7>
+80008986:	f3f7f713          	and	a4,a5,-193
+                   | ADC12_ANA_CTRL1_SELRES_SET(config->res);
+8000898a:	47a2                	lw	a5,8(sp)
+8000898c:	0007c783          	lbu	a5,0(a5)
+80008990:	079a                	sll	a5,a5,0x6
+80008992:	0ff7f793          	zext.b	a5,a5
+80008996:	8f5d                	or	a4,a4,a5
+    ptr->ANA_CTRL1 = (ptr->ANA_CTRL1 & ~ADC12_ANA_CTRL1_SELRES_MASK)
+80008998:	46b2                	lw	a3,12(sp)
+8000899a:	6785                	lui	a5,0x1
+8000899c:	97b6                	add	a5,a5,a3
+8000899e:	20e7a223          	sw	a4,516(a5) # 1204 <__AXI_SRAM_segment_used_size__+0xe7>
+    if ((config->adc_clk_div - 1) > ADC12_CONV_CFG1_CLOCK_DIVIDER_MASK)  {
+800089a2:	47a2                	lw	a5,8(sp)
+800089a4:	43dc                	lw	a5,4(a5)
+800089a6:	fff78713          	add	a4,a5,-1
+800089aa:	47bd                	li	a5,15
+800089ac:	00e7f463          	bgeu	a5,a4,800089b4 <.L16>
+        return status_invalid_argument;
+800089b0:	4789                	li	a5,2
+800089b2:	a8cd                	j	80008aa4 <.L15>
+
+800089b4 <.L16>:
+    ptr->CONV_CFG1 = ADC12_CONV_CFG1_CONVERT_CLOCK_NUMBER_SET(2 * config->res + 7)
+800089b4:	47a2                	lw	a5,8(sp)
+800089b6:	0007c783          	lbu	a5,0(a5)
+800089ba:	0786                	sll	a5,a5,0x1
+800089bc:	079d                	add	a5,a5,7
+800089be:	0792                	sll	a5,a5,0x4
+800089c0:	1f07f713          	and	a4,a5,496
+                   | ADC12_CONV_CFG1_CLOCK_DIVIDER_SET(config->adc_clk_div - 1);
+800089c4:	47a2                	lw	a5,8(sp)
+800089c6:	43dc                	lw	a5,4(a5)
+800089c8:	17fd                	add	a5,a5,-1
+800089ca:	8bbd                	and	a5,a5,15
+800089cc:	8f5d                	or	a4,a4,a5
+    ptr->CONV_CFG1 = ADC12_CONV_CFG1_CONVERT_CLOCK_NUMBER_SET(2 * config->res + 7)
+800089ce:	46b2                	lw	a3,12(sp)
+800089d0:	6785                	lui	a5,0x1
+800089d2:	97b6                	add	a5,a5,a3
+800089d4:	10e7a223          	sw	a4,260(a5) # 1104 <__fw_size__+0x104>
+    ptr->ADC_CFG0 = ADC12_ADC_CFG0_SEL_SYNC_AHB_SET(config->sel_sync_ahb)
+800089d8:	47a2                	lw	a5,8(sp)
+800089da:	0097c783          	lbu	a5,9(a5)
+800089de:	01f79713          	sll	a4,a5,0x1f
+                  | ADC12_ADC_CFG0_ADC_AHB_EN_SET(config->adc_ahb_en);
+800089e2:	47a2                	lw	a5,8(sp)
+800089e4:	00a7c783          	lbu	a5,10(a5)
+800089e8:	01d79693          	sll	a3,a5,0x1d
+800089ec:	200007b7          	lui	a5,0x20000
+800089f0:	8ff5                	and	a5,a5,a3
+800089f2:	8f5d                	or	a4,a4,a5
+    ptr->ADC_CFG0 = ADC12_ADC_CFG0_SEL_SYNC_AHB_SET(config->sel_sync_ahb)
+800089f4:	46b2                	lw	a3,12(sp)
+800089f6:	6785                	lui	a5,0x1
+800089f8:	97b6                	add	a5,a5,a3
+800089fa:	10e7a423          	sw	a4,264(a5) # 1108 <__fw_size__+0x108>
+    ptr->BUF_CFG0 = ADC12_BUF_CFG0_WAIT_DIS_SET(config->wait_dis);
+800089fe:	47a2                	lw	a5,8(sp)
+80008a00:	0087c783          	lbu	a5,8(a5)
+80008a04:	873e                	mv	a4,a5
+80008a06:	47b2                	lw	a5,12(sp)
+80008a08:	50e7a023          	sw	a4,1280(a5)
+    ptr->ANA_CTRL0 |= ADC12_ANA_CTRL0_ENLDO_MASK;
+80008a0c:	4732                	lw	a4,12(sp)
+80008a0e:	6785                	lui	a5,0x1
+80008a10:	97ba                	add	a5,a5,a4
+80008a12:	2007a783          	lw	a5,512(a5) # 1200 <__AXI_SRAM_segment_used_size__+0xe3>
+80008a16:	0407e713          	or	a4,a5,64
+80008a1a:	46b2                	lw	a3,12(sp)
+80008a1c:	6785                	lui	a5,0x1
+80008a1e:	97b6                	add	a5,a5,a3
+80008a20:	20e7a023          	sw	a4,512(a5) # 1200 <__AXI_SRAM_segment_used_size__+0xe3>
+    adc_clk_div = config->adc_clk_div;
+80008a24:	47a2                	lw	a5,8(sp)
+80008a26:	43dc                	lw	a5,4(a5)
+80008a28:	ce3e                	sw	a5,28(sp)
+    if (adc_clk_div == ADC12_SOC_CLOCK_CLK_DIV) {
+80008a2a:	4772                	lw	a4,28(sp)
+80008a2c:	4789                	li	a5,2
+80008a2e:	02f71363          	bne	a4,a5,80008a54 <.L17>
+        ptr->CONV_CFG1 = (ptr->CONV_CFG1 & ~ADC12_CONV_CFG1_CLOCK_DIVIDER_MASK)
+80008a32:	4732                	lw	a4,12(sp)
+80008a34:	6785                	lui	a5,0x1
+80008a36:	97ba                	add	a5,a5,a4
+80008a38:	1047a783          	lw	a5,260(a5) # 1104 <__fw_size__+0x104>
+80008a3c:	ff07f713          	and	a4,a5,-16
+                         | ADC12_CONV_CFG1_CLOCK_DIVIDER_SET(config->adc_clk_div + 1);
+80008a40:	47a2                	lw	a5,8(sp)
+80008a42:	43dc                	lw	a5,4(a5)
+80008a44:	0785                	add	a5,a5,1
+80008a46:	8bbd                	and	a5,a5,15
+80008a48:	8f5d                	or	a4,a4,a5
+        ptr->CONV_CFG1 = (ptr->CONV_CFG1 & ~ADC12_CONV_CFG1_CLOCK_DIVIDER_MASK)
+80008a4a:	46b2                	lw	a3,12(sp)
+80008a4c:	6785                	lui	a5,0x1
+80008a4e:	97b6                	add	a5,a5,a3
+80008a50:	10e7a223          	sw	a4,260(a5) # 1104 <__fw_size__+0x104>
+
+80008a54 <.L17>:
+    ptr->ANA_CTRL0 |= ADC12_ANA_CTRL0_ENADC_MASK;
+80008a54:	4732                	lw	a4,12(sp)
+80008a56:	6785                	lui	a5,0x1
+80008a58:	97ba                	add	a5,a5,a4
+80008a5a:	2007a783          	lw	a5,512(a5) # 1200 <__AXI_SRAM_segment_used_size__+0xe3>
+80008a5e:	0207e713          	or	a4,a5,32
+80008a62:	46b2                	lw	a3,12(sp)
+80008a64:	6785                	lui	a5,0x1
+80008a66:	97b6                	add	a5,a5,a3
+80008a68:	20e7a023          	sw	a4,512(a5) # 1200 <__AXI_SRAM_segment_used_size__+0xe3>
+    adc12_do_calibration(ptr, config->diff_sel);
+80008a6c:	47a2                	lw	a5,8(sp)
+80008a6e:	0027c783          	lbu	a5,2(a5)
+80008a72:	85be                	mv	a1,a5
+80008a74:	4532                	lw	a0,12(sp)
+80008a76:	c38fd0ef          	jal	80005eae <adc12_do_calibration>
+    if (adc_clk_div == ADC12_SOC_CLOCK_CLK_DIV) {
+80008a7a:	4772                	lw	a4,28(sp)
+80008a7c:	4789                	li	a5,2
+80008a7e:	02f71263          	bne	a4,a5,80008aa2 <.L18>
+        ptr->CONV_CFG1 = (ptr->CONV_CFG1 & ~ADC12_CONV_CFG1_CLOCK_DIVIDER_MASK)
+80008a82:	4732                	lw	a4,12(sp)
+80008a84:	6785                	lui	a5,0x1
+80008a86:	97ba                	add	a5,a5,a4
+80008a88:	1047a783          	lw	a5,260(a5) # 1104 <__fw_size__+0x104>
+80008a8c:	ff07f713          	and	a4,a5,-16
+                       | ADC12_CONV_CFG1_CLOCK_DIVIDER_SET(config->adc_clk_div);
+80008a90:	47a2                	lw	a5,8(sp)
+80008a92:	43dc                	lw	a5,4(a5)
+80008a94:	8bbd                	and	a5,a5,15
+80008a96:	8f5d                	or	a4,a4,a5
+        ptr->CONV_CFG1 = (ptr->CONV_CFG1 & ~ADC12_CONV_CFG1_CLOCK_DIVIDER_MASK)
+80008a98:	46b2                	lw	a3,12(sp)
+80008a9a:	6785                	lui	a5,0x1
+80008a9c:	97b6                	add	a5,a5,a3
+80008a9e:	10e7a223          	sw	a4,260(a5) # 1104 <__fw_size__+0x104>
+
+80008aa2 <.L18>:
+    return status_success;
+80008aa2:	4781                	li	a5,0
+
+80008aa4 <.L15>:
+}
+80008aa4:	853e                	mv	a0,a5
+80008aa6:	50b2                	lw	ra,44(sp)
+80008aa8:	6145                	add	sp,sp,48
+80008aaa:	8082                	ret
+
+Disassembly of section .text.adc12_init_channel:
+
+80008aac <adc12_init_channel>:
+{
+80008aac:	1141                	add	sp,sp,-16
+80008aae:	c62a                	sw	a0,12(sp)
+80008ab0:	c42e                	sw	a1,8(sp)
+    if (ADC12_IS_CHANNEL_INVALID(config->ch)) {
+80008ab2:	47a2                	lw	a5,8(sp)
+80008ab4:	0007c703          	lbu	a4,0(a5)
+80008ab8:	47c5                	li	a5,17
+80008aba:	00e7f463          	bgeu	a5,a4,80008ac2 <.L20>
+        return status_invalid_argument;
+80008abe:	4789                	li	a5,2
+80008ac0:	a06d                	j	80008b6a <.L21>
+
+80008ac2 <.L20>:
+    if (ADC12_IS_CHANNEL_SAMPLE_CYCLE_INVALID(config->sample_cycle)) {
+80008ac2:	47a2                	lw	a5,8(sp)
+80008ac4:	479c                	lw	a5,8(a5)
+80008ac6:	e399                	bnez	a5,80008acc <.L22>
+        return status_invalid_argument;
+80008ac8:	4789                	li	a5,2
+80008aca:	a045                	j	80008b6a <.L21>
+
+80008acc <.L22>:
+    ptr->PRD_CFG[config->ch].PRD_THSHD_CFG = ADC12_PRD_CFG_PRD_THSHD_CFG_THSHDH_SET(config->thshdh)
+80008acc:	47a2                	lw	a5,8(sp)
+80008ace:	0027d783          	lhu	a5,2(a5)
+80008ad2:	01479713          	sll	a4,a5,0x14
+                                           | ADC12_PRD_CFG_PRD_THSHD_CFG_THSHDL_SET(config->thshdl);
+80008ad6:	47a2                	lw	a5,8(sp)
+80008ad8:	0047d783          	lhu	a5,4(a5)
+80008adc:	00479693          	sll	a3,a5,0x4
+80008ae0:	67c1                	lui	a5,0x10
+80008ae2:	17fd                	add	a5,a5,-1 # ffff <__AHB_SRAM_segment_size__+0x7fff>
+80008ae4:	8ff5                	and	a5,a5,a3
+    ptr->PRD_CFG[config->ch].PRD_THSHD_CFG = ADC12_PRD_CFG_PRD_THSHD_CFG_THSHDH_SET(config->thshdh)
+80008ae6:	46a2                	lw	a3,8(sp)
+80008ae8:	0006c683          	lbu	a3,0(a3)
+80008aec:	8636                	mv	a2,a3
+                                           | ADC12_PRD_CFG_PRD_THSHD_CFG_THSHDL_SET(config->thshdl);
+80008aee:	8f5d                	or	a4,a4,a5
+    ptr->PRD_CFG[config->ch].PRD_THSHD_CFG = ADC12_PRD_CFG_PRD_THSHD_CFG_THSHDH_SET(config->thshdh)
+80008af0:	46b2                	lw	a3,12(sp)
+80008af2:	0c060793          	add	a5,a2,192
+80008af6:	0792                	sll	a5,a5,0x4
+80008af8:	97b6                	add	a5,a5,a3
+80008afa:	c3d8                	sw	a4,4(a5)
+    ptr->SAMPLE_CFG[config->ch] = ADC12_SAMPLE_CFG_DIFF_SEL_SET(config->diff_sel)
+80008afc:	47a2                	lw	a5,8(sp)
+80008afe:	0017c783          	lbu	a5,1(a5)
+80008b02:	00c79713          	sll	a4,a5,0xc
+80008b06:	6785                	lui	a5,0x1
+80008b08:	8f7d                	and	a4,a4,a5
+                                | ADC12_SAMPLE_CFG_SAMPLE_CLOCK_NUMBER_SHIFT_SET(config->sample_cycle_shift)
+80008b0a:	47a2                	lw	a5,8(sp)
+80008b0c:	0077c783          	lbu	a5,7(a5) # 1007 <__fw_size__+0x7>
+80008b10:	00979693          	sll	a3,a5,0x9
+80008b14:	6785                	lui	a5,0x1
+80008b16:	e0078793          	add	a5,a5,-512 # e00 <__NOR_CFG_OPTION_segment_size__+0x200>
+80008b1a:	8ff5                	and	a5,a5,a3
+80008b1c:	8f5d                	or	a4,a4,a5
+                                | ADC12_SAMPLE_CFG_SAMPLE_CLOCK_NUMBER_SET(config->sample_cycle);
+80008b1e:	47a2                	lw	a5,8(sp)
+80008b20:	479c                	lw	a5,8(a5)
+80008b22:	1ff7f793          	and	a5,a5,511
+    ptr->SAMPLE_CFG[config->ch] = ADC12_SAMPLE_CFG_DIFF_SEL_SET(config->diff_sel)
+80008b26:	46a2                	lw	a3,8(sp)
+80008b28:	0006c683          	lbu	a3,0(a3)
+80008b2c:	8636                	mv	a2,a3
+                                | ADC12_SAMPLE_CFG_SAMPLE_CLOCK_NUMBER_SET(config->sample_cycle);
+80008b2e:	8f5d                	or	a4,a4,a5
+    ptr->SAMPLE_CFG[config->ch] = ADC12_SAMPLE_CFG_DIFF_SEL_SET(config->diff_sel)
+80008b30:	46b2                	lw	a3,12(sp)
+80008b32:	40060793          	add	a5,a2,1024
+80008b36:	078a                	sll	a5,a5,0x2
+80008b38:	97b6                	add	a5,a5,a3
+80008b3a:	c398                	sw	a4,0(a5)
+    if (config->wdog_int_en) {
+80008b3c:	47a2                	lw	a5,8(sp)
+80008b3e:	0067c783          	lbu	a5,6(a5)
+80008b42:	c39d                	beqz	a5,80008b68 <.L23>
+        ptr->INT_EN |= 1 << config->ch;
+80008b44:	4732                	lw	a4,12(sp)
+80008b46:	6785                	lui	a5,0x1
+80008b48:	97ba                	add	a5,a5,a4
+80008b4a:	1147a783          	lw	a5,276(a5) # 1114 <__fw_size__+0x114>
+80008b4e:	4722                	lw	a4,8(sp)
+80008b50:	00074703          	lbu	a4,0(a4)
+80008b54:	86ba                	mv	a3,a4
+80008b56:	4705                	li	a4,1
+80008b58:	00d71733          	sll	a4,a4,a3
+80008b5c:	8f5d                	or	a4,a4,a5
+80008b5e:	46b2                	lw	a3,12(sp)
+80008b60:	6785                	lui	a5,0x1
+80008b62:	97b6                	add	a5,a5,a3
+80008b64:	10e7aa23          	sw	a4,276(a5) # 1114 <__fw_size__+0x114>
+
+80008b68 <.L23>:
+    return status_success;
+80008b68:	4781                	li	a5,0
+
+80008b6a <.L21>:
+}
+80008b6a:	853e                	mv	a0,a5
+80008b6c:	0141                	add	sp,sp,16
+80008b6e:	8082                	ret
+
+Disassembly of section .text.adc12_get_channel_threshold:
+
+80008b70 <adc12_get_channel_threshold>:
+{
+80008b70:	1141                	add	sp,sp,-16
+80008b72:	c62a                	sw	a0,12(sp)
+80008b74:	87ae                	mv	a5,a1
+80008b76:	c232                	sw	a2,4(sp)
+80008b78:	00f105a3          	sb	a5,11(sp)
+    if (ADC12_IS_CHANNEL_INVALID(ch)) {
+80008b7c:	00b14703          	lbu	a4,11(sp)
+80008b80:	47c5                	li	a5,17
+80008b82:	00e7f463          	bgeu	a5,a4,80008b8a <.L25>
+        return status_invalid_argument;
+80008b86:	4789                	li	a5,2
+80008b88:	a08d                	j	80008bea <.L26>
+
+80008b8a <.L25>:
+    config->ch     = ch;
+80008b8a:	4792                	lw	a5,4(sp)
+80008b8c:	00b14703          	lbu	a4,11(sp)
+80008b90:	00e78023          	sb	a4,0(a5)
+    config->thshdh = ADC12_PRD_CFG_PRD_THSHD_CFG_THSHDH_GET(ptr->PRD_CFG[ch].PRD_THSHD_CFG);
+80008b94:	00b14783          	lbu	a5,11(sp)
+80008b98:	4732                	lw	a4,12(sp)
+80008b9a:	0c078793          	add	a5,a5,192
+80008b9e:	0792                	sll	a5,a5,0x4
+80008ba0:	97ba                	add	a5,a5,a4
+80008ba2:	43dc                	lw	a5,4(a5)
+80008ba4:	83d1                	srl	a5,a5,0x14
+80008ba6:	01079713          	sll	a4,a5,0x10
+80008baa:	8341                	srl	a4,a4,0x10
+80008bac:	6785                	lui	a5,0x1
+80008bae:	17fd                	add	a5,a5,-1 # fff <__NOR_CFG_OPTION_segment_size__+0x3ff>
+80008bb0:	8ff9                	and	a5,a5,a4
+80008bb2:	01079713          	sll	a4,a5,0x10
+80008bb6:	8341                	srl	a4,a4,0x10
+80008bb8:	4792                	lw	a5,4(sp)
+80008bba:	00e79123          	sh	a4,2(a5)
+    config->thshdl = ADC12_PRD_CFG_PRD_THSHD_CFG_THSHDL_GET(ptr->PRD_CFG[ch].PRD_THSHD_CFG);
+80008bbe:	00b14783          	lbu	a5,11(sp)
+80008bc2:	4732                	lw	a4,12(sp)
+80008bc4:	0c078793          	add	a5,a5,192
+80008bc8:	0792                	sll	a5,a5,0x4
+80008bca:	97ba                	add	a5,a5,a4
+80008bcc:	43dc                	lw	a5,4(a5)
+80008bce:	8391                	srl	a5,a5,0x4
+80008bd0:	01079713          	sll	a4,a5,0x10
+80008bd4:	8341                	srl	a4,a4,0x10
+80008bd6:	6785                	lui	a5,0x1
+80008bd8:	17fd                	add	a5,a5,-1 # fff <__NOR_CFG_OPTION_segment_size__+0x3ff>
+80008bda:	8ff9                	and	a5,a5,a4
+80008bdc:	01079713          	sll	a4,a5,0x10
+80008be0:	8341                	srl	a4,a4,0x10
+80008be2:	4792                	lw	a5,4(sp)
+80008be4:	00e79223          	sh	a4,4(a5)
+    return status_success;
+80008be8:	4781                	li	a5,0
+
+80008bea <.L26>:
+}
+80008bea:	853e                	mv	a0,a5
+80008bec:	0141                	add	sp,sp,16
+80008bee:	8082                	ret
+
+Disassembly of section .text.adc12_trigger_pmt_by_sw:
+
+80008bf0 <adc12_trigger_pmt_by_sw>:
+{
+80008bf0:	1141                	add	sp,sp,-16
+80008bf2:	c62a                	sw	a0,12(sp)
+80008bf4:	87ae                	mv	a5,a1
+80008bf6:	00f105a3          	sb	a5,11(sp)
+    ptr->TRG_SW_STA = ADC12_TRG_SW_STA_TRG_SW_STA_MASK | ADC12_TRG_SW_STA_TRIG_SW_INDEX_SET(trig_ch);
+80008bfa:	00b14783          	lbu	a5,11(sp)
+80008bfe:	8bbd                	and	a5,a5,15
+80008c00:	0107e713          	or	a4,a5,16
+80008c04:	47b2                	lw	a5,12(sp)
+80008c06:	dbd8                	sw	a4,52(a5)
+    return status_success;
+80008c08:	4781                	li	a5,0
+}
+80008c0a:	853e                	mv	a0,a5
+80008c0c:	0141                	add	sp,sp,16
+80008c0e:	8082                	ret
+
+Disassembly of section .text.adc12_set_pmt_config:
+
+80008c10 <adc12_set_pmt_config>:
+{
+80008c10:	1101                	add	sp,sp,-32
+80008c12:	c62a                	sw	a0,12(sp)
+80008c14:	c42e                	sw	a1,8(sp)
+    uint32_t temp = 0;
+80008c16:	ce02                	sw	zero,28(sp)
+    if (ADC12_IS_TRIG_LEN_INVLAID(config->trig_len)) {
+80008c18:	47a2                	lw	a5,8(sp)
+80008c1a:	0097c703          	lbu	a4,9(a5)
+80008c1e:	4791                	li	a5,4
+80008c20:	00e7f463          	bgeu	a5,a4,80008c28 <.L49>
+        return status_invalid_argument;
+80008c24:	4789                	li	a5,2
+80008c26:	a851                	j	80008cba <.L50>
+
+80008c28 <.L49>:
+    if (ADC12_IS_TRIG_CH_INVLAID(config->trig_ch)) {
+80008c28:	47a2                	lw	a5,8(sp)
+80008c2a:	0087c703          	lbu	a4,8(a5)
+80008c2e:	47ad                	li	a5,11
+80008c30:	00e7f463          	bgeu	a5,a4,80008c38 <.L51>
+        return status_invalid_argument;
+80008c34:	4789                	li	a5,2
+80008c36:	a051                	j	80008cba <.L50>
+
+80008c38 <.L51>:
+    temp |= ADC12_CONFIG_TRIG_LEN_SET(config->trig_len - 1);
+80008c38:	47a2                	lw	a5,8(sp)
+80008c3a:	0097c783          	lbu	a5,9(a5)
+80008c3e:	17fd                	add	a5,a5,-1
+80008c40:	07fa                	sll	a5,a5,0x1e
+80008c42:	4772                	lw	a4,28(sp)
+80008c44:	8fd9                	or	a5,a5,a4
+80008c46:	ce3e                	sw	a5,28(sp)
+
+80008c48 <.LBB3>:
+    for (int i = 0; i < config->trig_len; i++) {
+80008c48:	cc02                	sw	zero,24(sp)
+80008c4a:	a881                	j	80008c9a <.L52>
+
+80008c4c <.L54>:
+        if (ADC12_IS_CHANNEL_INVALID(config->adc_ch[i])) {
+80008c4c:	4722                	lw	a4,8(sp)
+80008c4e:	47e2                	lw	a5,24(sp)
+80008c50:	97ba                	add	a5,a5,a4
+80008c52:	0047c703          	lbu	a4,4(a5)
+80008c56:	47c5                	li	a5,17
+80008c58:	00e7f463          	bgeu	a5,a4,80008c60 <.L53>
+            return status_invalid_argument;
+80008c5c:	4789                	li	a5,2
+80008c5e:	a8b1                	j	80008cba <.L50>
+
+80008c60 <.L53>:
+        temp |= config->inten[i] << (ADC12_CONFIG_INTEN0_SHIFT + i * ADC_SOC_CONFIG_INTEN_CHAN_BIT_SIZE)
+80008c60:	4722                	lw	a4,8(sp)
+80008c62:	47e2                	lw	a5,24(sp)
+80008c64:	97ba                	add	a5,a5,a4
+80008c66:	0007c783          	lbu	a5,0(a5)
+80008c6a:	873e                	mv	a4,a5
+80008c6c:	47e2                	lw	a5,24(sp)
+80008c6e:	078e                	sll	a5,a5,0x3
+80008c70:	0795                	add	a5,a5,5
+80008c72:	00f71733          	sll	a4,a4,a5
+             |  config->adc_ch[i] << (ADC12_CONFIG_CHAN0_SHIFT + i * ADC_SOC_CONFIG_INTEN_CHAN_BIT_SIZE);
+80008c76:	46a2                	lw	a3,8(sp)
+80008c78:	47e2                	lw	a5,24(sp)
+80008c7a:	97b6                	add	a5,a5,a3
+80008c7c:	0047c783          	lbu	a5,4(a5)
+80008c80:	86be                	mv	a3,a5
+80008c82:	47e2                	lw	a5,24(sp)
+80008c84:	078e                	sll	a5,a5,0x3
+80008c86:	00f697b3          	sll	a5,a3,a5
+80008c8a:	8fd9                	or	a5,a5,a4
+80008c8c:	873e                	mv	a4,a5
+        temp |= config->inten[i] << (ADC12_CONFIG_INTEN0_SHIFT + i * ADC_SOC_CONFIG_INTEN_CHAN_BIT_SIZE)
+80008c8e:	47f2                	lw	a5,28(sp)
+80008c90:	8fd9                	or	a5,a5,a4
+80008c92:	ce3e                	sw	a5,28(sp)
+    for (int i = 0; i < config->trig_len; i++) {
+80008c94:	47e2                	lw	a5,24(sp)
+80008c96:	0785                	add	a5,a5,1
+80008c98:	cc3e                	sw	a5,24(sp)
+
+80008c9a <.L52>:
+80008c9a:	47a2                	lw	a5,8(sp)
+80008c9c:	0097c783          	lbu	a5,9(a5)
+80008ca0:	873e                	mv	a4,a5
+80008ca2:	47e2                	lw	a5,24(sp)
+80008ca4:	fae7c4e3          	blt	a5,a4,80008c4c <.L54>
+
+80008ca8 <.LBE3>:
+    ptr->CONFIG[config->trig_ch] = temp;
+80008ca8:	47a2                	lw	a5,8(sp)
+80008caa:	0087c783          	lbu	a5,8(a5)
+80008cae:	4732                	lw	a4,12(sp)
+80008cb0:	078a                	sll	a5,a5,0x2
+80008cb2:	97ba                	add	a5,a5,a4
+80008cb4:	4772                	lw	a4,28(sp)
+80008cb6:	c398                	sw	a4,0(a5)
+    return status_success;
+80008cb8:	4781                	li	a5,0
+
+80008cba <.L50>:
+}
+80008cba:	853e                	mv	a0,a5
+80008cbc:	6105                	add	sp,sp,32
+80008cbe:	8082                	ret
+
+Disassembly of section .text.adc12_get_prd_result:
+
+80008cc0 <adc12_get_prd_result>:
+
+hpm_stat_t adc12_get_prd_result(ADC12_Type *ptr, uint8_t ch, uint16_t *result)
+{
+80008cc0:	1141                	add	sp,sp,-16
+80008cc2:	c62a                	sw	a0,12(sp)
+80008cc4:	87ae                	mv	a5,a1
+80008cc6:	c232                	sw	a2,4(sp)
+80008cc8:	00f105a3          	sb	a5,11(sp)
+    /* Check the specified channel number */
+    if (ADC12_IS_CHANNEL_INVALID(ch)) {
+80008ccc:	00b14703          	lbu	a4,11(sp)
+80008cd0:	47c5                	li	a5,17
+80008cd2:	00e7f463          	bgeu	a5,a4,80008cda <.L60>
+        return status_invalid_argument;
+80008cd6:	4789                	li	a5,2
+80008cd8:	a03d                	j	80008d06 <.L61>
+
+80008cda <.L60>:
+    }
+
+    *result = ADC12_PRD_CFG_PRD_RESULT_CHAN_RESULT_GET(ptr->PRD_CFG[ch].PRD_RESULT);
+80008cda:	00b14783          	lbu	a5,11(sp)
+80008cde:	4732                	lw	a4,12(sp)
+80008ce0:	0c078793          	add	a5,a5,192
+80008ce4:	0792                	sll	a5,a5,0x4
+80008ce6:	97ba                	add	a5,a5,a4
+80008ce8:	479c                	lw	a5,8(a5)
+80008cea:	8391                	srl	a5,a5,0x4
+80008cec:	01079713          	sll	a4,a5,0x10
+80008cf0:	8341                	srl	a4,a4,0x10
+80008cf2:	6785                	lui	a5,0x1
+80008cf4:	17fd                	add	a5,a5,-1 # fff <__NOR_CFG_OPTION_segment_size__+0x3ff>
+80008cf6:	8ff9                	and	a5,a5,a4
+80008cf8:	01079713          	sll	a4,a5,0x10
+80008cfc:	8341                	srl	a4,a4,0x10
+80008cfe:	4792                	lw	a5,4(sp)
+80008d00:	00e79023          	sh	a4,0(a5)
+
+    return status_success;
+80008d04:	4781                	li	a5,0
+
+80008d06 <.L61>:
+}
+80008d06:	853e                	mv	a0,a5
+80008d08:	0141                	add	sp,sp,16
+80008d0a:	8082                	ret
+
+Disassembly of section .text.pcfg_dcdc_set_voltage:
+
+80008d0c <pcfg_dcdc_set_voltage>:
+
+    return PCFG_DCDC_CURRENT_LEVEL_GET(ptr->DCDC_CURRENT) * PCFG_CURRENT_MEASUREMENT_STEP;
+}
+
+hpm_stat_t pcfg_dcdc_set_voltage(PCFG_Type *ptr, uint16_t mv)
+{
+80008d0c:	1101                	add	sp,sp,-32
+80008d0e:	c62a                	sw	a0,12(sp)
+80008d10:	87ae                	mv	a5,a1
+80008d12:	00f11523          	sh	a5,10(sp)
+    hpm_stat_t stat = status_success;
+80008d16:	ce02                	sw	zero,28(sp)
+    if ((mv < PCFG_SOC_DCDC_MIN_VOLTAGE_IN_MV) || (mv > PCFG_SOC_DCDC_MAX_VOLTAGE_IN_MV)) {
+80008d18:	00a15703          	lhu	a4,10(sp)
+80008d1c:	25700793          	li	a5,599
+80008d20:	00e7f863          	bgeu	a5,a4,80008d30 <.L26>
+80008d24:	00a15703          	lhu	a4,10(sp)
+80008d28:	55f00793          	li	a5,1375
+80008d2c:	00e7f463          	bgeu	a5,a4,80008d34 <.L27>
+
+80008d30 <.L26>:
+        return status_invalid_argument;
+80008d30:	4789                	li	a5,2
+80008d32:	a831                	j	80008d4e <.L28>
+
+80008d34 <.L27>:
+    }
+    ptr->DCDC_MODE = (ptr->DCDC_MODE & ~PCFG_DCDC_MODE_VOLT_MASK) | PCFG_DCDC_MODE_VOLT_SET(mv);
+80008d34:	47b2                	lw	a5,12(sp)
+80008d36:	4b98                	lw	a4,16(a5)
+80008d38:	77fd                	lui	a5,0xfffff
+80008d3a:	8f7d                	and	a4,a4,a5
+80008d3c:	00a15683          	lhu	a3,10(sp)
+80008d40:	6785                	lui	a5,0x1
+80008d42:	17fd                	add	a5,a5,-1 # fff <__NOR_CFG_OPTION_segment_size__+0x3ff>
+80008d44:	8ff5                	and	a5,a5,a3
+80008d46:	8f5d                	or	a4,a4,a5
+80008d48:	47b2                	lw	a5,12(sp)
+80008d4a:	cb98                	sw	a4,16(a5)
+    return stat;
+80008d4c:	47f2                	lw	a5,28(sp)
+
+80008d4e <.L28>:
+}
+80008d4e:	853e                	mv	a0,a5
+80008d50:	6105                	add	sp,sp,32
+80008d52:	8082                	ret
+
+Disassembly of section .text.console_init:
+
+80008d54 <console_init>:
+{
+80008d54:	7139                	add	sp,sp,-64
+80008d56:	de06                	sw	ra,60(sp)
+80008d58:	c62a                	sw	a0,12(sp)
+    hpm_stat_t stat = status_fail;
+80008d5a:	4785                	li	a5,1
+80008d5c:	d63e                	sw	a5,44(sp)
+    if (cfg->type == CONSOLE_TYPE_UART) {
+80008d5e:	47b2                	lw	a5,12(sp)
+80008d60:	439c                	lw	a5,0(a5)
+80008d62:	e7a1                	bnez	a5,80008daa <.L2>
+
+80008d64 <.LBB2>:
+        uart_config_t config = {0};
+80008d64:	cc02                	sw	zero,24(sp)
+80008d66:	ce02                	sw	zero,28(sp)
+80008d68:	d002                	sw	zero,32(sp)
+80008d6a:	d202                	sw	zero,36(sp)
+80008d6c:	d402                	sw	zero,40(sp)
+        uart_default_config((UART_Type *)cfg->base, &config);
+80008d6e:	47b2                	lw	a5,12(sp)
+80008d70:	43dc                	lw	a5,4(a5)
+80008d72:	873e                	mv	a4,a5
+80008d74:	083c                	add	a5,sp,24
+80008d76:	85be                	mv	a1,a5
+80008d78:	853a                	mv	a0,a4
+80008d7a:	ad5fc0ef          	jal	8000584e <uart_default_config>
+        config.src_freq_in_hz = cfg->src_freq_in_hz;
+80008d7e:	47b2                	lw	a5,12(sp)
+80008d80:	479c                	lw	a5,8(a5)
+80008d82:	cc3e                	sw	a5,24(sp)
+        config.baudrate = cfg->baudrate;
+80008d84:	47b2                	lw	a5,12(sp)
+80008d86:	47dc                	lw	a5,12(a5)
+80008d88:	ce3e                	sw	a5,28(sp)
+        stat = uart_init((UART_Type *)cfg->base, &config);
+80008d8a:	47b2                	lw	a5,12(sp)
+80008d8c:	43dc                	lw	a5,4(a5)
+80008d8e:	873e                	mv	a4,a5
+80008d90:	083c                	add	a5,sp,24
+80008d92:	85be                	mv	a1,a5
+80008d94:	853a                	mv	a0,a4
+80008d96:	cb8ff0ef          	jal	8000824e <uart_init>
+80008d9a:	d62a                	sw	a0,44(sp)
+        if (status_success == stat) {
+80008d9c:	57b2                	lw	a5,44(sp)
+80008d9e:	e791                	bnez	a5,80008daa <.L2>
+            g_console_uart = (UART_Type *)cfg->base;
+80008da0:	47b2                	lw	a5,12(sp)
+80008da2:	43dc                	lw	a5,4(a5)
+80008da4:	873e                	mv	a4,a5
+80008da6:	82e22c23          	sw	a4,-1992(tp) # fffff838 <__APB_SRAM_segment_end__+0xbf0d838>
+
+80008daa <.L2>:
+    return stat;
+80008daa:	57b2                	lw	a5,44(sp)
+}
+80008dac:	853e                	mv	a0,a5
+80008dae:	50f2                	lw	ra,60(sp)
+80008db0:	6121                	add	sp,sp,64
+80008db2:	8082                	ret
+
+Disassembly of section .text.console_try_receive_byte:
+
+80008db4 <console_try_receive_byte>:
+{
+80008db4:	1101                	add	sp,sp,-32
+80008db6:	ce06                	sw	ra,28(sp)
+    uint8_t c = 0;
+80008db8:	000107a3          	sb	zero,15(sp)
+    uart_try_receive_byte(g_console_uart, &c);
+80008dbc:	83822783          	lw	a5,-1992(tp) # fffff838 <__APB_SRAM_segment_end__+0xbf0d838>
+80008dc0:	00f10713          	add	a4,sp,15
+80008dc4:	85ba                	mv	a1,a4
+80008dc6:	853e                	mv	a0,a5
+80008dc8:	e48ff0ef          	jal	80008410 <uart_try_receive_byte>
+    return c;
+80008dcc:	00f14783          	lbu	a5,15(sp)
+}
+80008dd0:	853e                	mv	a0,a5
+80008dd2:	40f2                	lw	ra,28(sp)
+80008dd4:	6105                	add	sp,sp,32
+80008dd6:	8082                	ret
+
+Disassembly of section .text.__SEGGER_RTL_X_file_write:
+
+80008dd8 <__SEGGER_RTL_X_file_write>:
+{
+80008dd8:	7179                	add	sp,sp,-48
+80008dda:	d606                	sw	ra,44(sp)
+80008ddc:	c62a                	sw	a0,12(sp)
+80008dde:	c42e                	sw	a1,8(sp)
+80008de0:	c232                	sw	a2,4(sp)
+    for (count = 0; count < size; count++) {
+80008de2:	ce02                	sw	zero,28(sp)
+80008de4:	a099                	j	80008e2a <.L13>
+
+80008de6 <.L17>:
+        if (data[count] == '\n') {
+80008de6:	4722                	lw	a4,8(sp)
+80008de8:	47f2                	lw	a5,28(sp)
+80008dea:	97ba                	add	a5,a5,a4
+80008dec:	0007c703          	lbu	a4,0(a5)
+80008df0:	47a9                	li	a5,10
+80008df2:	00f71b63          	bne	a4,a5,80008e08 <.L20>
+            while (status_success != uart_send_byte(g_console_uart, '\r')) {
+80008df6:	0001                	nop
+
+80008df8 <.L15>:
+80008df8:	83822783          	lw	a5,-1992(tp) # fffff838 <__APB_SRAM_segment_end__+0xbf0d838>
+80008dfc:	45b5                	li	a1,13
+80008dfe:	853e                	mv	a0,a5
+80008e00:	c63fc0ef          	jal	80005a62 <uart_send_byte>
+80008e04:	87aa                	mv	a5,a0
+80008e06:	fbed                	bnez	a5,80008df8 <.L15>
+
+80008e08 <.L20>:
+        while (status_success != uart_send_byte(g_console_uart, data[count])) {
+80008e08:	0001                	nop
+
+80008e0a <.L16>:
+80008e0a:	83822683          	lw	a3,-1992(tp) # fffff838 <__APB_SRAM_segment_end__+0xbf0d838>
+80008e0e:	4722                	lw	a4,8(sp)
+80008e10:	47f2                	lw	a5,28(sp)
+80008e12:	97ba                	add	a5,a5,a4
+80008e14:	0007c783          	lbu	a5,0(a5)
+80008e18:	85be                	mv	a1,a5
+80008e1a:	8536                	mv	a0,a3
+80008e1c:	c47fc0ef          	jal	80005a62 <uart_send_byte>
+80008e20:	87aa                	mv	a5,a0
+80008e22:	f7e5                	bnez	a5,80008e0a <.L16>
+    for (count = 0; count < size; count++) {
+80008e24:	47f2                	lw	a5,28(sp)
+80008e26:	0785                	add	a5,a5,1
+80008e28:	ce3e                	sw	a5,28(sp)
+
+80008e2a <.L13>:
+80008e2a:	4772                	lw	a4,28(sp)
+80008e2c:	4792                	lw	a5,4(sp)
+80008e2e:	faf76ce3          	bltu	a4,a5,80008de6 <.L17>
+    while (status_success != uart_flush(g_console_uart)) {
+80008e32:	0001                	nop
+
+80008e34 <.L18>:
+80008e34:	83822783          	lw	a5,-1992(tp) # fffff838 <__APB_SRAM_segment_end__+0xbf0d838>
+80008e38:	853e                	mv	a0,a5
+80008e3a:	d96ff0ef          	jal	800083d0 <uart_flush>
+80008e3e:	87aa                	mv	a5,a0
+80008e40:	fbf5                	bnez	a5,80008e34 <.L18>
+    return count;
+80008e42:	47f2                	lw	a5,28(sp)
+}
+80008e44:	853e                	mv	a0,a5
+80008e46:	50b2                	lw	ra,44(sp)
+80008e48:	6145                	add	sp,sp,48
+80008e4a:	8082                	ret
+
+Disassembly of section .text.__SEGGER_RTL_X_file_stat:
+
+80008e4c <__SEGGER_RTL_X_file_stat>:
+
+__attribute__((used)) int __SEGGER_RTL_X_file_stat(__SEGGER_RTL_FILE *stream)
+{
+80008e4c:	1141                	add	sp,sp,-16
+80008e4e:	c62a                	sw	a0,12(sp)
+    (void) stream;
+    return 0;
+80008e50:	4781                	li	a5,0
+}
+80008e52:	853e                	mv	a0,a5
+80008e54:	0141                	add	sp,sp,16
+80008e56:	8082                	ret
+
+Disassembly of section .text.__SEGGER_RTL_X_file_bufsize:
+
+80008e58 <__SEGGER_RTL_X_file_bufsize>:
+
+__attribute__((used)) int __SEGGER_RTL_X_file_bufsize(__SEGGER_RTL_FILE *stream)
+{
+80008e58:	1141                	add	sp,sp,-16
+80008e5a:	c62a                	sw	a0,12(sp)
+    (void) stream;
+    return 1;
+80008e5c:	4785                	li	a5,1
+}
+80008e5e:	853e                	mv	a0,a5
+80008e60:	0141                	add	sp,sp,16
+80008e62:	8082                	ret
+
+Disassembly of section .text.libc.__SEGGER_RTL_puts_no_nl:
+
+80008e64 <__SEGGER_RTL_puts_no_nl>:
+80008e64:	1101                	add	sp,sp,-32
+80008e66:	010817b7          	lui	a5,0x1081
+80008e6a:	cc22                	sw	s0,24(sp)
+80008e6c:	1107a403          	lw	s0,272(a5) # 1081110 <stdout>
+80008e70:	ce06                	sw	ra,28(sp)
+80008e72:	c62a                	sw	a0,12(sp)
+80008e74:	32d000ef          	jal	800099a0 <strlen>
+80008e78:	862a                	mv	a2,a0
+80008e7a:	8522                	mv	a0,s0
+80008e7c:	4462                	lw	s0,24(sp)
+80008e7e:	45b2                	lw	a1,12(sp)
+80008e80:	40f2                	lw	ra,28(sp)
+80008e82:	6105                	add	sp,sp,32
+80008e84:	bf91                	j	80008dd8 <__SEGGER_RTL_X_file_write>
+
+Disassembly of section .text.libc.signal:
+
+80008e86 <signal>:
+80008e86:	4795                	li	a5,5
+80008e88:	02a7e263          	bltu	a5,a0,80008eac <.L18>
+80008e8c:	81420693          	add	a3,tp,-2028 # fffff814 <__APB_SRAM_segment_end__+0xbf0d814>
+80008e90:	00251793          	sll	a5,a0,0x2
+80008e94:	96be                	add	a3,a3,a5
+80008e96:	4288                	lw	a0,0(a3)
+80008e98:	81420713          	add	a4,tp,-2028 # fffff814 <__APB_SRAM_segment_end__+0xbf0d814>
+80008e9c:	e509                	bnez	a0,80008ea6 <.L17>
+80008e9e:	80003537          	lui	a0,0x80003
+80008ea2:	07a50513          	add	a0,a0,122 # 8000307a <__SEGGER_RTL_SIGNAL_SIG_DFL>
+
+80008ea6 <.L17>:
+80008ea6:	973e                	add	a4,a4,a5
+80008ea8:	c30c                	sw	a1,0(a4)
+80008eaa:	8082                	ret
+
+80008eac <.L18>:
+80008eac:	36a18513          	add	a0,gp,874 # 80004372 <__SEGGER_RTL_SIGNAL_SIG_ERR>
+80008eb0:	8082                	ret
+
+Disassembly of section .text.libc.raise:
+
+80008eb2 <raise>:
+80008eb2:	1141                	add	sp,sp,-16
+80008eb4:	c04a                	sw	s2,0(sp)
+80008eb6:	31618593          	add	a1,gp,790 # 8000431e <__SEGGER_RTL_SIGNAL_SIG_IGN>
+80008eba:	c226                	sw	s1,4(sp)
+80008ebc:	c606                	sw	ra,12(sp)
+80008ebe:	c422                	sw	s0,8(sp)
+80008ec0:	84aa                	mv	s1,a0
+80008ec2:	37d1                	jal	80008e86 <signal>
+80008ec4:	36a18793          	add	a5,gp,874 # 80004372 <__SEGGER_RTL_SIGNAL_SIG_ERR>
+80008ec8:	02f50d63          	beq	a0,a5,80008f02 <.L24>
+80008ecc:	31618913          	add	s2,gp,790 # 8000431e <__SEGGER_RTL_SIGNAL_SIG_IGN>
+80008ed0:	842a                	mv	s0,a0
+80008ed2:	03250163          	beq	a0,s2,80008ef4 <.L22>
+80008ed6:	800035b7          	lui	a1,0x80003
+80008eda:	07a58793          	add	a5,a1,122 # 8000307a <__SEGGER_RTL_SIGNAL_SIG_DFL>
+80008ede:	00f51563          	bne	a0,a5,80008ee8 <.L23>
+80008ee2:	4505                	li	a0,1
+80008ee4:	98afa0ef          	jal	8000306e <exit>
+
+80008ee8 <.L23>:
+80008ee8:	07a58593          	add	a1,a1,122
+80008eec:	8526                	mv	a0,s1
+80008eee:	3f61                	jal	80008e86 <signal>
+80008ef0:	8526                	mv	a0,s1
+80008ef2:	9402                	jalr	s0
+
+80008ef4 <.L22>:
+80008ef4:	4501                	li	a0,0
+
+80008ef6 <.L20>:
+80008ef6:	40b2                	lw	ra,12(sp)
+80008ef8:	4422                	lw	s0,8(sp)
+80008efa:	4492                	lw	s1,4(sp)
+80008efc:	4902                	lw	s2,0(sp)
+80008efe:	0141                	add	sp,sp,16
+80008f00:	8082                	ret
+
+80008f02 <.L24>:
+80008f02:	557d                	li	a0,-1
+80008f04:	bfcd                	j	80008ef6 <.L20>
+
+Disassembly of section .text.libc.abort:
+
+80008f06 <abort>:
+80008f06:	1141                	add	sp,sp,-16
+80008f08:	c606                	sw	ra,12(sp)
+
+80008f0a <.L27>:
+80008f0a:	4501                	li	a0,0
+80008f0c:	375d                	jal	80008eb2 <raise>
+80008f0e:	bff5                	j	80008f0a <.L27>
+
+Disassembly of section .text.libc.__SEGGER_RTL_X_assert:
+
+80008f10 <__SEGGER_RTL_X_assert>:
+80008f10:	1101                	add	sp,sp,-32
+80008f12:	cc22                	sw	s0,24(sp)
+80008f14:	ca26                	sw	s1,20(sp)
+80008f16:	842a                	mv	s0,a0
+80008f18:	84ae                	mv	s1,a1
+80008f1a:	8532                	mv	a0,a2
+80008f1c:	858a                	mv	a1,sp
+80008f1e:	4629                	li	a2,10
+80008f20:	ce06                	sw	ra,28(sp)
+80008f22:	c78fd0ef          	jal	8000639a <itoa>
+80008f26:	8526                	mv	a0,s1
+80008f28:	3f35                	jal	80008e64 <__SEGGER_RTL_puts_no_nl>
+80008f2a:	f9418513          	add	a0,gp,-108 # 80003f9c <.LC0>
+80008f2e:	3f1d                	jal	80008e64 <__SEGGER_RTL_puts_no_nl>
+80008f30:	850a                	mv	a0,sp
+80008f32:	3f0d                	jal	80008e64 <__SEGGER_RTL_puts_no_nl>
+80008f34:	f9818513          	add	a0,gp,-104 # 80003fa0 <.LC1>
+80008f38:	3735                	jal	80008e64 <__SEGGER_RTL_puts_no_nl>
+80008f3a:	8522                	mv	a0,s0
+80008f3c:	3725                	jal	80008e64 <__SEGGER_RTL_puts_no_nl>
+80008f3e:	fb018513          	add	a0,gp,-80 # 80003fb8 <.LC2>
+80008f42:	370d                	jal	80008e64 <__SEGGER_RTL_puts_no_nl>
+80008f44:	37c9                	jal	80008f06 <abort>
+
+Disassembly of section .text.libc.fgetc:
+
+80008f46 <fgetc>:
+80008f46:	1101                	add	sp,sp,-32
+80008f48:	4605                	li	a2,1
+80008f4a:	00f10593          	add	a1,sp,15
+80008f4e:	ce06                	sw	ra,28(sp)
+80008f50:	bbafd0ef          	jal	8000630a <__SEGGER_RTL_X_file_read>
+80008f54:	00a05763          	blez	a0,80008f62 <.L4>
+80008f58:	00f14503          	lbu	a0,15(sp)
+
+80008f5c <.L2>:
+80008f5c:	40f2                	lw	ra,28(sp)
+80008f5e:	6105                	add	sp,sp,32
+80008f60:	8082                	ret
+
+80008f62 <.L4>:
+80008f62:	557d                	li	a0,-1
+80008f64:	bfe5                	j	80008f5c <.L2>
+
+Disassembly of section .text.libc.getchar:
+
+80008f66 <getchar>:
+80008f66:	010817b7          	lui	a5,0x1081
+80008f6a:	1147a503          	lw	a0,276(a5) # 1081114 <stdin>
+80008f6e:	bfe1                	j	80008f46 <fgetc>
+
+Disassembly of section .text.libc.__adddf3:
+
+80008f70 <__adddf3>:
+80008f70:	800007b7          	lui	a5,0x80000
+80008f74:	00d5c8b3          	xor	a7,a1,a3
+80008f78:	1008c263          	bltz	a7,8000907c <.L__adddf3_subtract>
+80008f7c:	00b6e863          	bltu	a3,a1,80008f8c <.L__adddf3_add_already_ordered>
+80008f80:	8d31                	xor	a0,a0,a2
+80008f82:	8e29                	xor	a2,a2,a0
+80008f84:	8d31                	xor	a0,a0,a2
+80008f86:	8db5                	xor	a1,a1,a3
+80008f88:	8ead                	xor	a3,a3,a1
+80008f8a:	8db5                	xor	a1,a1,a3
+
+80008f8c <.L__adddf3_add_already_ordered>:
+80008f8c:	00159813          	sll	a6,a1,0x1
+80008f90:	01585813          	srl	a6,a6,0x15
+80008f94:	00169893          	sll	a7,a3,0x1
+80008f98:	0158d893          	srl	a7,a7,0x15
+80008f9c:	0c088063          	beqz	a7,8000905c <.L__adddf3_add_zero>
+80008fa0:	00180713          	add	a4,a6,1
+80008fa4:	0756                	sll	a4,a4,0x15
+80008fa6:	c759                	beqz	a4,80009034 <.L__adddf3_done>
+80008fa8:	41180733          	sub	a4,a6,a7
+80008fac:	03500293          	li	t0,53
+80008fb0:	08e2e263          	bltu	t0,a4,80009034 <.L__adddf3_done>
+80008fb4:	0145d813          	srl	a6,a1,0x14
+80008fb8:	06ae                	sll	a3,a3,0xb
+80008fba:	8edd                	or	a3,a3,a5
+80008fbc:	82ad                	srl	a3,a3,0xb
+80008fbe:	05ae                	sll	a1,a1,0xb
+80008fc0:	8ddd                	or	a1,a1,a5
+80008fc2:	85ad                	sra	a1,a1,0xb
+80008fc4:	02000293          	li	t0,32
+80008fc8:	06577763          	bgeu	a4,t0,80009036 <.L__adddf3_add_shifted_word>
+80008fcc:	4881                	li	a7,0
+80008fce:	cf01                	beqz	a4,80008fe6 <.L__adddf3_add_no_shift>
+80008fd0:	40e002b3          	neg	t0,a4
+80008fd4:	005618b3          	sll	a7,a2,t0
+80008fd8:	00e65633          	srl	a2,a2,a4
+80008fdc:	005692b3          	sll	t0,a3,t0
+80008fe0:	9616                	add	a2,a2,t0
+80008fe2:	00e6d6b3          	srl	a3,a3,a4
+
+80008fe6 <.L__adddf3_add_no_shift>:
+80008fe6:	9532                	add	a0,a0,a2
+80008fe8:	00c532b3          	sltu	t0,a0,a2
+80008fec:	95b6                	add	a1,a1,a3
+80008fee:	00d5b333          	sltu	t1,a1,a3
+80008ff2:	9596                	add	a1,a1,t0
+80008ff4:	00031463          	bnez	t1,80008ffc <.L__adddf3_normalization_required>
+80008ff8:	0255f163          	bgeu	a1,t0,8000901a <.L__adddf3_already_normalized>
+
+80008ffc <.L__adddf3_normalization_required>:
+80008ffc:	00280613          	add	a2,a6,2
+80009000:	0656                	sll	a2,a2,0x15
+80009002:	c235                	beqz	a2,80009066 <.L__adddf3_inf>
+80009004:	01f51613          	sll	a2,a0,0x1f
+80009008:	011032b3          	snez	t0,a7
+8000900c:	005608b3          	add	a7,a2,t0
+80009010:	8105                	srl	a0,a0,0x1
+80009012:	01f59693          	sll	a3,a1,0x1f
+80009016:	8d55                	or	a0,a0,a3
+80009018:	8185                	srl	a1,a1,0x1
+
+8000901a <.L__adddf3_already_normalized>:
+8000901a:	0805                	add	a6,a6,1
+8000901c:	0852                	sll	a6,a6,0x14
+
+8000901e <.L__adddf3_perform_rounding>:
+8000901e:	0008da63          	bgez	a7,80009032 <.L__adddf3_add_no_tie>
+80009022:	0505                	add	a0,a0,1
+80009024:	00153293          	seqz	t0,a0
+80009028:	9596                	add	a1,a1,t0
+8000902a:	0886                	sll	a7,a7,0x1
+8000902c:	00089363          	bnez	a7,80009032 <.L__adddf3_add_no_tie>
+80009030:	9979                	and	a0,a0,-2
+
+80009032 <.L__adddf3_add_no_tie>:
+80009032:	95c2                	add	a1,a1,a6
+
+80009034 <.L__adddf3_done>:
+80009034:	8082                	ret
+
+80009036 <.L__adddf3_add_shifted_word>:
+80009036:	88b2                	mv	a7,a2
+80009038:	1701                	add	a4,a4,-32
+8000903a:	cb11                	beqz	a4,8000904e <.L__adddf3_already_aligned>
+8000903c:	40e008b3          	neg	a7,a4
+80009040:	011698b3          	sll	a7,a3,a7
+80009044:	00e6d6b3          	srl	a3,a3,a4
+80009048:	00c03733          	snez	a4,a2
+8000904c:	98ba                	add	a7,a7,a4
+
+8000904e <.L__adddf3_already_aligned>:
+8000904e:	9536                	add	a0,a0,a3
+80009050:	00d532b3          	sltu	t0,a0,a3
+80009054:	9596                	add	a1,a1,t0
+80009056:	fc55f2e3          	bgeu	a1,t0,8000901a <.L__adddf3_already_normalized>
+8000905a:	b74d                	j	80008ffc <.L__adddf3_normalization_required>
+
+8000905c <.L__adddf3_add_zero>:
+8000905c:	fc081ce3          	bnez	a6,80009034 <.L__adddf3_done>
+80009060:	8dfd                	and	a1,a1,a5
+80009062:	4501                	li	a0,0
+80009064:	bfc1                	j	80009034 <.L__adddf3_done>
+
+80009066 <.L__adddf3_inf>:
+80009066:	0805                	add	a6,a6,1
+80009068:	01481593          	sll	a1,a6,0x14
+8000906c:	4501                	li	a0,0
+8000906e:	b7d9                	j	80009034 <.L__adddf3_done>
+
+80009070 <.L__adddf3_sub_inf_nan>:
+80009070:	fce892e3          	bne	a7,a4,80009034 <.L__adddf3_done>
+80009074:	7ff805b7          	lui	a1,0x7ff80
+80009078:	4501                	li	a0,0
+8000907a:	bf6d                	j	80009034 <.L__adddf3_done>
+
+8000907c <.L__adddf3_subtract>:
+8000907c:	8ebd                	xor	a3,a3,a5
+8000907e:	00b6ed63          	bltu	a3,a1,80009098 <.L__adddf3_sub_already_ordered>
+80009082:	00b69463          	bne	a3,a1,8000908a <.L__adddf3_sub_must_exchange>
+80009086:	00a66963          	bltu	a2,a0,80009098 <.L__adddf3_sub_already_ordered>
+
+8000908a <.L__adddf3_sub_must_exchange>:
+8000908a:	8ebd                	xor	a3,a3,a5
+8000908c:	8d31                	xor	a0,a0,a2
+8000908e:	8e29                	xor	a2,a2,a0
+80009090:	8d31                	xor	a0,a0,a2
+80009092:	8db5                	xor	a1,a1,a3
+80009094:	8ead                	xor	a3,a3,a1
+80009096:	8db5                	xor	a1,a1,a3
+
+80009098 <.L__adddf3_sub_already_ordered>:
+80009098:	00b58833          	add	a6,a1,a1
+8000909c:	00d688b3          	add	a7,a3,a3
+800090a0:	ffe00737          	lui	a4,0xffe00
+800090a4:	fce876e3          	bgeu	a6,a4,80009070 <.L__adddf3_sub_inf_nan>
+800090a8:	01585813          	srl	a6,a6,0x15
+800090ac:	0158d893          	srl	a7,a7,0x15
+800090b0:	0a088f63          	beqz	a7,8000916e <.L__adddf3_subtracting_zero>
+800090b4:	41180733          	sub	a4,a6,a7
+800090b8:	03600293          	li	t0,54
+800090bc:	f6e2ece3          	bltu	t0,a4,80009034 <.L__adddf3_done>
+800090c0:	83c2                	mv	t2,a6
+800090c2:	0145d813          	srl	a6,a1,0x14
+800090c6:	06ae                	sll	a3,a3,0xb
+800090c8:	8edd                	or	a3,a3,a5
+800090ca:	82ad                	srl	a3,a3,0xb
+800090cc:	05ae                	sll	a1,a1,0xb
+800090ce:	8ddd                	or	a1,a1,a5
+800090d0:	81ad                	srl	a1,a1,0xb
+800090d2:	4285                	li	t0,1
+800090d4:	0ae2ef63          	bltu	t0,a4,80009192 <.L__adddf3_sub_align_far>
+800090d8:	00571a63          	bne	a4,t0,800090ec <.L__adddf3_sub_already_aligned>
+800090dc:	01f61713          	sll	a4,a2,0x1f
+800090e0:	8205                	srl	a2,a2,0x1
+800090e2:	01f69893          	sll	a7,a3,0x1f
+800090e6:	01166633          	or	a2,a2,a7
+800090ea:	8285                	srl	a3,a3,0x1
+
+800090ec <.L__adddf3_sub_already_aligned>:
+800090ec:	82aa                	mv	t0,a0
+800090ee:	8d11                	sub	a0,a0,a2
+800090f0:	00a2b2b3          	sltu	t0,t0,a0
+800090f4:	8d95                	sub	a1,a1,a3
+800090f6:	405585b3          	sub	a1,a1,t0
+800090fa:	c711                	beqz	a4,80009106 <.L__adddf3_sub_single_done>
+800090fc:	00153293          	seqz	t0,a0
+80009100:	157d                	add	a0,a0,-1
+80009102:	405585b3          	sub	a1,a1,t0
+
+80009106 <.L__adddf3_sub_single_done>:
+80009106:	c9ad                	beqz	a1,80009178 <.L__adddf3_high_word_cancelled>
+80009108:	00b59293          	sll	t0,a1,0xb
+8000910c:	1202ca63          	bltz	t0,80009240 <.L__adddf3_sub_normalized>
+
+80009110 <.L__adddf3_first_normalization_step>:
+80009110:	000522b3          	sltz	t0,a0
+80009114:	952a                	add	a0,a0,a0
+80009116:	95ae                	add	a1,a1,a1
+80009118:	9596                	add	a1,a1,t0
+8000911a:	837d                	srl	a4,a4,0x1f
+8000911c:	953a                	add	a0,a0,a4
+8000911e:	4705                	li	a4,1
+
+80009120 <.L__adddf3_try_shift_4>:
+80009120:	0115d293          	srl	t0,a1,0x11
+80009124:	00029963          	bnez	t0,80009136 <.L__adddf3_cant_shift_4>
+80009128:	0711                	add	a4,a4,4 # ffe00004 <__APB_SRAM_segment_end__+0xbd0e004>
+8000912a:	0592                	sll	a1,a1,0x4
+8000912c:	01c55293          	srl	t0,a0,0x1c
+80009130:	0512                	sll	a0,a0,0x4
+80009132:	9596                	add	a1,a1,t0
+80009134:	b7f5                	j	80009120 <.L__adddf3_try_shift_4>
+
+80009136 <.L__adddf3_cant_shift_4>:
+80009136:	00b59293          	sll	t0,a1,0xb
+8000913a:	0002cc63          	bltz	t0,80009152 <.L__adddf3_normalized>
+
+8000913e <.L__adddf3_normalize>:
+8000913e:	0705                	add	a4,a4,1
+80009140:	000522b3          	sltz	t0,a0
+80009144:	952a                	add	a0,a0,a0
+80009146:	95ae                	add	a1,a1,a1
+80009148:	9596                	add	a1,a1,t0
+
+8000914a <.L__adddf3_pre_normalize>:
+8000914a:	00b59293          	sll	t0,a1,0xb
+8000914e:	fe02d8e3          	bgez	t0,8000913e <.L__adddf3_normalize>
+
+80009152 <.L__adddf3_normalized>:
+80009152:	861e                	mv	a2,t2
+80009154:	00c77863          	bgeu	a4,a2,80009164 <.L__adddf3_signed_zero>
+80009158:	40e80833          	sub	a6,a6,a4
+8000915c:	187d                	add	a6,a6,-1
+8000915e:	0852                	sll	a6,a6,0x14
+80009160:	95c2                	add	a1,a1,a6
+80009162:	bdc9                	j	80009034 <.L__adddf3_done>
+
+80009164 <.L__adddf3_signed_zero>:
+80009164:	00b85593          	srl	a1,a6,0xb
+80009168:	05fe                	sll	a1,a1,0x1f
+8000916a:	4501                	li	a0,0
+8000916c:	b5e1                	j	80009034 <.L__adddf3_done>
+
+8000916e <.L__adddf3_subtracting_zero>:
+8000916e:	ec0813e3          	bnez	a6,80009034 <.L__adddf3_done>
+80009172:	4501                	li	a0,0
+80009174:	4581                	li	a1,0
+80009176:	bd7d                	j	80009034 <.L__adddf3_done>
+
+80009178 <.L__adddf3_high_word_cancelled>:
+80009178:	00e56633          	or	a2,a0,a4
+8000917c:	ea060ce3          	beqz	a2,80009034 <.L__adddf3_done>
+80009180:	001008b7          	lui	a7,0x100
+80009184:	f91576e3          	bgeu	a0,a7,80009110 <.L__adddf3_first_normalization_step>
+80009188:	85aa                	mv	a1,a0
+8000918a:	853a                	mv	a0,a4
+8000918c:	02000713          	li	a4,32
+80009190:	bf6d                	j	8000914a <.L__adddf3_pre_normalize>
+
+80009192 <.L__adddf3_sub_align_far>:
+80009192:	02000293          	li	t0,32
+80009196:	04574863          	blt	a4,t0,800091e6 <.L__adddf3_aligned_on_top>
+8000919a:	04570263          	beq	a4,t0,800091de <.L__adddf3_word_aligned_on_top>
+8000919e:	1701                	add	a4,a4,-32
+800091a0:	40e002b3          	neg	t0,a4
+800091a4:	00e65333          	srl	t1,a2,a4
+800091a8:	005618b3          	sll	a7,a2,t0
+800091ac:	00569633          	sll	a2,a3,t0
+800091b0:	961a                	add	a2,a2,t1
+800091b2:	00e6d6b3          	srl	a3,a3,a4
+800091b6:	011038b3          	snez	a7,a7
+800091ba:	00c8e8b3          	or	a7,a7,a2
+800091be:	4601                	li	a2,0
+800091c0:	82aa                	mv	t0,a0
+800091c2:	8d15                	sub	a0,a0,a3
+800091c4:	00a2b2b3          	sltu	t0,t0,a0
+800091c8:	405585b3          	sub	a1,a1,t0
+800091cc:	41100733          	neg	a4,a7
+800091d0:	c729                	beqz	a4,8000921a <.L__adddf3_sub_normalize>
+800091d2:	00153293          	seqz	t0,a0
+800091d6:	157d                	add	a0,a0,-1
+800091d8:	405585b3          	sub	a1,a1,t0
+800091dc:	a83d                	j	8000921a <.L__adddf3_sub_normalize>
+
+800091de <.L__adddf3_word_aligned_on_top>:
+800091de:	88b2                	mv	a7,a2
+800091e0:	8636                	mv	a2,a3
+800091e2:	4681                	li	a3,0
+800091e4:	a821                	j	800091fc <.L__adddf3_aligned_subtract>
+
+800091e6 <.L__adddf3_aligned_on_top>:
+800091e6:	40e002b3          	neg	t0,a4
+800091ea:	00e65333          	srl	t1,a2,a4
+800091ee:	005618b3          	sll	a7,a2,t0
+800091f2:	00569633          	sll	a2,a3,t0
+800091f6:	961a                	add	a2,a2,t1
+800091f8:	00e6d6b3          	srl	a3,a3,a4
+
+800091fc <.L__adddf3_aligned_subtract>:
+800091fc:	82aa                	mv	t0,a0
+800091fe:	8d11                	sub	a0,a0,a2
+80009200:	00a2b2b3          	sltu	t0,t0,a0
+80009204:	8d95                	sub	a1,a1,a3
+80009206:	405585b3          	sub	a1,a1,t0
+8000920a:	41100733          	neg	a4,a7
+8000920e:	c711                	beqz	a4,8000921a <.L__adddf3_sub_normalize>
+80009210:	00153293          	seqz	t0,a0
+80009214:	157d                	add	a0,a0,-1
+80009216:	405585b3          	sub	a1,a1,t0
+
+8000921a <.L__adddf3_sub_normalize>:
+8000921a:	00c59893          	sll	a7,a1,0xc
+8000921e:	00b59293          	sll	t0,a1,0xb
+80009222:	0002cf63          	bltz	t0,80009240 <.L__adddf3_sub_normalized>
+80009226:	187d                	add	a6,a6,-1
+80009228:	000522b3          	sltz	t0,a0
+8000922c:	952a                	add	a0,a0,a0
+8000922e:	95ae                	add	a1,a1,a1
+80009230:	9596                	add	a1,a1,t0
+80009232:	000722b3          	sltz	t0,a4
+80009236:	973a                	add	a4,a4,a4
+80009238:	9516                	add	a0,a0,t0
+8000923a:	005532b3          	sltu	t0,a0,t0
+8000923e:	9596                	add	a1,a1,t0
+
+80009240 <.L__adddf3_sub_normalized>:
+80009240:	187d                	add	a6,a6,-1
+80009242:	0852                	sll	a6,a6,0x14
+80009244:	88ba                	mv	a7,a4
+80009246:	bbe1                	j	8000901e <.L__adddf3_perform_rounding>
+
+Disassembly of section .text.libc.__mulsf3:
+
+80009248 <__mulsf3>:
+80009248:	80000737          	lui	a4,0x80000
+8000924c:	0ff00293          	li	t0,255
+80009250:	00b547b3          	xor	a5,a0,a1
+80009254:	8ff9                	and	a5,a5,a4
+80009256:	00151613          	sll	a2,a0,0x1
+8000925a:	8261                	srl	a2,a2,0x18
+8000925c:	00159693          	sll	a3,a1,0x1
+80009260:	82e1                	srl	a3,a3,0x18
+80009262:	ce29                	beqz	a2,800092bc <.L__mulsf3_lhs_zero_or_subnormal>
+80009264:	c6bd                	beqz	a3,800092d2 <.L__mulsf3_rhs_zero_or_subnormal>
+80009266:	04560f63          	beq	a2,t0,800092c4 <.L__mulsf3_lhs_inf_or_nan>
+8000926a:	06568963          	beq	a3,t0,800092dc <.L__mulsf3_rhs_inf_or_nan>
+8000926e:	9636                	add	a2,a2,a3
+80009270:	0522                	sll	a0,a0,0x8
+80009272:	8d59                	or	a0,a0,a4
+80009274:	05a2                	sll	a1,a1,0x8
+80009276:	8dd9                	or	a1,a1,a4
+80009278:	02b506b3          	mul	a3,a0,a1
+8000927c:	02b53533          	mulhu	a0,a0,a1
+80009280:	00d036b3          	snez	a3,a3
+80009284:	8d55                	or	a0,a0,a3
+80009286:	00054463          	bltz	a0,8000928e <.L__mulsf3_normalized>
+8000928a:	0506                	sll	a0,a0,0x1
+8000928c:	167d                	add	a2,a2,-1
+
+8000928e <.L__mulsf3_normalized>:
+8000928e:	f8160613          	add	a2,a2,-127
+80009292:	04064863          	bltz	a2,800092e2 <.L__mulsf3_zero_or_underflow>
+80009296:	12fd                	add	t0,t0,-1 # ffffffff <__APB_SRAM_segment_end__+0xbf0dfff>
+80009298:	00565f63          	bge	a2,t0,800092b6 <.L__mulsf3_inf>
+8000929c:	01851693          	sll	a3,a0,0x18
+800092a0:	8121                	srl	a0,a0,0x8
+800092a2:	065e                	sll	a2,a2,0x17
+800092a4:	9532                	add	a0,a0,a2
+800092a6:	0006d663          	bgez	a3,800092b2 <.L__mulsf3_apply_sign>
+800092aa:	0505                	add	a0,a0,1
+800092ac:	0686                	sll	a3,a3,0x1
+800092ae:	e291                	bnez	a3,800092b2 <.L__mulsf3_apply_sign>
+800092b0:	9979                	and	a0,a0,-2
+
+800092b2 <.L__mulsf3_apply_sign>:
+800092b2:	8d5d                	or	a0,a0,a5
+800092b4:	8082                	ret
+
+800092b6 <.L__mulsf3_inf>:
+800092b6:	7f800537          	lui	a0,0x7f800
+800092ba:	bfe5                	j	800092b2 <.L__mulsf3_apply_sign>
+
+800092bc <.L__mulsf3_lhs_zero_or_subnormal>:
+800092bc:	00568d63          	beq	a3,t0,800092d6 <.L__mulsf3_nan>
+
+800092c0 <.L__mulsf3_signed_zero>:
+800092c0:	853e                	mv	a0,a5
+800092c2:	8082                	ret
+
+800092c4 <.L__mulsf3_lhs_inf_or_nan>:
+800092c4:	0526                	sll	a0,a0,0x9
+800092c6:	e901                	bnez	a0,800092d6 <.L__mulsf3_nan>
+800092c8:	fe5697e3          	bne	a3,t0,800092b6 <.L__mulsf3_inf>
+800092cc:	05a6                	sll	a1,a1,0x9
+800092ce:	e581                	bnez	a1,800092d6 <.L__mulsf3_nan>
+800092d0:	b7dd                	j	800092b6 <.L__mulsf3_inf>
+
+800092d2 <.L__mulsf3_rhs_zero_or_subnormal>:
+800092d2:	fe5617e3          	bne	a2,t0,800092c0 <.L__mulsf3_signed_zero>
+
+800092d6 <.L__mulsf3_nan>:
+800092d6:	7fc00537          	lui	a0,0x7fc00
+800092da:	8082                	ret
+
+800092dc <.L__mulsf3_rhs_inf_or_nan>:
+800092dc:	05a6                	sll	a1,a1,0x9
+800092de:	fde5                	bnez	a1,800092d6 <.L__mulsf3_nan>
+800092e0:	bfd9                	j	800092b6 <.L__mulsf3_inf>
+
+800092e2 <.L__mulsf3_zero_or_underflow>:
+800092e2:	0605                	add	a2,a2,1
+800092e4:	fe71                	bnez	a2,800092c0 <.L__mulsf3_signed_zero>
+800092e6:	8521                	sra	a0,a0,0x8
+800092e8:	00150293          	add	t0,a0,1 # 7fc00001 <_extram_size+0x7dc00001>
+800092ec:	0509                	add	a0,a0,2
+800092ee:	fc0299e3          	bnez	t0,800092c0 <.L__mulsf3_signed_zero>
+800092f2:	00800537          	lui	a0,0x800
+800092f6:	bf75                	j	800092b2 <.L__mulsf3_apply_sign>
+
+Disassembly of section .text.libc.__muldf3:
+
+800092f8 <__muldf3>:
+800092f8:	800008b7          	lui	a7,0x80000
+800092fc:	00d5c833          	xor	a6,a1,a3
+80009300:	01187eb3          	and	t4,a6,a7
+80009304:	00b58733          	add	a4,a1,a1
+80009308:	00d687b3          	add	a5,a3,a3
+8000930c:	ffe00837          	lui	a6,0xffe00
+80009310:	0d077363          	bgeu	a4,a6,800093d6 <.L__muldf3_lhs_nan_or_inf>
+80009314:	0d07ff63          	bgeu	a5,a6,800093f2 <.L__muldf3_rhs_nan_or_inf>
+80009318:	8355                	srl	a4,a4,0x15
+8000931a:	c76d                	beqz	a4,80009404 <.L__muldf3_signed_zero>
+8000931c:	83d5                	srl	a5,a5,0x15
+8000931e:	c3fd                	beqz	a5,80009404 <.L__muldf3_signed_zero>
+80009320:	06ae                	sll	a3,a3,0xb
+80009322:	0116e6b3          	or	a3,a3,a7
+80009326:	82ad                	srl	a3,a3,0xb
+80009328:	05ae                	sll	a1,a1,0xb
+8000932a:	0115e5b3          	or	a1,a1,a7
+8000932e:	01555813          	srl	a6,a0,0x15
+80009332:	052e                	sll	a0,a0,0xb
+80009334:	010582b3          	add	t0,a1,a6
+80009338:	00f70333          	add	t1,a4,a5
+8000933c:	02c50733          	mul	a4,a0,a2
+80009340:	02c537b3          	mulhu	a5,a0,a2
+80009344:	02d50833          	mul	a6,a0,a3
+80009348:	02d538b3          	mulhu	a7,a0,a3
+8000934c:	983e                	add	a6,a6,a5
+8000934e:	00f837b3          	sltu	a5,a6,a5
+80009352:	98be                	add	a7,a7,a5
+80009354:	02c28533          	mul	a0,t0,a2
+80009358:	02c2b5b3          	mulhu	a1,t0,a2
+8000935c:	982a                	add	a6,a6,a0
+8000935e:	00a83533          	sltu	a0,a6,a0
+80009362:	98ae                	add	a7,a7,a1
+80009364:	00b8b5b3          	sltu	a1,a7,a1
+80009368:	98aa                	add	a7,a7,a0
+8000936a:	00a8b533          	sltu	a0,a7,a0
+8000936e:	00b50633          	add	a2,a0,a1
+80009372:	02d28533          	mul	a0,t0,a3
+80009376:	02d2b5b3          	mulhu	a1,t0,a3
+8000937a:	9546                	add	a0,a0,a7
+8000937c:	011538b3          	sltu	a7,a0,a7
+80009380:	95c6                	add	a1,a1,a7
+80009382:	95b2                	add	a1,a1,a2
+80009384:	00e03733          	snez	a4,a4
+80009388:	00e86833          	or	a6,a6,a4
+8000938c:	871a                	mv	a4,t1
+8000938e:	00b59293          	sll	t0,a1,0xb
+80009392:	0002cc63          	bltz	t0,800093aa <.L__muldf3_normalized>
+80009396:	000822b3          	sltz	t0,a6
+8000939a:	9842                	add	a6,a6,a6
+8000939c:	00052333          	sltz	t1,a0
+800093a0:	952a                	add	a0,a0,a0
+800093a2:	9516                	add	a0,a0,t0
+800093a4:	95ae                	add	a1,a1,a1
+800093a6:	959a                	add	a1,a1,t1
+800093a8:	177d                	add	a4,a4,-1 # 7fffffff <_extram_size+0x7dffffff>
+
+800093aa <.L__muldf3_normalized>:
+800093aa:	3ff00793          	li	a5,1023
+800093ae:	8f1d                	sub	a4,a4,a5
+800093b0:	04074a63          	bltz	a4,80009404 <.L__muldf3_signed_zero>
+800093b4:	0786                	sll	a5,a5,0x1
+800093b6:	04f75363          	bge	a4,a5,800093fc <.L__muldf3_inf>
+800093ba:	0752                	sll	a4,a4,0x14
+800093bc:	95ba                	add	a1,a1,a4
+800093be:	00085a63          	bgez	a6,800093d2 <.L__muldf3_apply_sign>
+800093c2:	0505                	add	a0,a0,1 # 800001 <__DLM_segment_end__+0x740001>
+800093c4:	00153613          	seqz	a2,a0
+800093c8:	95b2                	add	a1,a1,a2
+800093ca:	0806                	sll	a6,a6,0x1
+800093cc:	00081363          	bnez	a6,800093d2 <.L__muldf3_apply_sign>
+800093d0:	9979                	and	a0,a0,-2
+
+800093d2 <.L__muldf3_apply_sign>:
+800093d2:	95f6                	add	a1,a1,t4
+800093d4:	8082                	ret
+
+800093d6 <.L__muldf3_lhs_nan_or_inf>:
+800093d6:	01071a63          	bne	a4,a6,800093ea <.L__muldf3_nan>
+800093da:	e901                	bnez	a0,800093ea <.L__muldf3_nan>
+800093dc:	00f86763          	bltu	a6,a5,800093ea <.L__muldf3_nan>
+800093e0:	0107e363          	bltu	a5,a6,800093e6 <.L__muldf3_rhs_could_be_zero>
+800093e4:	e219                	bnez	a2,800093ea <.L__muldf3_nan>
+
+800093e6 <.L__muldf3_rhs_could_be_zero>:
+800093e6:	83d5                	srl	a5,a5,0x15
+800093e8:	eb91                	bnez	a5,800093fc <.L__muldf3_inf>
+
+800093ea <.L__muldf3_nan>:
+800093ea:	7ff805b7          	lui	a1,0x7ff80
+
+800093ee <.L__muldf3_load_zero_lo>:
+800093ee:	4501                	li	a0,0
+800093f0:	8082                	ret
+
+800093f2 <.L__muldf3_rhs_nan_or_inf>:
+800093f2:	ff079ce3          	bne	a5,a6,800093ea <.L__muldf3_nan>
+800093f6:	fa75                	bnez	a2,800093ea <.L__muldf3_nan>
+800093f8:	8355                	srl	a4,a4,0x15
+800093fa:	db65                	beqz	a4,800093ea <.L__muldf3_nan>
+
+800093fc <.L__muldf3_inf>:
+800093fc:	7ff005b7          	lui	a1,0x7ff00
+80009400:	4501                	li	a0,0
+80009402:	bfc1                	j	800093d2 <.L__muldf3_apply_sign>
+
+80009404 <.L__muldf3_signed_zero>:
+80009404:	85f6                	mv	a1,t4
+80009406:	b7e5                	j	800093ee <.L__muldf3_load_zero_lo>
+
+Disassembly of section .text.libc.__divsf3:
+
+80009408 <__divsf3>:
+80009408:	0ff00293          	li	t0,255
+8000940c:	00151713          	sll	a4,a0,0x1
+80009410:	8361                	srl	a4,a4,0x18
+80009412:	00159793          	sll	a5,a1,0x1
+80009416:	83e1                	srl	a5,a5,0x18
+80009418:	00b54333          	xor	t1,a0,a1
+8000941c:	01f35313          	srl	t1,t1,0x1f
+80009420:	037e                	sll	t1,t1,0x1f
+80009422:	cf5d                	beqz	a4,800094e0 <.L__divsf3_lhs_zero_or_subnormal>
+80009424:	cbf9                	beqz	a5,800094fa <.L__divsf3_rhs_zero_or_subnormal>
+80009426:	0c570563          	beq	a4,t0,800094f0 <.L__divsf3_lhs_inf_or_nan>
+8000942a:	0c578d63          	beq	a5,t0,80009504 <.L__divsf3_rhs_inf_or_nan>
+8000942e:	8f1d                	sub	a4,a4,a5
+80009430:	800032b7          	lui	t0,0x80003
+80009434:	2e028293          	add	t0,t0,736 # 800032e0 <__SEGGER_RTL_fdiv_reciprocal_table>
+80009438:	00f5d693          	srl	a3,a1,0xf
+8000943c:	0fc6f693          	and	a3,a3,252
+80009440:	9696                	add	a3,a3,t0
+80009442:	429c                	lw	a5,0(a3)
+80009444:	4187d613          	sra	a2,a5,0x18
+80009448:	00f59693          	sll	a3,a1,0xf
+8000944c:	82e1                	srl	a3,a3,0x18
+8000944e:	0016f293          	and	t0,a3,1
+80009452:	8285                	srl	a3,a3,0x1
+80009454:	fc068693          	add	a3,a3,-64
+80009458:	9696                	add	a3,a3,t0
+8000945a:	02d60633          	mul	a2,a2,a3
+8000945e:	07a2                	sll	a5,a5,0x8
+80009460:	83a1                	srl	a5,a5,0x8
+80009462:	963e                	add	a2,a2,a5
+80009464:	05a2                	sll	a1,a1,0x8
+80009466:	81a1                	srl	a1,a1,0x8
+80009468:	008007b7          	lui	a5,0x800
+8000946c:	8ddd                	or	a1,a1,a5
+8000946e:	02c586b3          	mul	a3,a1,a2
+80009472:	0522                	sll	a0,a0,0x8
+80009474:	8121                	srl	a0,a0,0x8
+80009476:	8d5d                	or	a0,a0,a5
+80009478:	02c697b3          	mulh	a5,a3,a2
+8000947c:	00b532b3          	sltu	t0,a0,a1
+80009480:	00551533          	sll	a0,a0,t0
+80009484:	40570733          	sub	a4,a4,t0
+80009488:	01465693          	srl	a3,a2,0x14
+8000948c:	8a85                	and	a3,a3,1
+8000948e:	0016c693          	xor	a3,a3,1
+80009492:	062e                	sll	a2,a2,0xb
+80009494:	8e1d                	sub	a2,a2,a5
+80009496:	8e15                	sub	a2,a2,a3
+80009498:	050a                	sll	a0,a0,0x2
+8000949a:	02a617b3          	mulh	a5,a2,a0
+8000949e:	07e70613          	add	a2,a4,126
+800094a2:	055a                	sll	a0,a0,0x16
+800094a4:	8d0d                	sub	a0,a0,a1
+800094a6:	02b786b3          	mul	a3,a5,a1
+800094aa:	0fe00293          	li	t0,254
+800094ae:	00567f63          	bgeu	a2,t0,800094cc <.L__divsf3_underflow_or_overflow>
+800094b2:	40a68533          	sub	a0,a3,a0
+800094b6:	000522b3          	sltz	t0,a0
+800094ba:	9796                	add	a5,a5,t0
+800094bc:	0017f513          	and	a0,a5,1
+800094c0:	8385                	srl	a5,a5,0x1
+800094c2:	953e                	add	a0,a0,a5
+800094c4:	065e                	sll	a2,a2,0x17
+800094c6:	9532                	add	a0,a0,a2
+800094c8:	951a                	add	a0,a0,t1
+800094ca:	8082                	ret
+
+800094cc <.L__divsf3_underflow_or_overflow>:
+800094cc:	851a                	mv	a0,t1
+800094ce:	00564563          	blt	a2,t0,800094d8 <.L__divsf3_done>
+800094d2:	7f800337          	lui	t1,0x7f800
+
+800094d6 <.L__divsf3_apply_sign>:
+800094d6:	951a                	add	a0,a0,t1
+
+800094d8 <.L__divsf3_done>:
+800094d8:	8082                	ret
+
+800094da <.L__divsf3_inf>:
+800094da:	7f800537          	lui	a0,0x7f800
+800094de:	bfe5                	j	800094d6 <.L__divsf3_apply_sign>
+
+800094e0 <.L__divsf3_lhs_zero_or_subnormal>:
+800094e0:	c789                	beqz	a5,800094ea <.L__divsf3_nan>
+800094e2:	02579363          	bne	a5,t0,80009508 <.L__divsf3_signed_zero>
+800094e6:	05a6                	sll	a1,a1,0x9
+800094e8:	c185                	beqz	a1,80009508 <.L__divsf3_signed_zero>
+
+800094ea <.L__divsf3_nan>:
+800094ea:	7fc00537          	lui	a0,0x7fc00
+800094ee:	8082                	ret
+
+800094f0 <.L__divsf3_lhs_inf_or_nan>:
+800094f0:	0526                	sll	a0,a0,0x9
+800094f2:	fd65                	bnez	a0,800094ea <.L__divsf3_nan>
+800094f4:	fe5793e3          	bne	a5,t0,800094da <.L__divsf3_inf>
+800094f8:	bfcd                	j	800094ea <.L__divsf3_nan>
+
+800094fa <.L__divsf3_rhs_zero_or_subnormal>:
+800094fa:	fe5710e3          	bne	a4,t0,800094da <.L__divsf3_inf>
+800094fe:	0526                	sll	a0,a0,0x9
+80009500:	f56d                	bnez	a0,800094ea <.L__divsf3_nan>
+80009502:	bfe1                	j	800094da <.L__divsf3_inf>
+
+80009504 <.L__divsf3_rhs_inf_or_nan>:
+80009504:	05a6                	sll	a1,a1,0x9
+80009506:	f1f5                	bnez	a1,800094ea <.L__divsf3_nan>
+
+80009508 <.L__divsf3_signed_zero>:
+80009508:	851a                	mv	a0,t1
+8000950a:	8082                	ret
+
+Disassembly of section .text.libc.__divdf3:
+
+8000950c <__divdf3>:
+8000950c:	00169813          	sll	a6,a3,0x1
+80009510:	01585813          	srl	a6,a6,0x15
+80009514:	00159893          	sll	a7,a1,0x1
+80009518:	0158d893          	srl	a7,a7,0x15
+8000951c:	00d5c3b3          	xor	t2,a1,a3
+80009520:	01f3d393          	srl	t2,t2,0x1f
+80009524:	03fe                	sll	t2,t2,0x1f
+80009526:	7ff00293          	li	t0,2047
+8000952a:	16588e63          	beq	a7,t0,800096a6 <.L__divdf3_inf_nan_over>
+8000952e:	18080a63          	beqz	a6,800096c2 <.L__divdf3_div_zero>
+80009532:	18580263          	beq	a6,t0,800096b6 <.L__divdf3_div_inf_nan>
+80009536:	18088263          	beqz	a7,800096ba <.L__divdf3_signed_zero>
+8000953a:	410888b3          	sub	a7,a7,a6
+8000953e:	3ff88893          	add	a7,a7,1023 # 800003ff <_extram_size+0x7e0003ff>
+80009542:	05b2                	sll	a1,a1,0xc
+80009544:	81b1                	srl	a1,a1,0xc
+80009546:	06b2                	sll	a3,a3,0xc
+80009548:	82b1                	srl	a3,a3,0xc
+8000954a:	00100737          	lui	a4,0x100
+8000954e:	8dd9                	or	a1,a1,a4
+80009550:	8ed9                	or	a3,a3,a4
+80009552:	00c53733          	sltu	a4,a0,a2
+80009556:	9736                	add	a4,a4,a3
+80009558:	8d99                	sub	a1,a1,a4
+8000955a:	8d11                	sub	a0,a0,a2
+8000955c:	0005dd63          	bgez	a1,80009576 <.L__divdf3_can_subtract>
+80009560:	00052733          	sltz	a4,a0
+80009564:	95ae                	add	a1,a1,a1
+80009566:	95ba                	add	a1,a1,a4
+80009568:	95b6                	add	a1,a1,a3
+8000956a:	952a                	add	a0,a0,a0
+8000956c:	9532                	add	a0,a0,a2
+8000956e:	00c53733          	sltu	a4,a0,a2
+80009572:	95ba                	add	a1,a1,a4
+80009574:	18fd                	add	a7,a7,-1
+
+80009576 <.L__divdf3_can_subtract>:
+80009576:	1258dd63          	bge	a7,t0,800096b0 <.L__divdf3_signed_inf>
+8000957a:	15105063          	blez	a7,800096ba <.L__divdf3_signed_zero>
+8000957e:	05aa                	sll	a1,a1,0xa
+80009580:	01655713          	srl	a4,a0,0x16
+80009584:	8dd9                	or	a1,a1,a4
+80009586:	052a                	sll	a0,a0,0xa
+80009588:	02d5d833          	divu	a6,a1,a3
+8000958c:	02d80e33          	mul	t3,a6,a3
+80009590:	41c585b3          	sub	a1,a1,t3
+80009594:	02c80733          	mul	a4,a6,a2
+80009598:	02c837b3          	mulhu	a5,a6,a2
+8000959c:	00e53e33          	sltu	t3,a0,a4
+800095a0:	97f2                	add	a5,a5,t3
+800095a2:	8d19                	sub	a0,a0,a4
+800095a4:	8d9d                	sub	a1,a1,a5
+800095a6:	0005d863          	bgez	a1,800095b6 <.L__divdf3_qdash_correct_1>
+800095aa:	187d                	add	a6,a6,-1 # ffdfffff <__APB_SRAM_segment_end__+0xbd0dfff>
+800095ac:	9532                	add	a0,a0,a2
+800095ae:	95b6                	add	a1,a1,a3
+800095b0:	00c532b3          	sltu	t0,a0,a2
+800095b4:	9596                	add	a1,a1,t0
+
+800095b6 <.L__divdf3_qdash_correct_1>:
+800095b6:	05aa                	sll	a1,a1,0xa
+800095b8:	01655293          	srl	t0,a0,0x16
+800095bc:	9596                	add	a1,a1,t0
+800095be:	052a                	sll	a0,a0,0xa
+800095c0:	02d5d2b3          	divu	t0,a1,a3
+800095c4:	02d28733          	mul	a4,t0,a3
+800095c8:	8d99                	sub	a1,a1,a4
+800095ca:	02c28733          	mul	a4,t0,a2
+800095ce:	02c2b7b3          	mulhu	a5,t0,a2
+800095d2:	00e53e33          	sltu	t3,a0,a4
+800095d6:	97f2                	add	a5,a5,t3
+800095d8:	8d19                	sub	a0,a0,a4
+800095da:	8d9d                	sub	a1,a1,a5
+800095dc:	0005d863          	bgez	a1,800095ec <.L__divdf3_qdash_correct_2>
+800095e0:	12fd                	add	t0,t0,-1
+800095e2:	9532                	add	a0,a0,a2
+800095e4:	95b6                	add	a1,a1,a3
+800095e6:	00c53e33          	sltu	t3,a0,a2
+800095ea:	95f2                	add	a1,a1,t3
+
+800095ec <.L__divdf3_qdash_correct_2>:
+800095ec:	082a                	sll	a6,a6,0xa
+800095ee:	9816                	add	a6,a6,t0
+800095f0:	05ae                	sll	a1,a1,0xb
+800095f2:	01555e13          	srl	t3,a0,0x15
+800095f6:	95f2                	add	a1,a1,t3
+800095f8:	052e                	sll	a0,a0,0xb
+800095fa:	02d5d2b3          	divu	t0,a1,a3
+800095fe:	02d28733          	mul	a4,t0,a3
+80009602:	8d99                	sub	a1,a1,a4
+80009604:	02c28733          	mul	a4,t0,a2
+80009608:	02c2b7b3          	mulhu	a5,t0,a2
+8000960c:	00e53e33          	sltu	t3,a0,a4
+80009610:	97f2                	add	a5,a5,t3
+80009612:	8d19                	sub	a0,a0,a4
+80009614:	8d9d                	sub	a1,a1,a5
+80009616:	0005d863          	bgez	a1,80009626 <.L__divdf3_qdash_correct_3>
+8000961a:	12fd                	add	t0,t0,-1
+8000961c:	9532                	add	a0,a0,a2
+8000961e:	95b6                	add	a1,a1,a3
+80009620:	00c53e33          	sltu	t3,a0,a2
+80009624:	95f2                	add	a1,a1,t3
+
+80009626 <.L__divdf3_qdash_correct_3>:
+80009626:	05ae                	sll	a1,a1,0xb
+80009628:	01555e13          	srl	t3,a0,0x15
+8000962c:	95f2                	add	a1,a1,t3
+8000962e:	052e                	sll	a0,a0,0xb
+80009630:	02d5d333          	divu	t1,a1,a3
+80009634:	02d30733          	mul	a4,t1,a3
+80009638:	8d99                	sub	a1,a1,a4
+8000963a:	02c30733          	mul	a4,t1,a2
+8000963e:	02c337b3          	mulhu	a5,t1,a2
+80009642:	00e53e33          	sltu	t3,a0,a4
+80009646:	97f2                	add	a5,a5,t3
+80009648:	8d19                	sub	a0,a0,a4
+8000964a:	8d9d                	sub	a1,a1,a5
+8000964c:	0005d863          	bgez	a1,8000965c <.L__divdf3_qdash_correct_4>
+80009650:	137d                	add	t1,t1,-1 # 7f7fffff <_extram_size+0x7d7fffff>
+80009652:	9532                	add	a0,a0,a2
+80009654:	95b6                	add	a1,a1,a3
+80009656:	00c53e33          	sltu	t3,a0,a2
+8000965a:	95f2                	add	a1,a1,t3
+
+8000965c <.L__divdf3_qdash_correct_4>:
+8000965c:	02d6                	sll	t0,t0,0x15
+8000965e:	032a                	sll	t1,t1,0xa
+80009660:	929a                	add	t0,t0,t1
+80009662:	05ae                	sll	a1,a1,0xb
+80009664:	01555e13          	srl	t3,a0,0x15
+80009668:	95f2                	add	a1,a1,t3
+8000966a:	052e                	sll	a0,a0,0xb
+8000966c:	02d5d333          	divu	t1,a1,a3
+80009670:	02d30733          	mul	a4,t1,a3
+80009674:	8d99                	sub	a1,a1,a4
+80009676:	02c30733          	mul	a4,t1,a2
+8000967a:	02c337b3          	mulhu	a5,t1,a2
+8000967e:	00e53e33          	sltu	t3,a0,a4
+80009682:	97f2                	add	a5,a5,t3
+80009684:	8d9d                	sub	a1,a1,a5
+80009686:	85fd                	sra	a1,a1,0x1f
+80009688:	932e                	add	t1,t1,a1
+8000968a:	08d2                	sll	a7,a7,0x14
+8000968c:	011805b3          	add	a1,a6,a7
+80009690:	00135513          	srl	a0,t1,0x1
+80009694:	9516                	add	a0,a0,t0
+80009696:	00137313          	and	t1,t1,1
+8000969a:	951a                	add	a0,a0,t1
+8000969c:	00653733          	sltu	a4,a0,t1
+800096a0:	95ba                	add	a1,a1,a4
+800096a2:	959e                	add	a1,a1,t2
+800096a4:	8082                	ret
+
+800096a6 <.L__divdf3_inf_nan_over>:
+800096a6:	05b2                	sll	a1,a1,0xc
+800096a8:	00580f63          	beq	a6,t0,800096c6 <.L__divdf3_return_nan>
+800096ac:	8dc9                	or	a1,a1,a0
+800096ae:	ed81                	bnez	a1,800096c6 <.L__divdf3_return_nan>
+
+800096b0 <.L__divdf3_signed_inf>:
+800096b0:	7ff005b7          	lui	a1,0x7ff00
+800096b4:	a021                	j	800096bc <.L__divdf3_apply_sign>
+
+800096b6 <.L__divdf3_div_inf_nan>:
+800096b6:	06b2                	sll	a3,a3,0xc
+800096b8:	e699                	bnez	a3,800096c6 <.L__divdf3_return_nan>
+
+800096ba <.L__divdf3_signed_zero>:
+800096ba:	4581                	li	a1,0
+
+800096bc <.L__divdf3_apply_sign>:
+800096bc:	959e                	add	a1,a1,t2
+
+800096be <.L__divdf3_clr_low_ret>:
+800096be:	4501                	li	a0,0
+800096c0:	8082                	ret
+
+800096c2 <.L__divdf3_div_zero>:
+800096c2:	fe0897e3          	bnez	a7,800096b0 <.L__divdf3_signed_inf>
+
+800096c6 <.L__divdf3_return_nan>:
+800096c6:	7ff805b7          	lui	a1,0x7ff80
+800096ca:	bfd5                	j	800096be <.L__divdf3_clr_low_ret>
+
+Disassembly of section .text.libc.__eqsf2:
+
+800096cc <__eqsf2>:
+800096cc:	ff000637          	lui	a2,0xff000
+800096d0:	00151693          	sll	a3,a0,0x1
+800096d4:	02d66063          	bltu	a2,a3,800096f4 <.L__eqsf2_one>
+800096d8:	00159693          	sll	a3,a1,0x1
+800096dc:	00d66c63          	bltu	a2,a3,800096f4 <.L__eqsf2_one>
+800096e0:	00b56633          	or	a2,a0,a1
+800096e4:	0606                	sll	a2,a2,0x1
+800096e6:	c609                	beqz	a2,800096f0 <.L__eqsf2_zero>
+800096e8:	8d0d                	sub	a0,a0,a1
+800096ea:	00a03533          	snez	a0,a0
+800096ee:	8082                	ret
+
+800096f0 <.L__eqsf2_zero>:
+800096f0:	4501                	li	a0,0
+800096f2:	8082                	ret
+
+800096f4 <.L__eqsf2_one>:
+800096f4:	4505                	li	a0,1
+800096f6:	8082                	ret
+
+Disassembly of section .text.libc.__fixunssfdi:
+
+800096f8 <__fixunssfdi>:
+800096f8:	04054a63          	bltz	a0,8000974c <.L__fixunssfdi_zero_result>
+800096fc:	00151613          	sll	a2,a0,0x1
+80009700:	8261                	srl	a2,a2,0x18
+80009702:	f8160613          	add	a2,a2,-127 # feffff81 <__APB_SRAM_segment_end__+0xaf0df81>
+80009706:	04064363          	bltz	a2,8000974c <.L__fixunssfdi_zero_result>
+8000970a:	800006b7          	lui	a3,0x80000
+8000970e:	02000293          	li	t0,32
+80009712:	00565b63          	bge	a2,t0,80009728 <.L__fixunssfdi_long_shift>
+80009716:	40c00633          	neg	a2,a2
+8000971a:	067d                	add	a2,a2,31
+8000971c:	0522                	sll	a0,a0,0x8
+8000971e:	8d55                	or	a0,a0,a3
+80009720:	00c55533          	srl	a0,a0,a2
+80009724:	4581                	li	a1,0
+80009726:	8082                	ret
+
+80009728 <.L__fixunssfdi_long_shift>:
+80009728:	40c00633          	neg	a2,a2
+8000972c:	03f60613          	add	a2,a2,63
+80009730:	02064163          	bltz	a2,80009752 <.L__fixunssfdi_overflow_result>
+80009734:	00851593          	sll	a1,a0,0x8
+80009738:	8dd5                	or	a1,a1,a3
+8000973a:	4501                	li	a0,0
+8000973c:	c619                	beqz	a2,8000974a <.L__fixunssfdi_shift_32>
+8000973e:	40c006b3          	neg	a3,a2
+80009742:	00d59533          	sll	a0,a1,a3
+80009746:	00c5d5b3          	srl	a1,a1,a2
+
+8000974a <.L__fixunssfdi_shift_32>:
+8000974a:	8082                	ret
+
+8000974c <.L__fixunssfdi_zero_result>:
+8000974c:	4501                	li	a0,0
+8000974e:	4581                	li	a1,0
+80009750:	8082                	ret
+
+80009752 <.L__fixunssfdi_overflow_result>:
+80009752:	557d                	li	a0,-1
+80009754:	55fd                	li	a1,-1
+80009756:	8082                	ret
+
+Disassembly of section .text.libc.__floatunsidf:
+
+80009758 <__floatunsidf>:
+80009758:	c131                	beqz	a0,8000979c <.L__floatunsidf_zero>
+8000975a:	41d00613          	li	a2,1053
+8000975e:	01055693          	srl	a3,a0,0x10
+80009762:	e299                	bnez	a3,80009768 <.L1^B9>
+80009764:	0542                	sll	a0,a0,0x10
+80009766:	1641                	add	a2,a2,-16
+
+80009768 <.L1^B9>:
+80009768:	01855693          	srl	a3,a0,0x18
+8000976c:	e299                	bnez	a3,80009772 <.L2^B9>
+8000976e:	0522                	sll	a0,a0,0x8
+80009770:	1661                	add	a2,a2,-8
+
+80009772 <.L2^B9>:
+80009772:	01c55693          	srl	a3,a0,0x1c
+80009776:	e299                	bnez	a3,8000977c <.L3^B7>
+80009778:	0512                	sll	a0,a0,0x4
+8000977a:	1671                	add	a2,a2,-4
+
+8000977c <.L3^B7>:
+8000977c:	01e55693          	srl	a3,a0,0x1e
+80009780:	e299                	bnez	a3,80009786 <.L4^B9>
+80009782:	050a                	sll	a0,a0,0x2
+80009784:	1679                	add	a2,a2,-2
+
+80009786 <.L4^B9>:
+80009786:	00054463          	bltz	a0,8000978e <.L5^B7>
+8000978a:	0506                	sll	a0,a0,0x1
+8000978c:	167d                	add	a2,a2,-1
+
+8000978e <.L5^B7>:
+8000978e:	0652                	sll	a2,a2,0x14
+80009790:	00b55693          	srl	a3,a0,0xb
+80009794:	0556                	sll	a0,a0,0x15
+80009796:	00c685b3          	add	a1,a3,a2
+8000979a:	8082                	ret
+
+8000979c <.L__floatunsidf_zero>:
+8000979c:	85aa                	mv	a1,a0
+8000979e:	8082                	ret
+
+Disassembly of section .text.libc.__trunctfsf2:
+
+800097a0 <__trunctfsf2>:
+800097a0:	4110                	lw	a2,0(a0)
+800097a2:	4154                	lw	a3,4(a0)
+800097a4:	4518                	lw	a4,8(a0)
+800097a6:	455c                	lw	a5,12(a0)
+800097a8:	1101                	add	sp,sp,-32
+800097aa:	850a                	mv	a0,sp
+800097ac:	ce06                	sw	ra,28(sp)
+800097ae:	c032                	sw	a2,0(sp)
+800097b0:	c236                	sw	a3,4(sp)
+800097b2:	c43a                	sw	a4,8(sp)
+800097b4:	c63e                	sw	a5,12(sp)
+800097b6:	92cfd0ef          	jal	800068e2 <__SEGGER_RTL_ldouble_to_double>
+800097ba:	8a2fd0ef          	jal	8000685c <__truncdfsf2>
+800097be:	40f2                	lw	ra,28(sp)
+800097c0:	6105                	add	sp,sp,32
+800097c2:	8082                	ret
+
+Disassembly of section .text.libc.__SEGGER_RTL_float32_signbit:
+
+800097c4 <__SEGGER_RTL_float32_signbit>:
+800097c4:	817d                	srl	a0,a0,0x1f
+800097c6:	8082                	ret
+
+Disassembly of section .text.libc.ldexpf:
+
+800097c8 <ldexpf>:
+800097c8:	01755713          	srl	a4,a0,0x17
+800097cc:	0ff77713          	zext.b	a4,a4
+800097d0:	fff70613          	add	a2,a4,-1 # fffff <__DLM_segment_end__+0x3ffff>
+800097d4:	0fd00693          	li	a3,253
+800097d8:	87aa                	mv	a5,a0
+800097da:	02c6e863          	bltu	a3,a2,8000980a <.L780>
+800097de:	95ba                	add	a1,a1,a4
+800097e0:	fff58713          	add	a4,a1,-1 # 7ff7ffff <_extram_size+0x7df7ffff>
+800097e4:	00e6eb63          	bltu	a3,a4,800097fa <.L781>
+800097e8:	80800737          	lui	a4,0x80800
+800097ec:	177d                	add	a4,a4,-1 # 807fffff <__XPI0_segment_used_end__+0x7f5193>
+800097ee:	00e577b3          	and	a5,a0,a4
+800097f2:	05de                	sll	a1,a1,0x17
+800097f4:	00f5e533          	or	a0,a1,a5
+800097f8:	8082                	ret
+
+800097fa <.L781>:
+800097fa:	80000537          	lui	a0,0x80000
+800097fe:	8d7d                	and	a0,a0,a5
+80009800:	00b05563          	blez	a1,8000980a <.L780>
+80009804:	7f8007b7          	lui	a5,0x7f800
+80009808:	8d5d                	or	a0,a0,a5
+
+8000980a <.L780>:
+8000980a:	8082                	ret
+
+Disassembly of section .text.libc.frexpf:
+
+8000980c <frexpf>:
+8000980c:	01755793          	srl	a5,a0,0x17
+80009810:	0ff7f793          	zext.b	a5,a5
+80009814:	4701                	li	a4,0
+80009816:	cf99                	beqz	a5,80009834 <.L959>
+80009818:	0ff00613          	li	a2,255
+8000981c:	00c78c63          	beq	a5,a2,80009834 <.L959>
+80009820:	f8278713          	add	a4,a5,-126 # 7f7fff82 <_extram_size+0x7d7fff82>
+80009824:	808007b7          	lui	a5,0x80800
+80009828:	17fd                	add	a5,a5,-1 # 807fffff <__XPI0_segment_used_end__+0x7f5193>
+8000982a:	00f576b3          	and	a3,a0,a5
+8000982e:	3f000537          	lui	a0,0x3f000
+80009832:	8d55                	or	a0,a0,a3
+
+80009834 <.L959>:
+80009834:	c198                	sw	a4,0(a1)
+80009836:	8082                	ret
+
+Disassembly of section .text.libc.fmodf:
+
+80009838 <fmodf>:
+80009838:	01755793          	srl	a5,a0,0x17
+8000983c:	80000837          	lui	a6,0x80000
+80009840:	17fd                	add	a5,a5,-1
+80009842:	0fd00713          	li	a4,253
+80009846:	86aa                	mv	a3,a0
+80009848:	862e                	mv	a2,a1
+8000984a:	00a87833          	and	a6,a6,a0
+8000984e:	02f76463          	bltu	a4,a5,80009876 <.L991>
+80009852:	0175d793          	srl	a5,a1,0x17
+80009856:	17fd                	add	a5,a5,-1
+80009858:	02f77e63          	bgeu	a4,a5,80009894 <.L992>
+8000985c:	00151713          	sll	a4,a0,0x1
+
+80009860 <.L993>:
+80009860:	00159793          	sll	a5,a1,0x1
+80009864:	ff000637          	lui	a2,0xff000
+80009868:	0cf66663          	bltu	a2,a5,80009934 <.L1009>
+8000986c:	ef01                	bnez	a4,80009884 <.L995>
+8000986e:	eb91                	bnez	a5,80009882 <.L994>
+
+80009870 <.L1011>:
+80009870:	a201a503          	lw	a0,-1504(gp) # 80003a28 <.Lmerged_single+0x14>
+80009874:	8082                	ret
+
+80009876 <.L991>:
+80009876:	00151713          	sll	a4,a0,0x1
+8000987a:	ff0007b7          	lui	a5,0xff000
+8000987e:	fee7f1e3          	bgeu	a5,a4,80009860 <.L993>
+
+80009882 <.L994>:
+80009882:	8082                	ret
+
+80009884 <.L995>:
+80009884:	fec706e3          	beq	a4,a2,80009870 <.L1011>
+80009888:	fec78de3          	beq	a5,a2,80009882 <.L994>
+8000988c:	d3f5                	beqz	a5,80009870 <.L1011>
+8000988e:	0586                	sll	a1,a1,0x1
+80009890:	0015d613          	srl	a2,a1,0x1
+
+80009894 <.L992>:
+80009894:	00169793          	sll	a5,a3,0x1
+80009898:	8385                	srl	a5,a5,0x1
+8000989a:	00f66663          	bltu	a2,a5,800098a6 <.L996>
+8000989e:	fec792e3          	bne	a5,a2,80009882 <.L994>
+
+800098a2 <.L1018>:
+800098a2:	8542                	mv	a0,a6
+800098a4:	8082                	ret
+
+800098a6 <.L996>:
+800098a6:	0177d713          	srl	a4,a5,0x17
+800098aa:	cb0d                	beqz	a4,800098dc <.L1012>
+800098ac:	008007b7          	lui	a5,0x800
+800098b0:	fff78593          	add	a1,a5,-1 # 7fffff <__DLM_segment_end__+0x73ffff>
+800098b4:	8eed                	and	a3,a3,a1
+800098b6:	8fd5                	or	a5,a5,a3
+
+800098b8 <.L998>:
+800098b8:	01765593          	srl	a1,a2,0x17
+800098bc:	c985                	beqz	a1,800098ec <.L1013>
+800098be:	008006b7          	lui	a3,0x800
+800098c2:	fff68513          	add	a0,a3,-1 # 7fffff <__DLM_segment_end__+0x73ffff>
+800098c6:	8e69                	and	a2,a2,a0
+800098c8:	8e55                	or	a2,a2,a3
+
+800098ca <.L1002>:
+800098ca:	40c786b3          	sub	a3,a5,a2
+800098ce:	02e5c763          	blt	a1,a4,800098fc <.L1003>
+800098d2:	0206cc63          	bltz	a3,8000990a <.L1015>
+800098d6:	8542                	mv	a0,a6
+800098d8:	ea95                	bnez	a3,8000990c <.L1004>
+800098da:	8082                	ret
+
+800098dc <.L1012>:
+800098dc:	4701                	li	a4,0
+800098de:	008006b7          	lui	a3,0x800
+
+800098e2 <.L997>:
+800098e2:	0786                	sll	a5,a5,0x1
+800098e4:	177d                	add	a4,a4,-1
+800098e6:	fed7eee3          	bltu	a5,a3,800098e2 <.L997>
+800098ea:	b7f9                	j	800098b8 <.L998>
+
+800098ec <.L1013>:
+800098ec:	4581                	li	a1,0
+800098ee:	008006b7          	lui	a3,0x800
+
+800098f2 <.L999>:
+800098f2:	0606                	sll	a2,a2,0x1
+800098f4:	15fd                	add	a1,a1,-1
+800098f6:	fed66ee3          	bltu	a2,a3,800098f2 <.L999>
+800098fa:	bfc1                	j	800098ca <.L1002>
+
+800098fc <.L1003>:
+800098fc:	0006c463          	bltz	a3,80009904 <.L1001>
+80009900:	d2cd                	beqz	a3,800098a2 <.L1018>
+80009902:	87b6                	mv	a5,a3
+
+80009904 <.L1001>:
+80009904:	0786                	sll	a5,a5,0x1
+80009906:	177d                	add	a4,a4,-1
+80009908:	b7c9                	j	800098ca <.L1002>
+
+8000990a <.L1015>:
+8000990a:	86be                	mv	a3,a5
+
+8000990c <.L1004>:
+8000990c:	008007b7          	lui	a5,0x800
+
+80009910 <.L1006>:
+80009910:	fff70513          	add	a0,a4,-1
+80009914:	00f6ed63          	bltu	a3,a5,8000992e <.L1007>
+80009918:	00e04763          	bgtz	a4,80009926 <.L1008>
+8000991c:	4785                	li	a5,1
+8000991e:	8f99                	sub	a5,a5,a4
+80009920:	00f6d6b3          	srl	a3,a3,a5
+80009924:	4501                	li	a0,0
+
+80009926 <.L1008>:
+80009926:	9836                	add	a6,a6,a3
+80009928:	055e                	sll	a0,a0,0x17
+8000992a:	9542                	add	a0,a0,a6
+8000992c:	8082                	ret
+
+8000992e <.L1007>:
+8000992e:	0686                	sll	a3,a3,0x1
+80009930:	872a                	mv	a4,a0
+80009932:	bff9                	j	80009910 <.L1006>
+
+80009934 <.L1009>:
+80009934:	852e                	mv	a0,a1
+80009936:	8082                	ret
+
+Disassembly of section .text.libc.memset:
+
+80009938 <memset>:
+80009938:	872a                	mv	a4,a0
+8000993a:	c22d                	beqz	a2,8000999c <.Lmemset_memset_end>
+
+8000993c <.Lmemset_unaligned_byte_set_loop>:
+8000993c:	01e51693          	sll	a3,a0,0x1e
+80009940:	c699                	beqz	a3,8000994e <.Lmemset_fast_set>
+80009942:	00b50023          	sb	a1,0(a0) # 3f000000 <_extram_size+0x3d000000>
+80009946:	0505                	add	a0,a0,1
+80009948:	167d                	add	a2,a2,-1 # feffffff <__APB_SRAM_segment_end__+0xaf0dfff>
+8000994a:	fa6d                	bnez	a2,8000993c <.Lmemset_unaligned_byte_set_loop>
+8000994c:	a881                	j	8000999c <.Lmemset_memset_end>
+
+8000994e <.Lmemset_fast_set>:
+8000994e:	0ff5f593          	zext.b	a1,a1
+80009952:	00859693          	sll	a3,a1,0x8
+80009956:	8dd5                	or	a1,a1,a3
+80009958:	01059693          	sll	a3,a1,0x10
+8000995c:	8dd5                	or	a1,a1,a3
+8000995e:	02000693          	li	a3,32
+80009962:	00d66f63          	bltu	a2,a3,80009980 <.Lmemset_word_set>
+
+80009966 <.Lmemset_fast_set_loop>:
+80009966:	c10c                	sw	a1,0(a0)
+80009968:	c14c                	sw	a1,4(a0)
+8000996a:	c50c                	sw	a1,8(a0)
+8000996c:	c54c                	sw	a1,12(a0)
+8000996e:	c90c                	sw	a1,16(a0)
+80009970:	c94c                	sw	a1,20(a0)
+80009972:	cd0c                	sw	a1,24(a0)
+80009974:	cd4c                	sw	a1,28(a0)
+80009976:	9536                	add	a0,a0,a3
+80009978:	8e15                	sub	a2,a2,a3
+8000997a:	fed676e3          	bgeu	a2,a3,80009966 <.Lmemset_fast_set_loop>
+8000997e:	ce19                	beqz	a2,8000999c <.Lmemset_memset_end>
+
+80009980 <.Lmemset_word_set>:
+80009980:	4691                	li	a3,4
+80009982:	00d66863          	bltu	a2,a3,80009992 <.Lmemset_byte_set_loop>
+
+80009986 <.Lmemset_word_set_loop>:
+80009986:	c10c                	sw	a1,0(a0)
+80009988:	9536                	add	a0,a0,a3
+8000998a:	8e15                	sub	a2,a2,a3
+8000998c:	fed67de3          	bgeu	a2,a3,80009986 <.Lmemset_word_set_loop>
+80009990:	c611                	beqz	a2,8000999c <.Lmemset_memset_end>
+
+80009992 <.Lmemset_byte_set_loop>:
+80009992:	00b50023          	sb	a1,0(a0)
+80009996:	0505                	add	a0,a0,1
+80009998:	167d                	add	a2,a2,-1
+8000999a:	fe65                	bnez	a2,80009992 <.Lmemset_byte_set_loop>
+
+8000999c <.Lmemset_memset_end>:
+8000999c:	853a                	mv	a0,a4
+8000999e:	8082                	ret
+
+Disassembly of section .text.libc.strlen:
+
+800099a0 <strlen>:
+800099a0:	85aa                	mv	a1,a0
+800099a2:	00357693          	and	a3,a0,3
+800099a6:	c29d                	beqz	a3,800099cc <.Lstrlen_aligned>
+800099a8:	00054603          	lbu	a2,0(a0)
+800099ac:	ce21                	beqz	a2,80009a04 <.Lstrlen_done>
+800099ae:	0505                	add	a0,a0,1
+800099b0:	00357693          	and	a3,a0,3
+800099b4:	ce81                	beqz	a3,800099cc <.Lstrlen_aligned>
+800099b6:	00054603          	lbu	a2,0(a0)
+800099ba:	c629                	beqz	a2,80009a04 <.Lstrlen_done>
+800099bc:	0505                	add	a0,a0,1
+800099be:	00357693          	and	a3,a0,3
+800099c2:	c689                	beqz	a3,800099cc <.Lstrlen_aligned>
+800099c4:	00054603          	lbu	a2,0(a0)
+800099c8:	ce15                	beqz	a2,80009a04 <.Lstrlen_done>
+800099ca:	0505                	add	a0,a0,1
+
+800099cc <.Lstrlen_aligned>:
+800099cc:	01010637          	lui	a2,0x1010
+800099d0:	10160613          	add	a2,a2,257 # 1010101 <__DLM_segment_end__+0xf50101>
+800099d4:	00761693          	sll	a3,a2,0x7
+
+800099d8 <.Lstrlen_wordstrlen>:
+800099d8:	4118                	lw	a4,0(a0)
+800099da:	0511                	add	a0,a0,4
+800099dc:	40c707b3          	sub	a5,a4,a2
+800099e0:	fff74713          	not	a4,a4
+800099e4:	8ff9                	and	a5,a5,a4
+800099e6:	8ff5                	and	a5,a5,a3
+800099e8:	dbe5                	beqz	a5,800099d8 <.Lstrlen_wordstrlen>
+800099ea:	1571                	add	a0,a0,-4
+800099ec:	01879713          	sll	a4,a5,0x18
+800099f0:	eb11                	bnez	a4,80009a04 <.Lstrlen_done>
+800099f2:	0505                	add	a0,a0,1
+800099f4:	01079713          	sll	a4,a5,0x10
+800099f8:	e711                	bnez	a4,80009a04 <.Lstrlen_done>
+800099fa:	0505                	add	a0,a0,1
+800099fc:	00879713          	sll	a4,a5,0x8
+80009a00:	e311                	bnez	a4,80009a04 <.Lstrlen_done>
+80009a02:	0505                	add	a0,a0,1
+
+80009a04 <.Lstrlen_done>:
+80009a04:	8d0d                	sub	a0,a0,a1
+80009a06:	8082                	ret
+
+Disassembly of section .text.libc.strnlen:
+
+80009a08 <strnlen>:
+80009a08:	862a                	mv	a2,a0
+80009a0a:	852e                	mv	a0,a1
+80009a0c:	c9c9                	beqz	a1,80009a9e <.L528>
+80009a0e:	00064783          	lbu	a5,0(a2)
+80009a12:	c7c9                	beqz	a5,80009a9c <.L534>
+80009a14:	00367793          	and	a5,a2,3
+80009a18:	00379693          	sll	a3,a5,0x3
+80009a1c:	00f58533          	add	a0,a1,a5
+80009a20:	ffc67713          	and	a4,a2,-4
+80009a24:	57fd                	li	a5,-1
+80009a26:	00d797b3          	sll	a5,a5,a3
+80009a2a:	4314                	lw	a3,0(a4)
+80009a2c:	fff7c793          	not	a5,a5
+80009a30:	feff05b7          	lui	a1,0xfeff0
+80009a34:	80808837          	lui	a6,0x80808
+80009a38:	8fd5                	or	a5,a5,a3
+80009a3a:	488d                	li	a7,3
+80009a3c:	eff58593          	add	a1,a1,-257 # fefefeff <__APB_SRAM_segment_end__+0xaefdeff>
+80009a40:	08080813          	add	a6,a6,128 # 80808080 <__XPI0_segment_used_end__+0x7fd214>
+
+80009a44 <.L530>:
+80009a44:	00a8ff63          	bgeu	a7,a0,80009a62 <.L529>
+80009a48:	00b786b3          	add	a3,a5,a1
+80009a4c:	fff7c313          	not	t1,a5
+80009a50:	0066f6b3          	and	a3,a3,t1
+80009a54:	0106f6b3          	and	a3,a3,a6
+80009a58:	e689                	bnez	a3,80009a62 <.L529>
+80009a5a:	0711                	add	a4,a4,4
+80009a5c:	1571                	add	a0,a0,-4
+80009a5e:	431c                	lw	a5,0(a4)
+80009a60:	b7d5                	j	80009a44 <.L530>
+
+80009a62 <.L529>:
+80009a62:	0ff7f593          	zext.b	a1,a5
+80009a66:	c59d                	beqz	a1,80009a94 <.L531>
+80009a68:	0087d593          	srl	a1,a5,0x8
+80009a6c:	0ff5f593          	zext.b	a1,a1
+80009a70:	4685                	li	a3,1
+80009a72:	cd89                	beqz	a1,80009a8c <.L532>
+80009a74:	0107d593          	srl	a1,a5,0x10
+80009a78:	0ff5f593          	zext.b	a1,a1
+80009a7c:	4689                	li	a3,2
+80009a7e:	c599                	beqz	a1,80009a8c <.L532>
+80009a80:	010005b7          	lui	a1,0x1000
+80009a84:	468d                	li	a3,3
+80009a86:	00b7e363          	bltu	a5,a1,80009a8c <.L532>
+80009a8a:	4691                	li	a3,4
+
+80009a8c <.L532>:
+80009a8c:	85aa                	mv	a1,a0
+80009a8e:	00a6f363          	bgeu	a3,a0,80009a94 <.L531>
+80009a92:	85b6                	mv	a1,a3
+
+80009a94 <.L531>:
+80009a94:	8f11                	sub	a4,a4,a2
+80009a96:	00b70533          	add	a0,a4,a1
+80009a9a:	8082                	ret
+
+80009a9c <.L534>:
+80009a9c:	4501                	li	a0,0
+
+80009a9e <.L528>:
+80009a9e:	8082                	ret
+
+Disassembly of section .text.libc.__SEGGER_RTL_stream_write:
+
+80009aa0 <__SEGGER_RTL_stream_write>:
+80009aa0:	5154                	lw	a3,36(a0)
+80009aa2:	87ae                	mv	a5,a1
+80009aa4:	853e                	mv	a0,a5
+80009aa6:	4585                	li	a1,1
+80009aa8:	90ffc06f          	j	800063b6 <fwrite>
+
+Disassembly of section .text.libc.__SEGGER_RTL_putc:
+
+80009aac <__SEGGER_RTL_putc>:
+80009aac:	4918                	lw	a4,16(a0)
+80009aae:	1101                	add	sp,sp,-32
+80009ab0:	0ff5f593          	zext.b	a1,a1
+80009ab4:	cc22                	sw	s0,24(sp)
+80009ab6:	ce06                	sw	ra,28(sp)
+80009ab8:	00b107a3          	sb	a1,15(sp)
+80009abc:	411c                	lw	a5,0(a0)
+80009abe:	842a                	mv	s0,a0
+80009ac0:	cb05                	beqz	a4,80009af0 <.L24>
+80009ac2:	4154                	lw	a3,4(a0)
+80009ac4:	00d7ff63          	bgeu	a5,a3,80009ae2 <.L26>
+80009ac8:	495c                	lw	a5,20(a0)
+80009aca:	00178693          	add	a3,a5,1 # 800001 <__DLM_segment_end__+0x740001>
+80009ace:	973e                	add	a4,a4,a5
+80009ad0:	c954                	sw	a3,20(a0)
+80009ad2:	00b70023          	sb	a1,0(a4)
+80009ad6:	4958                	lw	a4,20(a0)
+80009ad8:	4d1c                	lw	a5,24(a0)
+80009ada:	00f71463          	bne	a4,a5,80009ae2 <.L26>
+80009ade:	87ffd0ef          	jal	8000735c <__SEGGER_RTL_prin_flush>
+
+80009ae2 <.L26>:
+80009ae2:	401c                	lw	a5,0(s0)
+80009ae4:	40f2                	lw	ra,28(sp)
+80009ae6:	0785                	add	a5,a5,1
+80009ae8:	c01c                	sw	a5,0(s0)
+80009aea:	4462                	lw	s0,24(sp)
+80009aec:	6105                	add	sp,sp,32
+80009aee:	8082                	ret
+
+80009af0 <.L24>:
+80009af0:	4558                	lw	a4,12(a0)
+80009af2:	c305                	beqz	a4,80009b12 <.L28>
+80009af4:	4154                	lw	a3,4(a0)
+80009af6:	00178613          	add	a2,a5,1
+80009afa:	00d61463          	bne	a2,a3,80009b02 <.L29>
+80009afe:	000107a3          	sb	zero,15(sp)
+
+80009b02 <.L29>:
+80009b02:	fed7f0e3          	bgeu	a5,a3,80009ae2 <.L26>
+80009b06:	00f14683          	lbu	a3,15(sp)
+80009b0a:	973e                	add	a4,a4,a5
+80009b0c:	00d70023          	sb	a3,0(a4)
+80009b10:	bfc9                	j	80009ae2 <.L26>
+
+80009b12 <.L28>:
+80009b12:	4518                	lw	a4,8(a0)
+80009b14:	c305                	beqz	a4,80009b34 <.L30>
+80009b16:	4154                	lw	a3,4(a0)
+80009b18:	00178613          	add	a2,a5,1
+80009b1c:	00d61463          	bne	a2,a3,80009b24 <.L31>
+80009b20:	000107a3          	sb	zero,15(sp)
+
+80009b24 <.L31>:
+80009b24:	fad7ffe3          	bgeu	a5,a3,80009ae2 <.L26>
+80009b28:	078a                	sll	a5,a5,0x2
+80009b2a:	973e                	add	a4,a4,a5
+80009b2c:	00f14783          	lbu	a5,15(sp)
+80009b30:	c31c                	sw	a5,0(a4)
+80009b32:	bf45                	j	80009ae2 <.L26>
+
+80009b34 <.L30>:
+80009b34:	5118                	lw	a4,32(a0)
+80009b36:	d755                	beqz	a4,80009ae2 <.L26>
+80009b38:	4154                	lw	a3,4(a0)
+80009b3a:	fad7f4e3          	bgeu	a5,a3,80009ae2 <.L26>
+80009b3e:	4605                	li	a2,1
+80009b40:	00f10593          	add	a1,sp,15
+80009b44:	9702                	jalr	a4
+80009b46:	bf71                	j	80009ae2 <.L26>
+
+Disassembly of section .text.libc.__SEGGER_RTL_print_padding:
+
+80009b48 <__SEGGER_RTL_print_padding>:
+80009b48:	1141                	add	sp,sp,-16
+80009b4a:	c422                	sw	s0,8(sp)
+80009b4c:	c226                	sw	s1,4(sp)
+80009b4e:	c04a                	sw	s2,0(sp)
+80009b50:	c606                	sw	ra,12(sp)
+80009b52:	84aa                	mv	s1,a0
+80009b54:	892e                	mv	s2,a1
+80009b56:	8432                	mv	s0,a2
+
+80009b58 <.L37>:
+80009b58:	147d                	add	s0,s0,-1
+80009b5a:	00045863          	bgez	s0,80009b6a <.L38>
+80009b5e:	40b2                	lw	ra,12(sp)
+80009b60:	4422                	lw	s0,8(sp)
+80009b62:	4492                	lw	s1,4(sp)
+80009b64:	4902                	lw	s2,0(sp)
+80009b66:	0141                	add	sp,sp,16
+80009b68:	8082                	ret
+
+80009b6a <.L38>:
+80009b6a:	85ca                	mv	a1,s2
+80009b6c:	8526                	mv	a0,s1
+80009b6e:	3f3d                	jal	80009aac <__SEGGER_RTL_putc>
+80009b70:	b7e5                	j	80009b58 <.L37>
+
+Disassembly of section .text.libc.vfprintf_l:
+
+80009b72 <vfprintf_l>:
+80009b72:	711d                	add	sp,sp,-96
+80009b74:	ce86                	sw	ra,92(sp)
+80009b76:	cca2                	sw	s0,88(sp)
+80009b78:	caa6                	sw	s1,84(sp)
+80009b7a:	1080                	add	s0,sp,96
+80009b7c:	c8ca                	sw	s2,80(sp)
+80009b7e:	c6ce                	sw	s3,76(sp)
+80009b80:	8932                	mv	s2,a2
+80009b82:	fad42623          	sw	a3,-84(s0)
+80009b86:	89aa                	mv	s3,a0
+80009b88:	fab42423          	sw	a1,-88(s0)
+80009b8c:	accff0ef          	jal	80008e58 <__SEGGER_RTL_X_file_bufsize>
+80009b90:	fa842583          	lw	a1,-88(s0)
+80009b94:	00f50793          	add	a5,a0,15
+80009b98:	9bc1                	and	a5,a5,-16
+80009b9a:	40f10133          	sub	sp,sp,a5
+80009b9e:	84aa                	mv	s1,a0
+80009ba0:	fb840513          	add	a0,s0,-72
+80009ba4:	ff4fd0ef          	jal	80007398 <__SEGGER_RTL_init_prin_l>
+80009ba8:	800007b7          	lui	a5,0x80000
+80009bac:	fac42603          	lw	a2,-84(s0)
+80009bb0:	17fd                	add	a5,a5,-1 # 7fffffff <_extram_size+0x7dffffff>
+80009bb2:	faf42e23          	sw	a5,-68(s0)
+80009bb6:	8000a7b7          	lui	a5,0x8000a
+80009bba:	aa078793          	add	a5,a5,-1376 # 80009aa0 <__SEGGER_RTL_stream_write>
+80009bbe:	85ca                	mv	a1,s2
+80009bc0:	fb840513          	add	a0,s0,-72
+80009bc4:	fc242423          	sw	sp,-56(s0)
+80009bc8:	fc942823          	sw	s1,-48(s0)
+80009bcc:	fd342e23          	sw	s3,-36(s0)
+80009bd0:	fcf42c23          	sw	a5,-40(s0)
+80009bd4:	2811                	jal	80009be8 <__SEGGER_RTL_vfprintf>
+80009bd6:	fa040113          	add	sp,s0,-96
+80009bda:	40f6                	lw	ra,92(sp)
+80009bdc:	4466                	lw	s0,88(sp)
+80009bde:	44d6                	lw	s1,84(sp)
+80009be0:	4946                	lw	s2,80(sp)
+80009be2:	49b6                	lw	s3,76(sp)
+80009be4:	6125                	add	sp,sp,96
+80009be6:	8082                	ret
+
+Disassembly of section .text.libc.__SEGGER_RTL_vfprintf_short_float_long:
+
+80009be8 <__SEGGER_RTL_vfprintf>:
+80009be8:	7175                	add	sp,sp,-144
+80009bea:	84018793          	add	a5,gp,-1984 # 80003848 <.L9>
+80009bee:	c83e                	sw	a5,16(sp)
+80009bf0:	dece                	sw	s3,124(sp)
+80009bf2:	dad6                	sw	s5,116(sp)
+80009bf4:	ceee                	sw	s11,92(sp)
+80009bf6:	c706                	sw	ra,140(sp)
+80009bf8:	c522                	sw	s0,136(sp)
+80009bfa:	c326                	sw	s1,132(sp)
+80009bfc:	c14a                	sw	s2,128(sp)
+80009bfe:	dcd2                	sw	s4,120(sp)
+80009c00:	d8da                	sw	s6,112(sp)
+80009c02:	d6de                	sw	s7,108(sp)
+80009c04:	d4e2                	sw	s8,104(sp)
+80009c06:	d2e6                	sw	s9,100(sp)
+80009c08:	d0ea                	sw	s10,96(sp)
+80009c0a:	88418793          	add	a5,gp,-1916 # 8000388c <.L45>
+80009c0e:	00020db7          	lui	s11,0x20
+80009c12:	89aa                	mv	s3,a0
+80009c14:	8ab2                	mv	s5,a2
+80009c16:	00052023          	sw	zero,0(a0)
+80009c1a:	ca3e                	sw	a5,20(sp)
+80009c1c:	021d8d93          	add	s11,s11,33 # 20021 <__AHB_SRAM_segment_size__+0x18021>
+
+80009c20 <.L2>:
+80009c20:	00158a13          	add	s4,a1,1 # 1000001 <__DLM_segment_end__+0xf40001>
+80009c24:	0005c583          	lbu	a1,0(a1)
+80009c28:	e19d                	bnez	a1,80009c4e <.L229>
+80009c2a:	00c9a783          	lw	a5,12(s3)
+80009c2e:	cb91                	beqz	a5,80009c42 <.L230>
+80009c30:	0009a703          	lw	a4,0(s3)
+80009c34:	0049a683          	lw	a3,4(s3)
+80009c38:	00d77563          	bgeu	a4,a3,80009c42 <.L230>
+80009c3c:	97ba                	add	a5,a5,a4
+80009c3e:	00078023          	sb	zero,0(a5)
+
+80009c42 <.L230>:
+80009c42:	854e                	mv	a0,s3
+80009c44:	f18fd0ef          	jal	8000735c <__SEGGER_RTL_prin_flush>
+80009c48:	0009a503          	lw	a0,0(s3)
+80009c4c:	a2f9                	j	80009e1a <.L338>
+
+80009c4e <.L229>:
+80009c4e:	02500793          	li	a5,37
+80009c52:	00f58563          	beq	a1,a5,80009c5c <.L231>
+
+80009c56 <.L362>:
+80009c56:	854e                	mv	a0,s3
+80009c58:	3d91                	jal	80009aac <__SEGGER_RTL_putc>
+80009c5a:	aab9                	j	80009db8 <.L4>
+
+80009c5c <.L231>:
+80009c5c:	4b81                	li	s7,0
+80009c5e:	03000613          	li	a2,48
+80009c62:	05e00593          	li	a1,94
+80009c66:	6505                	lui	a0,0x1
+80009c68:	487d                	li	a6,31
+80009c6a:	48c1                	li	a7,16
+80009c6c:	6321                	lui	t1,0x8
+80009c6e:	a03d                	j	80009c9c <.L3>
+
+80009c70 <.L5>:
+80009c70:	04b78f63          	beq	a5,a1,80009cce <.L15>
+
+80009c74 <.L232>:
+80009c74:	8a36                	mv	s4,a3
+80009c76:	4b01                	li	s6,0
+80009c78:	46a5                	li	a3,9
+80009c7a:	45a9                	li	a1,10
+
+80009c7c <.L18>:
+80009c7c:	fd078713          	add	a4,a5,-48
+80009c80:	0ff77613          	zext.b	a2,a4
+80009c84:	08c6e363          	bltu	a3,a2,80009d0a <.L20>
+80009c88:	02bb0b33          	mul	s6,s6,a1
+80009c8c:	0a05                	add	s4,s4,1
+80009c8e:	fffa4783          	lbu	a5,-1(s4)
+80009c92:	9b3a                	add	s6,s6,a4
+80009c94:	b7e5                	j	80009c7c <.L18>
+
+80009c96 <.L14>:
+80009c96:	040beb93          	or	s7,s7,64
+
+80009c9a <.L16>:
+80009c9a:	8a36                	mv	s4,a3
+
+80009c9c <.L3>:
+80009c9c:	000a4783          	lbu	a5,0(s4)
+80009ca0:	001a0693          	add	a3,s4,1
+80009ca4:	fcf666e3          	bltu	a2,a5,80009c70 <.L5>
+80009ca8:	fcf876e3          	bgeu	a6,a5,80009c74 <.L232>
+80009cac:	fe078713          	add	a4,a5,-32
+80009cb0:	0ff77713          	zext.b	a4,a4
+80009cb4:	02e8e963          	bltu	a7,a4,80009ce6 <.L7>
+80009cb8:	4442                	lw	s0,16(sp)
+80009cba:	070a                	sll	a4,a4,0x2
+80009cbc:	9722                	add	a4,a4,s0
+80009cbe:	4318                	lw	a4,0(a4)
+80009cc0:	8702                	jr	a4
+
+80009cc2 <.L13>:
+80009cc2:	080beb93          	or	s7,s7,128
+80009cc6:	bfd1                	j	80009c9a <.L16>
+
+80009cc8 <.L12>:
+80009cc8:	006bebb3          	or	s7,s7,t1
+80009ccc:	b7f9                	j	80009c9a <.L16>
+
+80009cce <.L15>:
+80009cce:	00abebb3          	or	s7,s7,a0
+80009cd2:	b7e1                	j	80009c9a <.L16>
+
+80009cd4 <.L11>:
+80009cd4:	020beb93          	or	s7,s7,32
+80009cd8:	b7c9                	j	80009c9a <.L16>
+
+80009cda <.L10>:
+80009cda:	010beb93          	or	s7,s7,16
+80009cde:	bf75                	j	80009c9a <.L16>
+
+80009ce0 <.L8>:
+80009ce0:	200beb93          	or	s7,s7,512
+80009ce4:	bf5d                	j	80009c9a <.L16>
+
+80009ce6 <.L7>:
+80009ce6:	02a00713          	li	a4,42
+80009cea:	f8e795e3          	bne	a5,a4,80009c74 <.L232>
+80009cee:	000aab03          	lw	s6,0(s5)
+80009cf2:	004a8713          	add	a4,s5,4
+80009cf6:	000b5663          	bgez	s6,80009d02 <.L19>
+80009cfa:	41600b33          	neg	s6,s6
+80009cfe:	010beb93          	or	s7,s7,16
+
+80009d02 <.L19>:
+80009d02:	0006c783          	lbu	a5,0(a3) # 800000 <__DLM_segment_end__+0x740000>
+80009d06:	0a09                	add	s4,s4,2
+80009d08:	8aba                	mv	s5,a4
+
+80009d0a <.L20>:
+80009d0a:	000b5363          	bgez	s6,80009d10 <.L22>
+80009d0e:	4b01                	li	s6,0
+
+80009d10 <.L22>:
+80009d10:	02e00713          	li	a4,46
+80009d14:	4481                	li	s1,0
+80009d16:	04e79263          	bne	a5,a4,80009d5a <.L23>
+80009d1a:	000a4783          	lbu	a5,0(s4)
+80009d1e:	02a00713          	li	a4,42
+80009d22:	02e78263          	beq	a5,a4,80009d46 <.L24>
+80009d26:	0a05                	add	s4,s4,1
+80009d28:	46a5                	li	a3,9
+80009d2a:	45a9                	li	a1,10
+
+80009d2c <.L25>:
+80009d2c:	fd078713          	add	a4,a5,-48
+80009d30:	0ff77613          	zext.b	a2,a4
+80009d34:	00c6ef63          	bltu	a3,a2,80009d52 <.L26>
+80009d38:	02b484b3          	mul	s1,s1,a1
+80009d3c:	0a05                	add	s4,s4,1
+80009d3e:	fffa4783          	lbu	a5,-1(s4)
+80009d42:	94ba                	add	s1,s1,a4
+80009d44:	b7e5                	j	80009d2c <.L25>
+
+80009d46 <.L24>:
+80009d46:	000aa483          	lw	s1,0(s5)
+80009d4a:	001a4783          	lbu	a5,1(s4)
+80009d4e:	0a91                	add	s5,s5,4
+80009d50:	0a09                	add	s4,s4,2
+
+80009d52 <.L26>:
+80009d52:	0004c463          	bltz	s1,80009d5a <.L23>
+80009d56:	100beb93          	or	s7,s7,256
+
+80009d5a <.L23>:
+80009d5a:	06c00713          	li	a4,108
+80009d5e:	06e78263          	beq	a5,a4,80009dc2 <.L28>
+80009d62:	02f76c63          	bltu	a4,a5,80009d9a <.L29>
+80009d66:	06800713          	li	a4,104
+80009d6a:	06e78a63          	beq	a5,a4,80009dde <.L30>
+80009d6e:	06a00713          	li	a4,106
+80009d72:	04e78563          	beq	a5,a4,80009dbc <.L31>
+
+80009d76 <.L32>:
+80009d76:	05700713          	li	a4,87
+80009d7a:	2af766e3          	bltu	a4,a5,8000a826 <.L38>
+80009d7e:	04500713          	li	a4,69
+80009d82:	2ce78763          	beq	a5,a4,8000a050 <.L39>
+80009d86:	06f76763          	bltu	a4,a5,80009df4 <.L40>
+80009d8a:	c7c1                	beqz	a5,80009e12 <.L41>
+80009d8c:	02500713          	li	a4,37
+80009d90:	02500593          	li	a1,37
+80009d94:	ece781e3          	beq	a5,a4,80009c56 <.L362>
+80009d98:	a005                	j	80009db8 <.L4>
+
+80009d9a <.L29>:
+80009d9a:	07400713          	li	a4,116
+80009d9e:	00e78663          	beq	a5,a4,80009daa <.L346>
+80009da2:	07a00713          	li	a4,122
+80009da6:	26e79ce3          	bne	a5,a4,8000a81e <.L34>
+
+80009daa <.L346>:
+80009daa:	000a4783          	lbu	a5,0(s4)
+80009dae:	0a05                	add	s4,s4,1
+
+80009db0 <.L35>:
+80009db0:	07800713          	li	a4,120
+80009db4:	fcf771e3          	bgeu	a4,a5,80009d76 <.L32>
+
+80009db8 <.L4>:
+80009db8:	85d2                	mv	a1,s4
+80009dba:	b59d                	j	80009c20 <.L2>
+
+80009dbc <.L31>:
+80009dbc:	002beb93          	or	s7,s7,2
+80009dc0:	b7ed                	j	80009daa <.L346>
+
+80009dc2 <.L28>:
+80009dc2:	000a4783          	lbu	a5,0(s4)
+80009dc6:	00e79863          	bne	a5,a4,80009dd6 <.L36>
+80009dca:	002beb93          	or	s7,s7,2
+
+80009dce <.L347>:
+80009dce:	001a4783          	lbu	a5,1(s4)
+80009dd2:	0a09                	add	s4,s4,2
+80009dd4:	bff1                	j	80009db0 <.L35>
+
+80009dd6 <.L36>:
+80009dd6:	0a05                	add	s4,s4,1
+80009dd8:	001beb93          	or	s7,s7,1
+80009ddc:	bfd1                	j	80009db0 <.L35>
+
+80009dde <.L30>:
+80009dde:	000a4783          	lbu	a5,0(s4)
+80009de2:	00e79563          	bne	a5,a4,80009dec <.L37>
+80009de6:	008beb93          	or	s7,s7,8
+80009dea:	b7d5                	j	80009dce <.L347>
+
+80009dec <.L37>:
+80009dec:	0a05                	add	s4,s4,1
+80009dee:	004beb93          	or	s7,s7,4
+80009df2:	bf7d                	j	80009db0 <.L35>
+
+80009df4 <.L40>:
+80009df4:	04600713          	li	a4,70
+80009df8:	2ce78463          	beq	a5,a4,8000a0c0 <.L57>
+80009dfc:	04700713          	li	a4,71
+80009e00:	fae79ce3          	bne	a5,a4,80009db8 <.L4>
+80009e04:	6789                	lui	a5,0x2
+80009e06:	00fbebb3          	or	s7,s7,a5
+
+80009e0a <.L52>:
+80009e0a:	6905                	lui	s2,0x1
+80009e0c:	c0090913          	add	s2,s2,-1024 # c00 <__NOR_CFG_OPTION_segment_size__>
+80009e10:	ac75                	j	8000a0cc <.L353>
+
+80009e12 <.L41>:
+80009e12:	854e                	mv	a0,s3
+80009e14:	d48fd0ef          	jal	8000735c <__SEGGER_RTL_prin_flush>
+80009e18:	557d                	li	a0,-1
+
+80009e1a <.L338>:
+80009e1a:	40ba                	lw	ra,140(sp)
+80009e1c:	442a                	lw	s0,136(sp)
+80009e1e:	449a                	lw	s1,132(sp)
+80009e20:	490a                	lw	s2,128(sp)
+80009e22:	59f6                	lw	s3,124(sp)
+80009e24:	5a66                	lw	s4,120(sp)
+80009e26:	5ad6                	lw	s5,116(sp)
+80009e28:	5b46                	lw	s6,112(sp)
+80009e2a:	5bb6                	lw	s7,108(sp)
+80009e2c:	5c26                	lw	s8,104(sp)
+80009e2e:	5c96                	lw	s9,100(sp)
+80009e30:	5d06                	lw	s10,96(sp)
+80009e32:	4df6                	lw	s11,92(sp)
+80009e34:	6149                	add	sp,sp,144
+80009e36:	8082                	ret
+
+80009e38 <.L55>:
+80009e38:	000aa483          	lw	s1,0(s5)
+80009e3c:	1b7d                	add	s6,s6,-1
+80009e3e:	865a                	mv	a2,s6
+80009e40:	85de                	mv	a1,s7
+80009e42:	854e                	mv	a0,s3
+80009e44:	d3afd0ef          	jal	8000737e <__SEGGER_RTL_pre_padding>
+80009e48:	004a8413          	add	s0,s5,4
+80009e4c:	0ff4f593          	zext.b	a1,s1
+80009e50:	854e                	mv	a0,s3
+80009e52:	39a9                	jal	80009aac <__SEGGER_RTL_putc>
+80009e54:	8aa2                	mv	s5,s0
+
+80009e56 <.L371>:
+80009e56:	010bfb93          	and	s7,s7,16
+80009e5a:	f40b8fe3          	beqz	s7,80009db8 <.L4>
+80009e5e:	865a                	mv	a2,s6
+80009e60:	02000593          	li	a1,32
+80009e64:	854e                	mv	a0,s3
+80009e66:	31cd                	jal	80009b48 <__SEGGER_RTL_print_padding>
+80009e68:	bf81                	j	80009db8 <.L4>
+
+80009e6a <.L50>:
+80009e6a:	008bf693          	and	a3,s7,8
+80009e6e:	000aa783          	lw	a5,0(s5)
+80009e72:	0009a703          	lw	a4,0(s3)
+80009e76:	0a91                	add	s5,s5,4
+80009e78:	c681                	beqz	a3,80009e80 <.L62>
+80009e7a:	00e78023          	sb	a4,0(a5) # 2000 <__APB_SRAM_segment_size__>
+80009e7e:	bf2d                	j	80009db8 <.L4>
+
+80009e80 <.L62>:
+80009e80:	002bfb93          	and	s7,s7,2
+80009e84:	c398                	sw	a4,0(a5)
+80009e86:	f20b89e3          	beqz	s7,80009db8 <.L4>
+80009e8a:	0007a223          	sw	zero,4(a5)
+80009e8e:	b72d                	j	80009db8 <.L4>
+
+80009e90 <.L47>:
+80009e90:	000aa403          	lw	s0,0(s5)
+80009e94:	895e                	mv	s2,s7
+80009e96:	0a91                	add	s5,s5,4
+
+80009e98 <.L65>:
+80009e98:	e409                	bnez	s0,80009ea2 <.L66>
+80009e9a:	80004437          	lui	s0,0x80004
+80009e9e:	81840413          	add	s0,s0,-2024 # 80003818 <.LC0>
+
+80009ea2 <.L66>:
+80009ea2:	dff97b93          	and	s7,s2,-513
+80009ea6:	10097913          	and	s2,s2,256
+80009eaa:	02090563          	beqz	s2,80009ed4 <.L67>
+80009eae:	85a6                	mv	a1,s1
+80009eb0:	8522                	mv	a0,s0
+80009eb2:	3e99                	jal	80009a08 <strnlen>
+
+80009eb4 <.L348>:
+80009eb4:	40ab0b33          	sub	s6,s6,a0
+80009eb8:	84aa                	mv	s1,a0
+80009eba:	865a                	mv	a2,s6
+80009ebc:	85de                	mv	a1,s7
+80009ebe:	854e                	mv	a0,s3
+80009ec0:	cbefd0ef          	jal	8000737e <__SEGGER_RTL_pre_padding>
+
+80009ec4 <.L69>:
+80009ec4:	d8c9                	beqz	s1,80009e56 <.L371>
+80009ec6:	00044583          	lbu	a1,0(s0)
+80009eca:	854e                	mv	a0,s3
+80009ecc:	0405                	add	s0,s0,1
+80009ece:	3ef9                	jal	80009aac <__SEGGER_RTL_putc>
+80009ed0:	14fd                	add	s1,s1,-1
+80009ed2:	bfcd                	j	80009ec4 <.L69>
+
+80009ed4 <.L67>:
+80009ed4:	8522                	mv	a0,s0
+80009ed6:	34e9                	jal	800099a0 <strlen>
+80009ed8:	bff1                	j	80009eb4 <.L348>
+
+80009eda <.L48>:
+80009eda:	080bf713          	and	a4,s7,128
+80009ede:	000aa403          	lw	s0,0(s5)
+80009ee2:	004a8693          	add	a3,s5,4
+80009ee6:	4581                	li	a1,0
+80009ee8:	02300c93          	li	s9,35
+80009eec:	e311                	bnez	a4,80009ef0 <.L71>
+80009eee:	4c81                	li	s9,0
+
+80009ef0 <.L71>:
+80009ef0:	100beb93          	or	s7,s7,256
+80009ef4:	8ab6                	mv	s5,a3
+80009ef6:	44a1                	li	s1,8
+
+80009ef8 <.L72>:
+80009ef8:	100bf713          	and	a4,s7,256
+80009efc:	e311                	bnez	a4,80009f00 <.L203>
+80009efe:	4485                	li	s1,1
+
+80009f00 <.L203>:
+80009f00:	05800713          	li	a4,88
+80009f04:	04e78ae3          	beq	a5,a4,8000a758 <.L204>
+80009f08:	f9c78693          	add	a3,a5,-100
+80009f0c:	4705                	li	a4,1
+80009f0e:	00d71733          	sll	a4,a4,a3
+80009f12:	01b776b3          	and	a3,a4,s11
+80009f16:	7c069c63          	bnez	a3,8000a6ee <.L205>
+80009f1a:	00c75693          	srl	a3,a4,0xc
+80009f1e:	1016f693          	and	a3,a3,257
+80009f22:	02069be3          	bnez	a3,8000a758 <.L204>
+80009f26:	06f00713          	li	a4,111
+80009f2a:	4c01                	li	s8,0
+80009f2c:	04e795e3          	bne	a5,a4,8000a776 <.L206>
+
+80009f30 <.L207>:
+80009f30:	00b467b3          	or	a5,s0,a1
+80009f34:	040781e3          	beqz	a5,8000a776 <.L206>
+80009f38:	183c                	add	a5,sp,56
+80009f3a:	01878733          	add	a4,a5,s8
+80009f3e:	00747793          	and	a5,s0,7
+80009f42:	03078793          	add	a5,a5,48
+80009f46:	00f70023          	sb	a5,0(a4)
+80009f4a:	800d                	srl	s0,s0,0x3
+80009f4c:	01d59793          	sll	a5,a1,0x1d
+80009f50:	0c05                	add	s8,s8,1
+80009f52:	8c5d                	or	s0,s0,a5
+80009f54:	818d                	srl	a1,a1,0x3
+80009f56:	bfe9                	j	80009f30 <.L207>
+
+80009f58 <.L56>:
+80009f58:	6709                	lui	a4,0x2
+80009f5a:	00ebebb3          	or	s7,s7,a4
+
+80009f5e <.L44>:
+80009f5e:	080bf713          	and	a4,s7,128
+80009f62:	4c81                	li	s9,0
+80009f64:	cb19                	beqz	a4,80009f7a <.L75>
+80009f66:	6c8d                	lui	s9,0x3
+80009f68:	07800713          	li	a4,120
+80009f6c:	058c8c93          	add	s9,s9,88 # 3058 <__APB_SRAM_segment_size__+0x1058>
+80009f70:	00e79563          	bne	a5,a4,80009f7a <.L75>
+80009f74:	6c8d                	lui	s9,0x3
+80009f76:	078c8c93          	add	s9,s9,120 # 3078 <__APB_SRAM_segment_size__+0x1078>
+
+80009f7a <.L75>:
+80009f7a:	100bf713          	and	a4,s7,256
+
+80009f7e <.L365>:
+80009f7e:	c319                	beqz	a4,80009f84 <.L74>
+80009f80:	dffbfb93          	and	s7,s7,-513
+
+80009f84 <.L74>:
+80009f84:	011b9613          	sll	a2,s7,0x11
+80009f88:	002bf713          	and	a4,s7,2
+80009f8c:	004bf693          	and	a3,s7,4
+80009f90:	08065563          	bgez	a2,8000a01a <.L76>
+80009f94:	cf31                	beqz	a4,80009ff0 <.L77>
+80009f96:	007a8713          	add	a4,s5,7
+80009f9a:	9b61                	and	a4,a4,-8
+80009f9c:	4300                	lw	s0,0(a4)
+80009f9e:	434c                	lw	a1,4(a4)
+80009fa0:	00870a93          	add	s5,a4,8 # 2008 <__APB_SRAM_segment_size__+0x8>
+
+80009fa4 <.L78>:
+80009fa4:	cea1                	beqz	a3,80009ffc <.L79>
+80009fa6:	0442                	sll	s0,s0,0x10
+80009fa8:	8441                	sra	s0,s0,0x10
+
+80009faa <.L351>:
+80009faa:	41f45593          	sra	a1,s0,0x1f
+
+80009fae <.L80>:
+80009fae:	0405dd63          	bgez	a1,8000a008 <.L82>
+80009fb2:	00803733          	snez	a4,s0
+80009fb6:	40b005b3          	neg	a1,a1
+80009fba:	8d99                	sub	a1,a1,a4
+80009fbc:	40800433          	neg	s0,s0
+80009fc0:	02d00c93          	li	s9,45
+
+80009fc4 <.L84>:
+80009fc4:	100bf713          	and	a4,s7,256
+80009fc8:	db05                	beqz	a4,80009ef8 <.L72>
+80009fca:	dffbfb93          	and	s7,s7,-513
+80009fce:	b72d                	j	80009ef8 <.L72>
+
+80009fd0 <.L49>:
+80009fd0:	080bf713          	and	a4,s7,128
+80009fd4:	03000c93          	li	s9,48
+80009fd8:	f34d                	bnez	a4,80009f7a <.L75>
+80009fda:	4c81                	li	s9,0
+80009fdc:	bf79                	j	80009f7a <.L75>
+
+80009fde <.L46>:
+80009fde:	100bf713          	and	a4,s7,256
+80009fe2:	4c81                	li	s9,0
+80009fe4:	bf69                	j	80009f7e <.L365>
+
+80009fe6 <.L51>:
+80009fe6:	6711                	lui	a4,0x4
+80009fe8:	00ebebb3          	or	s7,s7,a4
+80009fec:	4c81                	li	s9,0
+80009fee:	bf59                	j	80009f84 <.L74>
+
+80009ff0 <.L77>:
+80009ff0:	000aa403          	lw	s0,0(s5)
+80009ff4:	0a91                	add	s5,s5,4
+80009ff6:	41f45593          	sra	a1,s0,0x1f
+80009ffa:	b76d                	j	80009fa4 <.L78>
+
+80009ffc <.L79>:
+80009ffc:	008bf713          	and	a4,s7,8
+8000a000:	d75d                	beqz	a4,80009fae <.L80>
+8000a002:	0462                	sll	s0,s0,0x18
+8000a004:	8461                	sra	s0,s0,0x18
+8000a006:	b755                	j	80009faa <.L351>
+
+8000a008 <.L82>:
+8000a008:	020bf713          	and	a4,s7,32
+8000a00c:	ef1d                	bnez	a4,8000a04a <.L239>
+8000a00e:	040bf713          	and	a4,s7,64
+8000a012:	db4d                	beqz	a4,80009fc4 <.L84>
+8000a014:	02000c93          	li	s9,32
+8000a018:	b775                	j	80009fc4 <.L84>
+
+8000a01a <.L76>:
+8000a01a:	cf09                	beqz	a4,8000a034 <.L85>
+8000a01c:	007a8713          	add	a4,s5,7
+8000a020:	9b61                	and	a4,a4,-8
+8000a022:	4300                	lw	s0,0(a4)
+8000a024:	434c                	lw	a1,4(a4)
+8000a026:	00870a93          	add	s5,a4,8 # 4008 <__HEAPSIZE__+0x8>
+
+8000a02a <.L86>:
+8000a02a:	ca91                	beqz	a3,8000a03e <.L87>
+8000a02c:	0442                	sll	s0,s0,0x10
+8000a02e:	8041                	srl	s0,s0,0x10
+
+8000a030 <.L352>:
+8000a030:	4581                	li	a1,0
+8000a032:	bf49                	j	80009fc4 <.L84>
+
+8000a034 <.L85>:
+8000a034:	000aa403          	lw	s0,0(s5)
+8000a038:	4581                	li	a1,0
+8000a03a:	0a91                	add	s5,s5,4
+8000a03c:	b7fd                	j	8000a02a <.L86>
+
+8000a03e <.L87>:
+8000a03e:	008bf713          	and	a4,s7,8
+8000a042:	d349                	beqz	a4,80009fc4 <.L84>
+8000a044:	0ff47413          	zext.b	s0,s0
+8000a048:	b7e5                	j	8000a030 <.L352>
+
+8000a04a <.L239>:
+8000a04a:	02b00c93          	li	s9,43
+8000a04e:	bf9d                	j	80009fc4 <.L84>
+
+8000a050 <.L39>:
+8000a050:	6789                	lui	a5,0x2
+8000a052:	00fbebb3          	or	s7,s7,a5
+
+8000a056 <.L54>:
+8000a056:	400be913          	or	s2,s7,1024
+
+8000a05a <.L91>:
+8000a05a:	00297793          	and	a5,s2,2
+8000a05e:	cbb5                	beqz	a5,8000a0d2 <.L92>
+8000a060:	000aa783          	lw	a5,0(s5)
+8000a064:	1008                	add	a0,sp,32
+8000a066:	004a8413          	add	s0,s5,4
+8000a06a:	4398                	lw	a4,0(a5)
+8000a06c:	8aa2                	mv	s5,s0
+8000a06e:	d03a                	sw	a4,32(sp)
+8000a070:	43d8                	lw	a4,4(a5)
+8000a072:	d23a                	sw	a4,36(sp)
+8000a074:	4798                	lw	a4,8(a5)
+8000a076:	d43a                	sw	a4,40(sp)
+8000a078:	47dc                	lw	a5,12(a5)
+8000a07a:	d63e                	sw	a5,44(sp)
+8000a07c:	f24ff0ef          	jal	800097a0 <__trunctfsf2>
+8000a080:	8baa                	mv	s7,a0
+
+8000a082 <.L93>:
+8000a082:	10097793          	and	a5,s2,256
+8000a086:	c3ad                	beqz	a5,8000a0e8 <.L240>
+8000a088:	e889                	bnez	s1,8000a09a <.L94>
+8000a08a:	6785                	lui	a5,0x1
+8000a08c:	c0078793          	add	a5,a5,-1024 # c00 <__NOR_CFG_OPTION_segment_size__>
+8000a090:	00f974b3          	and	s1,s2,a5
+8000a094:	8c9d                	sub	s1,s1,a5
+8000a096:	0014b493          	seqz	s1,s1
+
+8000a09a <.L94>:
+8000a09a:	855e                	mv	a0,s7
+8000a09c:	8d3fc0ef          	jal	8000696e <__SEGGER_RTL_float32_isinf>
+8000a0a0:	c531                	beqz	a0,8000a0ec <.L95>
+
+8000a0a2 <.L117>:
+8000a0a2:	6409                	lui	s0,0x2
+8000a0a4:	00000593          	li	a1,0
+8000a0a8:	855e                	mv	a0,s7
+8000a0aa:	00897433          	and	s0,s2,s0
+8000a0ae:	d04fc0ef          	jal	800065b2 <__ltsf2>
+8000a0b2:	3e055963          	bgez	a0,8000a4a4 <.L341>
+8000a0b6:	3e040463          	beqz	s0,8000a49e <.L244>
+8000a0ba:	81818413          	add	s0,gp,-2024 # 80003820 <.LC1>
+8000a0be:	a089                	j	8000a100 <.L122>
+
+8000a0c0 <.L57>:
+8000a0c0:	6789                	lui	a5,0x2
+8000a0c2:	00fbebb3          	or	s7,s7,a5
+
+8000a0c6 <.L53>:
+8000a0c6:	6905                	lui	s2,0x1
+8000a0c8:	80090913          	add	s2,s2,-2048 # 800 <__ILM_segment_used_end__+0x31a>
+
+8000a0cc <.L353>:
+8000a0cc:	012be933          	or	s2,s7,s2
+8000a0d0:	b769                	j	8000a05a <.L91>
+
+8000a0d2 <.L92>:
+8000a0d2:	007a8793          	add	a5,s5,7
+8000a0d6:	9be1                	and	a5,a5,-8
+8000a0d8:	4388                	lw	a0,0(a5)
+8000a0da:	43cc                	lw	a1,4(a5)
+8000a0dc:	00878a93          	add	s5,a5,8 # 2008 <__APB_SRAM_segment_size__+0x8>
+8000a0e0:	f7cfc0ef          	jal	8000685c <__truncdfsf2>
+8000a0e4:	8baa                	mv	s7,a0
+8000a0e6:	bf71                	j	8000a082 <.L93>
+
+8000a0e8 <.L240>:
+8000a0e8:	4499                	li	s1,6
+8000a0ea:	bf45                	j	8000a09a <.L94>
+
+8000a0ec <.L95>:
+8000a0ec:	855e                	mv	a0,s7
+8000a0ee:	86ffc0ef          	jal	8000695c <__SEGGER_RTL_float32_isnan>
+8000a0f2:	cd09                	beqz	a0,8000a10c <.L101>
+8000a0f4:	01291793          	sll	a5,s2,0x12
+8000a0f8:	0007d763          	bgez	a5,8000a106 <.L243>
+8000a0fc:	83818413          	add	s0,gp,-1992 # 80003840 <.LC5>
+
+8000a100 <.L122>:
+8000a100:	eff97913          	and	s2,s2,-257
+8000a104:	bb51                	j	80009e98 <.L65>
+
+8000a106 <.L243>:
+8000a106:	83c18413          	add	s0,gp,-1988 # 80003844 <.LC6>
+8000a10a:	bfdd                	j	8000a100 <.L122>
+
+8000a10c <.L101>:
+8000a10c:	855e                	mv	a0,s7
+8000a10e:	86ffc0ef          	jal	8000697c <__SEGGER_RTL_float32_isnormal>
+8000a112:	e119                	bnez	a0,8000a118 <.L103>
+8000a114:	00000b93          	li	s7,0
+
+8000a118 <.L103>:
+8000a118:	855e                	mv	a0,s7
+8000a11a:	845e                	mv	s0,s7
+8000a11c:	ea8ff0ef          	jal	800097c4 <__SEGGER_RTL_float32_signbit>
+8000a120:	c519                	beqz	a0,8000a12e <.L104>
+8000a122:	80000437          	lui	s0,0x80000
+8000a126:	06096913          	or	s2,s2,96
+8000a12a:	01744433          	xor	s0,s0,s7
+
+8000a12e <.L104>:
+8000a12e:	184c                	add	a1,sp,52
+8000a130:	8522                	mv	a0,s0
+8000a132:	edaff0ef          	jal	8000980c <frexpf>
+8000a136:	5752                	lw	a4,52(sp)
+8000a138:	478d                	li	a5,3
+8000a13a:	00000593          	li	a1,0
+8000a13e:	02e787b3          	mul	a5,a5,a4
+8000a142:	4729                	li	a4,10
+8000a144:	8522                	mv	a0,s0
+8000a146:	8ba2                	mv	s7,s0
+8000a148:	02e7c7b3          	div	a5,a5,a4
+8000a14c:	da3e                	sw	a5,52(sp)
+8000a14e:	d7eff0ef          	jal	800096cc <__eqsf2>
+8000a152:	24051063          	bnez	a0,8000a392 <.L105>
+
+8000a156 <.L111>:
+8000a156:	6785                	lui	a5,0x1
+8000a158:	c0078793          	add	a5,a5,-1024 # c00 <__NOR_CFG_OPTION_segment_size__>
+8000a15c:	00f97c33          	and	s8,s2,a5
+8000a160:	40000713          	li	a4,1024
+8000a164:	5552                	lw	a0,52(sp)
+8000a166:	24ec1d63          	bne	s8,a4,8000a3c0 <.L340>
+
+8000a16a <.L106>:
+8000a16a:	02600793          	li	a5,38
+8000a16e:	30f51f63          	bne	a0,a5,8000a48c <.L113>
+8000a172:	a1c1a583          	lw	a1,-1508(gp) # 80003a24 <.Lmerged_single+0x10>
+8000a176:	855e                	mv	a0,s7
+8000a178:	a90ff0ef          	jal	80009408 <__divsf3>
+
+8000a17c <.L354>:
+8000a17c:	00000593          	li	a1,0
+8000a180:	8baa                	mv	s7,a0
+8000a182:	842a                	mv	s0,a0
+8000a184:	d48ff0ef          	jal	800096cc <__eqsf2>
+8000a188:	cd39                	beqz	a0,8000a1e6 <.L116>
+8000a18a:	855e                	mv	a0,s7
+8000a18c:	fe2fc0ef          	jal	8000696e <__SEGGER_RTL_float32_isinf>
+8000a190:	f00519e3          	bnez	a0,8000a0a2 <.L117>
+8000a194:	57d2                	lw	a5,52(sp)
+8000a196:	4701                	li	a4,0
+
+8000a198 <.L118>:
+8000a198:	c63e                	sw	a5,12(sp)
+8000a19a:	00178d13          	add	s10,a5,1
+8000a19e:	a141a583          	lw	a1,-1516(gp) # 80003a1c <.Lmerged_single+0x8>
+8000a1a2:	855e                	mv	a0,s7
+8000a1a4:	cc3a                	sw	a4,24(sp)
+8000a1a6:	caefc0ef          	jal	80006654 <__gesf2>
+8000a1aa:	47b2                	lw	a5,12(sp)
+8000a1ac:	4762                	lw	a4,24(sp)
+8000a1ae:	30055763          	bgez	a0,8000a4bc <.L124>
+8000a1b2:	c319                	beqz	a4,8000a1b8 <.L125>
+8000a1b4:	845e                	mv	s0,s7
+8000a1b6:	da3e                	sw	a5,52(sp)
+
+8000a1b8 <.L125>:
+8000a1b8:	a101a703          	lw	a4,-1520(gp) # 80003a18 <.Lmerged_single+0x4>
+8000a1bc:	5d52                	lw	s10,52(sp)
+8000a1be:	a141ac83          	lw	s9,-1516(gp) # 80003a1c <.Lmerged_single+0x8>
+8000a1c2:	87a2                	mv	a5,s0
+8000a1c4:	4681                	li	a3,0
+8000a1c6:	c63a                	sw	a4,12(sp)
+
+8000a1c8 <.L126>:
+8000a1c8:	45b2                	lw	a1,12(sp)
+8000a1ca:	853e                	mv	a0,a5
+8000a1cc:	ce36                	sw	a3,28(sp)
+8000a1ce:	cc3e                	sw	a5,24(sp)
+8000a1d0:	be2fc0ef          	jal	800065b2 <__ltsf2>
+8000a1d4:	47e2                	lw	a5,24(sp)
+8000a1d6:	46f2                	lw	a3,28(sp)
+8000a1d8:	fffd0b93          	add	s7,s10,-1
+8000a1dc:	2e054963          	bltz	a0,8000a4ce <.L127>
+8000a1e0:	c299                	beqz	a3,8000a1e6 <.L116>
+8000a1e2:	843e                	mv	s0,a5
+8000a1e4:	da6a                	sw	s10,52(sp)
+
+8000a1e6 <.L116>:
+8000a1e6:	c499                	beqz	s1,8000a1f4 <.L129>
+8000a1e8:	6785                	lui	a5,0x1
+8000a1ea:	c0078793          	add	a5,a5,-1024 # c00 <__NOR_CFG_OPTION_segment_size__>
+8000a1ee:	00fc1363          	bne	s8,a5,8000a1f4 <.L129>
+8000a1f2:	14fd                	add	s1,s1,-1
+
+8000a1f4 <.L129>:
+8000a1f4:	40900533          	neg	a0,s1
+8000a1f8:	90efd0ef          	jal	80007306 <__SEGGER_RTL_pow10f>
+8000a1fc:	55fd                	li	a1,-1
+8000a1fe:	dcaff0ef          	jal	800097c8 <ldexpf>
+8000a202:	85a2                	mv	a1,s0
+8000a204:	a00fc0ef          	jal	80006404 <__addsf3>
+8000a208:	a141a583          	lw	a1,-1516(gp) # 80003a1c <.Lmerged_single+0x8>
+8000a20c:	8baa                	mv	s7,a0
+8000a20e:	842a                	mv	s0,a0
+8000a210:	c44fc0ef          	jal	80006654 <__gesf2>
+8000a214:	00054b63          	bltz	a0,8000a22a <.L130>
+8000a218:	57d2                	lw	a5,52(sp)
+8000a21a:	a141a583          	lw	a1,-1516(gp) # 80003a1c <.Lmerged_single+0x8>
+8000a21e:	855e                	mv	a0,s7
+8000a220:	0785                	add	a5,a5,1
+8000a222:	da3e                	sw	a5,52(sp)
+8000a224:	9e4ff0ef          	jal	80009408 <__divsf3>
+8000a228:	842a                	mv	s0,a0
+
+8000a22a <.L130>:
+8000a22a:	c622                	sw	s0,12(sp)
+8000a22c:	2a049963          	bnez	s1,8000a4de <.L132>
+
+8000a230 <.L135>:
+8000a230:	4481                	li	s1,0
+
+8000a232 <.L133>:
+8000a232:	00548793          	add	a5,s1,5
+8000a236:	7c7d                	lui	s8,0xfffff
+8000a238:	40fb0b33          	sub	s6,s6,a5
+8000a23c:	08097793          	and	a5,s2,128
+8000a240:	7ffc0c13          	add	s8,s8,2047 # fffff7ff <__APB_SRAM_segment_end__+0xbf0d7ff>
+8000a244:	8fc5                	or	a5,a5,s1
+8000a246:	01897c33          	and	s8,s2,s8
+8000a24a:	c391                	beqz	a5,8000a24e <.L139>
+8000a24c:	1b7d                	add	s6,s6,-1
+
+8000a24e <.L139>:
+8000a24e:	01391793          	sll	a5,s2,0x13
+8000a252:	4d05                	li	s10,1
+8000a254:	0207dc63          	bgez	a5,8000a28c <.L140>
+8000a258:	5bd2                	lw	s7,52(sp)
+8000a25a:	470d                	li	a4,3
+8000a25c:	02ebe733          	rem	a4,s7,a4
+8000a260:	c31d                	beqz	a4,8000a286 <.L141>
+8000a262:	0709                	add	a4,a4,2
+8000a264:	56b5                	li	a3,-19
+8000a266:	40e6d733          	sra	a4,a3,a4
+8000a26a:	8b05                	and	a4,a4,1
+8000a26c:	2c070663          	beqz	a4,8000a538 <.L142>
+8000a270:	a141a583          	lw	a1,-1516(gp) # 80003a1c <.Lmerged_single+0x8>
+8000a274:	4532                	lw	a0,12(sp)
+8000a276:	1b7d                	add	s6,s6,-1
+8000a278:	4d09                	li	s10,2
+8000a27a:	fcffe0ef          	jal	80009248 <__mulsf3>
+8000a27e:	fffb8793          	add	a5,s7,-1
+8000a282:	842a                	mv	s0,a0
+8000a284:	da3e                	sw	a5,52(sp)
+
+8000a286 <.L141>:
+8000a286:	0004d363          	bgez	s1,8000a28c <.L140>
+8000a28a:	4481                	li	s1,0
+
+8000a28c <.L140>:
+8000a28c:	06097913          	and	s2,s2,96
+8000a290:	00090363          	beqz	s2,8000a296 <.L144>
+8000a294:	1b7d                	add	s6,s6,-1
+
+8000a296 <.L144>:
+8000a296:	5552                	lw	a0,52(sp)
+8000a298:	fdffc0ef          	jal	80007276 <abs>
+8000a29c:	06300793          	li	a5,99
+8000a2a0:	00a7d363          	bge	a5,a0,8000a2a6 <.L145>
+8000a2a4:	1b7d                	add	s6,s6,-1
+
+8000a2a6 <.L145>:
+8000a2a6:	8522                	mv	a0,s0
+8000a2a8:	c50ff0ef          	jal	800096f8 <__fixunssfdi>
+8000a2ac:	8bae                	mv	s7,a1
+8000a2ae:	8caa                	mv	s9,a0
+8000a2b0:	d02fc0ef          	jal	800067b2 <__floatundisf>
+8000a2b4:	85aa                	mv	a1,a0
+8000a2b6:	8522                	mv	a0,s0
+8000a2b8:	944fc0ef          	jal	800063fc <__subsf3>
+8000a2bc:	842a                	mv	s0,a0
+
+8000a2be <.L146>:
+8000a2be:	895a                	mv	s2,s6
+8000a2c0:	000b5363          	bgez	s6,8000a2c6 <.L165>
+8000a2c4:	4901                	li	s2,0
+
+8000a2c6 <.L165>:
+8000a2c6:	210c7793          	and	a5,s8,528
+8000a2ca:	e399                	bnez	a5,8000a2d0 <.L167>
+
+8000a2cc <.L166>:
+8000a2cc:	2e091d63          	bnez	s2,8000a5c6 <.L168>
+
+8000a2d0 <.L167>:
+8000a2d0:	020c7713          	and	a4,s8,32
+8000a2d4:	040c7793          	and	a5,s8,64
+8000a2d8:	2e070e63          	beqz	a4,8000a5d4 <.L169>
+8000a2dc:	02b00593          	li	a1,43
+8000a2e0:	c399                	beqz	a5,8000a2e6 <.L358>
+8000a2e2:	02d00593          	li	a1,45
+
+8000a2e6 <.L358>:
+8000a2e6:	854e                	mv	a0,s3
+8000a2e8:	fc4ff0ef          	jal	80009aac <__SEGGER_RTL_putc>
+
+8000a2ec <.L171>:
+8000a2ec:	010c7793          	and	a5,s8,16
+8000a2f0:	e399                	bnez	a5,8000a2f6 <.L173>
+
+8000a2f2 <.L172>:
+8000a2f2:	2e091663          	bnez	s2,8000a5de <.L174>
+
+8000a2f6 <.L173>:
+8000a2f6:	80003b37          	lui	s6,0x80003
+8000a2fa:	098b0b13          	add	s6,s6,152 # 80003098 <__SEGGER_RTL_ipow10>
+
+8000a2fe <.L178>:
+8000a2fe:	1d7d                	add	s10,s10,-1
+8000a300:	003d1793          	sll	a5,s10,0x3
+8000a304:	97da                	add	a5,a5,s6
+8000a306:	4398                	lw	a4,0(a5)
+8000a308:	43dc                	lw	a5,4(a5)
+8000a30a:	03000593          	li	a1,48
+
+8000a30e <.L175>:
+8000a30e:	00fbe663          	bltu	s7,a5,8000a31a <.L258>
+8000a312:	2d779d63          	bne	a5,s7,8000a5ec <.L176>
+8000a316:	2cecfb63          	bgeu	s9,a4,8000a5ec <.L176>
+
+8000a31a <.L258>:
+8000a31a:	854e                	mv	a0,s3
+8000a31c:	f90ff0ef          	jal	80009aac <__SEGGER_RTL_putc>
+8000a320:	fc0d1fe3          	bnez	s10,8000a2fe <.L178>
+8000a324:	6b85                	lui	s7,0x1
+8000a326:	800b8b93          	add	s7,s7,-2048 # 800 <__ILM_segment_used_end__+0x31a>
+8000a32a:	017c7bb3          	and	s7,s8,s7
+8000a32e:	2e0b9363          	bnez	s7,8000a614 <.L179>
+
+8000a332 <.L183>:
+8000a332:	080c7793          	and	a5,s8,128
+8000a336:	8fc5                	or	a5,a5,s1
+8000a338:	c3a1                	beqz	a5,8000a378 <.L181>
+8000a33a:	02e00593          	li	a1,46
+8000a33e:	854e                	mv	a0,s3
+8000a340:	f6cff0ef          	jal	80009aac <__SEGGER_RTL_putc>
+8000a344:	47c1                	li	a5,16
+8000a346:	8ca6                	mv	s9,s1
+8000a348:	2c97da63          	bge	a5,s1,8000a61c <.L186>
+8000a34c:	4cc1                	li	s9,16
+
+8000a34e <.L187>:
+8000a34e:	419484b3          	sub	s1,s1,s9
+8000a352:	8566                	mv	a0,s9
+8000a354:	000b8563          	beqz	s7,8000a35e <.L359>
+8000a358:	5552                	lw	a0,52(sp)
+8000a35a:	40ac8533          	sub	a0,s9,a0
+
+8000a35e <.L359>:
+8000a35e:	fa9fc0ef          	jal	80007306 <__SEGGER_RTL_pow10f>
+8000a362:	85a2                	mv	a1,s0
+8000a364:	ee5fe0ef          	jal	80009248 <__mulsf3>
+8000a368:	b90ff0ef          	jal	800096f8 <__fixunssfdi>
+8000a36c:	8baa                	mv	s7,a0
+8000a36e:	842e                	mv	s0,a1
+
+8000a370 <.L193>:
+8000a370:	2a0c9a63          	bnez	s9,8000a624 <.L194>
+
+8000a374 <.L195>:
+8000a374:	2e049563          	bnez	s1,8000a65e <.L196>
+
+8000a378 <.L181>:
+8000a378:	400c7793          	and	a5,s8,1024
+8000a37c:	2e079863          	bnez	a5,8000a66c <.L184>
+
+8000a380 <.L201>:
+8000a380:	a2090ce3          	beqz	s2,80009db8 <.L4>
+8000a384:	197d                	add	s2,s2,-1
+8000a386:	02000593          	li	a1,32
+8000a38a:	ae81                	j	8000a6da <.L360>
+
+8000a38c <.L108>:
+8000a38c:	57d2                	lw	a5,52(sp)
+8000a38e:	0785                	add	a5,a5,1
+8000a390:	da3e                	sw	a5,52(sp)
+
+8000a392 <.L105>:
+8000a392:	5552                	lw	a0,52(sp)
+8000a394:	0505                	add	a0,a0,1 # 1001 <__fw_size__+0x1>
+8000a396:	f71fc0ef          	jal	80007306 <__SEGGER_RTL_pow10f>
+8000a39a:	85aa                	mv	a1,a0
+8000a39c:	855e                	mv	a0,s7
+8000a39e:	a84fc0ef          	jal	80006622 <__gtsf2>
+8000a3a2:	fea045e3          	bgtz	a0,8000a38c <.L108>
+
+8000a3a6 <.L109>:
+8000a3a6:	5552                	lw	a0,52(sp)
+8000a3a8:	f5ffc0ef          	jal	80007306 <__SEGGER_RTL_pow10f>
+8000a3ac:	85aa                	mv	a1,a0
+8000a3ae:	855e                	mv	a0,s7
+8000a3b0:	a02fc0ef          	jal	800065b2 <__ltsf2>
+8000a3b4:	da0551e3          	bgez	a0,8000a156 <.L111>
+8000a3b8:	57d2                	lw	a5,52(sp)
+8000a3ba:	17fd                	add	a5,a5,-1
+8000a3bc:	da3e                	sw	a5,52(sp)
+8000a3be:	b7e5                	j	8000a3a6 <.L109>
+
+8000a3c0 <.L340>:
+8000a3c0:	00fc1763          	bne	s8,a5,8000a3ce <.L112>
+8000a3c4:	da9553e3          	bge	a0,s1,8000a16a <.L106>
+8000a3c8:	57f1                	li	a5,-4
+8000a3ca:	0cf54163          	blt	a0,a5,8000a48c <.L113>
+
+8000a3ce <.L112>:
+8000a3ce:	08097793          	and	a5,s2,128
+8000a3d2:	c63e                	sw	a5,12(sp)
+8000a3d4:	40097793          	and	a5,s2,1024
+8000a3d8:	c789                	beqz	a5,8000a3e2 <.L147>
+8000a3da:	47b9                	li	a5,14
+8000a3dc:	16a7da63          	bge	a5,a0,8000a550 <.L148>
+
+8000a3e0 <.L153>:
+8000a3e0:	4481                	li	s1,0
+
+8000a3e2 <.L147>:
+8000a3e2:	57d2                	lw	a5,52(sp)
+8000a3e4:	40900533          	neg	a0,s1
+8000a3e8:	bff97c13          	and	s8,s2,-1025
+8000a3ec:	ff178713          	add	a4,a5,-15
+8000a3f0:	00e55463          	bge	a0,a4,8000a3f8 <.L154>
+8000a3f4:	ff078513          	add	a0,a5,-16
+
+8000a3f8 <.L154>:
+8000a3f8:	f0ffc0ef          	jal	80007306 <__SEGGER_RTL_pow10f>
+8000a3fc:	55fd                	li	a1,-1
+8000a3fe:	bcaff0ef          	jal	800097c8 <ldexpf>
+8000a402:	85aa                	mv	a1,a0
+8000a404:	855e                	mv	a0,s7
+8000a406:	ffffb0ef          	jal	80006404 <__addsf3>
+8000a40a:	8d2a                	mv	s10,a0
+8000a40c:	842a                	mv	s0,a0
+8000a40e:	5552                	lw	a0,52(sp)
+8000a410:	0505                	add	a0,a0,1
+8000a412:	ef5fc0ef          	jal	80007306 <__SEGGER_RTL_pow10f>
+8000a416:	85ea                	mv	a1,s10
+8000a418:	9d4fc0ef          	jal	800065ec <__lesf2>
+8000a41c:	00a04563          	bgtz	a0,8000a426 <.L156>
+8000a420:	57d2                	lw	a5,52(sp)
+8000a422:	0785                	add	a5,a5,1
+8000a424:	da3e                	sw	a5,52(sp)
+
+8000a426 <.L156>:
+8000a426:	57d2                	lw	a5,52(sp)
+8000a428:	1807c963          	bltz	a5,8000a5ba <.L158>
+8000a42c:	4541                	li	a0,16
+8000a42e:	16f55863          	bge	a0,a5,8000a59e <.L159>
+8000a432:	ff078713          	add	a4,a5,-16
+8000a436:	8d1d                	sub	a0,a0,a5
+8000a438:	da3a                	sw	a4,52(sp)
+8000a43a:	ecdfc0ef          	jal	80007306 <__SEGGER_RTL_pow10f>
+8000a43e:	85ea                	mv	a1,s10
+8000a440:	e09fe0ef          	jal	80009248 <__mulsf3>
+8000a444:	ab4ff0ef          	jal	800096f8 <__fixunssfdi>
+8000a448:	8caa                	mv	s9,a0
+8000a44a:	8bae                	mv	s7,a1
+8000a44c:	00000413          	li	s0,0
+
+8000a450 <.L160>:
+8000a450:	800037b7          	lui	a5,0x80003
+8000a454:	09878793          	add	a5,a5,152 # 80003098 <__SEGGER_RTL_ipow10>
+8000a458:	4d05                	li	s10,1
+
+8000a45a <.L161>:
+8000a45a:	47d8                	lw	a4,12(a5)
+8000a45c:	07a1                	add	a5,a5,8
+8000a45e:	00ebe763          	bltu	s7,a4,8000a46c <.L257>
+8000a462:	17771063          	bne	a4,s7,8000a5c2 <.L162>
+8000a466:	4398                	lw	a4,0(a5)
+8000a468:	14ecfd63          	bgeu	s9,a4,8000a5c2 <.L162>
+
+8000a46c <.L257>:
+8000a46c:	5752                	lw	a4,52(sp)
+8000a46e:	009d07b3          	add	a5,s10,s1
+8000a472:	97ba                	add	a5,a5,a4
+8000a474:	40fb0b33          	sub	s6,s6,a5
+8000a478:	47b2                	lw	a5,12(sp)
+8000a47a:	8fc5                	or	a5,a5,s1
+8000a47c:	c391                	beqz	a5,8000a480 <.L164>
+8000a47e:	1b7d                	add	s6,s6,-1
+
+8000a480 <.L164>:
+8000a480:	06097793          	and	a5,s2,96
+8000a484:	e2078de3          	beqz	a5,8000a2be <.L146>
+8000a488:	1b7d                	add	s6,s6,-1
+8000a48a:	bd15                	j	8000a2be <.L146>
+
+8000a48c <.L113>:
+8000a48c:	40a00533          	neg	a0,a0
+8000a490:	e77fc0ef          	jal	80007306 <__SEGGER_RTL_pow10f>
+8000a494:	85aa                	mv	a1,a0
+8000a496:	855e                	mv	a0,s7
+8000a498:	db1fe0ef          	jal	80009248 <__mulsf3>
+8000a49c:	b1c5                	j	8000a17c <.L354>
+
+8000a49e <.L244>:
+8000a49e:	82018413          	add	s0,gp,-2016 # 80003828 <.LC2>
+8000a4a2:	b9b9                	j	8000a100 <.L122>
+
+8000a4a4 <.L341>:
+8000a4a4:	c809                	beqz	s0,8000a4b6 <.L245>
+8000a4a6:	82818413          	add	s0,gp,-2008 # 80003830 <.LC3>
+
+8000a4aa <.L123>:
+8000a4aa:	02097793          	and	a5,s2,32
+8000a4ae:	c40799e3          	bnez	a5,8000a100 <.L122>
+8000a4b2:	0405                	add	s0,s0,1 # 80000001 <_extram_size+0x7e000001>
+8000a4b4:	b1b1                	j	8000a100 <.L122>
+
+8000a4b6 <.L245>:
+8000a4b6:	83018413          	add	s0,gp,-2000 # 80003838 <.LC4>
+8000a4ba:	bfc5                	j	8000a4aa <.L123>
+
+8000a4bc <.L124>:
+8000a4bc:	a141a583          	lw	a1,-1516(gp) # 80003a1c <.Lmerged_single+0x8>
+8000a4c0:	855e                	mv	a0,s7
+8000a4c2:	f47fe0ef          	jal	80009408 <__divsf3>
+8000a4c6:	8baa                	mv	s7,a0
+8000a4c8:	87ea                	mv	a5,s10
+8000a4ca:	4705                	li	a4,1
+8000a4cc:	b1f1                	j	8000a198 <.L118>
+
+8000a4ce <.L127>:
+8000a4ce:	853e                	mv	a0,a5
+8000a4d0:	85e6                	mv	a1,s9
+8000a4d2:	d77fe0ef          	jal	80009248 <__mulsf3>
+8000a4d6:	87aa                	mv	a5,a0
+8000a4d8:	8d5e                	mv	s10,s7
+8000a4da:	4685                	li	a3,1
+8000a4dc:	b1f5                	j	8000a1c8 <.L126>
+
+8000a4de <.L132>:
+8000a4de:	6785                	lui	a5,0x1
+8000a4e0:	88078793          	add	a5,a5,-1920 # 880 <__ILM_segment_used_end__+0x39a>
+8000a4e4:	00f977b3          	and	a5,s2,a5
+8000a4e8:	80078793          	add	a5,a5,-2048
+8000a4ec:	d40793e3          	bnez	a5,8000a232 <.L133>
+8000a4f0:	47c1                	li	a5,16
+8000a4f2:	0097d363          	bge	a5,s1,8000a4f8 <.L134>
+8000a4f6:	44c1                	li	s1,16
+
+8000a4f8 <.L134>:
+8000a4f8:	8526                	mv	a0,s1
+8000a4fa:	e0dfc0ef          	jal	80007306 <__SEGGER_RTL_pow10f>
+8000a4fe:	85a2                	mv	a1,s0
+8000a500:	d49fe0ef          	jal	80009248 <__mulsf3>
+8000a504:	9f4ff0ef          	jal	800096f8 <__fixunssfdi>
+8000a508:	00a5e7b3          	or	a5,a1,a0
+8000a50c:	8c2a                	mv	s8,a0
+8000a50e:	8d2e                	mv	s10,a1
+8000a510:	d20780e3          	beqz	a5,8000a230 <.L135>
+
+8000a514 <.L357>:
+8000a514:	4629                	li	a2,10
+8000a516:	4681                	li	a3,0
+8000a518:	923fc0ef          	jal	80006e3a <__umoddi3>
+8000a51c:	8d4d                	or	a0,a0,a1
+8000a51e:	d0051ae3          	bnez	a0,8000a232 <.L133>
+8000a522:	8562                	mv	a0,s8
+8000a524:	85ea                	mv	a1,s10
+8000a526:	4629                	li	a2,10
+8000a528:	4681                	li	a3,0
+8000a52a:	cf0fc0ef          	jal	80006a1a <__udivdi3>
+8000a52e:	14fd                	add	s1,s1,-1
+8000a530:	8c2a                	mv	s8,a0
+8000a532:	8d2e                	mv	s10,a1
+8000a534:	f0e5                	bnez	s1,8000a514 <.L357>
+8000a536:	b9ed                	j	8000a230 <.L135>
+
+8000a538 <.L142>:
+8000a538:	a181a583          	lw	a1,-1512(gp) # 80003a20 <.Lmerged_single+0xc>
+8000a53c:	4532                	lw	a0,12(sp)
+8000a53e:	1b79                	add	s6,s6,-2
+8000a540:	4d0d                	li	s10,3
+8000a542:	d07fe0ef          	jal	80009248 <__mulsf3>
+8000a546:	ffeb8793          	add	a5,s7,-2
+8000a54a:	842a                	mv	s0,a0
+8000a54c:	da3e                	sw	a5,52(sp)
+8000a54e:	bb25                	j	8000a286 <.L141>
+
+8000a550 <.L148>:
+8000a550:	0505                	add	a0,a0,1
+8000a552:	8c89                	sub	s1,s1,a0
+8000a554:	47c1                	li	a5,16
+8000a556:	0097d363          	bge	a5,s1,8000a55c <.L149>
+8000a55a:	44c1                	li	s1,16
+
+8000a55c <.L149>:
+8000a55c:	08097793          	and	a5,s2,128
+8000a560:	e80791e3          	bnez	a5,8000a3e2 <.L147>
+8000a564:	a0c1ac03          	lw	s8,-1524(gp) # 80003a14 <.Lmerged_single>
+8000a568:	a141a403          	lw	s0,-1516(gp) # 80003a1c <.Lmerged_single+0x8>
+
+8000a56c <.L150>:
+8000a56c:	e6048ae3          	beqz	s1,8000a3e0 <.L153>
+8000a570:	8526                	mv	a0,s1
+8000a572:	d95fc0ef          	jal	80007306 <__SEGGER_RTL_pow10f>
+8000a576:	85aa                	mv	a1,a0
+8000a578:	855e                	mv	a0,s7
+8000a57a:	ccffe0ef          	jal	80009248 <__mulsf3>
+8000a57e:	85e2                	mv	a1,s8
+8000a580:	e85fb0ef          	jal	80006404 <__addsf3>
+8000a584:	c0afc0ef          	jal	8000698e <floorf>
+8000a588:	85a2                	mv	a1,s0
+8000a58a:	aaeff0ef          	jal	80009838 <fmodf>
+8000a58e:	00000593          	li	a1,0
+8000a592:	93aff0ef          	jal	800096cc <__eqsf2>
+8000a596:	e40516e3          	bnez	a0,8000a3e2 <.L147>
+8000a59a:	14fd                	add	s1,s1,-1
+8000a59c:	bfc1                	j	8000a56c <.L150>
+
+8000a59e <.L159>:
+8000a59e:	856a                	mv	a0,s10
+8000a5a0:	da02                	sw	zero,52(sp)
+8000a5a2:	956ff0ef          	jal	800096f8 <__fixunssfdi>
+8000a5a6:	8bae                	mv	s7,a1
+8000a5a8:	8caa                	mv	s9,a0
+8000a5aa:	a08fc0ef          	jal	800067b2 <__floatundisf>
+8000a5ae:	85aa                	mv	a1,a0
+8000a5b0:	856a                	mv	a0,s10
+8000a5b2:	e4bfb0ef          	jal	800063fc <__subsf3>
+8000a5b6:	842a                	mv	s0,a0
+8000a5b8:	bd61                	j	8000a450 <.L160>
+
+8000a5ba <.L158>:
+8000a5ba:	da02                	sw	zero,52(sp)
+8000a5bc:	4c81                	li	s9,0
+8000a5be:	4b81                	li	s7,0
+8000a5c0:	bd41                	j	8000a450 <.L160>
+
+8000a5c2 <.L162>:
+8000a5c2:	0d05                	add	s10,s10,1
+8000a5c4:	bd59                	j	8000a45a <.L161>
+
+8000a5c6 <.L168>:
+8000a5c6:	02000593          	li	a1,32
+8000a5ca:	854e                	mv	a0,s3
+8000a5cc:	197d                	add	s2,s2,-1
+8000a5ce:	cdeff0ef          	jal	80009aac <__SEGGER_RTL_putc>
+8000a5d2:	b9ed                	j	8000a2cc <.L166>
+
+8000a5d4 <.L169>:
+8000a5d4:	d0078ce3          	beqz	a5,8000a2ec <.L171>
+8000a5d8:	02000593          	li	a1,32
+8000a5dc:	b329                	j	8000a2e6 <.L358>
+
+8000a5de <.L174>:
+8000a5de:	03000593          	li	a1,48
+8000a5e2:	854e                	mv	a0,s3
+8000a5e4:	197d                	add	s2,s2,-1
+8000a5e6:	cc6ff0ef          	jal	80009aac <__SEGGER_RTL_putc>
+8000a5ea:	b321                	j	8000a2f2 <.L172>
+
+8000a5ec <.L176>:
+8000a5ec:	40ec86b3          	sub	a3,s9,a4
+8000a5f0:	00dcb633          	sltu	a2,s9,a3
+8000a5f4:	0585                	add	a1,a1,1
+8000a5f6:	40fb8bb3          	sub	s7,s7,a5
+8000a5fa:	0ff5f593          	zext.b	a1,a1
+8000a5fe:	8cb6                	mv	s9,a3
+8000a600:	40cb8bb3          	sub	s7,s7,a2
+8000a604:	b329                	j	8000a30e <.L175>
+
+8000a606 <.L182>:
+8000a606:	17fd                	add	a5,a5,-1
+8000a608:	03000593          	li	a1,48
+8000a60c:	854e                	mv	a0,s3
+8000a60e:	da3e                	sw	a5,52(sp)
+8000a610:	c9cff0ef          	jal	80009aac <__SEGGER_RTL_putc>
+
+8000a614 <.L179>:
+8000a614:	57d2                	lw	a5,52(sp)
+8000a616:	fef048e3          	bgtz	a5,8000a606 <.L182>
+8000a61a:	bb21                	j	8000a332 <.L183>
+
+8000a61c <.L186>:
+8000a61c:	d204d9e3          	bgez	s1,8000a34e <.L187>
+8000a620:	4c81                	li	s9,0
+8000a622:	b335                	j	8000a34e <.L187>
+
+8000a624 <.L194>:
+8000a624:	1cfd                	add	s9,s9,-1
+8000a626:	003c9793          	sll	a5,s9,0x3
+8000a62a:	97da                	add	a5,a5,s6
+8000a62c:	4398                	lw	a4,0(a5)
+8000a62e:	43dc                	lw	a5,4(a5)
+8000a630:	03000593          	li	a1,48
+
+8000a634 <.L190>:
+8000a634:	00f46663          	bltu	s0,a5,8000a640 <.L259>
+8000a638:	00879863          	bne	a5,s0,8000a648 <.L191>
+8000a63c:	00ebf663          	bgeu	s7,a4,8000a648 <.L191>
+
+8000a640 <.L259>:
+8000a640:	854e                	mv	a0,s3
+8000a642:	c6aff0ef          	jal	80009aac <__SEGGER_RTL_putc>
+8000a646:	b32d                	j	8000a370 <.L193>
+
+8000a648 <.L191>:
+8000a648:	40eb86b3          	sub	a3,s7,a4
+8000a64c:	00dbb633          	sltu	a2,s7,a3
+8000a650:	0585                	add	a1,a1,1
+8000a652:	8c1d                	sub	s0,s0,a5
+8000a654:	0ff5f593          	zext.b	a1,a1
+8000a658:	8bb6                	mv	s7,a3
+8000a65a:	8c11                	sub	s0,s0,a2
+8000a65c:	bfe1                	j	8000a634 <.L190>
+
+8000a65e <.L196>:
+8000a65e:	03000593          	li	a1,48
+8000a662:	854e                	mv	a0,s3
+8000a664:	14fd                	add	s1,s1,-1
+8000a666:	c46ff0ef          	jal	80009aac <__SEGGER_RTL_putc>
+8000a66a:	b329                	j	8000a374 <.L195>
+
+8000a66c <.L184>:
+8000a66c:	012c1793          	sll	a5,s8,0x12
+8000a670:	06500593          	li	a1,101
+8000a674:	0007d463          	bgez	a5,8000a67c <.L197>
+8000a678:	04500593          	li	a1,69
+
+8000a67c <.L197>:
+8000a67c:	854e                	mv	a0,s3
+8000a67e:	c2eff0ef          	jal	80009aac <__SEGGER_RTL_putc>
+8000a682:	57d2                	lw	a5,52(sp)
+8000a684:	0407df63          	bgez	a5,8000a6e2 <.L198>
+8000a688:	02d00593          	li	a1,45
+8000a68c:	854e                	mv	a0,s3
+8000a68e:	c1eff0ef          	jal	80009aac <__SEGGER_RTL_putc>
+8000a692:	57d2                	lw	a5,52(sp)
+8000a694:	40f007b3          	neg	a5,a5
+8000a698:	da3e                	sw	a5,52(sp)
+
+8000a69a <.L199>:
+8000a69a:	55d2                	lw	a1,52(sp)
+8000a69c:	06300793          	li	a5,99
+8000a6a0:	00b7df63          	bge	a5,a1,8000a6be <.L200>
+8000a6a4:	06400413          	li	s0,100
+8000a6a8:	0285c5b3          	div	a1,a1,s0
+8000a6ac:	854e                	mv	a0,s3
+8000a6ae:	03058593          	add	a1,a1,48
+8000a6b2:	bfaff0ef          	jal	80009aac <__SEGGER_RTL_putc>
+8000a6b6:	57d2                	lw	a5,52(sp)
+8000a6b8:	0287e7b3          	rem	a5,a5,s0
+8000a6bc:	da3e                	sw	a5,52(sp)
+
+8000a6be <.L200>:
+8000a6be:	55d2                	lw	a1,52(sp)
+8000a6c0:	4429                	li	s0,10
+8000a6c2:	854e                	mv	a0,s3
+8000a6c4:	0285c5b3          	div	a1,a1,s0
+8000a6c8:	03058593          	add	a1,a1,48
+8000a6cc:	be0ff0ef          	jal	80009aac <__SEGGER_RTL_putc>
+8000a6d0:	55d2                	lw	a1,52(sp)
+8000a6d2:	0285e5b3          	rem	a1,a1,s0
+8000a6d6:	03058593          	add	a1,a1,48
+
+8000a6da <.L360>:
+8000a6da:	854e                	mv	a0,s3
+8000a6dc:	bd0ff0ef          	jal	80009aac <__SEGGER_RTL_putc>
+8000a6e0:	b145                	j	8000a380 <.L201>
+
+8000a6e2 <.L198>:
+8000a6e2:	02b00593          	li	a1,43
+8000a6e6:	854e                	mv	a0,s3
+8000a6e8:	bc4ff0ef          	jal	80009aac <__SEGGER_RTL_putc>
+8000a6ec:	b77d                	j	8000a69a <.L199>
+
+8000a6ee <.L205>:
+8000a6ee:	6d21                	lui	s10,0x8
+8000a6f0:	892e                	mv	s2,a1
+8000a6f2:	4c01                	li	s8,0
+8000a6f4:	01abfd33          	and	s10,s7,s10
+8000a6f8:	470d                	li	a4,3
+8000a6fa:	02c00813          	li	a6,44
+
+8000a6fe <.L208>:
+8000a6fe:	012467b3          	or	a5,s0,s2
+8000a702:	cbb5                	beqz	a5,8000a776 <.L206>
+8000a704:	000d0d63          	beqz	s10,8000a71e <.L214>
+8000a708:	003c7793          	and	a5,s8,3
+8000a70c:	00e79963          	bne	a5,a4,8000a71e <.L214>
+8000a710:	030c0793          	add	a5,s8,48
+8000a714:	1018                	add	a4,sp,32
+8000a716:	97ba                	add	a5,a5,a4
+8000a718:	ff078423          	sb	a6,-24(a5)
+8000a71c:	0c05                	add	s8,s8,1
+
+8000a71e <.L214>:
+8000a71e:	1018                	add	a4,sp,32
+8000a720:	030c0793          	add	a5,s8,48
+8000a724:	97ba                	add	a5,a5,a4
+8000a726:	4629                	li	a2,10
+8000a728:	4681                	li	a3,0
+8000a72a:	8522                	mv	a0,s0
+8000a72c:	85ca                	mv	a1,s2
+8000a72e:	c63e                	sw	a5,12(sp)
+8000a730:	f0afc0ef          	jal	80006e3a <__umoddi3>
+8000a734:	47b2                	lw	a5,12(sp)
+8000a736:	03050513          	add	a0,a0,48
+8000a73a:	85ca                	mv	a1,s2
+8000a73c:	fea78423          	sb	a0,-24(a5)
+8000a740:	4629                	li	a2,10
+8000a742:	8522                	mv	a0,s0
+8000a744:	4681                	li	a3,0
+8000a746:	ad4fc0ef          	jal	80006a1a <__udivdi3>
+8000a74a:	0c05                	add	s8,s8,1
+8000a74c:	842a                	mv	s0,a0
+8000a74e:	892e                	mv	s2,a1
+8000a750:	02c00813          	li	a6,44
+8000a754:	470d                	li	a4,3
+8000a756:	b765                	j	8000a6fe <.L208>
+
+8000a758 <.L204>:
+8000a758:	6709                	lui	a4,0x2
+8000a75a:	800036b7          	lui	a3,0x80003
+8000a75e:	80004637          	lui	a2,0x80004
+8000a762:	4c01                	li	s8,0
+8000a764:	00ebf733          	and	a4,s7,a4
+8000a768:	7f868693          	add	a3,a3,2040 # 800037f8 <__SEGGER_RTL_hex_lc>
+8000a76c:	80860613          	add	a2,a2,-2040 # 80003808 <__SEGGER_RTL_hex_uc>
+
+8000a770 <.L209>:
+8000a770:	00b467b3          	or	a5,s0,a1
+8000a774:	e38d                	bnez	a5,8000a796 <.L212>
+
+8000a776 <.L206>:
+8000a776:	418484b3          	sub	s1,s1,s8
+8000a77a:	0004d363          	bgez	s1,8000a780 <.L216>
+8000a77e:	4481                	li	s1,0
+
+8000a780 <.L216>:
+8000a780:	409b0b33          	sub	s6,s6,s1
+8000a784:	0ff00793          	li	a5,255
+8000a788:	418b0b33          	sub	s6,s6,s8
+8000a78c:	0397f863          	bgeu	a5,s9,8000a7bc <.L217>
+8000a790:	1b7d                	add	s6,s6,-1
+
+8000a792 <.L218>:
+8000a792:	1b7d                	add	s6,s6,-1
+8000a794:	a035                	j	8000a7c0 <.L219>
+
+8000a796 <.L212>:
+8000a796:	00f47793          	and	a5,s0,15
+8000a79a:	cf19                	beqz	a4,8000a7b8 <.L210>
+8000a79c:	97b2                	add	a5,a5,a2
+
+8000a79e <.L361>:
+8000a79e:	0007c783          	lbu	a5,0(a5)
+8000a7a2:	1828                	add	a0,sp,56
+8000a7a4:	9562                	add	a0,a0,s8
+8000a7a6:	00f50023          	sb	a5,0(a0)
+8000a7aa:	8011                	srl	s0,s0,0x4
+8000a7ac:	01c59793          	sll	a5,a1,0x1c
+8000a7b0:	0c05                	add	s8,s8,1
+8000a7b2:	8c5d                	or	s0,s0,a5
+8000a7b4:	8191                	srl	a1,a1,0x4
+8000a7b6:	bf6d                	j	8000a770 <.L209>
+
+8000a7b8 <.L210>:
+8000a7b8:	97b6                	add	a5,a5,a3
+8000a7ba:	b7d5                	j	8000a79e <.L361>
+
+8000a7bc <.L217>:
+8000a7bc:	fc0c9be3          	bnez	s9,8000a792 <.L218>
+
+8000a7c0 <.L219>:
+8000a7c0:	200bf793          	and	a5,s7,512
+8000a7c4:	e799                	bnez	a5,8000a7d2 <.L220>
+8000a7c6:	865a                	mv	a2,s6
+8000a7c8:	85de                	mv	a1,s7
+8000a7ca:	854e                	mv	a0,s3
+8000a7cc:	bb3fc0ef          	jal	8000737e <__SEGGER_RTL_pre_padding>
+8000a7d0:	4b01                	li	s6,0
+
+8000a7d2 <.L220>:
+8000a7d2:	0ff00793          	li	a5,255
+8000a7d6:	0197fc63          	bgeu	a5,s9,8000a7ee <.L221>
+8000a7da:	03000593          	li	a1,48
+8000a7de:	854e                	mv	a0,s3
+8000a7e0:	accff0ef          	jal	80009aac <__SEGGER_RTL_putc>
+
+8000a7e4 <.L222>:
+8000a7e4:	85e6                	mv	a1,s9
+8000a7e6:	854e                	mv	a0,s3
+8000a7e8:	ac4ff0ef          	jal	80009aac <__SEGGER_RTL_putc>
+8000a7ec:	a019                	j	8000a7f2 <.L223>
+
+8000a7ee <.L221>:
+8000a7ee:	fe0c9be3          	bnez	s9,8000a7e4 <.L222>
+
+8000a7f2 <.L223>:
+8000a7f2:	865a                	mv	a2,s6
+8000a7f4:	85de                	mv	a1,s7
+8000a7f6:	854e                	mv	a0,s3
+8000a7f8:	b87fc0ef          	jal	8000737e <__SEGGER_RTL_pre_padding>
+8000a7fc:	8626                	mv	a2,s1
+8000a7fe:	03000593          	li	a1,48
+8000a802:	854e                	mv	a0,s3
+8000a804:	b44ff0ef          	jal	80009b48 <__SEGGER_RTL_print_padding>
+
+8000a808 <.L224>:
+8000a808:	1c7d                	add	s8,s8,-1
+8000a80a:	e40c4663          	bltz	s8,80009e56 <.L371>
+8000a80e:	183c                	add	a5,sp,56
+8000a810:	97e2                	add	a5,a5,s8
+8000a812:	0007c583          	lbu	a1,0(a5)
+8000a816:	854e                	mv	a0,s3
+8000a818:	a94ff0ef          	jal	80009aac <__SEGGER_RTL_putc>
+8000a81c:	b7f5                	j	8000a808 <.L224>
+
+8000a81e <.L34>:
+8000a81e:	07800713          	li	a4,120
+8000a822:	d8f76b63          	bltu	a4,a5,80009db8 <.L4>
+
+8000a826 <.L38>:
+8000a826:	fa878713          	add	a4,a5,-88
+8000a82a:	0ff77713          	zext.b	a4,a4
+8000a82e:	02000693          	li	a3,32
+8000a832:	d8e6e363          	bltu	a3,a4,80009db8 <.L4>
+8000a836:	46d2                	lw	a3,20(sp)
+8000a838:	070a                	sll	a4,a4,0x2
+8000a83a:	9736                	add	a4,a4,a3
+8000a83c:	4318                	lw	a4,0(a4)
+8000a83e:	8702                	jr	a4
+
+Disassembly of section .text.libc.__SEGGER_RTL_ascii_isctype:
+
+8000a840 <__SEGGER_RTL_ascii_isctype>:
+8000a840:	07f00793          	li	a5,127
+8000a844:	00a7ee63          	bltu	a5,a0,8000a860 <.L3>
+8000a848:	98c18793          	add	a5,gp,-1652 # 80003994 <__SEGGER_RTL_ascii_ctype_map>
+8000a84c:	953e                	add	a0,a0,a5
+8000a84e:	36c18793          	add	a5,gp,876 # 80004374 <__SEGGER_RTL_ascii_ctype_mask>
+8000a852:	95be                	add	a1,a1,a5
+8000a854:	00054503          	lbu	a0,0(a0)
+8000a858:	0005c783          	lbu	a5,0(a1)
+8000a85c:	8d7d                	and	a0,a0,a5
+8000a85e:	8082                	ret
+
+8000a860 <.L3>:
+8000a860:	4501                	li	a0,0
+8000a862:	8082                	ret
+
+Disassembly of section .text.libc.__SEGGER_RTL_ascii_tolower:
+
+8000a864 <__SEGGER_RTL_ascii_tolower>:
+8000a864:	fbf50713          	add	a4,a0,-65
+8000a868:	47e5                	li	a5,25
+8000a86a:	00e7e463          	bltu	a5,a4,8000a872 <.L7>
+8000a86e:	02050513          	add	a0,a0,32
+
+8000a872 <.L7>:
+8000a872:	8082                	ret
+
+Disassembly of section .text.libc.__SEGGER_RTL_ascii_iswctype:
+
+8000a874 <__SEGGER_RTL_ascii_iswctype>:
+8000a874:	07f00793          	li	a5,127
+8000a878:	00a7ee63          	bltu	a5,a0,8000a894 <.L10>
+8000a87c:	98c18793          	add	a5,gp,-1652 # 80003994 <__SEGGER_RTL_ascii_ctype_map>
+8000a880:	953e                	add	a0,a0,a5
+8000a882:	36c18793          	add	a5,gp,876 # 80004374 <__SEGGER_RTL_ascii_ctype_mask>
+8000a886:	95be                	add	a1,a1,a5
+8000a888:	00054503          	lbu	a0,0(a0)
+8000a88c:	0005c783          	lbu	a5,0(a1)
+8000a890:	8d7d                	and	a0,a0,a5
+8000a892:	8082                	ret
+
+8000a894 <.L10>:
+8000a894:	4501                	li	a0,0
+8000a896:	8082                	ret
+
+Disassembly of section .text.libc.__SEGGER_RTL_ascii_towlower:
+
+8000a898 <__SEGGER_RTL_ascii_towlower>:
+8000a898:	fbf50713          	add	a4,a0,-65
+8000a89c:	47e5                	li	a5,25
+8000a89e:	00e7e463          	bltu	a5,a4,8000a8a6 <.L14>
+8000a8a2:	02050513          	add	a0,a0,32
+
+8000a8a6 <.L14>:
+8000a8a6:	8082                	ret
+
+Disassembly of section .text.libc.__SEGGER_RTL_ascii_wctomb:
+
+8000a8a8 <__SEGGER_RTL_ascii_wctomb>:
+8000a8a8:	07f00793          	li	a5,127
+8000a8ac:	00b7e663          	bltu	a5,a1,8000a8b8 <.L66>
+8000a8b0:	00b50023          	sb	a1,0(a0)
+8000a8b4:	4505                	li	a0,1
+8000a8b6:	8082                	ret
+
+8000a8b8 <.L66>:
+8000a8b8:	5579                	li	a0,-2
+8000a8ba:	8082                	ret
+
+Disassembly of section .text.libc.__SEGGER_RTL_current_locale:
+
+8000a8bc <__SEGGER_RTL_current_locale>:
+8000a8bc:	84422503          	lw	a0,-1980(tp) # fffff844 <__APB_SRAM_segment_end__+0xbf0d844>
+8000a8c0:	e119                	bnez	a0,8000a8c6 <.L155>
+8000a8c2:	80020513          	add	a0,tp,-2048 # fffff800 <__APB_SRAM_segment_end__+0xbf0d800>
+
+8000a8c6 <.L155>:
+8000a8c6:	8082                	ret
+
+Disassembly of section .segger.init.__SEGGER_init_zero:
+
+8000ae3c <__SEGGER_init_zero>:
+8000ae3c:	4008                	lw	a0,0(s0)
+8000ae3e:	404c                	lw	a1,4(s0)
+8000ae40:	0421                	add	s0,s0,8
+8000ae42:	c591                	beqz	a1,8000ae4e <.L__SEGGER_init_zero_Done>
+
+8000ae44 <.L__SEGGER_init_zero_Loop>:
+8000ae44:	00050023          	sb	zero,0(a0)
+8000ae48:	0505                	add	a0,a0,1
+8000ae4a:	15fd                	add	a1,a1,-1
+8000ae4c:	fde5                	bnez	a1,8000ae44 <.L__SEGGER_init_zero_Loop>
+
+8000ae4e <.L__SEGGER_init_zero_Done>:
+8000ae4e:	8082                	ret
+
+Disassembly of section .segger.init.__SEGGER_init_copy:
+
+8000ae50 <__SEGGER_init_copy>:
+8000ae50:	4008                	lw	a0,0(s0)
+8000ae52:	404c                	lw	a1,4(s0)
+8000ae54:	4410                	lw	a2,8(s0)
+8000ae56:	0431                	add	s0,s0,12
+8000ae58:	ca09                	beqz	a2,8000ae6a <.L__SEGGER_init_copy_Done>
+
+8000ae5a <.L__SEGGER_init_copy_Loop>:
+8000ae5a:	00058683          	lb	a3,0(a1)
+8000ae5e:	00d50023          	sb	a3,0(a0)
+8000ae62:	0505                	add	a0,a0,1
+8000ae64:	0585                	add	a1,a1,1
+8000ae66:	167d                	add	a2,a2,-1
+8000ae68:	fa6d                	bnez	a2,8000ae5a <.L__SEGGER_init_copy_Loop>
+
+8000ae6a <.L__SEGGER_init_copy_Done>:
+8000ae6a:	8082                	ret

controller_yy_app_controller_yy_board_flash_xip_debug/segger_embedded_studio/Output/Debug/Obj/controlware_yy_app - controller_yy_board/demo_files.ind

@@ -0,0 +1,54 @@
+"Output/Debug/Obj/controlware_yy_app - controller_yy_board/application/user_src/main.c.o"
+"Output/Debug/Obj/controlware_yy_app - controller_yy_board/soc/HPM6700/HPM6750/toolchains/reset.c.o"
+"Output/Debug/Obj/controlware_yy_app - controller_yy_board/soc/HPM6700/HPM6750/toolchains/trap.c.o"
+"Output/Debug/Obj/controlware_yy_app - controller_yy_board/soc/HPM6700/HPM6750/toolchains/segger/startup.s.o"
+"Output/Debug/Obj/controlware_yy_app - controller_yy_board/soc/HPM6700/HPM6750/system.c.o"
+"Output/Debug/Obj/controlware_yy_app - controller_yy_board/soc/HPM6700/HPM6750/hpm_sysctl_drv.c.o"
+"Output/Debug/Obj/controlware_yy_app - controller_yy_board/soc/HPM6700/HPM6750/hpm_l1c_drv.c.o"
+"Output/Debug/Obj/controlware_yy_app - controller_yy_board/soc/HPM6700/HPM6750/hpm_clock_drv.c.o"
+"Output/Debug/Obj/controlware_yy_app - controller_yy_board/soc/HPM6700/HPM6750/hpm_otp_drv.c.o"
+"Output/Debug/Obj/controlware_yy_app - controller_yy_board/soc/HPM6700/HPM6750/boot/hpm_bootheader.c.o"
+"Output/Debug/Obj/controlware_yy_app - controller_yy_board/boards/controller_yy_board/pinmux.c.o"
+"Output/Debug/Obj/controlware_yy_app - controller_yy_board/boards/controller_yy_board/board.c.o"
+"Output/Debug/Obj/controlware_yy_app - controller_yy_board/drivers/src/hpm_uart_drv.c.o"
+"Output/Debug/Obj/controlware_yy_app - controller_yy_board/drivers/src/hpm_femc_drv.c.o"
+"Output/Debug/Obj/controlware_yy_app - controller_yy_board/drivers/src/hpm_sdp_drv.c.o"
+"Output/Debug/Obj/controlware_yy_app - controller_yy_board/drivers/src/hpm_lcdc_drv.c.o"
+"Output/Debug/Obj/controlware_yy_app - controller_yy_board/drivers/src/hpm_i2c_drv.c.o"
+"Output/Debug/Obj/controlware_yy_app - controller_yy_board/drivers/src/hpm_pmp_drv.c.o"
+"Output/Debug/Obj/controlware_yy_app - controller_yy_board/drivers/src/hpm_rng_drv.c.o"
+"Output/Debug/Obj/controlware_yy_app - controller_yy_board/drivers/src/hpm_gpio_drv.c.o"
+"Output/Debug/Obj/controlware_yy_app - controller_yy_board/drivers/src/hpm_spi_drv.c.o"
+"Output/Debug/Obj/controlware_yy_app - controller_yy_board/drivers/src/hpm_pdma_drv.c.o"
+"Output/Debug/Obj/controlware_yy_app - controller_yy_board/drivers/src/hpm_wdg_drv.c.o"
+"Output/Debug/Obj/controlware_yy_app - controller_yy_board/drivers/src/hpm_dma_drv.c.o"
+"Output/Debug/Obj/controlware_yy_app - controller_yy_board/drivers/src/hpm_gptmr_drv.c.o"
+"Output/Debug/Obj/controlware_yy_app - controller_yy_board/drivers/src/hpm_pwm_drv.c.o"
+"Output/Debug/Obj/controlware_yy_app - controller_yy_board/drivers/src/hpm_pllctl_drv.c.o"
+"Output/Debug/Obj/controlware_yy_app - controller_yy_board/drivers/src/hpm_usb_drv.c.o"
+"Output/Debug/Obj/controlware_yy_app - controller_yy_board/drivers/src/hpm_rtc_drv.c.o"
+"Output/Debug/Obj/controlware_yy_app - controller_yy_board/drivers/src/hpm_acmp_drv.c.o"
+"Output/Debug/Obj/controlware_yy_app - controller_yy_board/drivers/src/hpm_i2s_drv.c.o"
+"Output/Debug/Obj/controlware_yy_app - controller_yy_board/drivers/src/hpm_dao_drv.c.o"
+"Output/Debug/Obj/controlware_yy_app - controller_yy_board/drivers/src/hpm_pdm_drv.c.o"
+"Output/Debug/Obj/controlware_yy_app - controller_yy_board/drivers/src/hpm_vad_drv.c.o"
+"Output/Debug/Obj/controlware_yy_app - controller_yy_board/drivers/src/hpm_cam_drv.c.o"
+"Output/Debug/Obj/controlware_yy_app - controller_yy_board/drivers/src/hpm_can_drv.c.o"
+"Output/Debug/Obj/controlware_yy_app - controller_yy_board/drivers/src/hpm_jpeg_drv.c.o"
+"Output/Debug/Obj/controlware_yy_app - controller_yy_board/drivers/src/hpm_enet_drv.c.o"
+"Output/Debug/Obj/controlware_yy_app - controller_yy_board/drivers/src/hpm_sdxc_drv.c.o"
+"Output/Debug/Obj/controlware_yy_app - controller_yy_board/drivers/src/hpm_adc12_drv.c.o"
+"Output/Debug/Obj/controlware_yy_app - controller_yy_board/drivers/src/hpm_adc16_drv.c.o"
+"Output/Debug/Obj/controlware_yy_app - controller_yy_board/drivers/src/hpm_pcfg_drv.c.o"
+"Output/Debug/Obj/controlware_yy_app - controller_yy_board/drivers/src/hpm_ptpc_drv.c.o"
+"Output/Debug/Obj/controlware_yy_app - controller_yy_board/drivers/src/hpm_mchtmr_drv.c.o"
+"Output/Debug/Obj/controlware_yy_app - controller_yy_board/drivers/src/hpm_tamp_drv.c.o"
+"Output/Debug/Obj/controlware_yy_app - controller_yy_board/utils/hpm_swap.c.o"
+"Output/Debug/Obj/controlware_yy_app - controller_yy_board/utils/hpm_ffssi.c.o"
+"Output/Debug/Obj/controlware_yy_app - controller_yy_board/utils/hpm_crc32.c.o"
+"Output/Debug/Obj/controlware_yy_app - controller_yy_board/components/debug_console/hpm_debug_console.c.o"
+"D:/Zhuts_file/tool/HPM6750_tool/lib/libc_rv32imac_balanced.a"
+"D:/Zhuts_file/tool/HPM6750_tool/lib/SEGGER_RV32_crtinit_rv32imac_balanced.a"
+"D:/Zhuts_file/tool/HPM6750_tool/lib/heapops_basic_rv32imac_balanced.a"
+"D:/Zhuts_file/tool/HPM6750_tool/lib/heapops_disable_interrupts_locking_rv32imac_balanced.a"
+"D:/Zhuts_file/tool/HPM6750_tool/lib/mbops_timeops_rv32imac_balanced.a"

controller_yy_app_controller_yy_board_flash_xip_debug/segger_embedded_studio/controlware_yy_app.emProject

@@ -0,0 +1,804 @@
+<!DOCTYPE CrossStudio_Project_File>
+<solution Name="controlware_yy_app" target="20" version="2">
+  <configuration
+    Name="Common"
+    c_preprocessor_definitions="FLASH_XIP=1;HPMSOC_HAS_HPMSDK_MULTICORE=y;HPMSOC_HAS_HPMSDK_GPIO=y;HPMSOC_HAS_HPMSDK_PLIC=y;HPMSOC_HAS_HPMSDK_MCHTMR=y;HPMSOC_HAS_HPMSDK_PLICSW=y;HPMSOC_HAS_HPMSDK_GPIOM=y;HPMSOC_HAS_HPMSDK_ADC12=y;HPMSOC_HAS_HPMSDK_ADC16=y;HPMSOC_HAS_HPMSDK_ACMP=y;HPMSOC_HAS_HPMSDK_SPI=y;HPMSOC_HAS_HPMSDK_UART=y;HPMSOC_HAS_HPMSDK_CAN=y;HPMSOC_HAS_HPMSDK_WDG=y;HPMSOC_HAS_HPMSDK_MBX=y;HPMSOC_HAS_HPMSDK_PTPC=y;HPMSOC_HAS_HPMSDK_DMAMUX=y;HPMSOC_HAS_HPMSDK_DMA=y;HPMSOC_HAS_HPMSDK_RNG=y;HPMSOC_HAS_HPMSDK_KEYM=y;HPMSOC_HAS_HPMSDK_I2S=y;HPMSOC_HAS_HPMSDK_DAO=y;HPMSOC_HAS_HPMSDK_PDM=y;HPMSOC_HAS_HPMSDK_PWM=y;HPMSOC_HAS_HPMSDK_HALL=y;HPMSOC_HAS_HPMSDK_QEI=y;HPMSOC_HAS_HPMSDK_TRGM=y;HPMSOC_HAS_HPMSDK_SYNT=y;HPMSOC_HAS_HPMSDK_LCDC=y;HPMSOC_HAS_HPMSDK_CAM=y;HPMSOC_HAS_HPMSDK_PDMA=y;HPMSOC_HAS_HPMSDK_JPEG=y;HPMSOC_HAS_HPMSDK_ENET=y;HPMSOC_HAS_HPMSDK_GPTMR=y;HPMSOC_HAS_HPMSDK_USB=y;HPMSOC_HAS_HPMSDK_SDXC=y;HPMSOC_HAS_HPMSDK_CONCTL=y;HPMSOC_HAS_HPMSDK_I2C=y;HPMSOC_HAS_HPMSDK_SDP=y;HPMSOC_HAS_HPMSDK_FEMC=y;HPMSOC_HAS_HPMSDK_SYSCTL=y;HPMSOC_HAS_HPMSDK_IOC=y;HPMSOC_HAS_HPMSDK_OTP=y;HPMSOC_HAS_HPMSDK_PPOR=y;HPMSOC_HAS_HPMSDK_PCFG=y;HPMSOC_HAS_HPMSDK_PSEC=y;HPMSOC_HAS_HPMSDK_PMON=y;HPMSOC_HAS_HPMSDK_PGPR=y;HPMSOC_HAS_HPMSDK_VAD=y;HPMSOC_HAS_HPMSDK_PLLCTL=y;HPMSOC_HAS_HPMSDK_BPOR=y;HPMSOC_HAS_HPMSDK_BCFG=y;HPMSOC_HAS_HPMSDK_BUTN=y;HPMSOC_HAS_HPMSDK_BGPR=y;HPMSOC_HAS_HPMSDK_RTC=y;HPMSOC_HAS_HPMSDK_BSEC=y;HPMSOC_HAS_HPMSDK_BKEY=y;HPMSOC_HAS_HPMSDK_BMON=y;HPMSOC_HAS_HPMSDK_TAMP=y;HPMSOC_HAS_HPMSDK_MONO=y;HPMSOC_HAS_HPMSDK_PMP=y;SD_FATFS_ENABLE=1;"
+    debug_cpu_registers_file="..\..\..\..\..\..\..\sdk_env\sdk_env-v1.8.0\hpm_sdk\soc\HPM6700\HPM6750\hpm_ses_riscv_cpu_regs.xml"
+    debug_register_definition_file="..\..\..\..\..\..\..\sdk_env\sdk_env-v1.8.0\hpm_sdk\soc\HPM6700\HPM6750\hpm_ses_reg.xml"
+    debug_restrict_memory_access="No"
+    gdb_server_write_timeout="300"
+    link_symbol_definitions="_heap_size=0x4000;_stack_size=0x4000;_flash_size=32M;_extram_size=32M;" />
+  <configuration
+    Name="Debug"
+    c_preprocessor_definitions="DEBUG"
+    gcc_debugging_level="Level 3"
+    gcc_optimization_level="None"
+    gdb_server_allow_memory_access_during_execution="Yes"
+    gdb_server_ignore_checksum_errors="No"
+    gdb_server_register_access="General and Individual" />
+  <configuration
+    Name="Release"
+    c_preprocessor_definitions="NDEBUG"
+    gcc_debugging_level="None"
+    gcc_omit_frame_pointer="Yes"
+    gcc_optimization_level="Level 1" />
+  <project Name="controlware_yy_app - controller_yy_board">
+    <configuration
+      LIBRARY_IO_TYPE="STD"
+      Name="Common"
+      RISCV_TOOLCHAIN_VARIANT="Standard"
+      arm_assembler_variant="SEGGER"
+      arm_compiler_variant="gcc"
+      arm_linker_heap_size="0x4000"
+      arm_linker_no_warn_on_mismatch="Yes"
+      arm_linker_stack_size="0x4000"
+      arm_linker_variant="SEGGER"
+      arm_rtl_variant="SEGGER"
+      build_generic_options_file_name=""
+      build_output_file_name="$(OutDir)/demo$(EXE)"
+      c_additional_options="-Wall;-Wundef;-Wno-format;-fomit-frame-pointer;-fno-builtin;-ffunction-sections;-fdata-sections;-g"
+      c_user_include_directories="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/arch;../../controller_yy_board;../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/HPM6750;../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/ip;../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/HPM6750/toolchains;../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/HPM6750/boot;../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/inc;../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/utils;../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/components/debug_console;../build_tmp/generated/include;../../controller_yy_app/middleware/fatfs/src/common;../../controller_yy_app/middleware/fatfs/src/portable;../../controller_yy_app/middleware/fatfs/src/portable/sdxc;../../controller_yy_app/middleware/hpm_sdmmc/lib;../../controller_yy_app/middleware/hpm_sdmmc/lib;../../controller_yy_app/middleware/hpm_sdmmc/port;../../controller_yy_app/controlware/control_inc;../../controller_yy_app/hardware/hard_inc;../../controller_yy_app/matrix;../../controller_yy_app/payload;../../controller_yy_app/remote_controller;../../controller_yy_app/software/soft_inc;../../controller_yy_app/user_src/inc;../../controller_yy_app/v8/v8m;../../controller_yy_app/v8/v8m_yy;../../controller_yy_app/vklink;"
+      debug_target_connection="GDB Server"
+      gcc_all_warnings_command_line_options="-Wall;-Wextra;-Wno-format"
+      gcc_cplusplus_language_standard="c++11"
+      gcc_enable_all_warnings="Yes"
+      gdb_server_autostart_server="Yes"
+      gdb_server_command_line="D:/sdk_env/sdk_env-v1.8.0/tools/openocd/openocd.exe -f $(ProjectDir)/../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/boards/openocd/probes/cmsis_dap.cfg -f $(ProjectDir)/../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/boards/openocd/soc/hpm6750-dual-core.cfg -f D:/Zhuts_file/work/pro/Pro9_HPM6750/controlware_yy_hpm6750/controller_yy_board/controller_yy_board.cfg"
+      gdb_server_port="3333"
+      gdb_server_reset_command="reset halt"
+      gdb_server_type="Custom"
+      heap_size="0x4000"
+      libcxx="Yes"
+      link_linker_script_file="..\..\controller_yy_app\linkers\segger\user_linker.icf"
+      link_use_linker_script_file="Yes"
+      linker_output_format="bin"
+      linker_printf_fmt_level="int"
+      linker_printf_fp_enabled="Float"
+      linker_printf_wchar_enabled="No"
+      linker_printf_width_precision_supported="Yes"
+      linker_scanf_character_group_matching_enabled="No"
+      linker_scanf_fmt_level="int"
+      linker_scanf_fp_enabled="No"
+      post_build_command="&quot;$(OBJDUMP)&quot; -S -d &quot;$(OutDir)/demo$(EXE)&quot; &gt; &quot;$(OutDir)/demo.asm&quot;"
+      project_directory=""
+      project_type="Executable"
+      rv_abi="ilp32"
+      rv_arch_ext=""
+      rv_arch_zicsr="Yes"
+      rv_arch_zifencei="Yes"
+      rv_architecture="rv32imac"
+      rv_debug_extensions="None"
+      rv_toolchain_prefix=""
+      stack_size="0x4000"
+      target_device_name="HPM6750xVMx" />
+    <folder Name="application">
+      <configuration Name="Debug" build_exclude_from_build="Yes" />
+      <folder Name="controlware">
+        <configuration
+          Name="Common"
+          build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/application/controlware" />
+        <file file_name="..\..\controller_yy_app\controlware\control_attitude.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/control_attitude.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\controlware\control_rate.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/control_rate.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\controlware\control_throttle.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/control_throttle.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\controlware\mode_attitude.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/mode_attitude.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\controlware\mode_gcs_tax_launch_run.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/mode_gcs_tax_launch_run.c$(OBJ)" />
+        </file>
+      </folder>
+      <folder Name="hardware">
+        <configuration
+          Name="Common"
+          build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/application/hardware" />
+        <file file_name="..\..\controller_yy_app\hardware\hard_can.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hard_can.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\hardware\hard_flash_at45db.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hard_flash_at45db.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\hardware\hard_flash_gd25q16.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hard_flash_gd25q16.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\hardware\hard_hdma_int.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hard_hdma_int.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\hardware\hard_imu_uart3.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hard_imu_uart3.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\hardware\hard_rc_subs.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hard_rc_subs.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\hardware\hard_sbus_out.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hard_sbus_out.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\hardware\hard_sbusout_af_pump.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hard_sbusout_af_pump.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\hardware\hard_sdio_sd.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hard_sdio_sd.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\hardware\hard_system.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hard_system.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\hardware\hard_system_delay.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hard_system_delay.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\hardware\hard_system_time.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hard_system_time.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\hardware\hard_system_timer.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hard_system_timer.c$(OBJ)" />
+        </file>
+      </folder>
+      <folder Name="matrix">
+        <configuration
+          Name="Common"
+          build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/application/matrix" />
+        <file file_name="..\..\controller_yy_app\matrix\euler.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/euler.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\matrix\flt_butter.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/flt_butter.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\matrix\quaternion.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/quaternion.c$(OBJ)" />
+        </file>
+      </folder>
+      <folder Name="middleware">
+        <folder Name="fatfs">
+          <folder Name="src">
+            <folder Name="common">
+              <configuration
+                Name="Common"
+                build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/application/middleware/fatfs/src/common" />
+              <file file_name="..\..\controller_yy_app\middleware\fatfs\src\common\ff.c">
+                <configuration
+                  Name="Common"
+                  build_object_file_name="$(IntDir)/ff.c$(OBJ)" />
+              </file>
+              <file file_name="..\..\controller_yy_app\middleware\fatfs\src\common\ffunicode.c">
+                <configuration
+                  Name="Common"
+                  build_object_file_name="$(IntDir)/ffunicode.c$(OBJ)" />
+              </file>
+            </folder>
+            <folder Name="portable">
+              <configuration
+                Name="Common"
+                build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/application/middleware/fatfs/src/portable" />
+              <folder Name="sdxc">
+                <configuration
+                  Name="Common"
+                  build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/application/middleware/fatfs/src/portable/sdxc" />
+                <file file_name="..\..\controller_yy_app\middleware\fatfs\src\portable\sdxc\hpm_sdmmc_disk.c">
+                  <configuration
+                    Name="Common"
+                    build_object_file_name="$(IntDir)/hpm_sdmmc_disk.c$(OBJ)" />
+                </file>
+              </folder>
+              <file file_name="..\..\controller_yy_app\middleware\fatfs\src\portable\diskio.c">
+                <configuration
+                  Name="Common"
+                  build_object_file_name="$(IntDir)/diskio.c$(OBJ)" />
+              </file>
+            </folder>
+          </folder>
+        </folder>
+        <folder Name="hpm_sdmmc">
+          <folder Name="lib">
+            <configuration
+              Name="Common"
+              build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/application/middleware/hpm_sdmmc/lib" />
+            <file file_name="..\..\controller_yy_app\middleware\hpm_sdmmc\lib\hpm_sdmmc_common.c">
+              <configuration
+                Name="Common"
+                build_object_file_name="$(IntDir)/hpm_sdmmc_common.c$(OBJ)" />
+            </file>
+            <file file_name="..\..\controller_yy_app\middleware\hpm_sdmmc\lib\hpm_sdmmc_emmc.c">
+              <configuration
+                Name="Common"
+                build_object_file_name="$(IntDir)/hpm_sdmmc_emmc.c$(OBJ)" />
+            </file>
+            <file file_name="..\..\controller_yy_app\middleware\hpm_sdmmc\lib\hpm_sdmmc_host.c">
+              <configuration
+                Name="Common"
+                build_object_file_name="$(IntDir)/hpm_sdmmc_host.c$(OBJ)" />
+            </file>
+            <file file_name="..\..\controller_yy_app\middleware\hpm_sdmmc\lib\hpm_sdmmc_osal.c">
+              <configuration
+                Name="Common"
+                build_object_file_name="$(IntDir)/hpm_sdmmc_osal.c$(OBJ)" />
+            </file>
+            <file file_name="..\..\controller_yy_app\middleware\hpm_sdmmc\lib\hpm_sdmmc_sd.c">
+              <configuration
+                Name="Common"
+                build_object_file_name="$(IntDir)/hpm_sdmmc_sd.c$(OBJ)" />
+            </file>
+            <file file_name="..\..\controller_yy_app\middleware\hpm_sdmmc\lib\hpm_sdmmc_sdio.c">
+              <configuration
+                Name="Common"
+                build_object_file_name="$(IntDir)/hpm_sdmmc_sdio.c$(OBJ)" />
+            </file>
+          </folder>
+          <folder Name="port">
+            <configuration
+              Name="Common"
+              build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/application/middleware/hpm_sdmmc/port" />
+            <file file_name="..\..\controller_yy_app\middleware\hpm_sdmmc\port\hpm_sdmmc_port.c">
+              <configuration
+                Name="Common"
+                build_object_file_name="$(IntDir)/hpm_sdmmc_port.c$(OBJ)" />
+            </file>
+          </folder>
+        </folder>
+      </folder>
+      <folder Name="payload">
+        <configuration
+          Name="Common"
+          build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/application/payload" />
+        <file file_name="..\..\controller_yy_app\payload\payload.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/payload.c$(OBJ)" />
+        </file>
+      </folder>
+      <folder Name="remote_controller">
+        <configuration
+          Name="Common"
+          build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/application/remote_controller" />
+        <file file_name="..\..\controller_yy_app\remote_controller\rc_rock.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/rc_rock.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\remote_controller\rc_sbus.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/rc_sbus.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\remote_controller\remote_controller.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/remote_controller.c$(OBJ)" />
+        </file>
+      </folder>
+      <folder Name="software">
+        <configuration
+          Name="Common"
+          build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/application/software" />
+        <file file_name="..\..\controller_yy_app\software\debug_printf.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/debug_printf.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\software\drv_uart.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/drv_uart.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\software\params.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/params.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\software\rkfifo.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/rkfifo.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\software\soft_can.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/soft_can.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\software\soft_can_yy.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/soft_can_yy.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\software\soft_delay.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/soft_delay.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\software\soft_flash.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/soft_flash.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\software\soft_gps.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/soft_gps.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\software\soft_gs.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/soft_gs.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\software\soft_imu.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/soft_imu.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\software\soft_motor_output.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/soft_motor_output.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\software\soft_payload.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/soft_payload.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\software\soft_port_uart4.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/soft_port_uart4.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\software\soft_rc_input.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/soft_rc_input.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\software\soft_sdcard.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/soft_sdcard.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\software\soft_system.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/soft_system.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\software\soft_time.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/soft_time.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\software\soft_timer.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/soft_timer.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\software\soft_usharprada.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/soft_usharprada.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\software\soft_voltage.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/soft_voltage.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\software\soft_warn.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/soft_warn.c$(OBJ)" />
+        </file>
+      </folder>
+      <folder Name="user_src">
+        <configuration
+          Name="Common"
+          build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/application/user_src" />
+        <configuration Name="Debug" build_exclude_from_build="No" />
+        <file file_name="..\..\controller_yy_app\user_src\main.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/main.c$(OBJ)" />
+        </file>
+      </folder>
+      <folder Name="v8">
+        <folder Name="v8m">
+          <configuration
+            Name="Common"
+            build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/application/v8/v8m" />
+          <file file_name="..\..\controller_yy_app\v8\v8m\bsp_V8M_adc.c">
+            <configuration
+              Name="Common"
+              build_object_file_name="$(IntDir)/bsp_V8M_adc.c$(OBJ)" />
+          </file>
+          <file file_name="..\..\controller_yy_app\v8\v8m\bsp_V8M_flash.c">
+            <configuration
+              Name="Common"
+              build_object_file_name="$(IntDir)/bsp_V8M_flash.c$(OBJ)" />
+          </file>
+          <file file_name="..\..\controller_yy_app\v8\v8m\bsp_V8M_GPIO_photo.c">
+            <configuration
+              Name="Common"
+              build_object_file_name="$(IntDir)/bsp_V8M_GPIO_photo.c$(OBJ)" />
+          </file>
+          <file file_name="..\..\controller_yy_app\v8\v8m\bsp_V8M_led.c">
+            <configuration
+              Name="Common"
+              build_object_file_name="$(IntDir)/bsp_V8M_led.c$(OBJ)" />
+          </file>
+          <file file_name="..\..\controller_yy_app\v8\v8m\bsp_V8M_pwm.c">
+            <configuration
+              Name="Common"
+              build_object_file_name="$(IntDir)/bsp_V8M_pwm.c$(OBJ)" />
+          </file>
+        </folder>
+        <folder Name="v8m_yy">
+          <configuration
+            Name="Common"
+            build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/application/v8/v8m_yy" />
+          <file file_name="..\..\controller_yy_app\v8\v8m_yy\bsp_V8M_YY_adc.c">
+            <configuration
+              Name="Common"
+              build_object_file_name="$(IntDir)/bsp_V8M_YY_adc.c$(OBJ)" />
+          </file>
+          <file file_name="..\..\controller_yy_app\v8\v8m_yy\bsp_V8M_YY_led.c">
+            <configuration
+              Name="Common"
+              build_object_file_name="$(IntDir)/bsp_V8M_YY_led.c$(OBJ)" />
+          </file>
+          <file file_name="..\..\controller_yy_app\v8\v8m_yy\bsp_V8M_YY_pwm.c">
+            <configuration
+              Name="Common"
+              build_object_file_name="$(IntDir)/bsp_V8M_YY_pwm.c$(OBJ)" />
+          </file>
+        </folder>
+      </folder>
+      <folder Name="vklink">
+        <configuration
+          Name="Common"
+          build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/application/vklink" />
+        <file file_name="..\..\controller_yy_app\vklink\gcs_vklink_v30.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/gcs_vklink_v30.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\vklink\um482.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/um482.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_app\vklink\vklink.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/vklink.c$(OBJ)" />
+        </file>
+      </folder>
+    </folder>
+    <folder Name="boards">
+      <folder Name="controller_yy_board">
+        <configuration
+          Name="Common"
+          build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/boards/controller_yy_board" />
+        <file file_name="..\..\controller_yy_board\board.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/board.c$(OBJ)" />
+        </file>
+        <file file_name="..\..\controller_yy_board\pinmux.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/pinmux.c$(OBJ)" />
+        </file>
+      </folder>
+    </folder>
+    <folder Name="components">
+      <folder Name="debug_console">
+        <configuration
+          Name="Common"
+          build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/components/debug_console" />
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/components/debug_console/hpm_debug_console.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_debug_console.c$(OBJ)" />
+        </file>
+      </folder>
+    </folder>
+    <folder Name="drivers">
+      <folder Name="src">
+        <configuration
+          Name="Common"
+          build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/drivers/src" />
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_acmp_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_acmp_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_adc12_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_adc12_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_adc16_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_adc16_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_cam_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_cam_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_can_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_can_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_dao_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_dao_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_dma_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_dma_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_enet_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_enet_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_femc_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_femc_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_gpio_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_gpio_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_gptmr_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_gptmr_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_i2c_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_i2c_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_i2s_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_i2s_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_jpeg_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_jpeg_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_lcdc_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_lcdc_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_mchtmr_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_mchtmr_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_pcfg_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_pcfg_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_pdm_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_pdm_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_pdma_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_pdma_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_pllctl_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_pllctl_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_pmp_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_pmp_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_ptpc_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_ptpc_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_pwm_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_pwm_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_rng_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_rng_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_rtc_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_rtc_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_sdp_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_sdp_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_sdxc_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_sdxc_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_spi_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_spi_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_tamp_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_tamp_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_uart_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_uart_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_usb_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_usb_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_vad_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_vad_drv.c$(OBJ)" />
+        </file>
+        <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/drivers/src/hpm_wdg_drv.c">
+          <configuration
+            Name="Common"
+            build_object_file_name="$(IntDir)/hpm_wdg_drv.c$(OBJ)" />
+        </file>
+      </folder>
+    </folder>
+    <folder Name="soc">
+      <folder Name="HPM6700">
+        <folder Name="HPM6750">
+          <configuration
+            Name="Common"
+            build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/soc/HPM6700/HPM6750" />
+          <folder Name="boot">
+            <configuration
+              Name="Common"
+              build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/soc/HPM6700/HPM6750/boot" />
+            <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/HPM6750/boot/hpm_bootheader.c">
+              <configuration
+                Name="Common"
+                build_object_file_name="$(IntDir)/hpm_bootheader.c$(OBJ)" />
+            </file>
+          </folder>
+          <folder Name="toolchains">
+            <configuration
+              Name="Common"
+              build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/soc/HPM6700/HPM6750/toolchains" />
+            <folder Name="segger">
+              <configuration
+                Name="Common"
+                build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/soc/HPM6700/HPM6750/toolchains/segger" />
+              <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/HPM6750/toolchains/segger/startup.s">
+                <configuration
+                  Name="Common"
+                  build_object_file_name="$(IntDir)/startup.s$(OBJ)" />
+              </file>
+            </folder>
+            <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/HPM6750/toolchains/reset.c">
+              <configuration
+                Name="Common"
+                build_object_file_name="$(IntDir)/reset.c$(OBJ)" />
+            </file>
+            <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/HPM6750/toolchains/trap.c">
+              <configuration
+                Name="Common"
+                build_object_file_name="$(IntDir)/trap.c$(OBJ)" />
+            </file>
+          </folder>
+          <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/HPM6750/hpm_clock_drv.c">
+            <configuration
+              Name="Common"
+              build_object_file_name="$(IntDir)/hpm_clock_drv.c$(OBJ)" />
+          </file>
+          <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/HPM6750/hpm_l1c_drv.c">
+            <configuration
+              Name="Common"
+              build_object_file_name="$(IntDir)/hpm_l1c_drv.c$(OBJ)" />
+          </file>
+          <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/HPM6750/hpm_otp_drv.c">
+            <configuration
+              Name="Common"
+              build_object_file_name="$(IntDir)/hpm_otp_drv.c$(OBJ)" />
+          </file>
+          <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/HPM6750/hpm_sysctl_drv.c">
+            <configuration
+              Name="Common"
+              build_object_file_name="$(IntDir)/hpm_sysctl_drv.c$(OBJ)" />
+          </file>
+          <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/soc/HPM6700/HPM6750/system.c">
+            <configuration
+              Name="Common"
+              build_object_file_name="$(IntDir)/system.c$(OBJ)" />
+          </file>
+        </folder>
+      </folder>
+    </folder>
+    <folder Name="utils">
+      <configuration
+        Name="Common"
+        build_intermediate_directory="Output/$(Configuration)/Obj/$(ProjectName)/utils" />
+      <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/utils/hpm_crc32.c">
+        <configuration
+          Name="Common"
+          build_object_file_name="$(IntDir)/hpm_crc32.c$(OBJ)" />
+      </file>
+      <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/utils/hpm_ffssi.c">
+        <configuration
+          Name="Common"
+          build_object_file_name="$(IntDir)/hpm_ffssi.c$(OBJ)" />
+      </file>
+      <file file_name="../../../../../../../sdk_env/sdk_env-v1.8.0/hpm_sdk/utils/hpm_swap.c">
+        <configuration
+          Name="Common"
+          build_object_file_name="$(IntDir)/hpm_swap.c$(OBJ)" />
+      </file>
+    </folder>
+  </project>
+</solution>

controller_yy_app_controller_yy_board_flash_xip_debug/segger_embedded_studio/controlware_yy_app.emSession

@@ -0,0 +1,61 @@
+<!DOCTYPE CrossStudio_Session_File>
+<session>
+ <Bookmarks/>
+ <Breakpoints groups="Breakpoints" active_group="Breakpoints"/>
+ <ExecutionProfileWindow/>
+ <FrameBuffer>
+  <FrameBufferWindow width="0" keepAspectRatio="0" zoomToFitWindow="0" showGrid="0" addressSpace="" format="0" height="0" autoEvaluate="0" scaleFactor="1" refreshPeriod="0" name="controlware_yy_app - controller_yy_board_Debug" addressText="" accessByDisplayWidth="0"/>
+ </FrameBuffer>
+ <Memory1>
+  <MemoryWindow addressSpace="" dataSize="1" autoEvaluate="0" viewMode="0" viewType="4" addressOrder="0" columnsText="" refreshPeriod="0" name="controlware_yy_app - controller_yy_board_Debug" sizeText="" addressText=""/>
+ </Memory1>
+ <Memory2>
+  <MemoryWindow addressSpace="" dataSize="1" autoEvaluate="0" viewMode="0" viewType="4" addressOrder="0" columnsText="" refreshPeriod="0" name="controlware_yy_app - controller_yy_board_Debug" sizeText="" addressText=""/>
+ </Memory2>
+ <Memory3>
+  <MemoryWindow addressSpace="" dataSize="1" autoEvaluate="0" viewMode="0" viewType="4" addressOrder="0" columnsText="" refreshPeriod="0" name="controlware_yy_app - controller_yy_board_Debug" sizeText="" addressText=""/>
+ </Memory3>
+ <Memory4>
+  <MemoryWindow addressSpace="" dataSize="1" autoEvaluate="0" viewMode="0" viewType="4" addressOrder="0" columnsText="" refreshPeriod="0" name="controlware_yy_app - controller_yy_board_Debug" sizeText="" addressText=""/>
+ </Memory4>
+ <Project>
+  <ProjectSessionItem path="controlware_yy_app"/>
+  <ProjectSessionItem path="controlware_yy_app;controlware_yy_app - controller_yy_board"/>
+  <ProjectSessionItem path="controlware_yy_app;controlware_yy_app - controller_yy_board;application"/>
+  <ProjectSessionItem path="controlware_yy_app;controlware_yy_app - controller_yy_board;application;middleware"/>
+ </Project>
+ <Register1>
+  <RegisterWindow invisibleNodes="" visibleNodes="ABI, RV32I/pc;ABI, RV32I/ra;ABI, RV32I/sp;ABI, RV32I/gp;ABI, RV32I/tp;ABI, RV32I/a0;ABI, RV32I/a1;ABI, RV32I/a2;ABI, RV32I/a3;ABI, RV32I/a4;ABI, RV32I/a5;ABI, RV32I/a6;ABI, RV32I/a7;ABI, RV32I/t0;ABI, RV32I/t1;ABI, RV32I/t2;ABI, RV32I/t3;ABI, RV32I/t4;ABI, RV32I/t5;ABI, RV32I/t6;ABI, RV32I/s0;ABI, RV32I/s1;ABI, RV32I/s2;ABI, RV32I/s3;ABI, RV32I/s4;ABI, RV32I/s5;ABI, RV32I/s6;ABI, RV32I/s7;ABI, RV32I/s8;ABI, RV32I/s9;ABI, RV32I/s10;ABI, RV32I/s11;CPU, RV32I/pc;CPU, RV32I/x1;CPU, RV32I/x2;CPU, RV32I/x3;CPU, RV32I/x4;CPU, RV32I/x5;CPU, RV32I/x6;CPU, RV32I/x7;CPU, RV32I/x8;CPU, RV32I/x9;CPU, RV32I/x10;CPU, RV32I/x11;CPU, RV32I/x12;CPU, RV32I/x13;CPU, RV32I/x14;CPU, RV32I/x15;CPU, RV32I/x16;CPU, RV32I/x17;CPU, RV32I/x18;CPU, RV32I/x19;CPU, RV32I/x20;CPU, RV32I/x21;CPU, RV32I/x22;CPU, RV32I/x23;CPU, RV32I/x24;CPU, RV32I/x25;CPU, RV32I/x26;CPU, RV32I/x27;CPU, RV32I/x28;CPU, RV32I/x29;CPU, RV32I/x30;CPU, RV32I/x31" binaryNodes="" asciiNodes="" openNodes="ABI, RV32I;CPU, RV32I" name="controlware_yy_app - controller_yy_board_Debug" decimalNodes="" octalNodes="" unsignedNodes=""/>
+ </Register1>
+ <Register2>
+  <RegisterWindow invisibleNodes="" visibleNodes="ABI, RV32I/pc;ABI, RV32I/ra;ABI, RV32I/sp;ABI, RV32I/gp;ABI, RV32I/tp;ABI, RV32I/a0;ABI, RV32I/a1;ABI, RV32I/a2;ABI, RV32I/a3;ABI, RV32I/a4;ABI, RV32I/a5;ABI, RV32I/a6;ABI, RV32I/a7;ABI, RV32I/t0;ABI, RV32I/t1;ABI, RV32I/t2;ABI, RV32I/t3;ABI, RV32I/t4;ABI, RV32I/t5;ABI, RV32I/t6;ABI, RV32I/s0;ABI, RV32I/s1;ABI, RV32I/s2;ABI, RV32I/s3;ABI, RV32I/s4;ABI, RV32I/s5;ABI, RV32I/s6;ABI, RV32I/s7;ABI, RV32I/s8;ABI, RV32I/s9;ABI, RV32I/s10;ABI, RV32I/s11;CPU, RV32I/pc;CPU, RV32I/x1;CPU, RV32I/x2;CPU, RV32I/x3;CPU, RV32I/x4;CPU, RV32I/x5;CPU, RV32I/x6;CPU, RV32I/x7;CPU, RV32I/x8;CPU, RV32I/x9;CPU, RV32I/x10;CPU, RV32I/x11;CPU, RV32I/x12;CPU, RV32I/x13;CPU, RV32I/x14;CPU, RV32I/x15;CPU, RV32I/x16;CPU, RV32I/x17;CPU, RV32I/x18;CPU, RV32I/x19;CPU, RV32I/x20;CPU, RV32I/x21;CPU, RV32I/x22;CPU, RV32I/x23;CPU, RV32I/x24;CPU, RV32I/x25;CPU, RV32I/x26;CPU, RV32I/x27;CPU, RV32I/x28;CPU, RV32I/x29;CPU, RV32I/x30;CPU, RV32I/x31" binaryNodes="" asciiNodes="" openNodes="ABI, RV32I;CPU, RV32I" name="controlware_yy_app - controller_yy_board_Debug" decimalNodes="" octalNodes="" unsignedNodes=""/>
+ </Register2>
+ <Register3>
+  <RegisterWindow invisibleNodes="" visibleNodes="ABI, RV32I/pc;ABI, RV32I/ra;ABI, RV32I/sp;ABI, RV32I/gp;ABI, RV32I/tp;ABI, RV32I/a0;ABI, RV32I/a1;ABI, RV32I/a2;ABI, RV32I/a3;ABI, RV32I/a4;ABI, RV32I/a5;ABI, RV32I/a6;ABI, RV32I/a7;ABI, RV32I/t0;ABI, RV32I/t1;ABI, RV32I/t2;ABI, RV32I/t3;ABI, RV32I/t4;ABI, RV32I/t5;ABI, RV32I/t6;ABI, RV32I/s0;ABI, RV32I/s1;ABI, RV32I/s2;ABI, RV32I/s3;ABI, RV32I/s4;ABI, RV32I/s5;ABI, RV32I/s6;ABI, RV32I/s7;ABI, RV32I/s8;ABI, RV32I/s9;ABI, RV32I/s10;ABI, RV32I/s11;CPU, RV32I/pc;CPU, RV32I/x1;CPU, RV32I/x2;CPU, RV32I/x3;CPU, RV32I/x4;CPU, RV32I/x5;CPU, RV32I/x6;CPU, RV32I/x7;CPU, RV32I/x8;CPU, RV32I/x9;CPU, RV32I/x10;CPU, RV32I/x11;CPU, RV32I/x12;CPU, RV32I/x13;CPU, RV32I/x14;CPU, RV32I/x15;CPU, RV32I/x16;CPU, RV32I/x17;CPU, RV32I/x18;CPU, RV32I/x19;CPU, RV32I/x20;CPU, RV32I/x21;CPU, RV32I/x22;CPU, RV32I/x23;CPU, RV32I/x24;CPU, RV32I/x25;CPU, RV32I/x26;CPU, RV32I/x27;CPU, RV32I/x28;CPU, RV32I/x29;CPU, RV32I/x30;CPU, RV32I/x31" binaryNodes="" asciiNodes="" openNodes="ABI, RV32I;CPU, RV32I" name="controlware_yy_app - controller_yy_board_Debug" decimalNodes="" octalNodes="" unsignedNodes=""/>
+ </Register3>
+ <Register4>
+  <RegisterWindow invisibleNodes="" visibleNodes="ABI, RV32I/pc;ABI, RV32I/ra;ABI, RV32I/sp;ABI, RV32I/gp;ABI, RV32I/tp;ABI, RV32I/a0;ABI, RV32I/a1;ABI, RV32I/a2;ABI, RV32I/a3;ABI, RV32I/a4;ABI, RV32I/a5;ABI, RV32I/a6;ABI, RV32I/a7;ABI, RV32I/t0;ABI, RV32I/t1;ABI, RV32I/t2;ABI, RV32I/t3;ABI, RV32I/t4;ABI, RV32I/t5;ABI, RV32I/t6;ABI, RV32I/s0;ABI, RV32I/s1;ABI, RV32I/s2;ABI, RV32I/s3;ABI, RV32I/s4;ABI, RV32I/s5;ABI, RV32I/s6;ABI, RV32I/s7;ABI, RV32I/s8;ABI, RV32I/s9;ABI, RV32I/s10;ABI, RV32I/s11;CPU, RV32I/pc;CPU, RV32I/x1;CPU, RV32I/x2;CPU, RV32I/x3;CPU, RV32I/x4;CPU, RV32I/x5;CPU, RV32I/x6;CPU, RV32I/x7;CPU, RV32I/x8;CPU, RV32I/x9;CPU, RV32I/x10;CPU, RV32I/x11;CPU, RV32I/x12;CPU, RV32I/x13;CPU, RV32I/x14;CPU, RV32I/x15;CPU, RV32I/x16;CPU, RV32I/x17;CPU, RV32I/x18;CPU, RV32I/x19;CPU, RV32I/x20;CPU, RV32I/x21;CPU, RV32I/x22;CPU, RV32I/x23;CPU, RV32I/x24;CPU, RV32I/x25;CPU, RV32I/x26;CPU, RV32I/x27;CPU, RV32I/x28;CPU, RV32I/x29;CPU, RV32I/x30;CPU, RV32I/x31" binaryNodes="" asciiNodes="" openNodes="ABI, RV32I;CPU, RV32I" name="controlware_yy_app - controller_yy_board_Debug" decimalNodes="" octalNodes="" unsignedNodes=""/>
+ </Register4>
+ <Threads>
+  <ThreadsWindow showLists=""/>
+ </Threads>
+ <TraceWindow>
+  <Trace enabled="Yes"/>
+ </TraceWindow>
+ <Watch1>
+  <Watches active="1" update="Never"/>
+ </Watch1>
+ <Watch2>
+  <Watches active="0" update="Never"/>
+ </Watch2>
+ <Watch3>
+  <Watches active="0" update="Never"/>
+ </Watch3>
+ <Watch4>
+  <Watches active="0" update="Never"/>
+ </Watch4>
+ <Files>
+  <SessionOpenFile windowGroup="DockEditLeft" x="0" y="68" useTextEdit="1" path="../../controller_yy_app/user_src/main.c" left="0" selected="1" top="40" codecName="Default"/>
+ </Files>
+ <EMStudioWindow activeProject="controlware_yy_app - controller_yy_board" fileDialogDefaultFilter="*.c" autoConnectTarget="GDB Server" buildConfiguration="Debug" sessionSettings="" debugSearchFileMap="" fileDialogInitialDirectory="" debugSearchPath="" autoConnectCapabilities="1343"/>
+</session>

controller_yy_board/board.h

@@ -286,6 +286,7 @@
 #define BOARD_APP_ADC12_BASE     HPM_ADC0
 #define BOARD_APP_ADC12_IRQn     IRQn_ADC0
 #define BOARD_APP_ADC12_CH_1     (7U)
+#define BOARD_APP_ADC12_CH_2     (14U)
 #define BOARD_APP_ADC12_CLK_NAME (clock_adc0)
 
 #define BOARD_APP_ADC16_NAME     "ADC3"

controller_yy_board/controller_yy_board.cfg

@@ -1,8 +1,8 @@
-# Copyright (c) 2021 HPMicro
+# Copyright (c) 2022 HPMicro
 # SPDX-License-Identifier: BSD-3-Clause
-#
+
 # openocd flash driver argument:
-#   - ARG7:
+#   - option0:
 #       [31:28] Flash probe type
 #         0 - SFDP SDR / 1 - SFDP DDR
 #         2 - 1-4-4 Read (0xEB, 24-bit address) / 3 - 1-2-2 Read(0xBB, 24-bit address)
@@ -30,7 +30,7 @@
 #         3 - External DQS
 #       [3:0] Frequency option
 #         1 - 30MHz / 2 - 50MHz / 3 - 66MHz / 4 - 80MHz / 5 - 100MHz / 6 - 120MHz / 7 - 133MHz / 8 - 166MHz
-#   - ARG8:
+#   - option1:
 #       [31:20]  Reserved
 #       [19:16] IO voltage
 #         0 - 3V / 1 - 1.8V
@@ -45,9 +45,9 @@
 #   - flash driver:     hpm_xpi
 #   - flash ctrl index: 0xF3040000
 #   - base address:     0x80000000
-#   - flash size:       0x1000000
+#   - flash size:       0x2000000
 #   - flash option0:    0x7
-flash bank xpi0 hpm_xpi 0x80000000 0x1000000 1 1 $_TARGET0 0xF3040000 0x7
+flash bank xpi0 hpm_xpi 0x80000000 0x2000000 1 1 $_TARGET0 0xF3040000 0x7
 
 proc init_clock {} {
     $::_TARGET0 riscv dmi_write 0x39 0xF4002000
@@ -78,6 +78,54 @@ proc init_sdram { } {
 # 166Mhz pll2_clk0: 333Mhz divide by 2
     $::_TARGET0 riscv dmi_write 0x39 0xF4001820
     $::_TARGET0 riscv dmi_write 0x3C 0x401
+    # PC01
+    $::_TARGET0 riscv dmi_write 0x39 0xF4040208
+    $::_TARGET0 riscv dmi_write 0x3C 0xC
+    # PC00
+    $::_TARGET0 riscv dmi_write 0x39 0xF4040200
+    $::_TARGET0 riscv dmi_write 0x3C 0xC
+    # PB31
+    $::_TARGET0 riscv dmi_write 0x39 0xF40401F8
+    $::_TARGET0 riscv dmi_write 0x3C 0xC
+    # PB30
+    $::_TARGET0 riscv dmi_write 0x39 0xF40401F0
+    $::_TARGET0 riscv dmi_write 0x3C 0xC
+    # PB29
+    $::_TARGET0 riscv dmi_write 0x39 0xF40401E8
+    $::_TARGET0 riscv dmi_write 0x3C 0xC
+    # PB28
+    $::_TARGET0 riscv dmi_write 0x39 0xF40401E0
+    $::_TARGET0 riscv dmi_write 0x3C 0xC
+    # PB27
+    $::_TARGET0 riscv dmi_write 0x39 0xF40401D8
+    $::_TARGET0 riscv dmi_write 0x3C 0xC
+    # PB26
+    $::_TARGET0 riscv dmi_write 0x39 0xF40401D0
+    $::_TARGET0 riscv dmi_write 0x3C 0xC
+    # PB25
+    $::_TARGET0 riscv dmi_write 0x39 0xF40401C8
+    $::_TARGET0 riscv dmi_write 0x3C 0xC
+    # PB24
+    $::_TARGET0 riscv dmi_write 0x39 0xF40401C0
+    $::_TARGET0 riscv dmi_write 0x3C 0xC
+    # PB23
+    $::_TARGET0 riscv dmi_write 0x39 0xF40401B8
+    $::_TARGET0 riscv dmi_write 0x3C 0xC
+    # PB22
+    $::_TARGET0 riscv dmi_write 0x39 0xF40401B0
+    $::_TARGET0 riscv dmi_write 0x3C 0xC
+    # PB21
+    $::_TARGET0 riscv dmi_write 0x39 0xF40401A8
+    $::_TARGET0 riscv dmi_write 0x3C 0xC
+    # PB20
+    $::_TARGET0 riscv dmi_write 0x39 0xF40401A0
+    $::_TARGET0 riscv dmi_write 0x3C 0xC
+    # PB19
+    $::_TARGET0 riscv dmi_write 0x39 0xF4040198
+    $::_TARGET0 riscv dmi_write 0x3C 0xC
+    # PB18
+    $::_TARGET0 riscv dmi_write 0x39 0xF4040190
+    $::_TARGET0 riscv dmi_write 0x3C 0xC
 
     # PD13
     $::_TARGET0 riscv dmi_write 0x39 0xF4040368
@@ -221,14 +269,12 @@ proc init_sdram { } {
     $::_TARGET0 riscv dmi_write 0x39 0xF3050000
     $::_TARGET0 riscv dmi_write 0x3C 0x10000000
 
-    # 16MB
     $::_TARGET0 riscv dmi_write 0x39 0xF3050010
-    $::_TARGET0 riscv dmi_write 0x3C 0x40000019
+    $::_TARGET0 riscv dmi_write 0x3C 0x4000001b
     $::_TARGET0 riscv dmi_write 0x39 0xF3050014
     $::_TARGET0 riscv dmi_write 0x3C 0
-    # 16-bit
     $::_TARGET0 riscv dmi_write 0x39 0xF3050040
-    $::_TARGET0 riscv dmi_write 0x3C 0xf31
+    $::_TARGET0 riscv dmi_write 0x3C 0xf32
 
     # 133Mhz configuration
     #$::_TARGET0 riscv dmi_write 0x39 0xF3050044

controller_yy_board/pinmux.c

@@ -468,7 +468,7 @@ void init_pwm_pins(PWM_Type *ptr)
 void init_adc12_pins(void)
 {
     /* ADC0.VINP14 */
-    // HPM_IOC->PAD[IOC_PAD_PE28].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK;
+      HPM_IOC->PAD[IOC_PAD_PE28].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK;
       HPM_IOC->PAD[IOC_PAD_PE21].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK;
   
 }
@@ -476,7 +476,7 @@ void init_adc12_pins(void)
 void init_adc16_pins(void)
 {
     /* ADC3.INA2 */
-    // HPM_IOC->PAD[IOC_PAD_PE29].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK;
+      HPM_IOC->PAD[IOC_PAD_PE29].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK;
       HPM_IOC->PAD[IOC_PAD_PF10].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK;
 }