tim.lst 75 KB

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  1. ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 1
  2. 1 .cpu cortex-m4
  3. 2 .arch armv7e-m
  4. 3 .fpu fpv4-sp-d16
  5. 4 .eabi_attribute 27, 1
  6. 5 .eabi_attribute 28, 1
  7. 6 .eabi_attribute 20, 1
  8. 7 .eabi_attribute 21, 1
  9. 8 .eabi_attribute 23, 3
  10. 9 .eabi_attribute 24, 1
  11. 10 .eabi_attribute 25, 1
  12. 11 .eabi_attribute 26, 1
  13. 12 .eabi_attribute 30, 6
  14. 13 .eabi_attribute 34, 1
  15. 14 .eabi_attribute 18, 4
  16. 15 .file "tim.c"
  17. 16 .text
  18. 17 .Ltext0:
  19. 18 .cfi_sections .debug_frame
  20. 19 .global htim2
  21. 20 .section .bss.htim2,"aw",%nobits
  22. 21 .align 2
  23. 24 htim2:
  24. 25 0000 00000000 .space 76
  25. 25 00000000
  26. 25 00000000
  27. 25 00000000
  28. 25 00000000
  29. 26 .global htim3
  30. 27 .section .bss.htim3,"aw",%nobits
  31. 28 .align 2
  32. 31 htim3:
  33. 32 0000 00000000 .space 76
  34. 32 00000000
  35. 32 00000000
  36. 32 00000000
  37. 32 00000000
  38. 33 .global htim4
  39. 34 .section .bss.htim4,"aw",%nobits
  40. 35 .align 2
  41. 38 htim4:
  42. 39 0000 00000000 .space 76
  43. 39 00000000
  44. 39 00000000
  45. 39 00000000
  46. 39 00000000
  47. 40 .section .text.MX_TIM2_Init,"ax",%progbits
  48. 41 .align 1
  49. 42 .global MX_TIM2_Init
  50. 43 .syntax unified
  51. 44 .thumb
  52. 45 .thumb_func
  53. 47 MX_TIM2_Init:
  54. 48 .LFB130:
  55. 49 .file 1 "Core/Src/tim.c"
  56. 1:Core/Src/tim.c **** /* USER CODE BEGIN Header */
  57. 2:Core/Src/tim.c **** /**
  58. 3:Core/Src/tim.c **** ******************************************************************************
  59. ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 2
  60. 4:Core/Src/tim.c **** * @file tim.c
  61. 5:Core/Src/tim.c **** * @brief This file provides code for the configuration
  62. 6:Core/Src/tim.c **** * of the TIM instances.
  63. 7:Core/Src/tim.c **** ******************************************************************************
  64. 8:Core/Src/tim.c **** * @attention
  65. 9:Core/Src/tim.c **** *
  66. 10:Core/Src/tim.c **** * Copyright (c) 2025 STMicroelectronics.
  67. 11:Core/Src/tim.c **** * All rights reserved.
  68. 12:Core/Src/tim.c **** *
  69. 13:Core/Src/tim.c **** * This software is licensed under terms that can be found in the LICENSE file
  70. 14:Core/Src/tim.c **** * in the root directory of this software component.
  71. 15:Core/Src/tim.c **** * If no LICENSE file comes with this software, it is provided AS-IS.
  72. 16:Core/Src/tim.c **** *
  73. 17:Core/Src/tim.c **** ******************************************************************************
  74. 18:Core/Src/tim.c **** */
  75. 19:Core/Src/tim.c **** /* USER CODE END Header */
  76. 20:Core/Src/tim.c **** /* Includes ------------------------------------------------------------------*/
  77. 21:Core/Src/tim.c **** #include "tim.h"
  78. 22:Core/Src/tim.c ****
  79. 23:Core/Src/tim.c **** /* USER CODE BEGIN 0 */
  80. 24:Core/Src/tim.c ****
  81. 25:Core/Src/tim.c **** /* USER CODE END 0 */
  82. 26:Core/Src/tim.c ****
  83. 27:Core/Src/tim.c **** TIM_HandleTypeDef htim2;
  84. 28:Core/Src/tim.c **** TIM_HandleTypeDef htim3;
  85. 29:Core/Src/tim.c **** TIM_HandleTypeDef htim4;
  86. 30:Core/Src/tim.c ****
  87. 31:Core/Src/tim.c **** /* TIM2 init function */
  88. 32:Core/Src/tim.c **** void MX_TIM2_Init(void)
  89. 33:Core/Src/tim.c **** {
  90. 50 .loc 1 33 1
  91. 51 .cfi_startproc
  92. 52 @ args = 0, pretend = 0, frame = 40
  93. 53 @ frame_needed = 1, uses_anonymous_args = 0
  94. 54 0000 80B5 push {r7, lr}
  95. 55 .LCFI0:
  96. 56 .cfi_def_cfa_offset 8
  97. 57 .cfi_offset 7, -8
  98. 58 .cfi_offset 14, -4
  99. 59 0002 8AB0 sub sp, sp, #40
  100. 60 .LCFI1:
  101. 61 .cfi_def_cfa_offset 48
  102. 62 0004 00AF add r7, sp, #0
  103. 63 .LCFI2:
  104. 64 .cfi_def_cfa_register 7
  105. 34:Core/Src/tim.c ****
  106. 35:Core/Src/tim.c **** /* USER CODE BEGIN TIM2_Init 0 */
  107. 36:Core/Src/tim.c ****
  108. 37:Core/Src/tim.c **** /* USER CODE END TIM2_Init 0 */
  109. 38:Core/Src/tim.c ****
  110. 39:Core/Src/tim.c **** TIM_MasterConfigTypeDef sMasterConfig = {0};
  111. 65 .loc 1 39 27
  112. 66 0006 07F11C03 add r3, r7, #28
  113. 67 000a 0022 movs r2, #0
  114. 68 000c 1A60 str r2, [r3]
  115. 69 000e 5A60 str r2, [r3, #4]
  116. 70 0010 9A60 str r2, [r3, #8]
  117. ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 3
  118. 40:Core/Src/tim.c **** TIM_OC_InitTypeDef sConfigOC = {0};
  119. 71 .loc 1 40 22
  120. 72 0012 3B46 mov r3, r7
  121. 73 0014 0022 movs r2, #0
  122. 74 0016 1A60 str r2, [r3]
  123. 75 0018 5A60 str r2, [r3, #4]
  124. 76 001a 9A60 str r2, [r3, #8]
  125. 77 001c DA60 str r2, [r3, #12]
  126. 78 001e 1A61 str r2, [r3, #16]
  127. 79 0020 5A61 str r2, [r3, #20]
  128. 80 0022 9A61 str r2, [r3, #24]
  129. 41:Core/Src/tim.c ****
  130. 42:Core/Src/tim.c **** /* USER CODE BEGIN TIM2_Init 1 */
  131. 43:Core/Src/tim.c ****
  132. 44:Core/Src/tim.c **** /* USER CODE END TIM2_Init 1 */
  133. 45:Core/Src/tim.c **** htim2.Instance = TIM2;
  134. 81 .loc 1 45 18
  135. 82 0024 274B ldr r3, .L6
  136. 83 0026 4FF08042 mov r2, #1073741824
  137. 84 002a 1A60 str r2, [r3]
  138. 46:Core/Src/tim.c **** htim2.Init.Prescaler = 72;
  139. 85 .loc 1 46 24
  140. 86 002c 254B ldr r3, .L6
  141. 87 002e 4822 movs r2, #72
  142. 88 0030 5A60 str r2, [r3, #4]
  143. 47:Core/Src/tim.c **** htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
  144. 89 .loc 1 47 26
  145. 90 0032 244B ldr r3, .L6
  146. 91 0034 0022 movs r2, #0
  147. 92 0036 9A60 str r2, [r3, #8]
  148. 48:Core/Src/tim.c **** htim2.Init.Period = 20000 - 1;
  149. 93 .loc 1 48 21
  150. 94 0038 224B ldr r3, .L6
  151. 95 003a 44F61F62 movw r2, #19999
  152. 96 003e DA60 str r2, [r3, #12]
  153. 49:Core/Src/tim.c **** htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
  154. 97 .loc 1 49 28
  155. 98 0040 204B ldr r3, .L6
  156. 99 0042 0022 movs r2, #0
  157. 100 0044 1A61 str r2, [r3, #16]
  158. 50:Core/Src/tim.c **** htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
  159. 101 .loc 1 50 32
  160. 102 0046 1F4B ldr r3, .L6
  161. 103 0048 0022 movs r2, #0
  162. 104 004a 9A61 str r2, [r3, #24]
  163. 51:Core/Src/tim.c **** if (HAL_TIM_PWM_Init(&htim2) != HAL_OK)
  164. 105 .loc 1 51 7
  165. 106 004c 1D48 ldr r0, .L6
  166. 107 004e FFF7FEFF bl HAL_TIM_PWM_Init
  167. 108 0052 0346 mov r3, r0
  168. 109 .loc 1 51 6
  169. 110 0054 002B cmp r3, #0
  170. 111 0056 01D0 beq .L2
  171. 52:Core/Src/tim.c **** {
  172. 53:Core/Src/tim.c **** Error_Handler();
  173. 112 .loc 1 53 5
  174. 113 0058 FFF7FEFF bl Error_Handler
  175. ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 4
  176. 114 .L2:
  177. 54:Core/Src/tim.c **** }
  178. 55:Core/Src/tim.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
  179. 115 .loc 1 55 37
  180. 116 005c 0023 movs r3, #0
  181. 117 005e FB61 str r3, [r7, #28]
  182. 56:Core/Src/tim.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
  183. 118 .loc 1 56 33
  184. 119 0060 0023 movs r3, #0
  185. 120 0062 7B62 str r3, [r7, #36]
  186. 57:Core/Src/tim.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK)
  187. 121 .loc 1 57 7
  188. 122 0064 07F11C03 add r3, r7, #28
  189. 123 0068 1946 mov r1, r3
  190. 124 006a 1648 ldr r0, .L6
  191. 125 006c FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization
  192. 126 0070 0346 mov r3, r0
  193. 127 .loc 1 57 6
  194. 128 0072 002B cmp r3, #0
  195. 129 0074 01D0 beq .L3
  196. 58:Core/Src/tim.c **** {
  197. 59:Core/Src/tim.c **** Error_Handler();
  198. 130 .loc 1 59 5
  199. 131 0076 FFF7FEFF bl Error_Handler
  200. 132 .L3:
  201. 60:Core/Src/tim.c **** }
  202. 61:Core/Src/tim.c **** sConfigOC.OCMode = TIM_OCMODE_PWM1;
  203. 133 .loc 1 61 20
  204. 134 007a 6023 movs r3, #96
  205. 135 007c 3B60 str r3, [r7]
  206. 62:Core/Src/tim.c **** sConfigOC.Pulse = 0;
  207. 136 .loc 1 62 19
  208. 137 007e 0023 movs r3, #0
  209. 138 0080 7B60 str r3, [r7, #4]
  210. 63:Core/Src/tim.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
  211. 139 .loc 1 63 24
  212. 140 0082 0023 movs r3, #0
  213. 141 0084 BB60 str r3, [r7, #8]
  214. 64:Core/Src/tim.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
  215. 142 .loc 1 64 24
  216. 143 0086 0023 movs r3, #0
  217. 144 0088 3B61 str r3, [r7, #16]
  218. 65:Core/Src/tim.c **** if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
  219. 145 .loc 1 65 7
  220. 146 008a 3B46 mov r3, r7
  221. 147 008c 0022 movs r2, #0
  222. 148 008e 1946 mov r1, r3
  223. 149 0090 0C48 ldr r0, .L6
  224. 150 0092 FFF7FEFF bl HAL_TIM_PWM_ConfigChannel
  225. 151 0096 0346 mov r3, r0
  226. 152 .loc 1 65 6
  227. 153 0098 002B cmp r3, #0
  228. 154 009a 01D0 beq .L4
  229. 66:Core/Src/tim.c **** {
  230. 67:Core/Src/tim.c **** Error_Handler();
  231. 155 .loc 1 67 5
  232. 156 009c FFF7FEFF bl Error_Handler
  233. ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 5
  234. 157 .L4:
  235. 68:Core/Src/tim.c **** }
  236. 69:Core/Src/tim.c **** if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
  237. 158 .loc 1 69 7
  238. 159 00a0 3B46 mov r3, r7
  239. 160 00a2 0422 movs r2, #4
  240. 161 00a4 1946 mov r1, r3
  241. 162 00a6 0748 ldr r0, .L6
  242. 163 00a8 FFF7FEFF bl HAL_TIM_PWM_ConfigChannel
  243. 164 00ac 0346 mov r3, r0
  244. 165 .loc 1 69 6
  245. 166 00ae 002B cmp r3, #0
  246. 167 00b0 01D0 beq .L5
  247. 70:Core/Src/tim.c **** {
  248. 71:Core/Src/tim.c **** Error_Handler();
  249. 168 .loc 1 71 5
  250. 169 00b2 FFF7FEFF bl Error_Handler
  251. 170 .L5:
  252. 72:Core/Src/tim.c **** }
  253. 73:Core/Src/tim.c **** /* USER CODE BEGIN TIM2_Init 2 */
  254. 74:Core/Src/tim.c ****
  255. 75:Core/Src/tim.c **** /* USER CODE END TIM2_Init 2 */
  256. 76:Core/Src/tim.c **** HAL_TIM_MspPostInit(&htim2);
  257. 171 .loc 1 76 3
  258. 172 00b6 0348 ldr r0, .L6
  259. 173 00b8 FFF7FEFF bl HAL_TIM_MspPostInit
  260. 77:Core/Src/tim.c ****
  261. 78:Core/Src/tim.c **** }
  262. 174 .loc 1 78 1
  263. 175 00bc 00BF nop
  264. 176 00be 2837 adds r7, r7, #40
  265. 177 .LCFI3:
  266. 178 .cfi_def_cfa_offset 8
  267. 179 00c0 BD46 mov sp, r7
  268. 180 .LCFI4:
  269. 181 .cfi_def_cfa_register 13
  270. 182 @ sp needed
  271. 183 00c2 80BD pop {r7, pc}
  272. 184 .L7:
  273. 185 .align 2
  274. 186 .L6:
  275. 187 00c4 00000000 .word htim2
  276. 188 .cfi_endproc
  277. 189 .LFE130:
  278. 191 .section .text.MX_TIM3_Init,"ax",%progbits
  279. 192 .align 1
  280. 193 .global MX_TIM3_Init
  281. 194 .syntax unified
  282. 195 .thumb
  283. 196 .thumb_func
  284. 198 MX_TIM3_Init:
  285. 199 .LFB131:
  286. 79:Core/Src/tim.c **** /* TIM3 init function */
  287. 80:Core/Src/tim.c **** void MX_TIM3_Init(void)
  288. 81:Core/Src/tim.c **** {
  289. 200 .loc 1 81 1
  290. 201 .cfi_startproc
  291. ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 6
  292. 202 @ args = 0, pretend = 0, frame = 40
  293. 203 @ frame_needed = 1, uses_anonymous_args = 0
  294. 204 0000 80B5 push {r7, lr}
  295. 205 .LCFI5:
  296. 206 .cfi_def_cfa_offset 8
  297. 207 .cfi_offset 7, -8
  298. 208 .cfi_offset 14, -4
  299. 209 0002 8AB0 sub sp, sp, #40
  300. 210 .LCFI6:
  301. 211 .cfi_def_cfa_offset 48
  302. 212 0004 00AF add r7, sp, #0
  303. 213 .LCFI7:
  304. 214 .cfi_def_cfa_register 7
  305. 82:Core/Src/tim.c ****
  306. 83:Core/Src/tim.c **** /* USER CODE BEGIN TIM3_Init 0 */
  307. 84:Core/Src/tim.c ****
  308. 85:Core/Src/tim.c **** /* USER CODE END TIM3_Init 0 */
  309. 86:Core/Src/tim.c ****
  310. 87:Core/Src/tim.c **** TIM_MasterConfigTypeDef sMasterConfig = {0};
  311. 215 .loc 1 87 27
  312. 216 0006 07F11C03 add r3, r7, #28
  313. 217 000a 0022 movs r2, #0
  314. 218 000c 1A60 str r2, [r3]
  315. 219 000e 5A60 str r2, [r3, #4]
  316. 220 0010 9A60 str r2, [r3, #8]
  317. 88:Core/Src/tim.c **** TIM_OC_InitTypeDef sConfigOC = {0};
  318. 221 .loc 1 88 22
  319. 222 0012 3B46 mov r3, r7
  320. 223 0014 0022 movs r2, #0
  321. 224 0016 1A60 str r2, [r3]
  322. 225 0018 5A60 str r2, [r3, #4]
  323. 226 001a 9A60 str r2, [r3, #8]
  324. 227 001c DA60 str r2, [r3, #12]
  325. 228 001e 1A61 str r2, [r3, #16]
  326. 229 0020 5A61 str r2, [r3, #20]
  327. 230 0022 9A61 str r2, [r3, #24]
  328. 89:Core/Src/tim.c ****
  329. 90:Core/Src/tim.c **** /* USER CODE BEGIN TIM3_Init 1 */
  330. 91:Core/Src/tim.c ****
  331. 92:Core/Src/tim.c **** /* USER CODE END TIM3_Init 1 */
  332. 93:Core/Src/tim.c **** htim3.Instance = TIM3;
  333. 231 .loc 1 93 18
  334. 232 0024 274B ldr r3, .L13
  335. 233 0026 284A ldr r2, .L13+4
  336. 234 0028 1A60 str r2, [r3]
  337. 94:Core/Src/tim.c **** htim3.Init.Prescaler = 72;
  338. 235 .loc 1 94 24
  339. 236 002a 264B ldr r3, .L13
  340. 237 002c 4822 movs r2, #72
  341. 238 002e 5A60 str r2, [r3, #4]
  342. 95:Core/Src/tim.c **** htim3.Init.CounterMode = TIM_COUNTERMODE_UP;
  343. 239 .loc 1 95 26
  344. 240 0030 244B ldr r3, .L13
  345. 241 0032 0022 movs r2, #0
  346. 242 0034 9A60 str r2, [r3, #8]
  347. 96:Core/Src/tim.c **** htim3.Init.Period = 20000 - 1;
  348. 243 .loc 1 96 21
  349. ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 7
  350. 244 0036 234B ldr r3, .L13
  351. 245 0038 44F61F62 movw r2, #19999
  352. 246 003c DA60 str r2, [r3, #12]
  353. 97:Core/Src/tim.c **** htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
  354. 247 .loc 1 97 28
  355. 248 003e 214B ldr r3, .L13
  356. 249 0040 0022 movs r2, #0
  357. 250 0042 1A61 str r2, [r3, #16]
  358. 98:Core/Src/tim.c **** htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
  359. 251 .loc 1 98 32
  360. 252 0044 1F4B ldr r3, .L13
  361. 253 0046 0022 movs r2, #0
  362. 254 0048 9A61 str r2, [r3, #24]
  363. 99:Core/Src/tim.c **** if (HAL_TIM_PWM_Init(&htim3) != HAL_OK)
  364. 255 .loc 1 99 7
  365. 256 004a 1E48 ldr r0, .L13
  366. 257 004c FFF7FEFF bl HAL_TIM_PWM_Init
  367. 258 0050 0346 mov r3, r0
  368. 259 .loc 1 99 6
  369. 260 0052 002B cmp r3, #0
  370. 261 0054 01D0 beq .L9
  371. 100:Core/Src/tim.c **** {
  372. 101:Core/Src/tim.c **** Error_Handler();
  373. 262 .loc 1 101 5
  374. 263 0056 FFF7FEFF bl Error_Handler
  375. 264 .L9:
  376. 102:Core/Src/tim.c **** }
  377. 103:Core/Src/tim.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
  378. 265 .loc 1 103 37
  379. 266 005a 0023 movs r3, #0
  380. 267 005c FB61 str r3, [r7, #28]
  381. 104:Core/Src/tim.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
  382. 268 .loc 1 104 33
  383. 269 005e 0023 movs r3, #0
  384. 270 0060 7B62 str r3, [r7, #36]
  385. 105:Core/Src/tim.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK)
  386. 271 .loc 1 105 7
  387. 272 0062 07F11C03 add r3, r7, #28
  388. 273 0066 1946 mov r1, r3
  389. 274 0068 1648 ldr r0, .L13
  390. 275 006a FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization
  391. 276 006e 0346 mov r3, r0
  392. 277 .loc 1 105 6
  393. 278 0070 002B cmp r3, #0
  394. 279 0072 01D0 beq .L10
  395. 106:Core/Src/tim.c **** {
  396. 107:Core/Src/tim.c **** Error_Handler();
  397. 280 .loc 1 107 5
  398. 281 0074 FFF7FEFF bl Error_Handler
  399. 282 .L10:
  400. 108:Core/Src/tim.c **** }
  401. 109:Core/Src/tim.c **** sConfigOC.OCMode = TIM_OCMODE_PWM1;
  402. 283 .loc 1 109 20
  403. 284 0078 6023 movs r3, #96
  404. 285 007a 3B60 str r3, [r7]
  405. 110:Core/Src/tim.c **** sConfigOC.Pulse = 0;
  406. 286 .loc 1 110 19
  407. ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 8
  408. 287 007c 0023 movs r3, #0
  409. 288 007e 7B60 str r3, [r7, #4]
  410. 111:Core/Src/tim.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
  411. 289 .loc 1 111 24
  412. 290 0080 0023 movs r3, #0
  413. 291 0082 BB60 str r3, [r7, #8]
  414. 112:Core/Src/tim.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
  415. 292 .loc 1 112 24
  416. 293 0084 0023 movs r3, #0
  417. 294 0086 3B61 str r3, [r7, #16]
  418. 113:Core/Src/tim.c **** if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
  419. 295 .loc 1 113 7
  420. 296 0088 3B46 mov r3, r7
  421. 297 008a 0022 movs r2, #0
  422. 298 008c 1946 mov r1, r3
  423. 299 008e 0D48 ldr r0, .L13
  424. 300 0090 FFF7FEFF bl HAL_TIM_PWM_ConfigChannel
  425. 301 0094 0346 mov r3, r0
  426. 302 .loc 1 113 6
  427. 303 0096 002B cmp r3, #0
  428. 304 0098 01D0 beq .L11
  429. 114:Core/Src/tim.c **** {
  430. 115:Core/Src/tim.c **** Error_Handler();
  431. 305 .loc 1 115 5
  432. 306 009a FFF7FEFF bl Error_Handler
  433. 307 .L11:
  434. 116:Core/Src/tim.c **** }
  435. 117:Core/Src/tim.c **** if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
  436. 308 .loc 1 117 7
  437. 309 009e 3B46 mov r3, r7
  438. 310 00a0 0422 movs r2, #4
  439. 311 00a2 1946 mov r1, r3
  440. 312 00a4 0748 ldr r0, .L13
  441. 313 00a6 FFF7FEFF bl HAL_TIM_PWM_ConfigChannel
  442. 314 00aa 0346 mov r3, r0
  443. 315 .loc 1 117 6
  444. 316 00ac 002B cmp r3, #0
  445. 317 00ae 01D0 beq .L12
  446. 118:Core/Src/tim.c **** {
  447. 119:Core/Src/tim.c **** Error_Handler();
  448. 318 .loc 1 119 5
  449. 319 00b0 FFF7FEFF bl Error_Handler
  450. 320 .L12:
  451. 120:Core/Src/tim.c **** }
  452. 121:Core/Src/tim.c **** /* USER CODE BEGIN TIM3_Init 2 */
  453. 122:Core/Src/tim.c ****
  454. 123:Core/Src/tim.c **** /* USER CODE END TIM3_Init 2 */
  455. 124:Core/Src/tim.c **** HAL_TIM_MspPostInit(&htim3);
  456. 321 .loc 1 124 3
  457. 322 00b4 0348 ldr r0, .L13
  458. 323 00b6 FFF7FEFF bl HAL_TIM_MspPostInit
  459. 125:Core/Src/tim.c ****
  460. 126:Core/Src/tim.c **** }
  461. 324 .loc 1 126 1
  462. 325 00ba 00BF nop
  463. 326 00bc 2837 adds r7, r7, #40
  464. 327 .LCFI8:
  465. ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 9
  466. 328 .cfi_def_cfa_offset 8
  467. 329 00be BD46 mov sp, r7
  468. 330 .LCFI9:
  469. 331 .cfi_def_cfa_register 13
  470. 332 @ sp needed
  471. 333 00c0 80BD pop {r7, pc}
  472. 334 .L14:
  473. 335 00c2 00BF .align 2
  474. 336 .L13:
  475. 337 00c4 00000000 .word htim3
  476. 338 00c8 00040040 .word 1073742848
  477. 339 .cfi_endproc
  478. 340 .LFE131:
  479. 342 .section .text.MX_TIM4_Init,"ax",%progbits
  480. 343 .align 1
  481. 344 .global MX_TIM4_Init
  482. 345 .syntax unified
  483. 346 .thumb
  484. 347 .thumb_func
  485. 349 MX_TIM4_Init:
  486. 350 .LFB132:
  487. 127:Core/Src/tim.c ****
  488. 128:Core/Src/tim.c **** void MX_TIM4_Init(void)
  489. 129:Core/Src/tim.c **** {
  490. 351 .loc 1 129 1
  491. 352 .cfi_startproc
  492. 353 @ args = 0, pretend = 0, frame = 32
  493. 354 @ frame_needed = 1, uses_anonymous_args = 0
  494. 355 0000 80B5 push {r7, lr}
  495. 356 .LCFI10:
  496. 357 .cfi_def_cfa_offset 8
  497. 358 .cfi_offset 7, -8
  498. 359 .cfi_offset 14, -4
  499. 360 0002 88B0 sub sp, sp, #32
  500. 361 .LCFI11:
  501. 362 .cfi_def_cfa_offset 40
  502. 363 0004 00AF add r7, sp, #0
  503. 364 .LCFI12:
  504. 365 .cfi_def_cfa_register 7
  505. 130:Core/Src/tim.c ****
  506. 131:Core/Src/tim.c **** /* USER CODE BEGIN TIM4_Init 0 */
  507. 132:Core/Src/tim.c ****
  508. 133:Core/Src/tim.c **** /* USER CODE END TIM4_Init 0 */
  509. 134:Core/Src/tim.c ****
  510. 135:Core/Src/tim.c **** TIM_ClockConfigTypeDef sClockSourceConfig = {0};
  511. 366 .loc 1 135 26
  512. 367 0006 07F11003 add r3, r7, #16
  513. 368 000a 0022 movs r2, #0
  514. 369 000c 1A60 str r2, [r3]
  515. 370 000e 5A60 str r2, [r3, #4]
  516. 371 0010 9A60 str r2, [r3, #8]
  517. 372 0012 DA60 str r2, [r3, #12]
  518. 136:Core/Src/tim.c **** TIM_MasterConfigTypeDef sMasterConfig = {0};
  519. 373 .loc 1 136 27
  520. 374 0014 3B1D adds r3, r7, #4
  521. 375 0016 0022 movs r2, #0
  522. 376 0018 1A60 str r2, [r3]
  523. ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 10
  524. 377 001a 5A60 str r2, [r3, #4]
  525. 378 001c 9A60 str r2, [r3, #8]
  526. 137:Core/Src/tim.c ****
  527. 138:Core/Src/tim.c **** /* USER CODE BEGIN TIM4_Init 1 */
  528. 139:Core/Src/tim.c ****
  529. 140:Core/Src/tim.c **** /* USER CODE END TIM4_Init 1 */
  530. 141:Core/Src/tim.c **** htim4.Instance = TIM4;
  531. 379 .loc 1 141 18
  532. 380 001e 1D4B ldr r3, .L20
  533. 381 0020 1D4A ldr r2, .L20+4
  534. 382 0022 1A60 str r2, [r3]
  535. 142:Core/Src/tim.c **** htim4.Init.Prescaler = 71;
  536. 383 .loc 1 142 24
  537. 384 0024 1B4B ldr r3, .L20
  538. 385 0026 4722 movs r2, #71
  539. 386 0028 5A60 str r2, [r3, #4]
  540. 143:Core/Src/tim.c **** htim4.Init.CounterMode = TIM_COUNTERMODE_UP;
  541. 387 .loc 1 143 26
  542. 388 002a 1A4B ldr r3, .L20
  543. 389 002c 0022 movs r2, #0
  544. 390 002e 9A60 str r2, [r3, #8]
  545. 144:Core/Src/tim.c **** htim4.Init.Period = 20000 - 1;
  546. 391 .loc 1 144 21
  547. 392 0030 184B ldr r3, .L20
  548. 393 0032 44F61F62 movw r2, #19999
  549. 394 0036 DA60 str r2, [r3, #12]
  550. 145:Core/Src/tim.c **** // htim4.Init.Period = 10000 -1;
  551. 146:Core/Src/tim.c **** htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
  552. 395 .loc 1 146 28
  553. 396 0038 164B ldr r3, .L20
  554. 397 003a 0022 movs r2, #0
  555. 398 003c 1A61 str r2, [r3, #16]
  556. 147:Core/Src/tim.c **** htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
  557. 399 .loc 1 147 32
  558. 400 003e 154B ldr r3, .L20
  559. 401 0040 0022 movs r2, #0
  560. 402 0042 9A61 str r2, [r3, #24]
  561. 148:Core/Src/tim.c **** if (HAL_TIM_Base_Init(&htim4) != HAL_OK)
  562. 403 .loc 1 148 7
  563. 404 0044 1348 ldr r0, .L20
  564. 405 0046 FFF7FEFF bl HAL_TIM_Base_Init
  565. 406 004a 0346 mov r3, r0
  566. 407 .loc 1 148 6
  567. 408 004c 002B cmp r3, #0
  568. 409 004e 01D0 beq .L16
  569. 149:Core/Src/tim.c **** {
  570. 150:Core/Src/tim.c **** Error_Handler();
  571. 410 .loc 1 150 5
  572. 411 0050 FFF7FEFF bl Error_Handler
  573. 412 .L16:
  574. 151:Core/Src/tim.c **** }
  575. 152:Core/Src/tim.c **** sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
  576. 413 .loc 1 152 34
  577. 414 0054 4FF48053 mov r3, #4096
  578. 415 0058 3B61 str r3, [r7, #16]
  579. 153:Core/Src/tim.c **** if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK)
  580. 416 .loc 1 153 7
  581. ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 11
  582. 417 005a 07F11003 add r3, r7, #16
  583. 418 005e 1946 mov r1, r3
  584. 419 0060 0C48 ldr r0, .L20
  585. 420 0062 FFF7FEFF bl HAL_TIM_ConfigClockSource
  586. 421 0066 0346 mov r3, r0
  587. 422 .loc 1 153 6
  588. 423 0068 002B cmp r3, #0
  589. 424 006a 01D0 beq .L17
  590. 154:Core/Src/tim.c **** {
  591. 155:Core/Src/tim.c **** Error_Handler();
  592. 425 .loc 1 155 5
  593. 426 006c FFF7FEFF bl Error_Handler
  594. 427 .L17:
  595. 156:Core/Src/tim.c **** }
  596. 157:Core/Src/tim.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
  597. 428 .loc 1 157 37
  598. 429 0070 0023 movs r3, #0
  599. 430 0072 7B60 str r3, [r7, #4]
  600. 158:Core/Src/tim.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
  601. 431 .loc 1 158 33
  602. 432 0074 0023 movs r3, #0
  603. 433 0076 FB60 str r3, [r7, #12]
  604. 159:Core/Src/tim.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK)
  605. 434 .loc 1 159 7
  606. 435 0078 3B1D adds r3, r7, #4
  607. 436 007a 1946 mov r1, r3
  608. 437 007c 0548 ldr r0, .L20
  609. 438 007e FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization
  610. 439 0082 0346 mov r3, r0
  611. 440 .loc 1 159 6
  612. 441 0084 002B cmp r3, #0
  613. 442 0086 01D0 beq .L19
  614. 160:Core/Src/tim.c **** {
  615. 161:Core/Src/tim.c **** Error_Handler();
  616. 443 .loc 1 161 5
  617. 444 0088 FFF7FEFF bl Error_Handler
  618. 445 .L19:
  619. 162:Core/Src/tim.c **** }
  620. 163:Core/Src/tim.c **** /* USER CODE BEGIN TIM4_Init 2 */
  621. 164:Core/Src/tim.c ****
  622. 165:Core/Src/tim.c **** /* USER CODE END TIM4_Init 2 */
  623. 166:Core/Src/tim.c **** }
  624. 446 .loc 1 166 1
  625. 447 008c 00BF nop
  626. 448 008e 2037 adds r7, r7, #32
  627. 449 .LCFI13:
  628. 450 .cfi_def_cfa_offset 8
  629. 451 0090 BD46 mov sp, r7
  630. 452 .LCFI14:
  631. 453 .cfi_def_cfa_register 13
  632. 454 @ sp needed
  633. 455 0092 80BD pop {r7, pc}
  634. 456 .L21:
  635. 457 .align 2
  636. 458 .L20:
  637. 459 0094 00000000 .word htim4
  638. 460 0098 00080040 .word 1073743872
  639. ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 12
  640. 461 .cfi_endproc
  641. 462 .LFE132:
  642. 464 .section .text.HAL_TIM_Base_MspInit,"ax",%progbits
  643. 465 .align 1
  644. 466 .global HAL_TIM_Base_MspInit
  645. 467 .syntax unified
  646. 468 .thumb
  647. 469 .thumb_func
  648. 471 HAL_TIM_Base_MspInit:
  649. 472 .LFB133:
  650. 167:Core/Src/tim.c ****
  651. 168:Core/Src/tim.c **** void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *tim_baseHandle)
  652. 169:Core/Src/tim.c **** {
  653. 473 .loc 1 169 1
  654. 474 .cfi_startproc
  655. 475 @ args = 0, pretend = 0, frame = 16
  656. 476 @ frame_needed = 1, uses_anonymous_args = 0
  657. 477 0000 80B5 push {r7, lr}
  658. 478 .LCFI15:
  659. 479 .cfi_def_cfa_offset 8
  660. 480 .cfi_offset 7, -8
  661. 481 .cfi_offset 14, -4
  662. 482 0002 84B0 sub sp, sp, #16
  663. 483 .LCFI16:
  664. 484 .cfi_def_cfa_offset 24
  665. 485 0004 00AF add r7, sp, #0
  666. 486 .LCFI17:
  667. 487 .cfi_def_cfa_register 7
  668. 488 0006 7860 str r0, [r7, #4]
  669. 170:Core/Src/tim.c ****
  670. 171:Core/Src/tim.c **** if (tim_baseHandle->Instance == TIM3)
  671. 489 .loc 1 171 21
  672. 490 0008 7B68 ldr r3, [r7, #4]
  673. 491 000a 1B68 ldr r3, [r3]
  674. 492 .loc 1 171 6
  675. 493 000c 164A ldr r2, .L26
  676. 494 000e 9342 cmp r3, r2
  677. 495 0010 0CD1 bne .L23
  678. 496 .LBB2:
  679. 172:Core/Src/tim.c **** {
  680. 173:Core/Src/tim.c **** /* USER CODE BEGIN TIM3_MspInit 0 */
  681. 174:Core/Src/tim.c ****
  682. 175:Core/Src/tim.c **** /* USER CODE END TIM3_MspInit 0 */
  683. 176:Core/Src/tim.c **** /* TIM3 clock enable */
  684. 177:Core/Src/tim.c **** __HAL_RCC_TIM3_CLK_ENABLE();
  685. 497 .loc 1 177 5
  686. 498 0012 164B ldr r3, .L26+4
  687. 499 0014 DB69 ldr r3, [r3, #28]
  688. 500 0016 154A ldr r2, .L26+4
  689. 501 0018 43F00203 orr r3, r3, #2
  690. 502 001c D361 str r3, [r2, #28]
  691. 503 001e 134B ldr r3, .L26+4
  692. 504 0020 DB69 ldr r3, [r3, #28]
  693. 505 0022 03F00203 and r3, r3, #2
  694. 506 0026 FB60 str r3, [r7, #12]
  695. 507 0028 FB68 ldr r3, [r7, #12]
  696. 508 .LBE2:
  697. ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 13
  698. 178:Core/Src/tim.c **** /* USER CODE BEGIN TIM3_MspInit 1 */
  699. 179:Core/Src/tim.c ****
  700. 180:Core/Src/tim.c **** /* USER CODE END TIM3_MspInit 1 */
  701. 181:Core/Src/tim.c **** }
  702. 182:Core/Src/tim.c **** else if (tim_baseHandle->Instance == TIM4)
  703. 183:Core/Src/tim.c **** {
  704. 184:Core/Src/tim.c **** /* USER CODE BEGIN TIM4_MspInit 0 */
  705. 185:Core/Src/tim.c ****
  706. 186:Core/Src/tim.c **** /* USER CODE END TIM4_MspInit 0 */
  707. 187:Core/Src/tim.c **** /* TIM4 clock enable */
  708. 188:Core/Src/tim.c **** __HAL_RCC_TIM4_CLK_ENABLE();
  709. 189:Core/Src/tim.c ****
  710. 190:Core/Src/tim.c **** /* TIM4 interrupt Init */
  711. 191:Core/Src/tim.c **** HAL_NVIC_SetPriority(TIM4_IRQn, 0, 0);
  712. 192:Core/Src/tim.c **** HAL_NVIC_EnableIRQ(TIM4_IRQn);
  713. 193:Core/Src/tim.c **** /* USER CODE BEGIN TIM4_MspInit 1 */
  714. 194:Core/Src/tim.c ****
  715. 195:Core/Src/tim.c **** /* USER CODE END TIM4_MspInit 1 */
  716. 196:Core/Src/tim.c **** }
  717. 197:Core/Src/tim.c **** }
  718. 509 .loc 1 197 1
  719. 510 002a 18E0 b .L25
  720. 511 .L23:
  721. 182:Core/Src/tim.c **** {
  722. 512 .loc 1 182 26
  723. 513 002c 7B68 ldr r3, [r7, #4]
  724. 514 002e 1B68 ldr r3, [r3]
  725. 182:Core/Src/tim.c **** {
  726. 515 .loc 1 182 11
  727. 516 0030 0F4A ldr r2, .L26+8
  728. 517 0032 9342 cmp r3, r2
  729. 518 0034 13D1 bne .L25
  730. 519 .LBB3:
  731. 188:Core/Src/tim.c ****
  732. 520 .loc 1 188 5
  733. 521 0036 0D4B ldr r3, .L26+4
  734. 522 0038 DB69 ldr r3, [r3, #28]
  735. 523 003a 0C4A ldr r2, .L26+4
  736. 524 003c 43F00403 orr r3, r3, #4
  737. 525 0040 D361 str r3, [r2, #28]
  738. 526 0042 0A4B ldr r3, .L26+4
  739. 527 0044 DB69 ldr r3, [r3, #28]
  740. 528 0046 03F00403 and r3, r3, #4
  741. 529 004a BB60 str r3, [r7, #8]
  742. 530 004c BB68 ldr r3, [r7, #8]
  743. 531 .LBE3:
  744. 191:Core/Src/tim.c **** HAL_NVIC_EnableIRQ(TIM4_IRQn);
  745. 532 .loc 1 191 5
  746. 533 004e 0022 movs r2, #0
  747. 534 0050 0021 movs r1, #0
  748. 535 0052 1E20 movs r0, #30
  749. 536 0054 FFF7FEFF bl HAL_NVIC_SetPriority
  750. 192:Core/Src/tim.c **** /* USER CODE BEGIN TIM4_MspInit 1 */
  751. 537 .loc 1 192 5
  752. 538 0058 1E20 movs r0, #30
  753. 539 005a FFF7FEFF bl HAL_NVIC_EnableIRQ
  754. 540 .L25:
  755. ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 14
  756. 541 .loc 1 197 1
  757. 542 005e 00BF nop
  758. 543 0060 1037 adds r7, r7, #16
  759. 544 .LCFI18:
  760. 545 .cfi_def_cfa_offset 8
  761. 546 0062 BD46 mov sp, r7
  762. 547 .LCFI19:
  763. 548 .cfi_def_cfa_register 13
  764. 549 @ sp needed
  765. 550 0064 80BD pop {r7, pc}
  766. 551 .L27:
  767. 552 0066 00BF .align 2
  768. 553 .L26:
  769. 554 0068 00040040 .word 1073742848
  770. 555 006c 00100240 .word 1073876992
  771. 556 0070 00080040 .word 1073743872
  772. 557 .cfi_endproc
  773. 558 .LFE133:
  774. 560 .section .text.HAL_TIM_PWM_MspInit,"ax",%progbits
  775. 561 .align 1
  776. 562 .global HAL_TIM_PWM_MspInit
  777. 563 .syntax unified
  778. 564 .thumb
  779. 565 .thumb_func
  780. 567 HAL_TIM_PWM_MspInit:
  781. 568 .LFB134:
  782. 198:Core/Src/tim.c ****
  783. 199:Core/Src/tim.c **** void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef* tim_pwmHandle)
  784. 200:Core/Src/tim.c **** {
  785. 569 .loc 1 200 1
  786. 570 .cfi_startproc
  787. 571 @ args = 0, pretend = 0, frame = 16
  788. 572 @ frame_needed = 1, uses_anonymous_args = 0
  789. 573 @ link register save eliminated.
  790. 574 0000 80B4 push {r7}
  791. 575 .LCFI20:
  792. 576 .cfi_def_cfa_offset 4
  793. 577 .cfi_offset 7, -4
  794. 578 0002 85B0 sub sp, sp, #20
  795. 579 .LCFI21:
  796. 580 .cfi_def_cfa_offset 24
  797. 581 0004 00AF add r7, sp, #0
  798. 582 .LCFI22:
  799. 583 .cfi_def_cfa_register 7
  800. 584 0006 7860 str r0, [r7, #4]
  801. 201:Core/Src/tim.c ****
  802. 202:Core/Src/tim.c **** if(tim_pwmHandle->Instance==TIM2)
  803. 585 .loc 1 202 19
  804. 586 0008 7B68 ldr r3, [r7, #4]
  805. 587 000a 1B68 ldr r3, [r3]
  806. 588 .loc 1 202 5
  807. 589 000c B3F1804F cmp r3, #1073741824
  808. 590 0010 0CD1 bne .L29
  809. 591 .LBB4:
  810. 203:Core/Src/tim.c **** {
  811. 204:Core/Src/tim.c **** /* USER CODE BEGIN TIM2_MspInit 0 */
  812. 205:Core/Src/tim.c ****
  813. ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 15
  814. 206:Core/Src/tim.c **** /* USER CODE END TIM2_MspInit 0 */
  815. 207:Core/Src/tim.c **** /* TIM2 clock enable */
  816. 208:Core/Src/tim.c **** __HAL_RCC_TIM2_CLK_ENABLE();
  817. 592 .loc 1 208 5
  818. 593 0012 124B ldr r3, .L32
  819. 594 0014 DB69 ldr r3, [r3, #28]
  820. 595 0016 114A ldr r2, .L32
  821. 596 0018 43F00103 orr r3, r3, #1
  822. 597 001c D361 str r3, [r2, #28]
  823. 598 001e 0F4B ldr r3, .L32
  824. 599 0020 DB69 ldr r3, [r3, #28]
  825. 600 0022 03F00103 and r3, r3, #1
  826. 601 0026 FB60 str r3, [r7, #12]
  827. 602 0028 FB68 ldr r3, [r7, #12]
  828. 603 .LBE4:
  829. 209:Core/Src/tim.c **** /* USER CODE BEGIN TIM2_MspInit 1 */
  830. 210:Core/Src/tim.c ****
  831. 211:Core/Src/tim.c **** /* USER CODE END TIM2_MspInit 1 */
  832. 212:Core/Src/tim.c **** }
  833. 213:Core/Src/tim.c **** else if(tim_pwmHandle->Instance==TIM3)
  834. 214:Core/Src/tim.c **** {
  835. 215:Core/Src/tim.c **** /* USER CODE BEGIN TIM3_MspInit 0 */
  836. 216:Core/Src/tim.c ****
  837. 217:Core/Src/tim.c **** /* USER CODE END TIM3_MspInit 0 */
  838. 218:Core/Src/tim.c **** /* TIM3 clock enable */
  839. 219:Core/Src/tim.c **** __HAL_RCC_TIM3_CLK_ENABLE();
  840. 220:Core/Src/tim.c **** /* USER CODE BEGIN TIM3_MspInit 1 */
  841. 221:Core/Src/tim.c ****
  842. 222:Core/Src/tim.c **** /* USER CODE END TIM3_MspInit 1 */
  843. 223:Core/Src/tim.c **** }
  844. 224:Core/Src/tim.c **** }
  845. 604 .loc 1 224 1
  846. 605 002a 10E0 b .L31
  847. 606 .L29:
  848. 213:Core/Src/tim.c **** {
  849. 607 .loc 1 213 24
  850. 608 002c 7B68 ldr r3, [r7, #4]
  851. 609 002e 1B68 ldr r3, [r3]
  852. 213:Core/Src/tim.c **** {
  853. 610 .loc 1 213 10
  854. 611 0030 0B4A ldr r2, .L32+4
  855. 612 0032 9342 cmp r3, r2
  856. 613 0034 0BD1 bne .L31
  857. 614 .LBB5:
  858. 219:Core/Src/tim.c **** /* USER CODE BEGIN TIM3_MspInit 1 */
  859. 615 .loc 1 219 5
  860. 616 0036 094B ldr r3, .L32
  861. 617 0038 DB69 ldr r3, [r3, #28]
  862. 618 003a 084A ldr r2, .L32
  863. 619 003c 43F00203 orr r3, r3, #2
  864. 620 0040 D361 str r3, [r2, #28]
  865. 621 0042 064B ldr r3, .L32
  866. 622 0044 DB69 ldr r3, [r3, #28]
  867. 623 0046 03F00203 and r3, r3, #2
  868. 624 004a BB60 str r3, [r7, #8]
  869. 625 004c BB68 ldr r3, [r7, #8]
  870. 626 .L31:
  871. ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 16
  872. 627 .LBE5:
  873. 628 .loc 1 224 1
  874. 629 004e 00BF nop
  875. 630 0050 1437 adds r7, r7, #20
  876. 631 .LCFI23:
  877. 632 .cfi_def_cfa_offset 4
  878. 633 0052 BD46 mov sp, r7
  879. 634 .LCFI24:
  880. 635 .cfi_def_cfa_register 13
  881. 636 @ sp needed
  882. 637 0054 5DF8047B ldr r7, [sp], #4
  883. 638 .LCFI25:
  884. 639 .cfi_restore 7
  885. 640 .cfi_def_cfa_offset 0
  886. 641 0058 7047 bx lr
  887. 642 .L33:
  888. 643 005a 00BF .align 2
  889. 644 .L32:
  890. 645 005c 00100240 .word 1073876992
  891. 646 0060 00040040 .word 1073742848
  892. 647 .cfi_endproc
  893. 648 .LFE134:
  894. 650 .section .text.HAL_TIM_MspPostInit,"ax",%progbits
  895. 651 .align 1
  896. 652 .global HAL_TIM_MspPostInit
  897. 653 .syntax unified
  898. 654 .thumb
  899. 655 .thumb_func
  900. 657 HAL_TIM_MspPostInit:
  901. 658 .LFB135:
  902. 225:Core/Src/tim.c **** void HAL_TIM_MspPostInit(TIM_HandleTypeDef* timHandle)
  903. 226:Core/Src/tim.c **** {
  904. 659 .loc 1 226 1
  905. 660 .cfi_startproc
  906. 661 @ args = 0, pretend = 0, frame = 48
  907. 662 @ frame_needed = 1, uses_anonymous_args = 0
  908. 663 0000 80B5 push {r7, lr}
  909. 664 .LCFI26:
  910. 665 .cfi_def_cfa_offset 8
  911. 666 .cfi_offset 7, -8
  912. 667 .cfi_offset 14, -4
  913. 668 0002 8CB0 sub sp, sp, #48
  914. 669 .LCFI27:
  915. 670 .cfi_def_cfa_offset 56
  916. 671 0004 00AF add r7, sp, #0
  917. 672 .LCFI28:
  918. 673 .cfi_def_cfa_register 7
  919. 674 0006 7860 str r0, [r7, #4]
  920. 227:Core/Src/tim.c ****
  921. 228:Core/Src/tim.c **** GPIO_InitTypeDef GPIO_InitStruct = {0};
  922. 675 .loc 1 228 20
  923. 676 0008 07F11C03 add r3, r7, #28
  924. 677 000c 0022 movs r2, #0
  925. 678 000e 1A60 str r2, [r3]
  926. 679 0010 5A60 str r2, [r3, #4]
  927. 680 0012 9A60 str r2, [r3, #8]
  928. 681 0014 DA60 str r2, [r3, #12]
  929. ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 17
  930. 682 0016 1A61 str r2, [r3, #16]
  931. 229:Core/Src/tim.c **** if(timHandle->Instance==TIM2)
  932. 683 .loc 1 229 15
  933. 684 0018 7B68 ldr r3, [r7, #4]
  934. 685 001a 1B68 ldr r3, [r3]
  935. 686 .loc 1 229 5
  936. 687 001c B3F1804F cmp r3, #1073741824
  937. 688 0020 3AD1 bne .L35
  938. 689 .LBB6:
  939. 230:Core/Src/tim.c **** {
  940. 231:Core/Src/tim.c **** /* USER CODE BEGIN TIM2_MspPostInit 0 */
  941. 232:Core/Src/tim.c ****
  942. 233:Core/Src/tim.c **** /* USER CODE END TIM2_MspPostInit 0 */
  943. 234:Core/Src/tim.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
  944. 690 .loc 1 234 5
  945. 691 0022 3F4B ldr r3, .L39
  946. 692 0024 5B69 ldr r3, [r3, #20]
  947. 693 0026 3E4A ldr r2, .L39
  948. 694 0028 43F40033 orr r3, r3, #131072
  949. 695 002c 5361 str r3, [r2, #20]
  950. 696 002e 3C4B ldr r3, .L39
  951. 697 0030 5B69 ldr r3, [r3, #20]
  952. 698 0032 03F40033 and r3, r3, #131072
  953. 699 0036 BB61 str r3, [r7, #24]
  954. 700 0038 BB69 ldr r3, [r7, #24]
  955. 701 .LBE6:
  956. 702 .LBB7:
  957. 235:Core/Src/tim.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
  958. 703 .loc 1 235 5
  959. 704 003a 394B ldr r3, .L39
  960. 705 003c 5B69 ldr r3, [r3, #20]
  961. 706 003e 384A ldr r2, .L39
  962. 707 0040 43F48023 orr r3, r3, #262144
  963. 708 0044 5361 str r3, [r2, #20]
  964. 709 0046 364B ldr r3, .L39
  965. 710 0048 5B69 ldr r3, [r3, #20]
  966. 711 004a 03F48023 and r3, r3, #262144
  967. 712 004e 7B61 str r3, [r7, #20]
  968. 713 0050 7B69 ldr r3, [r7, #20]
  969. 714 .LBE7:
  970. 236:Core/Src/tim.c **** /**TIM2 GPIO Configuration
  971. 237:Core/Src/tim.c **** PA15 ------> TIM2_CH1
  972. 238:Core/Src/tim.c **** PB3 ------> TIM2_CH2
  973. 239:Core/Src/tim.c **** */
  974. 240:Core/Src/tim.c **** GPIO_InitStruct.Pin = GPIO_PIN_15;
  975. 715 .loc 1 240 25
  976. 716 0052 4FF40043 mov r3, #32768
  977. 717 0056 FB61 str r3, [r7, #28]
  978. 241:Core/Src/tim.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
  979. 718 .loc 1 241 26
  980. 719 0058 0223 movs r3, #2
  981. 720 005a 3B62 str r3, [r7, #32]
  982. 242:Core/Src/tim.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
  983. 721 .loc 1 242 26
  984. 722 005c 0023 movs r3, #0
  985. 723 005e 7B62 str r3, [r7, #36]
  986. 243:Core/Src/tim.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  987. ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 18
  988. 724 .loc 1 243 27
  989. 725 0060 0023 movs r3, #0
  990. 726 0062 BB62 str r3, [r7, #40]
  991. 244:Core/Src/tim.c **** GPIO_InitStruct.Alternate = GPIO_AF1_TIM2;
  992. 727 .loc 1 244 31
  993. 728 0064 0123 movs r3, #1
  994. 729 0066 FB62 str r3, [r7, #44]
  995. 245:Core/Src/tim.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
  996. 730 .loc 1 245 5
  997. 731 0068 07F11C03 add r3, r7, #28
  998. 732 006c 1946 mov r1, r3
  999. 733 006e 4FF09040 mov r0, #1207959552
  1000. 734 0072 FFF7FEFF bl HAL_GPIO_Init
  1001. 246:Core/Src/tim.c ****
  1002. 247:Core/Src/tim.c **** GPIO_InitStruct.Pin = GPIO_PIN_3;
  1003. 735 .loc 1 247 25
  1004. 736 0076 0823 movs r3, #8
  1005. 737 0078 FB61 str r3, [r7, #28]
  1006. 248:Core/Src/tim.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
  1007. 738 .loc 1 248 26
  1008. 739 007a 0223 movs r3, #2
  1009. 740 007c 3B62 str r3, [r7, #32]
  1010. 249:Core/Src/tim.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
  1011. 741 .loc 1 249 26
  1012. 742 007e 0023 movs r3, #0
  1013. 743 0080 7B62 str r3, [r7, #36]
  1014. 250:Core/Src/tim.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  1015. 744 .loc 1 250 27
  1016. 745 0082 0023 movs r3, #0
  1017. 746 0084 BB62 str r3, [r7, #40]
  1018. 251:Core/Src/tim.c **** GPIO_InitStruct.Alternate = GPIO_AF1_TIM2;
  1019. 747 .loc 1 251 31
  1020. 748 0086 0123 movs r3, #1
  1021. 749 0088 FB62 str r3, [r7, #44]
  1022. 252:Core/Src/tim.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
  1023. 750 .loc 1 252 5
  1024. 751 008a 07F11C03 add r3, r7, #28
  1025. 752 008e 1946 mov r1, r3
  1026. 753 0090 2448 ldr r0, .L39+4
  1027. 754 0092 FFF7FEFF bl HAL_GPIO_Init
  1028. 253:Core/Src/tim.c ****
  1029. 254:Core/Src/tim.c **** /* USER CODE BEGIN TIM2_MspPostInit 1 */
  1030. 255:Core/Src/tim.c ****
  1031. 256:Core/Src/tim.c **** /* USER CODE END TIM2_MspPostInit 1 */
  1032. 257:Core/Src/tim.c **** }
  1033. 258:Core/Src/tim.c **** else if(timHandle->Instance==TIM3)
  1034. 259:Core/Src/tim.c **** {
  1035. 260:Core/Src/tim.c **** /* USER CODE BEGIN TIM3_MspPostInit 0 */
  1036. 261:Core/Src/tim.c ****
  1037. 262:Core/Src/tim.c **** /* USER CODE END TIM3_MspPostInit 0 */
  1038. 263:Core/Src/tim.c ****
  1039. 264:Core/Src/tim.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
  1040. 265:Core/Src/tim.c **** /**TIM3 GPIO Configuration
  1041. 266:Core/Src/tim.c **** PB4 ------> TIM3_CH1
  1042. 267:Core/Src/tim.c **** PB5 ------> TIM3_CH2
  1043. 268:Core/Src/tim.c **** */
  1044. 269:Core/Src/tim.c **** GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5;
  1045. ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 19
  1046. 270:Core/Src/tim.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
  1047. 271:Core/Src/tim.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
  1048. 272:Core/Src/tim.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  1049. 273:Core/Src/tim.c **** GPIO_InitStruct.Alternate = GPIO_AF2_TIM3;
  1050. 274:Core/Src/tim.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
  1051. 275:Core/Src/tim.c ****
  1052. 276:Core/Src/tim.c **** /* USER CODE BEGIN TIM3_MspPostInit 1 */
  1053. 277:Core/Src/tim.c ****
  1054. 278:Core/Src/tim.c **** /* USER CODE END TIM3_MspPostInit 1 */
  1055. 279:Core/Src/tim.c **** }
  1056. 280:Core/Src/tim.c **** else if (timHandle->Instance == TIM4)
  1057. 281:Core/Src/tim.c **** {
  1058. 282:Core/Src/tim.c **** /* USER CODE BEGIN TIM4_MspPostInit 0 */
  1059. 283:Core/Src/tim.c ****
  1060. 284:Core/Src/tim.c **** /* USER CODE END TIM4_MspPostInit 0 */
  1061. 285:Core/Src/tim.c ****
  1062. 286:Core/Src/tim.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
  1063. 287:Core/Src/tim.c **** /**TIM4 GPIO Configuration
  1064. 288:Core/Src/tim.c **** PB6 ------> TIM4_CH1
  1065. 289:Core/Src/tim.c **** */
  1066. 290:Core/Src/tim.c **** GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_8|GPIO_PIN_9;
  1067. 291:Core/Src/tim.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
  1068. 292:Core/Src/tim.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  1069. 293:Core/Src/tim.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
  1070. 294:Core/Src/tim.c ****
  1071. 295:Core/Src/tim.c **** //__HAL_AFIO_REMAP_TIM4_ENABLE();
  1072. 296:Core/Src/tim.c **** /* USER CODE BEGIN TIM4_MspPostInit 1 */
  1073. 297:Core/Src/tim.c **** /* USER CODE END TIM4_MspPostInit 1 */
  1074. 298:Core/Src/tim.c **** }
  1075. 299:Core/Src/tim.c ****
  1076. 300:Core/Src/tim.c **** }
  1077. 755 .loc 1 300 1
  1078. 756 0096 3FE0 b .L38
  1079. 757 .L35:
  1080. 258:Core/Src/tim.c **** {
  1081. 758 .loc 1 258 20
  1082. 759 0098 7B68 ldr r3, [r7, #4]
  1083. 760 009a 1B68 ldr r3, [r3]
  1084. 258:Core/Src/tim.c **** {
  1085. 761 .loc 1 258 10
  1086. 762 009c 224A ldr r2, .L39+8
  1087. 763 009e 9342 cmp r3, r2
  1088. 764 00a0 1CD1 bne .L37
  1089. 765 .LBB8:
  1090. 264:Core/Src/tim.c **** /**TIM3 GPIO Configuration
  1091. 766 .loc 1 264 5
  1092. 767 00a2 1F4B ldr r3, .L39
  1093. 768 00a4 5B69 ldr r3, [r3, #20]
  1094. 769 00a6 1E4A ldr r2, .L39
  1095. 770 00a8 43F48023 orr r3, r3, #262144
  1096. 771 00ac 5361 str r3, [r2, #20]
  1097. 772 00ae 1C4B ldr r3, .L39
  1098. 773 00b0 5B69 ldr r3, [r3, #20]
  1099. 774 00b2 03F48023 and r3, r3, #262144
  1100. 775 00b6 3B61 str r3, [r7, #16]
  1101. 776 00b8 3B69 ldr r3, [r7, #16]
  1102. 777 .LBE8:
  1103. ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 20
  1104. 269:Core/Src/tim.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
  1105. 778 .loc 1 269 25
  1106. 779 00ba 3023 movs r3, #48
  1107. 780 00bc FB61 str r3, [r7, #28]
  1108. 270:Core/Src/tim.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
  1109. 781 .loc 1 270 26
  1110. 782 00be 0223 movs r3, #2
  1111. 783 00c0 3B62 str r3, [r7, #32]
  1112. 271:Core/Src/tim.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  1113. 784 .loc 1 271 26
  1114. 785 00c2 0023 movs r3, #0
  1115. 786 00c4 7B62 str r3, [r7, #36]
  1116. 272:Core/Src/tim.c **** GPIO_InitStruct.Alternate = GPIO_AF2_TIM3;
  1117. 787 .loc 1 272 27
  1118. 788 00c6 0023 movs r3, #0
  1119. 789 00c8 BB62 str r3, [r7, #40]
  1120. 273:Core/Src/tim.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
  1121. 790 .loc 1 273 31
  1122. 791 00ca 0223 movs r3, #2
  1123. 792 00cc FB62 str r3, [r7, #44]
  1124. 274:Core/Src/tim.c ****
  1125. 793 .loc 1 274 5
  1126. 794 00ce 07F11C03 add r3, r7, #28
  1127. 795 00d2 1946 mov r1, r3
  1128. 796 00d4 1348 ldr r0, .L39+4
  1129. 797 00d6 FFF7FEFF bl HAL_GPIO_Init
  1130. 798 .loc 1 300 1
  1131. 799 00da 1DE0 b .L38
  1132. 800 .L37:
  1133. 280:Core/Src/tim.c **** {
  1134. 801 .loc 1 280 21
  1135. 802 00dc 7B68 ldr r3, [r7, #4]
  1136. 803 00de 1B68 ldr r3, [r3]
  1137. 280:Core/Src/tim.c **** {
  1138. 804 .loc 1 280 11
  1139. 805 00e0 124A ldr r2, .L39+12
  1140. 806 00e2 9342 cmp r3, r2
  1141. 807 00e4 18D1 bne .L38
  1142. 808 .LBB9:
  1143. 286:Core/Src/tim.c **** /**TIM4 GPIO Configuration
  1144. 809 .loc 1 286 5
  1145. 810 00e6 0E4B ldr r3, .L39
  1146. 811 00e8 5B69 ldr r3, [r3, #20]
  1147. 812 00ea 0D4A ldr r2, .L39
  1148. 813 00ec 43F48023 orr r3, r3, #262144
  1149. 814 00f0 5361 str r3, [r2, #20]
  1150. 815 00f2 0B4B ldr r3, .L39
  1151. 816 00f4 5B69 ldr r3, [r3, #20]
  1152. 817 00f6 03F48023 and r3, r3, #262144
  1153. 818 00fa FB60 str r3, [r7, #12]
  1154. 819 00fc FB68 ldr r3, [r7, #12]
  1155. 820 .LBE9:
  1156. 290:Core/Src/tim.c **** GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
  1157. 821 .loc 1 290 25
  1158. 822 00fe 4FF45073 mov r3, #832
  1159. 823 0102 FB61 str r3, [r7, #28]
  1160. 291:Core/Src/tim.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
  1161. ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 21
  1162. 824 .loc 1 291 26
  1163. 825 0104 0223 movs r3, #2
  1164. 826 0106 3B62 str r3, [r7, #32]
  1165. 292:Core/Src/tim.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
  1166. 827 .loc 1 292 27
  1167. 828 0108 0023 movs r3, #0
  1168. 829 010a BB62 str r3, [r7, #40]
  1169. 293:Core/Src/tim.c ****
  1170. 830 .loc 1 293 5
  1171. 831 010c 07F11C03 add r3, r7, #28
  1172. 832 0110 1946 mov r1, r3
  1173. 833 0112 0448 ldr r0, .L39+4
  1174. 834 0114 FFF7FEFF bl HAL_GPIO_Init
  1175. 835 .L38:
  1176. 836 .loc 1 300 1
  1177. 837 0118 00BF nop
  1178. 838 011a 3037 adds r7, r7, #48
  1179. 839 .LCFI29:
  1180. 840 .cfi_def_cfa_offset 8
  1181. 841 011c BD46 mov sp, r7
  1182. 842 .LCFI30:
  1183. 843 .cfi_def_cfa_register 13
  1184. 844 @ sp needed
  1185. 845 011e 80BD pop {r7, pc}
  1186. 846 .L40:
  1187. 847 .align 2
  1188. 848 .L39:
  1189. 849 0120 00100240 .word 1073876992
  1190. 850 0124 00040048 .word 1207960576
  1191. 851 0128 00040040 .word 1073742848
  1192. 852 012c 00080040 .word 1073743872
  1193. 853 .cfi_endproc
  1194. 854 .LFE135:
  1195. 856 .section .text.HAL_TIM_PWM_MspDeInit,"ax",%progbits
  1196. 857 .align 1
  1197. 858 .global HAL_TIM_PWM_MspDeInit
  1198. 859 .syntax unified
  1199. 860 .thumb
  1200. 861 .thumb_func
  1201. 863 HAL_TIM_PWM_MspDeInit:
  1202. 864 .LFB136:
  1203. 301:Core/Src/tim.c ****
  1204. 302:Core/Src/tim.c **** void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef* tim_pwmHandle)
  1205. 303:Core/Src/tim.c **** {
  1206. 865 .loc 1 303 1
  1207. 866 .cfi_startproc
  1208. 867 @ args = 0, pretend = 0, frame = 8
  1209. 868 @ frame_needed = 1, uses_anonymous_args = 0
  1210. 869 @ link register save eliminated.
  1211. 870 0000 80B4 push {r7}
  1212. 871 .LCFI31:
  1213. 872 .cfi_def_cfa_offset 4
  1214. 873 .cfi_offset 7, -4
  1215. 874 0002 83B0 sub sp, sp, #12
  1216. 875 .LCFI32:
  1217. 876 .cfi_def_cfa_offset 16
  1218. 877 0004 00AF add r7, sp, #0
  1219. ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 22
  1220. 878 .LCFI33:
  1221. 879 .cfi_def_cfa_register 7
  1222. 880 0006 7860 str r0, [r7, #4]
  1223. 304:Core/Src/tim.c ****
  1224. 305:Core/Src/tim.c **** if(tim_pwmHandle->Instance==TIM2)
  1225. 881 .loc 1 305 19
  1226. 882 0008 7B68 ldr r3, [r7, #4]
  1227. 883 000a 1B68 ldr r3, [r3]
  1228. 884 .loc 1 305 5
  1229. 885 000c B3F1804F cmp r3, #1073741824
  1230. 886 0010 06D1 bne .L42
  1231. 306:Core/Src/tim.c **** {
  1232. 307:Core/Src/tim.c **** /* USER CODE BEGIN TIM2_MspDeInit 0 */
  1233. 308:Core/Src/tim.c ****
  1234. 309:Core/Src/tim.c **** /* USER CODE END TIM2_MspDeInit 0 */
  1235. 310:Core/Src/tim.c **** /* Peripheral clock disable */
  1236. 311:Core/Src/tim.c **** __HAL_RCC_TIM2_CLK_DISABLE();
  1237. 887 .loc 1 311 5
  1238. 888 0012 0C4B ldr r3, .L45
  1239. 889 0014 DB69 ldr r3, [r3, #28]
  1240. 890 0016 0B4A ldr r2, .L45
  1241. 891 0018 23F00103 bic r3, r3, #1
  1242. 892 001c D361 str r3, [r2, #28]
  1243. 312:Core/Src/tim.c **** /* USER CODE BEGIN TIM2_MspDeInit 1 */
  1244. 313:Core/Src/tim.c ****
  1245. 314:Core/Src/tim.c **** /* USER CODE END TIM2_MspDeInit 1 */
  1246. 315:Core/Src/tim.c **** }
  1247. 316:Core/Src/tim.c **** else if(tim_pwmHandle->Instance==TIM3)
  1248. 317:Core/Src/tim.c **** {
  1249. 318:Core/Src/tim.c **** /* USER CODE BEGIN TIM3_MspDeInit 0 */
  1250. 319:Core/Src/tim.c ****
  1251. 320:Core/Src/tim.c **** /* USER CODE END TIM3_MspDeInit 0 */
  1252. 321:Core/Src/tim.c **** /* Peripheral clock disable */
  1253. 322:Core/Src/tim.c **** __HAL_RCC_TIM3_CLK_DISABLE();
  1254. 323:Core/Src/tim.c **** /* USER CODE BEGIN TIM3_MspDeInit 1 */
  1255. 324:Core/Src/tim.c ****
  1256. 325:Core/Src/tim.c **** /* USER CODE END TIM3_MspDeInit 1 */
  1257. 326:Core/Src/tim.c **** }
  1258. 327:Core/Src/tim.c **** }
  1259. 893 .loc 1 327 1
  1260. 894 001e 0AE0 b .L44
  1261. 895 .L42:
  1262. 316:Core/Src/tim.c **** {
  1263. 896 .loc 1 316 24
  1264. 897 0020 7B68 ldr r3, [r7, #4]
  1265. 898 0022 1B68 ldr r3, [r3]
  1266. 316:Core/Src/tim.c **** {
  1267. 899 .loc 1 316 10
  1268. 900 0024 084A ldr r2, .L45+4
  1269. 901 0026 9342 cmp r3, r2
  1270. 902 0028 05D1 bne .L44
  1271. 322:Core/Src/tim.c **** /* USER CODE BEGIN TIM3_MspDeInit 1 */
  1272. 903 .loc 1 322 5
  1273. 904 002a 064B ldr r3, .L45
  1274. 905 002c DB69 ldr r3, [r3, #28]
  1275. 906 002e 054A ldr r2, .L45
  1276. 907 0030 23F00203 bic r3, r3, #2
  1277. ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 23
  1278. 908 0034 D361 str r3, [r2, #28]
  1279. 909 .L44:
  1280. 910 .loc 1 327 1
  1281. 911 0036 00BF nop
  1282. 912 0038 0C37 adds r7, r7, #12
  1283. 913 .LCFI34:
  1284. 914 .cfi_def_cfa_offset 4
  1285. 915 003a BD46 mov sp, r7
  1286. 916 .LCFI35:
  1287. 917 .cfi_def_cfa_register 13
  1288. 918 @ sp needed
  1289. 919 003c 5DF8047B ldr r7, [sp], #4
  1290. 920 .LCFI36:
  1291. 921 .cfi_restore 7
  1292. 922 .cfi_def_cfa_offset 0
  1293. 923 0040 7047 bx lr
  1294. 924 .L46:
  1295. 925 0042 00BF .align 2
  1296. 926 .L45:
  1297. 927 0044 00100240 .word 1073876992
  1298. 928 0048 00040040 .word 1073742848
  1299. 929 .cfi_endproc
  1300. 930 .LFE136:
  1301. 932 .section .text.HAL_TIM_Base_MspDeInit,"ax",%progbits
  1302. 933 .align 1
  1303. 934 .global HAL_TIM_Base_MspDeInit
  1304. 935 .syntax unified
  1305. 936 .thumb
  1306. 937 .thumb_func
  1307. 939 HAL_TIM_Base_MspDeInit:
  1308. 940 .LFB137:
  1309. 328:Core/Src/tim.c ****
  1310. 329:Core/Src/tim.c **** void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef *tim_baseHandle)
  1311. 330:Core/Src/tim.c **** {
  1312. 941 .loc 1 330 1
  1313. 942 .cfi_startproc
  1314. 943 @ args = 0, pretend = 0, frame = 8
  1315. 944 @ frame_needed = 1, uses_anonymous_args = 0
  1316. 945 0000 80B5 push {r7, lr}
  1317. 946 .LCFI37:
  1318. 947 .cfi_def_cfa_offset 8
  1319. 948 .cfi_offset 7, -8
  1320. 949 .cfi_offset 14, -4
  1321. 950 0002 82B0 sub sp, sp, #8
  1322. 951 .LCFI38:
  1323. 952 .cfi_def_cfa_offset 16
  1324. 953 0004 00AF add r7, sp, #0
  1325. 954 .LCFI39:
  1326. 955 .cfi_def_cfa_register 7
  1327. 956 0006 7860 str r0, [r7, #4]
  1328. 331:Core/Src/tim.c ****
  1329. 332:Core/Src/tim.c **** if (tim_baseHandle->Instance == TIM3)
  1330. 957 .loc 1 332 21
  1331. 958 0008 7B68 ldr r3, [r7, #4]
  1332. 959 000a 1B68 ldr r3, [r3]
  1333. 960 .loc 1 332 6
  1334. 961 000c 0D4A ldr r2, .L51
  1335. ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 24
  1336. 962 000e 9342 cmp r3, r2
  1337. 963 0010 06D1 bne .L48
  1338. 333:Core/Src/tim.c **** {
  1339. 334:Core/Src/tim.c **** /* USER CODE BEGIN TIM3_MspDeInit 0 */
  1340. 335:Core/Src/tim.c ****
  1341. 336:Core/Src/tim.c **** /* USER CODE END TIM3_MspDeInit 0 */
  1342. 337:Core/Src/tim.c **** /* Peripheral clock disable */
  1343. 338:Core/Src/tim.c **** __HAL_RCC_TIM3_CLK_DISABLE();
  1344. 964 .loc 1 338 5
  1345. 965 0012 0D4B ldr r3, .L51+4
  1346. 966 0014 DB69 ldr r3, [r3, #28]
  1347. 967 0016 0C4A ldr r2, .L51+4
  1348. 968 0018 23F00203 bic r3, r3, #2
  1349. 969 001c D361 str r3, [r2, #28]
  1350. 339:Core/Src/tim.c **** /* USER CODE BEGIN TIM3_MspDeInit 1 */
  1351. 340:Core/Src/tim.c ****
  1352. 341:Core/Src/tim.c **** /* USER CODE END TIM3_MspDeInit 1 */
  1353. 342:Core/Src/tim.c **** }
  1354. 343:Core/Src/tim.c **** else if (tim_baseHandle->Instance == TIM4)
  1355. 344:Core/Src/tim.c **** {
  1356. 345:Core/Src/tim.c **** /* USER CODE BEGIN TIM4_MspDeInit 0 */
  1357. 346:Core/Src/tim.c ****
  1358. 347:Core/Src/tim.c **** /* USER CODE END TIM4_MspDeInit 0 */
  1359. 348:Core/Src/tim.c **** /* Peripheral clock disable */
  1360. 349:Core/Src/tim.c **** __HAL_RCC_TIM4_CLK_DISABLE();
  1361. 350:Core/Src/tim.c ****
  1362. 351:Core/Src/tim.c **** /* TIM4 interrupt Deinit */
  1363. 352:Core/Src/tim.c **** HAL_NVIC_DisableIRQ(TIM4_IRQn);
  1364. 353:Core/Src/tim.c **** /* USER CODE BEGIN TIM4_MspDeInit 1 */
  1365. 354:Core/Src/tim.c ****
  1366. 355:Core/Src/tim.c **** /* USER CODE END TIM4_MspDeInit 1 */
  1367. 356:Core/Src/tim.c **** }
  1368. 357:Core/Src/tim.c **** }
  1369. 970 .loc 1 357 1
  1370. 971 001e 0DE0 b .L50
  1371. 972 .L48:
  1372. 343:Core/Src/tim.c **** {
  1373. 973 .loc 1 343 26
  1374. 974 0020 7B68 ldr r3, [r7, #4]
  1375. 975 0022 1B68 ldr r3, [r3]
  1376. 343:Core/Src/tim.c **** {
  1377. 976 .loc 1 343 11
  1378. 977 0024 094A ldr r2, .L51+8
  1379. 978 0026 9342 cmp r3, r2
  1380. 979 0028 08D1 bne .L50
  1381. 349:Core/Src/tim.c ****
  1382. 980 .loc 1 349 5
  1383. 981 002a 074B ldr r3, .L51+4
  1384. 982 002c DB69 ldr r3, [r3, #28]
  1385. 983 002e 064A ldr r2, .L51+4
  1386. 984 0030 23F00403 bic r3, r3, #4
  1387. 985 0034 D361 str r3, [r2, #28]
  1388. 352:Core/Src/tim.c **** /* USER CODE BEGIN TIM4_MspDeInit 1 */
  1389. 986 .loc 1 352 5
  1390. 987 0036 1E20 movs r0, #30
  1391. 988 0038 FFF7FEFF bl HAL_NVIC_DisableIRQ
  1392. 989 .L50:
  1393. ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 25
  1394. 990 .loc 1 357 1
  1395. 991 003c 00BF nop
  1396. 992 003e 0837 adds r7, r7, #8
  1397. 993 .LCFI40:
  1398. 994 .cfi_def_cfa_offset 8
  1399. 995 0040 BD46 mov sp, r7
  1400. 996 .LCFI41:
  1401. 997 .cfi_def_cfa_register 13
  1402. 998 @ sp needed
  1403. 999 0042 80BD pop {r7, pc}
  1404. 1000 .L52:
  1405. 1001 .align 2
  1406. 1002 .L51:
  1407. 1003 0044 00040040 .word 1073742848
  1408. 1004 0048 00100240 .word 1073876992
  1409. 1005 004c 00080040 .word 1073743872
  1410. 1006 .cfi_endproc
  1411. 1007 .LFE137:
  1412. 1009 .section .text.pwm_init,"ax",%progbits
  1413. 1010 .align 1
  1414. 1011 .global pwm_init
  1415. 1012 .syntax unified
  1416. 1013 .thumb
  1417. 1014 .thumb_func
  1418. 1016 pwm_init:
  1419. 1017 .LFB138:
  1420. 358:Core/Src/tim.c ****
  1421. 359:Core/Src/tim.c **** /* USER CODE BEGIN 1 */
  1422. 360:Core/Src/tim.c ****
  1423. 361:Core/Src/tim.c **** /**
  1424. 362:Core/Src/tim.c **** * @file pwm_init
  1425. 363:Core/Src/tim.c **** * @brief PWM初始化
  1426. 364:Core/Src/tim.c **** * @param none
  1427. 365:Core/Src/tim.c **** * @details
  1428. 366:Core/Src/tim.c **** * @author Zhang Sir
  1429. 367:Core/Src/tim.c **** **/
  1430. 368:Core/Src/tim.c **** void pwm_init()
  1431. 369:Core/Src/tim.c **** {
  1432. 1018 .loc 1 369 1
  1433. 1019 .cfi_startproc
  1434. 1020 @ args = 0, pretend = 0, frame = 0
  1435. 1021 @ frame_needed = 1, uses_anonymous_args = 0
  1436. 1022 0000 80B5 push {r7, lr}
  1437. 1023 .LCFI42:
  1438. 1024 .cfi_def_cfa_offset 8
  1439. 1025 .cfi_offset 7, -8
  1440. 1026 .cfi_offset 14, -4
  1441. 1027 0002 00AF add r7, sp, #0
  1442. 1028 .LCFI43:
  1443. 1029 .cfi_def_cfa_register 7
  1444. 370:Core/Src/tim.c **** // 开启PWM
  1445. 371:Core/Src/tim.c **** HAL_TIM_PWM_Start(&htim2, TIM_CHANNEL_1);
  1446. 1030 .loc 1 371 3
  1447. 1031 0004 0021 movs r1, #0
  1448. 1032 0006 1248 ldr r0, .L54
  1449. 1033 0008 FFF7FEFF bl HAL_TIM_PWM_Start
  1450. 372:Core/Src/tim.c **** HAL_TIM_PWM_Start(&htim2, TIM_CHANNEL_2);
  1451. ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 26
  1452. 1034 .loc 1 372 3
  1453. 1035 000c 0421 movs r1, #4
  1454. 1036 000e 1048 ldr r0, .L54
  1455. 1037 0010 FFF7FEFF bl HAL_TIM_PWM_Start
  1456. 373:Core/Src/tim.c **** HAL_TIM_PWM_Start(&htim3, TIM_CHANNEL_1);
  1457. 1038 .loc 1 373 3
  1458. 1039 0014 0021 movs r1, #0
  1459. 1040 0016 0F48 ldr r0, .L54+4
  1460. 1041 0018 FFF7FEFF bl HAL_TIM_PWM_Start
  1461. 374:Core/Src/tim.c **** HAL_TIM_PWM_Start(&htim3, TIM_CHANNEL_2);
  1462. 1042 .loc 1 374 3
  1463. 1043 001c 0421 movs r1, #4
  1464. 1044 001e 0D48 ldr r0, .L54+4
  1465. 1045 0020 FFF7FEFF bl HAL_TIM_PWM_Start
  1466. 375:Core/Src/tim.c **** // 设置占空比
  1467. 376:Core/Src/tim.c **** __HAL_TIM_SET_COMPARE(&htim2, TIM_CHANNEL_1, 1000); // 1
  1468. 1046 .loc 1 376 3
  1469. 1047 0024 0A4B ldr r3, .L54
  1470. 1048 0026 1B68 ldr r3, [r3]
  1471. 1049 0028 4FF47A72 mov r2, #1000
  1472. 1050 002c 5A63 str r2, [r3, #52]
  1473. 377:Core/Src/tim.c **** __HAL_TIM_SET_COMPARE(&htim2, TIM_CHANNEL_2, 1000); // 2
  1474. 1051 .loc 1 377 3
  1475. 1052 002e 084B ldr r3, .L54
  1476. 1053 0030 1B68 ldr r3, [r3]
  1477. 1054 0032 4FF47A72 mov r2, #1000
  1478. 1055 0036 9A63 str r2, [r3, #56]
  1479. 378:Core/Src/tim.c **** __HAL_TIM_SET_COMPARE(&htim3, TIM_CHANNEL_2, 1000); // 3
  1480. 1056 .loc 1 378 3
  1481. 1057 0038 064B ldr r3, .L54+4
  1482. 1058 003a 1B68 ldr r3, [r3]
  1483. 1059 003c 4FF47A72 mov r2, #1000
  1484. 1060 0040 9A63 str r2, [r3, #56]
  1485. 379:Core/Src/tim.c **** __HAL_TIM_SET_COMPARE(&htim3, TIM_CHANNEL_1, 1000); // 4
  1486. 1061 .loc 1 379 3
  1487. 1062 0042 044B ldr r3, .L54+4
  1488. 1063 0044 1B68 ldr r3, [r3]
  1489. 1064 0046 4FF47A72 mov r2, #1000
  1490. 1065 004a 5A63 str r2, [r3, #52]
  1491. 380:Core/Src/tim.c ****
  1492. 381:Core/Src/tim.c ****
  1493. 382:Core/Src/tim.c **** }
  1494. 1066 .loc 1 382 1
  1495. 1067 004c 00BF nop
  1496. 1068 004e 80BD pop {r7, pc}
  1497. 1069 .L55:
  1498. 1070 .align 2
  1499. 1071 .L54:
  1500. 1072 0050 00000000 .word htim2
  1501. 1073 0054 00000000 .word htim3
  1502. 1074 .cfi_endproc
  1503. 1075 .LFE138:
  1504. 1077 .section .text.init_pwmout,"ax",%progbits
  1505. 1078 .align 1
  1506. 1079 .global init_pwmout
  1507. 1080 .syntax unified
  1508. 1081 .thumb
  1509. ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 27
  1510. 1082 .thumb_func
  1511. 1084 init_pwmout:
  1512. 1085 .LFB139:
  1513. 383:Core/Src/tim.c ****
  1514. 384:Core/Src/tim.c **** /**
  1515. 385:Core/Src/tim.c **** * @file Tim4_init_pwmout
  1516. 386:Core/Src/tim.c **** * @brief PB6复用成pwm输出
  1517. 387:Core/Src/tim.c **** * @param none
  1518. 388:Core/Src/tim.c **** * @details 默认流量计输入口
  1519. 389:Core/Src/tim.c **** * @author Zhang Sir
  1520. 390:Core/Src/tim.c **** **/
  1521. 391:Core/Src/tim.c **** void init_pwmout(uint8_t uav_type)
  1522. 392:Core/Src/tim.c **** {
  1523. 1086 .loc 1 392 1
  1524. 1087 .cfi_startproc
  1525. 1088 @ args = 0, pretend = 0, frame = 64
  1526. 1089 @ frame_needed = 1, uses_anonymous_args = 0
  1527. 1090 0000 80B5 push {r7, lr}
  1528. 1091 .LCFI44:
  1529. 1092 .cfi_def_cfa_offset 8
  1530. 1093 .cfi_offset 7, -8
  1531. 1094 .cfi_offset 14, -4
  1532. 1095 0002 90B0 sub sp, sp, #64
  1533. 1096 .LCFI45:
  1534. 1097 .cfi_def_cfa_offset 72
  1535. 1098 0004 00AF add r7, sp, #0
  1536. 1099 .LCFI46:
  1537. 1100 .cfi_def_cfa_register 7
  1538. 1101 0006 0346 mov r3, r0
  1539. 1102 0008 FB71 strb r3, [r7, #7]
  1540. 393:Core/Src/tim.c **** TIM_ClockConfigTypeDef sClockSourceConfig = {0};
  1541. 1103 .loc 1 393 26
  1542. 1104 000a 07F13003 add r3, r7, #48
  1543. 1105 000e 0022 movs r2, #0
  1544. 1106 0010 1A60 str r2, [r3]
  1545. 1107 0012 5A60 str r2, [r3, #4]
  1546. 1108 0014 9A60 str r2, [r3, #8]
  1547. 1109 0016 DA60 str r2, [r3, #12]
  1548. 394:Core/Src/tim.c **** TIM_MasterConfigTypeDef sMasterConfig = {0};
  1549. 1110 .loc 1 394 27
  1550. 1111 0018 07F12403 add r3, r7, #36
  1551. 1112 001c 0022 movs r2, #0
  1552. 1113 001e 1A60 str r2, [r3]
  1553. 1114 0020 5A60 str r2, [r3, #4]
  1554. 1115 0022 9A60 str r2, [r3, #8]
  1555. 395:Core/Src/tim.c **** TIM_OC_InitTypeDef sConfigOC = {0};
  1556. 1116 .loc 1 395 22
  1557. 1117 0024 07F10803 add r3, r7, #8
  1558. 1118 0028 0022 movs r2, #0
  1559. 1119 002a 1A60 str r2, [r3]
  1560. 1120 002c 5A60 str r2, [r3, #4]
  1561. 1121 002e 9A60 str r2, [r3, #8]
  1562. 1122 0030 DA60 str r2, [r3, #12]
  1563. 1123 0032 1A61 str r2, [r3, #16]
  1564. 1124 0034 5A61 str r2, [r3, #20]
  1565. 1125 0036 9A61 str r2, [r3, #24]
  1566. 396:Core/Src/tim.c ****
  1567. ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 28
  1568. 397:Core/Src/tim.c **** if (uav_type == 18) //一体化
  1569. 1126 .loc 1 397 6
  1570. 1127 0038 FB79 ldrb r3, [r7, #7] @ zero_extendqisi2
  1571. 1128 003a 122B cmp r3, #18
  1572. 1129 003c 40F08D80 bne .L65
  1573. 398:Core/Src/tim.c **** {
  1574. 399:Core/Src/tim.c **** htim4.Instance = TIM4;
  1575. 1130 .loc 1 399 20
  1576. 1131 0040 484B ldr r3, .L66
  1577. 1132 0042 494A ldr r2, .L66+4
  1578. 1133 0044 1A60 str r2, [r3]
  1579. 400:Core/Src/tim.c **** htim4.Init.Prescaler = 72 - 1;
  1580. 1134 .loc 1 400 26
  1581. 1135 0046 474B ldr r3, .L66
  1582. 1136 0048 4722 movs r2, #71
  1583. 1137 004a 5A60 str r2, [r3, #4]
  1584. 401:Core/Src/tim.c **** htim4.Init.CounterMode = TIM_COUNTERMODE_UP;
  1585. 1138 .loc 1 401 28
  1586. 1139 004c 454B ldr r3, .L66
  1587. 1140 004e 0022 movs r2, #0
  1588. 1141 0050 9A60 str r2, [r3, #8]
  1589. 402:Core/Src/tim.c **** htim4.Init.Period = 20000 - 1; //50hz
  1590. 1142 .loc 1 402 23
  1591. 1143 0052 444B ldr r3, .L66
  1592. 1144 0054 44F61F62 movw r2, #19999
  1593. 1145 0058 DA60 str r2, [r3, #12]
  1594. 403:Core/Src/tim.c **** //htim4.Init.Period = 10000 - 1; //100hz
  1595. 404:Core/Src/tim.c **** htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
  1596. 1146 .loc 1 404 30
  1597. 1147 005a 424B ldr r3, .L66
  1598. 1148 005c 0022 movs r2, #0
  1599. 1149 005e 1A61 str r2, [r3, #16]
  1600. 405:Core/Src/tim.c **** htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
  1601. 1150 .loc 1 405 34
  1602. 1151 0060 404B ldr r3, .L66
  1603. 1152 0062 0022 movs r2, #0
  1604. 1153 0064 9A61 str r2, [r3, #24]
  1605. 406:Core/Src/tim.c **** if (HAL_TIM_Base_Init(&htim4) != HAL_OK)
  1606. 1154 .loc 1 406 9
  1607. 1155 0066 3F48 ldr r0, .L66
  1608. 1156 0068 FFF7FEFF bl HAL_TIM_Base_Init
  1609. 1157 006c 0346 mov r3, r0
  1610. 1158 .loc 1 406 8
  1611. 1159 006e 002B cmp r3, #0
  1612. 1160 0070 01D0 beq .L58
  1613. 407:Core/Src/tim.c **** {
  1614. 408:Core/Src/tim.c **** Error_Handler();
  1615. 1161 .loc 1 408 7
  1616. 1162 0072 FFF7FEFF bl Error_Handler
  1617. 1163 .L58:
  1618. 409:Core/Src/tim.c **** }
  1619. 410:Core/Src/tim.c **** sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
  1620. 1164 .loc 1 410 36
  1621. 1165 0076 4FF48053 mov r3, #4096
  1622. 1166 007a 3B63 str r3, [r7, #48]
  1623. 411:Core/Src/tim.c **** if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK)
  1624. 1167 .loc 1 411 9
  1625. ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 29
  1626. 1168 007c 07F13003 add r3, r7, #48
  1627. 1169 0080 1946 mov r1, r3
  1628. 1170 0082 3848 ldr r0, .L66
  1629. 1171 0084 FFF7FEFF bl HAL_TIM_ConfigClockSource
  1630. 1172 0088 0346 mov r3, r0
  1631. 1173 .loc 1 411 8
  1632. 1174 008a 002B cmp r3, #0
  1633. 1175 008c 01D0 beq .L59
  1634. 412:Core/Src/tim.c **** {
  1635. 413:Core/Src/tim.c **** Error_Handler();
  1636. 1176 .loc 1 413 7
  1637. 1177 008e FFF7FEFF bl Error_Handler
  1638. 1178 .L59:
  1639. 414:Core/Src/tim.c **** }
  1640. 415:Core/Src/tim.c **** if (HAL_TIM_PWM_Init(&htim4) != HAL_OK)
  1641. 1179 .loc 1 415 9
  1642. 1180 0092 3448 ldr r0, .L66
  1643. 1181 0094 FFF7FEFF bl HAL_TIM_PWM_Init
  1644. 1182 0098 0346 mov r3, r0
  1645. 1183 .loc 1 415 8
  1646. 1184 009a 002B cmp r3, #0
  1647. 1185 009c 01D0 beq .L60
  1648. 416:Core/Src/tim.c **** {
  1649. 417:Core/Src/tim.c **** Error_Handler();
  1650. 1186 .loc 1 417 7
  1651. 1187 009e FFF7FEFF bl Error_Handler
  1652. 1188 .L60:
  1653. 418:Core/Src/tim.c **** }
  1654. 419:Core/Src/tim.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
  1655. 1189 .loc 1 419 39
  1656. 1190 00a2 0023 movs r3, #0
  1657. 1191 00a4 7B62 str r3, [r7, #36]
  1658. 420:Core/Src/tim.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
  1659. 1192 .loc 1 420 35
  1660. 1193 00a6 0023 movs r3, #0
  1661. 1194 00a8 FB62 str r3, [r7, #44]
  1662. 421:Core/Src/tim.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK)
  1663. 1195 .loc 1 421 9
  1664. 1196 00aa 07F12403 add r3, r7, #36
  1665. 1197 00ae 1946 mov r1, r3
  1666. 1198 00b0 2C48 ldr r0, .L66
  1667. 1199 00b2 FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization
  1668. 1200 00b6 0346 mov r3, r0
  1669. 1201 .loc 1 421 8
  1670. 1202 00b8 002B cmp r3, #0
  1671. 1203 00ba 01D0 beq .L61
  1672. 422:Core/Src/tim.c **** {
  1673. 423:Core/Src/tim.c **** Error_Handler();
  1674. 1204 .loc 1 423 7
  1675. 1205 00bc FFF7FEFF bl Error_Handler
  1676. 1206 .L61:
  1677. 424:Core/Src/tim.c **** }
  1678. 425:Core/Src/tim.c **** sConfigOC.OCMode = TIM_OCMODE_PWM1;
  1679. 1207 .loc 1 425 22
  1680. 1208 00c0 6023 movs r3, #96
  1681. 1209 00c2 BB60 str r3, [r7, #8]
  1682. 426:Core/Src/tim.c **** sConfigOC.Pulse = 0;
  1683. ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 30
  1684. 1210 .loc 1 426 21
  1685. 1211 00c4 0023 movs r3, #0
  1686. 1212 00c6 FB60 str r3, [r7, #12]
  1687. 427:Core/Src/tim.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
  1688. 1213 .loc 1 427 26
  1689. 1214 00c8 0023 movs r3, #0
  1690. 1215 00ca 3B61 str r3, [r7, #16]
  1691. 428:Core/Src/tim.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
  1692. 1216 .loc 1 428 26
  1693. 1217 00cc 0023 movs r3, #0
  1694. 1218 00ce BB61 str r3, [r7, #24]
  1695. 429:Core/Src/tim.c **** if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
  1696. 1219 .loc 1 429 9
  1697. 1220 00d0 07F10803 add r3, r7, #8
  1698. 1221 00d4 0022 movs r2, #0
  1699. 1222 00d6 1946 mov r1, r3
  1700. 1223 00d8 2248 ldr r0, .L66
  1701. 1224 00da FFF7FEFF bl HAL_TIM_PWM_ConfigChannel
  1702. 1225 00de 0346 mov r3, r0
  1703. 1226 .loc 1 429 8
  1704. 1227 00e0 002B cmp r3, #0
  1705. 1228 00e2 01D0 beq .L62
  1706. 430:Core/Src/tim.c **** {
  1707. 431:Core/Src/tim.c **** Error_Handler();
  1708. 1229 .loc 1 431 7
  1709. 1230 00e4 FFF7FEFF bl Error_Handler
  1710. 1231 .L62:
  1711. 432:Core/Src/tim.c **** }
  1712. 433:Core/Src/tim.c **** if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
  1713. 1232 .loc 1 433 9
  1714. 1233 00e8 07F10803 add r3, r7, #8
  1715. 1234 00ec 0822 movs r2, #8
  1716. 1235 00ee 1946 mov r1, r3
  1717. 1236 00f0 1C48 ldr r0, .L66
  1718. 1237 00f2 FFF7FEFF bl HAL_TIM_PWM_ConfigChannel
  1719. 1238 00f6 0346 mov r3, r0
  1720. 1239 .loc 1 433 8
  1721. 1240 00f8 002B cmp r3, #0
  1722. 1241 00fa 01D0 beq .L63
  1723. 434:Core/Src/tim.c **** {
  1724. 435:Core/Src/tim.c **** Error_Handler();
  1725. 1242 .loc 1 435 7
  1726. 1243 00fc FFF7FEFF bl Error_Handler
  1727. 1244 .L63:
  1728. 436:Core/Src/tim.c **** }
  1729. 437:Core/Src/tim.c **** if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_4) != HAL_OK)
  1730. 1245 .loc 1 437 9
  1731. 1246 0100 07F10803 add r3, r7, #8
  1732. 1247 0104 0C22 movs r2, #12
  1733. 1248 0106 1946 mov r1, r3
  1734. 1249 0108 1648 ldr r0, .L66
  1735. 1250 010a FFF7FEFF bl HAL_TIM_PWM_ConfigChannel
  1736. 1251 010e 0346 mov r3, r0
  1737. 1252 .loc 1 437 8
  1738. 1253 0110 002B cmp r3, #0
  1739. 1254 0112 01D0 beq .L64
  1740. 438:Core/Src/tim.c **** {
  1741. ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 31
  1742. 439:Core/Src/tim.c **** Error_Handler();
  1743. 1255 .loc 1 439 7
  1744. 1256 0114 FFF7FEFF bl Error_Handler
  1745. 1257 .L64:
  1746. 440:Core/Src/tim.c **** }
  1747. 441:Core/Src/tim.c ****
  1748. 442:Core/Src/tim.c **** HAL_TIM_MspPostInit(&htim4);
  1749. 1258 .loc 1 442 5
  1750. 1259 0118 1248 ldr r0, .L66
  1751. 1260 011a FFF7FEFF bl HAL_TIM_MspPostInit
  1752. 443:Core/Src/tim.c ****
  1753. 444:Core/Src/tim.c **** HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_1);
  1754. 1261 .loc 1 444 5
  1755. 1262 011e 0021 movs r1, #0
  1756. 1263 0120 1048 ldr r0, .L66
  1757. 1264 0122 FFF7FEFF bl HAL_TIM_PWM_Start
  1758. 445:Core/Src/tim.c **** HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_3);
  1759. 1265 .loc 1 445 5
  1760. 1266 0126 0821 movs r1, #8
  1761. 1267 0128 0E48 ldr r0, .L66
  1762. 1268 012a FFF7FEFF bl HAL_TIM_PWM_Start
  1763. 446:Core/Src/tim.c **** HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_4);
  1764. 1269 .loc 1 446 5
  1765. 1270 012e 0C21 movs r1, #12
  1766. 1271 0130 0C48 ldr r0, .L66
  1767. 1272 0132 FFF7FEFF bl HAL_TIM_PWM_Start
  1768. 447:Core/Src/tim.c ****
  1769. 448:Core/Src/tim.c **** __HAL_TIM_SET_COMPARE(&htim4, TIM_CHANNEL_1, 1500); // PB6 video
  1770. 1273 .loc 1 448 5
  1771. 1274 0136 0B4B ldr r3, .L66
  1772. 1275 0138 1B68 ldr r3, [r3]
  1773. 1276 013a 40F2DC52 movw r2, #1500
  1774. 1277 013e 5A63 str r2, [r3, #52]
  1775. 449:Core/Src/tim.c **** __HAL_TIM_SET_COMPARE(&htim4, TIM_CHANNEL_3, 1000); // PB8 nozzle
  1776. 1278 .loc 1 449 5
  1777. 1279 0140 084B ldr r3, .L66
  1778. 1280 0142 1B68 ldr r3, [r3]
  1779. 1281 0144 4FF47A72 mov r2, #1000
  1780. 1282 0148 DA63 str r2, [r3, #60]
  1781. 450:Core/Src/tim.c **** __HAL_TIM_SET_COMPARE(&htim4, TIM_CHANNEL_4, 1000); // PB9 nozzle
  1782. 1283 .loc 1 450 5
  1783. 1284 014a 064B ldr r3, .L66
  1784. 1285 014c 1B68 ldr r3, [r3]
  1785. 1286 014e 4FF47A72 mov r2, #1000
  1786. 1287 0152 1A64 str r2, [r3, #64]
  1787. 451:Core/Src/tim.c ****
  1788. 452:Core/Src/tim.c **** HAL_NVIC_DisableIRQ(EXTI9_5_IRQn); // 关外出触发中断
  1789. 1288 .loc 1 452 5
  1790. 1289 0154 1720 movs r0, #23
  1791. 1290 0156 FFF7FEFF bl HAL_NVIC_DisableIRQ
  1792. 1291 .L65:
  1793. 453:Core/Src/tim.c **** }
  1794. 454:Core/Src/tim.c **** }
  1795. 1292 .loc 1 454 1
  1796. 1293 015a 00BF nop
  1797. 1294 015c 4037 adds r7, r7, #64
  1798. 1295 .LCFI47:
  1799. ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 32
  1800. 1296 .cfi_def_cfa_offset 8
  1801. 1297 015e BD46 mov sp, r7
  1802. 1298 .LCFI48:
  1803. 1299 .cfi_def_cfa_register 13
  1804. 1300 @ sp needed
  1805. 1301 0160 80BD pop {r7, pc}
  1806. 1302 .L67:
  1807. 1303 0162 00BF .align 2
  1808. 1304 .L66:
  1809. 1305 0164 00000000 .word htim4
  1810. 1306 0168 00080040 .word 1073743872
  1811. 1307 .cfi_endproc
  1812. 1308 .LFE139:
  1813. 1310 .text
  1814. 1311 .Letext0:
  1815. 1312 .file 2 "d:\\arm-gcc\\arm-none-eabi\\include\\machine\\_default_types.h"
  1816. 1313 .file 3 "d:\\arm-gcc\\arm-none-eabi\\include\\sys\\_stdint.h"
  1817. 1314 .file 4 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h"
  1818. 1315 .file 5 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h"
  1819. 1316 .file 6 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_gpio.h"
  1820. 1317 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h"
  1821. 1318 .file 8 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h"
  1822. 1319 .file 9 "Core/Inc/tim.h"
  1823. ARM GAS C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s page 33
  1824. DEFINED SYMBOLS
  1825. *ABS*:00000000 tim.c
  1826. C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:24 .bss.htim2:00000000 htim2
  1827. C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:21 .bss.htim2:00000000 $d
  1828. C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:31 .bss.htim3:00000000 htim3
  1829. C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:28 .bss.htim3:00000000 $d
  1830. C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:38 .bss.htim4:00000000 htim4
  1831. C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:35 .bss.htim4:00000000 $d
  1832. C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:41 .text.MX_TIM2_Init:00000000 $t
  1833. C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:47 .text.MX_TIM2_Init:00000000 MX_TIM2_Init
  1834. C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:657 .text.HAL_TIM_MspPostInit:00000000 HAL_TIM_MspPostInit
  1835. C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:187 .text.MX_TIM2_Init:000000c4 $d
  1836. C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:192 .text.MX_TIM3_Init:00000000 $t
  1837. C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:198 .text.MX_TIM3_Init:00000000 MX_TIM3_Init
  1838. C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:337 .text.MX_TIM3_Init:000000c4 $d
  1839. C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:343 .text.MX_TIM4_Init:00000000 $t
  1840. C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:349 .text.MX_TIM4_Init:00000000 MX_TIM4_Init
  1841. C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:459 .text.MX_TIM4_Init:00000094 $d
  1842. C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:465 .text.HAL_TIM_Base_MspInit:00000000 $t
  1843. C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:471 .text.HAL_TIM_Base_MspInit:00000000 HAL_TIM_Base_MspInit
  1844. C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:554 .text.HAL_TIM_Base_MspInit:00000068 $d
  1845. C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:561 .text.HAL_TIM_PWM_MspInit:00000000 $t
  1846. C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:567 .text.HAL_TIM_PWM_MspInit:00000000 HAL_TIM_PWM_MspInit
  1847. C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:645 .text.HAL_TIM_PWM_MspInit:0000005c $d
  1848. C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:651 .text.HAL_TIM_MspPostInit:00000000 $t
  1849. C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:849 .text.HAL_TIM_MspPostInit:00000120 $d
  1850. C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:857 .text.HAL_TIM_PWM_MspDeInit:00000000 $t
  1851. C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:863 .text.HAL_TIM_PWM_MspDeInit:00000000 HAL_TIM_PWM_MspDeInit
  1852. C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:927 .text.HAL_TIM_PWM_MspDeInit:00000044 $d
  1853. C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:933 .text.HAL_TIM_Base_MspDeInit:00000000 $t
  1854. C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:939 .text.HAL_TIM_Base_MspDeInit:00000000 HAL_TIM_Base_MspDeInit
  1855. C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:1003 .text.HAL_TIM_Base_MspDeInit:00000044 $d
  1856. C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:1010 .text.pwm_init:00000000 $t
  1857. C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:1016 .text.pwm_init:00000000 pwm_init
  1858. C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:1072 .text.pwm_init:00000050 $d
  1859. C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:1078 .text.init_pwmout:00000000 $t
  1860. C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:1084 .text.init_pwmout:00000000 init_pwmout
  1861. C:\Users\zl835\AppData\Local\Temp\ccoJnRQg.s:1305 .text.init_pwmout:00000164 $d
  1862. UNDEFINED SYMBOLS
  1863. HAL_TIM_PWM_Init
  1864. Error_Handler
  1865. HAL_TIMEx_MasterConfigSynchronization
  1866. HAL_TIM_PWM_ConfigChannel
  1867. HAL_TIM_Base_Init
  1868. HAL_TIM_ConfigClockSource
  1869. HAL_NVIC_SetPriority
  1870. HAL_NVIC_EnableIRQ
  1871. HAL_GPIO_Init
  1872. HAL_NVIC_DisableIRQ
  1873. HAL_TIM_PWM_Start