ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 1 1 .cpu cortex-m4 2 .arch armv7e-m 3 .fpu fpv4-sp-d16 4 .eabi_attribute 27, 1 5 .eabi_attribute 28, 1 6 .eabi_attribute 20, 1 7 .eabi_attribute 21, 1 8 .eabi_attribute 23, 3 9 .eabi_attribute 24, 1 10 .eabi_attribute 25, 1 11 .eabi_attribute 26, 1 12 .eabi_attribute 30, 6 13 .eabi_attribute 34, 1 14 .eabi_attribute 18, 4 15 .file "stm32f3xx_hal_uart_ex.c" 16 .text 17 .Ltext0: 18 .cfi_sections .debug_frame 19 .section .rodata 20 .align 2 21 .LC0: 22 0000 44726976 .ascii "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart" 22 6572732F 22 53544D33 22 32463378 22 785F4841 23 0033 5F65782E .ascii "_ex.c\000" 23 6300 24 .section .text.HAL_RS485Ex_Init,"ax",%progbits 25 .align 1 26 .global HAL_RS485Ex_Init 27 .syntax unified 28 .thumb 29 .thumb_func 31 HAL_RS485Ex_Init: 32 .LFB130: 33 .file 1 "Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c" 1:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** 2:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** ****************************************************************************** 3:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @file stm32f3xx_hal_uart_ex.c 4:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @author MCD Application Team 5:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @brief Extended UART HAL module driver. 6:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * This file provides firmware functions to manage the following extended 7:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * functionalities of the Universal Asynchronous Receiver Transmitter Peripheral (UART). 8:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * + Initialization and de-initialization functions 9:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * + Peripheral Control functions 10:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * 11:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * 12:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** ****************************************************************************** 13:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @attention 14:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * 15:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * Copyright (c) 2016 STMicroelectronics. 16:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * All rights reserved. 17:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * 18:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * This software is licensed under terms that can be found in the LICENSE file 19:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * in the root directory of this software component. 20:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * If no LICENSE file comes with this software, it is provided AS-IS. ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 2 21:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * 22:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** ****************************************************************************** 23:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** @verbatim 24:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** ============================================================================== 25:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** ##### UART peripheral extended features ##### 26:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** ============================================================================== 27:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 28:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (#) Declare a UART_HandleTypeDef handle structure. 29:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 30:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (#) For the UART RS485 Driver Enable mode, initialize the UART registers 31:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** by calling the HAL_RS485Ex_Init() API. 32:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 33:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** @endverbatim 34:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** ****************************************************************************** 35:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */ 36:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 37:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Includes ------------------------------------------------------------------*/ 38:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** #include "stm32f3xx_hal.h" 39:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 40:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** @addtogroup STM32F3xx_HAL_Driver 41:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @{ 42:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */ 43:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 44:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** @defgroup UARTEx UARTEx 45:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @brief UART Extended HAL module driver 46:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @{ 47:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */ 48:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 49:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** #ifdef HAL_UART_MODULE_ENABLED 50:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 51:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Private typedef -----------------------------------------------------------*/ 52:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Private define ------------------------------------------------------------*/ 53:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 54:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Private macros ------------------------------------------------------------*/ 55:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Private variables ---------------------------------------------------------*/ 56:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Private function prototypes -----------------------------------------------*/ 57:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** @defgroup UARTEx_Private_Functions UARTEx Private Functions 58:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @{ 59:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */ 60:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** static void UARTEx_Wakeup_AddressConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelecti 61:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** 62:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @} 63:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */ 64:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 65:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Exported functions --------------------------------------------------------*/ 66:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 67:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** @defgroup UARTEx_Exported_Functions UARTEx Exported Functions 68:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @{ 69:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */ 70:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 71:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** @defgroup UARTEx_Exported_Functions_Group1 Initialization and de-initialization functions 72:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @brief Extended Initialization and Configuration Functions 73:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * 74:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** @verbatim 75:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** =============================================================================== 76:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** ##### Initialization and Configuration functions ##### 77:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** =============================================================================== ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 3 78:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** [..] 79:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** This subsection provides a set of functions allowing to initialize the USARTx or the UARTy 80:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** in asynchronous mode. 81:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (+) For the asynchronous mode the parameters below can be configured: 82:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (++) Baud Rate 83:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (++) Word Length 84:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (++) Stop Bit 85:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (++) Parity: If the parity is enabled, then the MSB bit of the data written 86:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** in the data register is transmitted but is changed by the parity bit. 87:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (++) Hardware flow control 88:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (++) Receiver/transmitter modes 89:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (++) Over Sampling Method 90:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (++) One-Bit Sampling Method 91:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (+) For the asynchronous mode, the following advanced features can be configured as well: 92:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (++) TX and/or RX pin level inversion 93:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (++) data logical level inversion 94:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (++) RX and TX pins swap 95:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (++) RX overrun detection disabling 96:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (++) DMA disabling on RX error 97:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (++) MSB first on communication line 98:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (++) auto Baud rate detection 99:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** [..] 100:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** The HAL_RS485Ex_Init() API follows the UART RS485 mode configuration 101:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** procedures (details for the procedures are available in reference manual). 102:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 103:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** @endverbatim 104:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 105:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** Depending on the frame length defined by the M1 and M0 bits (7-bit, 106:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 8-bit or 9-bit), the possible UART formats are listed in the 107:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** following table. 108:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 109:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** Table 1. UART frame format. 110:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** +-----------------------------------------------------------------------+ 111:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** | M1 bit | M0 bit | PCE bit | UART frame | 112:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** |---------|---------|-----------|---------------------------------------| 113:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** | 0 | 0 | 0 | | SB | 8 bit data | STB | | 114:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** |---------|---------|-----------|---------------------------------------| 115:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** | 0 | 0 | 1 | | SB | 7 bit data | PB | STB | | 116:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** |---------|---------|-----------|---------------------------------------| 117:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** | 0 | 1 | 0 | | SB | 9 bit data | STB | | 118:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** |---------|---------|-----------|---------------------------------------| 119:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** | 0 | 1 | 1 | | SB | 8 bit data | PB | STB | | 120:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** |---------|---------|-----------|---------------------------------------| 121:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** | 1 | 0 | 0 | | SB | 7 bit data | STB | | 122:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** |---------|---------|-----------|---------------------------------------| 123:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** | 1 | 0 | 1 | | SB | 6 bit data | PB | STB | | 124:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** +-----------------------------------------------------------------------+ 125:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 126:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @{ 127:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */ 128:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 129:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** 130:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @brief Initialize the RS485 Driver enable feature according to the specified 131:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * parameters in the UART_InitTypeDef and creates the associated handle. 132:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param huart UART handle. 133:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param Polarity Select the driver enable polarity. 134:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * This parameter can be one of the following values: ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 4 135:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @arg @ref UART_DE_POLARITY_HIGH DE signal is active high 136:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @arg @ref UART_DE_POLARITY_LOW DE signal is active low 137:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param AssertionTime Driver Enable assertion time: 138:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * 5-bit value defining the time between the activation of the DE (Driver Enable) 139:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * signal and the beginning of the start bit. It is expressed in sample time 140:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * units (1/8 or 1/16 bit time, depending on the oversampling rate) 141:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param DeassertionTime Driver Enable deassertion time: 142:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * 5-bit value defining the time between the end of the last stop bit, in a 143:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * transmitted message, and the de-activation of the DE (Driver Enable) signal. 144:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * It is expressed in sample time units (1/8 or 1/16 bit time, depending on the 145:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * oversampling rate). 146:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @retval HAL status 147:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */ 148:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, uint32_t Assertion 149:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uint32_t DeassertionTime) 150:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { 34 .loc 1 150 1 35 .cfi_startproc 36 @ args = 0, pretend = 0, frame = 24 37 @ frame_needed = 1, uses_anonymous_args = 0 38 0000 80B5 push {r7, lr} 39 .LCFI0: 40 .cfi_def_cfa_offset 8 41 .cfi_offset 7, -8 42 .cfi_offset 14, -4 43 0002 86B0 sub sp, sp, #24 44 .LCFI1: 45 .cfi_def_cfa_offset 32 46 0004 00AF add r7, sp, #0 47 .LCFI2: 48 .cfi_def_cfa_register 7 49 0006 F860 str r0, [r7, #12] 50 0008 B960 str r1, [r7, #8] 51 000a 7A60 str r2, [r7, #4] 52 000c 3B60 str r3, [r7] 151:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uint32_t temp; 152:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 153:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Check the UART handle allocation */ 154:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (huart == NULL) 53 .loc 1 154 6 54 000e FB68 ldr r3, [r7, #12] 55 0010 002B cmp r3, #0 56 0012 01D1 bne .L2 155:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { 156:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return HAL_ERROR; 57 .loc 1 156 12 58 0014 0123 movs r3, #1 59 0016 82E0 b .L3 60 .L2: 157:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } 158:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Check the Driver Enable UART instance */ 159:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** assert_param(IS_UART_DRIVER_ENABLE_INSTANCE(huart->Instance)); 61 .loc 1 159 3 62 0018 FB68 ldr r3, [r7, #12] 63 001a 1B68 ldr r3, [r3] 64 001c 424A ldr r2, .L11 65 001e 9342 cmp r3, r2 ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 5 66 0020 0DD0 beq .L4 67 .loc 1 159 3 is_stmt 0 discriminator 1 68 0022 FB68 ldr r3, [r7, #12] 69 0024 1B68 ldr r3, [r3] 70 0026 414A ldr r2, .L11+4 71 0028 9342 cmp r3, r2 72 002a 08D0 beq .L4 73 .loc 1 159 3 discriminator 2 74 002c FB68 ldr r3, [r7, #12] 75 002e 1B68 ldr r3, [r3] 76 0030 3F4A ldr r2, .L11+8 77 0032 9342 cmp r3, r2 78 0034 03D0 beq .L4 79 .loc 1 159 3 discriminator 3 80 0036 9F21 movs r1, #159 81 0038 3E48 ldr r0, .L11+12 82 003a FFF7FEFF bl assert_failed 83 .L4: 160:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 161:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Check the Driver Enable polarity */ 162:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** assert_param(IS_UART_DE_POLARITY(Polarity)); 84 .loc 1 162 3 is_stmt 1 85 003e BB68 ldr r3, [r7, #8] 86 0040 002B cmp r3, #0 87 0042 07D0 beq .L5 88 .loc 1 162 3 is_stmt 0 discriminator 1 89 0044 BB68 ldr r3, [r7, #8] 90 0046 B3F5004F cmp r3, #32768 91 004a 03D0 beq .L5 92 .loc 1 162 3 discriminator 2 93 004c A221 movs r1, #162 94 004e 3948 ldr r0, .L11+12 95 0050 FFF7FEFF bl assert_failed 96 .L5: 163:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 164:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Check the Driver Enable assertion time */ 165:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** assert_param(IS_UART_ASSERTIONTIME(AssertionTime)); 97 .loc 1 165 3 is_stmt 1 98 0054 7B68 ldr r3, [r7, #4] 99 0056 1F2B cmp r3, #31 100 0058 03D9 bls .L6 101 .loc 1 165 3 is_stmt 0 discriminator 1 102 005a A521 movs r1, #165 103 005c 3548 ldr r0, .L11+12 104 005e FFF7FEFF bl assert_failed 105 .L6: 166:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 167:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Check the Driver Enable deassertion time */ 168:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** assert_param(IS_UART_DEASSERTIONTIME(DeassertionTime)); 106 .loc 1 168 3 is_stmt 1 107 0062 3B68 ldr r3, [r7] 108 0064 1F2B cmp r3, #31 109 0066 03D9 bls .L7 110 .loc 1 168 3 is_stmt 0 discriminator 1 111 0068 A821 movs r1, #168 112 006a 3248 ldr r0, .L11+12 113 006c FFF7FEFF bl assert_failed ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 6 114 .L7: 169:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 170:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (huart->gState == HAL_UART_STATE_RESET) 115 .loc 1 170 12 is_stmt 1 116 0070 FB68 ldr r3, [r7, #12] 117 0072 DB6F ldr r3, [r3, #124] 118 .loc 1 170 6 119 0074 002B cmp r3, #0 120 0076 06D1 bne .L8 171:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { 172:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Allocate lock resource and initialize it */ 173:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->Lock = HAL_UNLOCKED; 121 .loc 1 173 17 122 0078 FB68 ldr r3, [r7, #12] 123 007a 0022 movs r2, #0 124 007c 83F87820 strb r2, [r3, #120] 174:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 175:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 176:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** UART_InitCallbacksToDefault(huart); 177:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 178:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (huart->MspInitCallback == NULL) 179:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { 180:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->MspInitCallback = HAL_UART_MspInit; 181:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } 182:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 183:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Init the low level hardware */ 184:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->MspInitCallback(huart); 185:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** #else 186:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Init the low level hardware : GPIO, CLOCK, CORTEX */ 187:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** HAL_UART_MspInit(huart); 125 .loc 1 187 5 126 0080 F868 ldr r0, [r7, #12] 127 0082 FFF7FEFF bl HAL_UART_MspInit 128 .L8: 188:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ 189:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } 190:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 191:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->gState = HAL_UART_STATE_BUSY; 129 .loc 1 191 17 130 0086 FB68 ldr r3, [r7, #12] 131 0088 2422 movs r2, #36 132 008a DA67 str r2, [r3, #124] 192:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 193:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Disable the Peripheral */ 194:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** __HAL_UART_DISABLE(huart); 133 .loc 1 194 3 134 008c FB68 ldr r3, [r7, #12] 135 008e 1B68 ldr r3, [r3] 136 0090 1A68 ldr r2, [r3] 137 0092 FB68 ldr r3, [r7, #12] 138 0094 1B68 ldr r3, [r3] 139 0096 22F00102 bic r2, r2, #1 140 009a 1A60 str r2, [r3] 195:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 196:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Perform advanced settings configuration */ 197:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* For some items, configuration requires to be done prior TE and RE bits are set */ 198:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 7 141 .loc 1 198 26 142 009c FB68 ldr r3, [r7, #12] 143 009e 5B6A ldr r3, [r3, #36] 144 .loc 1 198 6 145 00a0 002B cmp r3, #0 146 00a2 02D0 beq .L9 199:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { 200:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** UART_AdvFeatureConfig(huart); 147 .loc 1 200 5 148 00a4 F868 ldr r0, [r7, #12] 149 00a6 FFF7FEFF bl UART_AdvFeatureConfig 150 .L9: 201:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } 202:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 203:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Set the UART Communication parameters */ 204:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (UART_SetConfig(huart) == HAL_ERROR) 151 .loc 1 204 7 152 00aa F868 ldr r0, [r7, #12] 153 00ac FFF7FEFF bl UART_SetConfig 154 00b0 0346 mov r3, r0 155 .loc 1 204 6 156 00b2 012B cmp r3, #1 157 00b4 01D1 bne .L10 205:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { 206:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return HAL_ERROR; 158 .loc 1 206 12 159 00b6 0123 movs r3, #1 160 00b8 31E0 b .L3 161 .L10: 207:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } 208:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 209:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Enable the Driver Enable mode by setting the DEM bit in the CR3 register */ 210:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** SET_BIT(huart->Instance->CR3, USART_CR3_DEM); 162 .loc 1 210 3 163 00ba FB68 ldr r3, [r7, #12] 164 00bc 1B68 ldr r3, [r3] 165 00be 9A68 ldr r2, [r3, #8] 166 00c0 FB68 ldr r3, [r7, #12] 167 00c2 1B68 ldr r3, [r3] 168 00c4 42F48042 orr r2, r2, #16384 169 00c8 9A60 str r2, [r3, #8] 211:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 212:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Set the Driver Enable polarity */ 213:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** MODIFY_REG(huart->Instance->CR3, USART_CR3_DEP, Polarity); 170 .loc 1 213 3 171 00ca FB68 ldr r3, [r7, #12] 172 00cc 1B68 ldr r3, [r3] 173 00ce 9B68 ldr r3, [r3, #8] 174 00d0 23F40041 bic r1, r3, #32768 175 00d4 FB68 ldr r3, [r7, #12] 176 00d6 1B68 ldr r3, [r3] 177 00d8 BA68 ldr r2, [r7, #8] 178 00da 0A43 orrs r2, r2, r1 179 00dc 9A60 str r2, [r3, #8] 214:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 215:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Set the Driver Enable assertion and deassertion times */ 216:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** temp = (AssertionTime << UART_CR1_DEAT_ADDRESS_LSB_POS); ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 8 180 .loc 1 216 8 181 00de 7B68 ldr r3, [r7, #4] 182 00e0 5B05 lsls r3, r3, #21 183 00e2 7B61 str r3, [r7, #20] 217:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** temp |= (DeassertionTime << UART_CR1_DEDT_ADDRESS_LSB_POS); 184 .loc 1 217 28 185 00e4 3B68 ldr r3, [r7] 186 00e6 1B04 lsls r3, r3, #16 187 .loc 1 217 8 188 00e8 7A69 ldr r2, [r7, #20] 189 00ea 1343 orrs r3, r3, r2 190 00ec 7B61 str r3, [r7, #20] 218:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** MODIFY_REG(huart->Instance->CR1, (USART_CR1_DEDT | USART_CR1_DEAT), temp); 191 .loc 1 218 3 192 00ee FB68 ldr r3, [r7, #12] 193 00f0 1B68 ldr r3, [r3] 194 00f2 1B68 ldr r3, [r3] 195 00f4 23F07F73 bic r3, r3, #66846720 196 00f8 23F44033 bic r3, r3, #196608 197 00fc FA68 ldr r2, [r7, #12] 198 00fe 1268 ldr r2, [r2] 199 0100 7969 ldr r1, [r7, #20] 200 0102 0B43 orrs r3, r3, r1 201 0104 1360 str r3, [r2] 219:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 220:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Enable the Peripheral */ 221:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** __HAL_UART_ENABLE(huart); 202 .loc 1 221 3 203 0106 FB68 ldr r3, [r7, #12] 204 0108 1B68 ldr r3, [r3] 205 010a 1A68 ldr r2, [r3] 206 010c FB68 ldr r3, [r7, #12] 207 010e 1B68 ldr r3, [r3] 208 0110 42F00102 orr r2, r2, #1 209 0114 1A60 str r2, [r3] 222:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 223:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */ 224:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return (UART_CheckIdleState(huart)); 210 .loc 1 224 11 211 0116 F868 ldr r0, [r7, #12] 212 0118 FFF7FEFF bl UART_CheckIdleState 213 011c 0346 mov r3, r0 214 .L3: 225:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } 215 .loc 1 225 1 216 011e 1846 mov r0, r3 217 0120 1837 adds r7, r7, #24 218 .LCFI3: 219 .cfi_def_cfa_offset 8 220 0122 BD46 mov sp, r7 221 .LCFI4: 222 .cfi_def_cfa_register 13 223 @ sp needed 224 0124 80BD pop {r7, pc} 225 .L12: 226 0126 00BF .align 2 227 .L11: ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 9 228 0128 00380140 .word 1073821696 229 012c 00440040 .word 1073759232 230 0130 00480040 .word 1073760256 231 0134 00000000 .word .LC0 232 .cfi_endproc 233 .LFE130: 235 .section .text.HAL_UARTEx_WakeupCallback,"ax",%progbits 236 .align 1 237 .weak HAL_UARTEx_WakeupCallback 238 .syntax unified 239 .thumb 240 .thumb_func 242 HAL_UARTEx_WakeupCallback: 243 .LFB131: 226:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 227:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** 228:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @} 229:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */ 230:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 231:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** @defgroup UARTEx_Exported_Functions_Group2 IO operation functions 232:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @brief Extended functions 233:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * 234:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** @verbatim 235:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** =============================================================================== 236:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** ##### IO operation functions ##### 237:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** =============================================================================== 238:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** This subsection provides a set of Wakeup and FIFO mode related callback functions. 239:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 240:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (#) Wakeup from Stop mode Callback: 241:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (+) HAL_UARTEx_WakeupCallback() 242:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 243:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** @endverbatim 244:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @{ 245:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */ 246:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 247:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** 248:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @brief UART wakeup from Stop mode callback. 249:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param huart UART handle. 250:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @retval None 251:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */ 252:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** __weak void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart) 253:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { 244 .loc 1 253 1 245 .cfi_startproc 246 @ args = 0, pretend = 0, frame = 8 247 @ frame_needed = 1, uses_anonymous_args = 0 248 @ link register save eliminated. 249 0000 80B4 push {r7} 250 .LCFI5: 251 .cfi_def_cfa_offset 4 252 .cfi_offset 7, -4 253 0002 83B0 sub sp, sp, #12 254 .LCFI6: 255 .cfi_def_cfa_offset 16 256 0004 00AF add r7, sp, #0 257 .LCFI7: 258 .cfi_def_cfa_register 7 ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 10 259 0006 7860 str r0, [r7, #4] 254:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Prevent unused argument(s) compilation warning */ 255:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** UNUSED(huart); 256:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 257:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* NOTE : This function should not be modified, when the callback is needed, 258:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** the HAL_UARTEx_WakeupCallback can be implemented in the user file. 259:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */ 260:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } 260 .loc 1 260 1 261 0008 00BF nop 262 000a 0C37 adds r7, r7, #12 263 .LCFI8: 264 .cfi_def_cfa_offset 4 265 000c BD46 mov sp, r7 266 .LCFI9: 267 .cfi_def_cfa_register 13 268 @ sp needed 269 000e 5DF8047B ldr r7, [sp], #4 270 .LCFI10: 271 .cfi_restore 7 272 .cfi_def_cfa_offset 0 273 0012 7047 bx lr 274 .cfi_endproc 275 .LFE131: 277 .section .text.HAL_MultiProcessorEx_AddressLength_Set,"ax",%progbits 278 .align 1 279 .global HAL_MultiProcessorEx_AddressLength_Set 280 .syntax unified 281 .thumb 282 .thumb_func 284 HAL_MultiProcessorEx_AddressLength_Set: 285 .LFB132: 261:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 262:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 263:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** 264:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @} 265:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */ 266:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 267:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** @defgroup UARTEx_Exported_Functions_Group3 Peripheral Control functions 268:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @brief Extended Peripheral Control functions 269:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * 270:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** @verbatim 271:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** =============================================================================== 272:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** ##### Peripheral Control functions ##### 273:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** =============================================================================== 274:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** [..] This section provides the following functions: 275:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (+) HAL_MultiProcessorEx_AddressLength_Set() API optionally sets the UART node address 276:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** detection length to more than 4 bits for multiprocessor address mark wake up. 277:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (+) HAL_UARTEx_StopModeWakeUpSourceConfig() API defines the wake-up from stop mode 278:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** trigger: address match, Start Bit detection or RXNE bit status. 279:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (+) HAL_UARTEx_EnableStopMode() API enables the UART to wake up the MCU from stop mode 280:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (+) HAL_UARTEx_DisableStopMode() API disables the above functionality 281:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 282:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** [..] This subsection also provides a set of additional functions providing enhanced reception 283:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** services to user. (For example, these functions allow application to handle use cases 284:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** where number of data to be received is unknown). 285:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 11 286:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (#) Compared to standard reception services which only consider number of received 287:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** data elements as reception completion criteria, these functions also consider additional ev 288:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** as triggers for updating reception status to caller : 289:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (+) Detection of inactivity period (RX line has not been active for a given period). 290:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (++) RX inactivity detected by IDLE event, i.e. RX line has been in idle state (normally 291:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** for 1 frame time, after last received byte. 292:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (++) RX inactivity detected by RTO, i.e. line has been in idle state 293:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** for a programmable time, after last received byte. 294:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (+) Detection that a specific character has been received. 295:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 296:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (#) There are two mode of transfer: 297:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (+) Blocking mode: The reception is performed in polling mode, until either expected number 298:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** or till IDLE event occurs. Reception is handled only during function execution. 299:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** When function exits, no data reception could occur. HAL status and number of actually re 300:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** are returned by function after finishing transfer. 301:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (+) Non-Blocking mode: The reception is performed using Interrupts or DMA. 302:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** These API's return the HAL status. 303:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** The end of the data processing will be indicated through the 304:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** dedicated UART IRQ when using Interrupt mode or the DMA IRQ when using DMA mode. 305:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** The HAL_UARTEx_RxEventCallback() user callback will be executed during Receive process 306:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** The HAL_UART_ErrorCallback()user callback will be executed when a reception error is det 307:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 308:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (#) Blocking mode API: 309:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (+) HAL_UARTEx_ReceiveToIdle() 310:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 311:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (#) Non-Blocking mode API with Interrupt: 312:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (+) HAL_UARTEx_ReceiveToIdle_IT() 313:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 314:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (#) Non-Blocking mode API with DMA: 315:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (+) HAL_UARTEx_ReceiveToIdle_DMA() 316:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 317:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** @endverbatim 318:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @{ 319:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */ 320:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 321:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** 322:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @brief By default in multiprocessor mode, when the wake up method is set 323:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * to address mark, the UART handles only 4-bit long addresses detection; 324:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * this API allows to enable longer addresses detection (6-, 7- or 8-bit 325:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * long). 326:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @note Addresses detection lengths are: 6-bit address detection in 7-bit data mode, 327:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * 7-bit address detection in 8-bit data mode, 8-bit address detection in 9-bit data mode. 328:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param huart UART handle. 329:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param AddressLength This parameter can be one of the following values: 330:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @arg @ref UART_ADDRESS_DETECT_4B 4-bit long address 331:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @arg @ref UART_ADDRESS_DETECT_7B 6-, 7- or 8-bit long address 332:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @retval HAL status 333:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */ 334:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** HAL_StatusTypeDef HAL_MultiProcessorEx_AddressLength_Set(UART_HandleTypeDef *huart, uint32_t Addres 335:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { 286 .loc 1 335 1 287 .cfi_startproc 288 @ args = 0, pretend = 0, frame = 8 289 @ frame_needed = 1, uses_anonymous_args = 0 290 0000 80B5 push {r7, lr} 291 .LCFI11: 292 .cfi_def_cfa_offset 8 ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 12 293 .cfi_offset 7, -8 294 .cfi_offset 14, -4 295 0002 82B0 sub sp, sp, #8 296 .LCFI12: 297 .cfi_def_cfa_offset 16 298 0004 00AF add r7, sp, #0 299 .LCFI13: 300 .cfi_def_cfa_register 7 301 0006 7860 str r0, [r7, #4] 302 0008 3960 str r1, [r7] 336:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Check the UART handle allocation */ 337:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (huart == NULL) 303 .loc 1 337 6 304 000a 7B68 ldr r3, [r7, #4] 305 000c 002B cmp r3, #0 306 000e 01D1 bne .L15 338:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { 339:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return HAL_ERROR; 307 .loc 1 339 12 308 0010 0123 movs r3, #1 309 0012 2BE0 b .L16 310 .L15: 340:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } 341:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 342:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Check the address length parameter */ 343:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** assert_param(IS_UART_ADDRESSLENGTH_DETECT(AddressLength)); 311 .loc 1 343 3 312 0014 3B68 ldr r3, [r7] 313 0016 002B cmp r3, #0 314 0018 07D0 beq .L17 315 .loc 1 343 3 is_stmt 0 discriminator 1 316 001a 3B68 ldr r3, [r7] 317 001c 102B cmp r3, #16 318 001e 04D0 beq .L17 319 .loc 1 343 3 discriminator 2 320 0020 40F25711 movw r1, #343 321 0024 1348 ldr r0, .L18 322 0026 FFF7FEFF bl assert_failed 323 .L17: 344:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 345:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->gState = HAL_UART_STATE_BUSY; 324 .loc 1 345 17 is_stmt 1 325 002a 7B68 ldr r3, [r7, #4] 326 002c 2422 movs r2, #36 327 002e DA67 str r2, [r3, #124] 346:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 347:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Disable the Peripheral */ 348:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** __HAL_UART_DISABLE(huart); 328 .loc 1 348 3 329 0030 7B68 ldr r3, [r7, #4] 330 0032 1B68 ldr r3, [r3] 331 0034 1A68 ldr r2, [r3] 332 0036 7B68 ldr r3, [r7, #4] 333 0038 1B68 ldr r3, [r3] 334 003a 22F00102 bic r2, r2, #1 335 003e 1A60 str r2, [r3] 349:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 13 350:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Set the address length */ 351:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** MODIFY_REG(huart->Instance->CR2, USART_CR2_ADDM7, AddressLength); 336 .loc 1 351 3 337 0040 7B68 ldr r3, [r7, #4] 338 0042 1B68 ldr r3, [r3] 339 0044 5B68 ldr r3, [r3, #4] 340 0046 23F01001 bic r1, r3, #16 341 004a 7B68 ldr r3, [r7, #4] 342 004c 1B68 ldr r3, [r3] 343 004e 3A68 ldr r2, [r7] 344 0050 0A43 orrs r2, r2, r1 345 0052 5A60 str r2, [r3, #4] 352:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 353:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Enable the Peripheral */ 354:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** __HAL_UART_ENABLE(huart); 346 .loc 1 354 3 347 0054 7B68 ldr r3, [r7, #4] 348 0056 1B68 ldr r3, [r3] 349 0058 1A68 ldr r2, [r3] 350 005a 7B68 ldr r3, [r7, #4] 351 005c 1B68 ldr r3, [r3] 352 005e 42F00102 orr r2, r2, #1 353 0062 1A60 str r2, [r3] 355:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 356:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* TEACK and/or REACK to check before moving huart->gState to Ready */ 357:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return (UART_CheckIdleState(huart)); 354 .loc 1 357 11 355 0064 7868 ldr r0, [r7, #4] 356 0066 FFF7FEFF bl UART_CheckIdleState 357 006a 0346 mov r3, r0 358 .L16: 358:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } 359 .loc 1 358 1 360 006c 1846 mov r0, r3 361 006e 0837 adds r7, r7, #8 362 .LCFI14: 363 .cfi_def_cfa_offset 8 364 0070 BD46 mov sp, r7 365 .LCFI15: 366 .cfi_def_cfa_register 13 367 @ sp needed 368 0072 80BD pop {r7, pc} 369 .L19: 370 .align 2 371 .L18: 372 0074 00000000 .word .LC0 373 .cfi_endproc 374 .LFE132: 376 .section .text.HAL_UARTEx_StopModeWakeUpSourceConfig,"ax",%progbits 377 .align 1 378 .global HAL_UARTEx_StopModeWakeUpSourceConfig 379 .syntax unified 380 .thumb 381 .thumb_func 383 HAL_UARTEx_StopModeWakeUpSourceConfig: 384 .LFB133: 359:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 14 360:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** 361:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @brief Set Wakeup from Stop mode interrupt flag selection. 362:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @note It is the application responsibility to enable the interrupt used as 363:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * usart_wkup interrupt source before entering low-power mode. 364:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param huart UART handle. 365:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param WakeUpSelection Address match, Start Bit detection or RXNE/RXFNE bit status. 366:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * This parameter can be one of the following values: 367:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @arg @ref UART_WAKEUP_ON_ADDRESS 368:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @arg @ref UART_WAKEUP_ON_STARTBIT 369:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @arg @ref UART_WAKEUP_ON_READDATA_NONEMPTY 370:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @retval HAL status 371:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */ 372:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** HAL_StatusTypeDef HAL_UARTEx_StopModeWakeUpSourceConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeD 373:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { 385 .loc 1 373 1 386 .cfi_startproc 387 @ args = 0, pretend = 0, frame = 24 388 @ frame_needed = 1, uses_anonymous_args = 0 389 0000 80B5 push {r7, lr} 390 .LCFI16: 391 .cfi_def_cfa_offset 8 392 .cfi_offset 7, -8 393 .cfi_offset 14, -4 394 0002 88B0 sub sp, sp, #32 395 .LCFI17: 396 .cfi_def_cfa_offset 40 397 0004 02AF add r7, sp, #8 398 .LCFI18: 399 .cfi_def_cfa 7, 32 400 0006 F860 str r0, [r7, #12] 401 0008 3B1D adds r3, r7, #4 402 000a 83E80600 stm r3, {r1, r2} 374:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** HAL_StatusTypeDef status = HAL_OK; 403 .loc 1 374 21 404 000e 0023 movs r3, #0 405 0010 FB75 strb r3, [r7, #23] 375:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uint32_t tickstart; 376:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 377:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* check the wake-up from stop mode UART instance */ 378:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** assert_param(IS_UART_WAKEUP_FROMSTOP_INSTANCE(huart->Instance)); 406 .loc 1 378 3 407 0012 FB68 ldr r3, [r7, #12] 408 0014 1B68 ldr r3, [r3] 409 0016 3E4A ldr r2, .L28 410 0018 9342 cmp r3, r2 411 001a 18D0 beq .L21 412 .loc 1 378 3 is_stmt 0 discriminator 1 413 001c FB68 ldr r3, [r7, #12] 414 001e 1B68 ldr r3, [r3] 415 0020 3C4A ldr r2, .L28+4 416 0022 9342 cmp r3, r2 417 0024 13D0 beq .L21 418 .loc 1 378 3 discriminator 2 419 0026 FB68 ldr r3, [r7, #12] 420 0028 1B68 ldr r3, [r3] 421 002a 3B4A ldr r2, .L28+8 422 002c 9342 cmp r3, r2 ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 15 423 002e 0ED0 beq .L21 424 .loc 1 378 3 discriminator 3 425 0030 FB68 ldr r3, [r7, #12] 426 0032 1B68 ldr r3, [r3] 427 0034 394A ldr r2, .L28+12 428 0036 9342 cmp r3, r2 429 0038 09D0 beq .L21 430 .loc 1 378 3 discriminator 4 431 003a FB68 ldr r3, [r7, #12] 432 003c 1B68 ldr r3, [r3] 433 003e 384A ldr r2, .L28+16 434 0040 9342 cmp r3, r2 435 0042 04D0 beq .L21 436 .loc 1 378 3 discriminator 5 437 0044 4FF4BD71 mov r1, #378 438 0048 3648 ldr r0, .L28+20 439 004a FFF7FEFF bl assert_failed 440 .L21: 379:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* check the wake-up selection parameter */ 380:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** assert_param(IS_UART_WAKEUP_SELECTION(WakeUpSelection.WakeUpEvent)); 441 .loc 1 380 3 is_stmt 1 442 004e 7B68 ldr r3, [r7, #4] 443 0050 002B cmp r3, #0 444 0052 0CD0 beq .L22 445 .loc 1 380 3 is_stmt 0 discriminator 1 446 0054 7B68 ldr r3, [r7, #4] 447 0056 B3F5001F cmp r3, #2097152 448 005a 08D0 beq .L22 449 .loc 1 380 3 discriminator 2 450 005c 7B68 ldr r3, [r7, #4] 451 005e B3F5401F cmp r3, #3145728 452 0062 04D0 beq .L22 453 .loc 1 380 3 discriminator 3 454 0064 4FF4BE71 mov r1, #380 455 0068 2E48 ldr r0, .L28+20 456 006a FFF7FEFF bl assert_failed 457 .L22: 381:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 382:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Process Locked */ 383:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** __HAL_LOCK(huart); 458 .loc 1 383 3 is_stmt 1 459 006e FB68 ldr r3, [r7, #12] 460 0070 93F87830 ldrb r3, [r3, #120] @ zero_extendqisi2 461 0074 012B cmp r3, #1 462 0076 01D1 bne .L23 463 .loc 1 383 3 is_stmt 0 discriminator 1 464 0078 0223 movs r3, #2 465 007a 44E0 b .L24 466 .L23: 467 .loc 1 383 3 discriminator 2 468 007c FB68 ldr r3, [r7, #12] 469 007e 0122 movs r2, #1 470 0080 83F87820 strb r2, [r3, #120] 384:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 385:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->gState = HAL_UART_STATE_BUSY; 471 .loc 1 385 17 is_stmt 1 discriminator 2 472 0084 FB68 ldr r3, [r7, #12] ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 16 473 0086 2422 movs r2, #36 474 0088 DA67 str r2, [r3, #124] 386:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 387:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Disable the Peripheral */ 388:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** __HAL_UART_DISABLE(huart); 475 .loc 1 388 3 discriminator 2 476 008a FB68 ldr r3, [r7, #12] 477 008c 1B68 ldr r3, [r3] 478 008e 1A68 ldr r2, [r3] 479 0090 FB68 ldr r3, [r7, #12] 480 0092 1B68 ldr r3, [r3] 481 0094 22F00102 bic r2, r2, #1 482 0098 1A60 str r2, [r3] 389:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 390:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Set the wake-up selection scheme */ 391:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** MODIFY_REG(huart->Instance->CR3, USART_CR3_WUS, WakeUpSelection.WakeUpEvent); 483 .loc 1 391 3 discriminator 2 484 009a FB68 ldr r3, [r7, #12] 485 009c 1B68 ldr r3, [r3] 486 009e 9B68 ldr r3, [r3, #8] 487 00a0 23F44011 bic r1, r3, #3145728 488 00a4 7A68 ldr r2, [r7, #4] 489 00a6 FB68 ldr r3, [r7, #12] 490 00a8 1B68 ldr r3, [r3] 491 00aa 0A43 orrs r2, r2, r1 492 00ac 9A60 str r2, [r3, #8] 392:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 393:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (WakeUpSelection.WakeUpEvent == UART_WAKEUP_ON_ADDRESS) 493 .loc 1 393 22 discriminator 2 494 00ae 7B68 ldr r3, [r7, #4] 495 .loc 1 393 6 discriminator 2 496 00b0 002B cmp r3, #0 497 00b2 05D1 bne .L25 394:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { 395:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** UARTEx_Wakeup_AddressConfig(huart, WakeUpSelection); 498 .loc 1 395 5 499 00b4 3B1D adds r3, r7, #4 500 00b6 93E80600 ldm r3, {r1, r2} 501 00ba F868 ldr r0, [r7, #12] 502 00bc FFF7FEFF bl UARTEx_Wakeup_AddressConfig 503 .L25: 396:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } 397:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 398:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Enable the Peripheral */ 399:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** __HAL_UART_ENABLE(huart); 504 .loc 1 399 3 505 00c0 FB68 ldr r3, [r7, #12] 506 00c2 1B68 ldr r3, [r3] 507 00c4 1A68 ldr r2, [r3] 508 00c6 FB68 ldr r3, [r7, #12] 509 00c8 1B68 ldr r3, [r3] 510 00ca 42F00102 orr r2, r2, #1 511 00ce 1A60 str r2, [r3] 400:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 401:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Init tickstart for timeout management */ 402:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** tickstart = HAL_GetTick(); 512 .loc 1 402 15 ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 17 513 00d0 FFF7FEFF bl HAL_GetTick 514 00d4 3861 str r0, [r7, #16] 403:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 404:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Wait until REACK flag is set */ 405:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_REACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) 515 .loc 1 405 7 516 00d6 6FF07E43 mvn r3, #-33554432 517 00da 0093 str r3, [sp] 518 00dc 3B69 ldr r3, [r7, #16] 519 00de 0022 movs r2, #0 520 00e0 4FF48001 mov r1, #4194304 521 00e4 F868 ldr r0, [r7, #12] 522 00e6 FFF7FEFF bl UART_WaitOnFlagUntilTimeout 523 00ea 0346 mov r3, r0 524 .loc 1 405 6 525 00ec 002B cmp r3, #0 526 00ee 02D0 beq .L26 406:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { 407:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** status = HAL_TIMEOUT; 527 .loc 1 407 12 528 00f0 0323 movs r3, #3 529 00f2 FB75 strb r3, [r7, #23] 530 00f4 02E0 b .L27 531 .L26: 408:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } 409:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** else 410:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { 411:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Initialize the UART State */ 412:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->gState = HAL_UART_STATE_READY; 532 .loc 1 412 19 533 00f6 FB68 ldr r3, [r7, #12] 534 00f8 2022 movs r2, #32 535 00fa DA67 str r2, [r3, #124] 536 .L27: 413:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } 414:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 415:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Process Unlocked */ 416:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** __HAL_UNLOCK(huart); 537 .loc 1 416 3 538 00fc FB68 ldr r3, [r7, #12] 539 00fe 0022 movs r2, #0 540 0100 83F87820 strb r2, [r3, #120] 417:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 418:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return status; 541 .loc 1 418 10 542 0104 FB7D ldrb r3, [r7, #23] @ zero_extendqisi2 543 .L24: 419:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } 544 .loc 1 419 1 545 0106 1846 mov r0, r3 546 0108 1837 adds r7, r7, #24 547 .LCFI19: 548 .cfi_def_cfa_offset 8 549 010a BD46 mov sp, r7 550 .LCFI20: 551 .cfi_def_cfa_register 13 552 @ sp needed ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 18 553 010c 80BD pop {r7, pc} 554 .L29: 555 010e 00BF .align 2 556 .L28: 557 0110 00380140 .word 1073821696 558 0114 00440040 .word 1073759232 559 0118 00480040 .word 1073760256 560 011c 004C0040 .word 1073761280 561 0120 00500040 .word 1073762304 562 0124 00000000 .word .LC0 563 .cfi_endproc 564 .LFE133: 566 .section .text.HAL_UARTEx_EnableStopMode,"ax",%progbits 567 .align 1 568 .global HAL_UARTEx_EnableStopMode 569 .syntax unified 570 .thumb 571 .thumb_func 573 HAL_UARTEx_EnableStopMode: 574 .LFB134: 420:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 421:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** 422:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @brief Enable UART Stop Mode. 423:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @note The UART is able to wake up the MCU from Stop 1 mode as long as UART clock is HSI or LSE. 424:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param huart UART handle. 425:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @retval HAL status 426:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */ 427:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** HAL_StatusTypeDef HAL_UARTEx_EnableStopMode(UART_HandleTypeDef *huart) 428:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { 575 .loc 1 428 1 576 .cfi_startproc 577 @ args = 0, pretend = 0, frame = 32 578 @ frame_needed = 1, uses_anonymous_args = 0 579 @ link register save eliminated. 580 0000 80B4 push {r7} 581 .LCFI21: 582 .cfi_def_cfa_offset 4 583 .cfi_offset 7, -4 584 0002 89B0 sub sp, sp, #36 585 .LCFI22: 586 .cfi_def_cfa_offset 40 587 0004 00AF add r7, sp, #0 588 .LCFI23: 589 .cfi_def_cfa_register 7 590 0006 7860 str r0, [r7, #4] 429:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Process Locked */ 430:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** __HAL_LOCK(huart); 591 .loc 1 430 3 592 0008 7B68 ldr r3, [r7, #4] 593 000a 93F87830 ldrb r3, [r3, #120] @ zero_extendqisi2 594 000e 012B cmp r3, #1 595 0010 01D1 bne .L31 596 .loc 1 430 3 is_stmt 0 discriminator 1 597 0012 0223 movs r3, #2 598 0014 21E0 b .L32 599 .L31: 600 .loc 1 430 3 discriminator 2 ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 19 601 0016 7B68 ldr r3, [r7, #4] 602 0018 0122 movs r2, #1 603 001a 83F87820 strb r2, [r3, #120] 604 .L35: 605 .LBB22: 431:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 432:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Set UESM bit */ 433:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_UESM); 606 .loc 1 433 3 is_stmt 1 discriminator 1 607 001e 7B68 ldr r3, [r7, #4] 608 0020 1B68 ldr r3, [r3] 609 0022 FB60 str r3, [r7, #12] 610 .LBB23: 611 .LBB24: 612 .file 2 "Drivers/CMSIS/Include/cmsis_gcc.h" 1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//** 2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h 3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file 4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.0.4 5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 09. April 2018 6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/ 7:Drivers/CMSIS/Include/cmsis_gcc.h **** /* 8:Drivers/CMSIS/Include/cmsis_gcc.h **** * Copyright (c) 2009-2018 Arm Limited. All rights reserved. 9:Drivers/CMSIS/Include/cmsis_gcc.h **** * 10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0 11:Drivers/CMSIS/Include/cmsis_gcc.h **** * 12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may 13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License. 14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at 15:Drivers/CMSIS/Include/cmsis_gcc.h **** * 16:Drivers/CMSIS/Include/cmsis_gcc.h **** * www.apache.org/licenses/LICENSE-2.0 17:Drivers/CMSIS/Include/cmsis_gcc.h **** * 18:Drivers/CMSIS/Include/cmsis_gcc.h **** * Unless required by applicable law or agreed to in writing, software 19:Drivers/CMSIS/Include/cmsis_gcc.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT 20:Drivers/CMSIS/Include/cmsis_gcc.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 21:Drivers/CMSIS/Include/cmsis_gcc.h **** * See the License for the specific language governing permissions and 22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License. 23:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 24:Drivers/CMSIS/Include/cmsis_gcc.h **** 25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H 26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H 27:Drivers/CMSIS/Include/cmsis_gcc.h **** 28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */ 29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion" 31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion" 32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter" 33:Drivers/CMSIS/Include/cmsis_gcc.h **** 34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */ 35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin 36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __has_builtin(x) (0) 37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 38:Drivers/CMSIS/Include/cmsis_gcc.h **** 39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */ 40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ASM 41:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ASM __asm 42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 20 43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INLINE 44:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INLINE inline 45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_INLINE 47:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_INLINE static inline 48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_FORCEINLINE 50:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline 51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __NO_RETURN 53:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NO_RETURN __attribute__((__noreturn__)) 54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __USED 56:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USED __attribute__((used)) 57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK 59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak)) 60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED 62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1))) 63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_STRUCT 65:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) 66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION 68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1))) 69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */ 71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 72:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 73:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 74:Drivers/CMSIS/Include/cmsis_gcc.h **** struct __attribute__((packed)) T_UINT32 { uint32_t v; }; 75:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 76:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) 77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_WRITE 79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 80:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 81:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 82:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; 83:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 84:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))- 85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ 87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 90:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; 91:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 92:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(add 93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_WRITE 95:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 96:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 97:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 98:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; 99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 21 100:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))- 101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_READ 103:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push 104:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" 105:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" 106:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; 107:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop 108:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(add 109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ALIGNED 111:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ALIGNED(x) __attribute__((aligned(x))) 112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __RESTRICT 114:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __RESTRICT __restrict 115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 116:Drivers/CMSIS/Include/cmsis_gcc.h **** 117:Drivers/CMSIS/Include/cmsis_gcc.h **** 118:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */ 119:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface 120:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions 121:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ 122:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 123:Drivers/CMSIS/Include/cmsis_gcc.h **** 124:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts 126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR. 127:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 128:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 129:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void) 130:Drivers/CMSIS/Include/cmsis_gcc.h **** { 131:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie i" : : : "memory"); 132:Drivers/CMSIS/Include/cmsis_gcc.h **** } 133:Drivers/CMSIS/Include/cmsis_gcc.h **** 134:Drivers/CMSIS/Include/cmsis_gcc.h **** 135:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 136:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts 137:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR. 138:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 139:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 140:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void) 141:Drivers/CMSIS/Include/cmsis_gcc.h **** { 142:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory"); 143:Drivers/CMSIS/Include/cmsis_gcc.h **** } 144:Drivers/CMSIS/Include/cmsis_gcc.h **** 145:Drivers/CMSIS/Include/cmsis_gcc.h **** 146:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 147:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register 148:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the Control Register. 149:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Control Register value 150:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 151:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_CONTROL(void) 152:Drivers/CMSIS/Include/cmsis_gcc.h **** { 153:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 154:Drivers/CMSIS/Include/cmsis_gcc.h **** 155:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control" : "=r" (result) ); 156:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 22 157:Drivers/CMSIS/Include/cmsis_gcc.h **** } 158:Drivers/CMSIS/Include/cmsis_gcc.h **** 159:Drivers/CMSIS/Include/cmsis_gcc.h **** 160:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 161:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 162:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register (non-secure) 163:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the non-secure Control Register when in secure mode. 164:Drivers/CMSIS/Include/cmsis_gcc.h **** \return non-secure Control Register value 165:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 166:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void) 167:Drivers/CMSIS/Include/cmsis_gcc.h **** { 168:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 169:Drivers/CMSIS/Include/cmsis_gcc.h **** 170:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control_ns" : "=r" (result) ); 171:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 172:Drivers/CMSIS/Include/cmsis_gcc.h **** } 173:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 174:Drivers/CMSIS/Include/cmsis_gcc.h **** 175:Drivers/CMSIS/Include/cmsis_gcc.h **** 176:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 177:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register 178:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the Control Register. 179:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set 180:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 181:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control) 182:Drivers/CMSIS/Include/cmsis_gcc.h **** { 183:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control, %0" : : "r" (control) : "memory"); 184:Drivers/CMSIS/Include/cmsis_gcc.h **** } 185:Drivers/CMSIS/Include/cmsis_gcc.h **** 186:Drivers/CMSIS/Include/cmsis_gcc.h **** 187:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 188:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 189:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register (non-secure) 190:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the non-secure Control Register when in secure state. 191:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set 192:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 193:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control) 194:Drivers/CMSIS/Include/cmsis_gcc.h **** { 195:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory"); 196:Drivers/CMSIS/Include/cmsis_gcc.h **** } 197:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 198:Drivers/CMSIS/Include/cmsis_gcc.h **** 199:Drivers/CMSIS/Include/cmsis_gcc.h **** 200:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 201:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get IPSR Register 202:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the IPSR Register. 203:Drivers/CMSIS/Include/cmsis_gcc.h **** \return IPSR Register value 204:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 205:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_IPSR(void) 206:Drivers/CMSIS/Include/cmsis_gcc.h **** { 207:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 208:Drivers/CMSIS/Include/cmsis_gcc.h **** 209:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); 210:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 211:Drivers/CMSIS/Include/cmsis_gcc.h **** } 212:Drivers/CMSIS/Include/cmsis_gcc.h **** 213:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 23 214:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 215:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get APSR Register 216:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the APSR Register. 217:Drivers/CMSIS/Include/cmsis_gcc.h **** \return APSR Register value 218:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 219:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_APSR(void) 220:Drivers/CMSIS/Include/cmsis_gcc.h **** { 221:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 222:Drivers/CMSIS/Include/cmsis_gcc.h **** 223:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, apsr" : "=r" (result) ); 224:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 225:Drivers/CMSIS/Include/cmsis_gcc.h **** } 226:Drivers/CMSIS/Include/cmsis_gcc.h **** 227:Drivers/CMSIS/Include/cmsis_gcc.h **** 228:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 229:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get xPSR Register 230:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the xPSR Register. 231:Drivers/CMSIS/Include/cmsis_gcc.h **** \return xPSR Register value 232:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 233:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_xPSR(void) 234:Drivers/CMSIS/Include/cmsis_gcc.h **** { 235:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 236:Drivers/CMSIS/Include/cmsis_gcc.h **** 237:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, xpsr" : "=r" (result) ); 238:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 239:Drivers/CMSIS/Include/cmsis_gcc.h **** } 240:Drivers/CMSIS/Include/cmsis_gcc.h **** 241:Drivers/CMSIS/Include/cmsis_gcc.h **** 242:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 243:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer 244:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer (PSP). 245:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value 246:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 247:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSP(void) 248:Drivers/CMSIS/Include/cmsis_gcc.h **** { 249:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 250:Drivers/CMSIS/Include/cmsis_gcc.h **** 251:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp" : "=r" (result) ); 252:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 253:Drivers/CMSIS/Include/cmsis_gcc.h **** } 254:Drivers/CMSIS/Include/cmsis_gcc.h **** 255:Drivers/CMSIS/Include/cmsis_gcc.h **** 256:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 257:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 258:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer (non-secure) 259:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure s 260:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value 261:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 262:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void) 263:Drivers/CMSIS/Include/cmsis_gcc.h **** { 264:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 265:Drivers/CMSIS/Include/cmsis_gcc.h **** 266:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp_ns" : "=r" (result) ); 267:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 268:Drivers/CMSIS/Include/cmsis_gcc.h **** } 269:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 270:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 24 271:Drivers/CMSIS/Include/cmsis_gcc.h **** 272:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 273:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer 274:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer (PSP). 275:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set 276:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 277:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack) 278:Drivers/CMSIS/Include/cmsis_gcc.h **** { 279:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : ); 280:Drivers/CMSIS/Include/cmsis_gcc.h **** } 281:Drivers/CMSIS/Include/cmsis_gcc.h **** 282:Drivers/CMSIS/Include/cmsis_gcc.h **** 283:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 284:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 285:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) 286:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure sta 287:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set 288:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 289:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack) 290:Drivers/CMSIS/Include/cmsis_gcc.h **** { 291:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : ); 292:Drivers/CMSIS/Include/cmsis_gcc.h **** } 293:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 294:Drivers/CMSIS/Include/cmsis_gcc.h **** 295:Drivers/CMSIS/Include/cmsis_gcc.h **** 296:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 297:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer 298:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer (MSP). 299:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value 300:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 301:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSP(void) 302:Drivers/CMSIS/Include/cmsis_gcc.h **** { 303:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 304:Drivers/CMSIS/Include/cmsis_gcc.h **** 305:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp" : "=r" (result) ); 306:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 307:Drivers/CMSIS/Include/cmsis_gcc.h **** } 308:Drivers/CMSIS/Include/cmsis_gcc.h **** 309:Drivers/CMSIS/Include/cmsis_gcc.h **** 310:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 311:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 312:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer (non-secure) 313:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure stat 314:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value 315:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 316:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void) 317:Drivers/CMSIS/Include/cmsis_gcc.h **** { 318:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 319:Drivers/CMSIS/Include/cmsis_gcc.h **** 320:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp_ns" : "=r" (result) ); 321:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 322:Drivers/CMSIS/Include/cmsis_gcc.h **** } 323:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 324:Drivers/CMSIS/Include/cmsis_gcc.h **** 325:Drivers/CMSIS/Include/cmsis_gcc.h **** 326:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 327:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 25 328:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer (MSP). 329:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set 330:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 331:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack) 332:Drivers/CMSIS/Include/cmsis_gcc.h **** { 333:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : ); 334:Drivers/CMSIS/Include/cmsis_gcc.h **** } 335:Drivers/CMSIS/Include/cmsis_gcc.h **** 336:Drivers/CMSIS/Include/cmsis_gcc.h **** 337:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 338:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 339:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer (non-secure) 340:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state. 341:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set 342:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 343:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack) 344:Drivers/CMSIS/Include/cmsis_gcc.h **** { 345:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : ); 346:Drivers/CMSIS/Include/cmsis_gcc.h **** } 347:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 348:Drivers/CMSIS/Include/cmsis_gcc.h **** 349:Drivers/CMSIS/Include/cmsis_gcc.h **** 350:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 351:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 352:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Stack Pointer (non-secure) 353:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state. 354:Drivers/CMSIS/Include/cmsis_gcc.h **** \return SP Register value 355:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 356:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void) 357:Drivers/CMSIS/Include/cmsis_gcc.h **** { 358:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 359:Drivers/CMSIS/Include/cmsis_gcc.h **** 360:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, sp_ns" : "=r" (result) ); 361:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 362:Drivers/CMSIS/Include/cmsis_gcc.h **** } 363:Drivers/CMSIS/Include/cmsis_gcc.h **** 364:Drivers/CMSIS/Include/cmsis_gcc.h **** 365:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 366:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Stack Pointer (non-secure) 367:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state. 368:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfStack Stack Pointer value to set 369:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 370:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack) 371:Drivers/CMSIS/Include/cmsis_gcc.h **** { 372:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : ); 373:Drivers/CMSIS/Include/cmsis_gcc.h **** } 374:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 375:Drivers/CMSIS/Include/cmsis_gcc.h **** 376:Drivers/CMSIS/Include/cmsis_gcc.h **** 377:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 378:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask 379:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the priority mask bit from the Priority Mask Register. 380:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value 381:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 382:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void) 383:Drivers/CMSIS/Include/cmsis_gcc.h **** { 384:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 26 385:Drivers/CMSIS/Include/cmsis_gcc.h **** 386:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); 387:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 388:Drivers/CMSIS/Include/cmsis_gcc.h **** } 389:Drivers/CMSIS/Include/cmsis_gcc.h **** 390:Drivers/CMSIS/Include/cmsis_gcc.h **** 391:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 392:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 393:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask (non-secure) 394:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the non-secure priority mask bit from the Priority Mask Reg 395:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value 396:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 397:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void) 398:Drivers/CMSIS/Include/cmsis_gcc.h **** { 399:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 400:Drivers/CMSIS/Include/cmsis_gcc.h **** 401:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory"); 402:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 403:Drivers/CMSIS/Include/cmsis_gcc.h **** } 404:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 405:Drivers/CMSIS/Include/cmsis_gcc.h **** 406:Drivers/CMSIS/Include/cmsis_gcc.h **** 407:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 408:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask 409:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Priority Mask Register. 410:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask 411:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 412:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask) 413:Drivers/CMSIS/Include/cmsis_gcc.h **** { 414:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); 415:Drivers/CMSIS/Include/cmsis_gcc.h **** } 416:Drivers/CMSIS/Include/cmsis_gcc.h **** 417:Drivers/CMSIS/Include/cmsis_gcc.h **** 418:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 419:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 420:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask (non-secure) 421:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Priority Mask Register when in secure state. 422:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask 423:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 424:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask) 425:Drivers/CMSIS/Include/cmsis_gcc.h **** { 426:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory"); 427:Drivers/CMSIS/Include/cmsis_gcc.h **** } 428:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 429:Drivers/CMSIS/Include/cmsis_gcc.h **** 430:Drivers/CMSIS/Include/cmsis_gcc.h **** 431:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 432:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 433:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) 434:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 435:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable FIQ 436:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables FIQ interrupts by clearing the F-bit in the CPSR. 437:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 438:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 439:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_fault_irq(void) 440:Drivers/CMSIS/Include/cmsis_gcc.h **** { 441:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie f" : : : "memory"); ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 27 442:Drivers/CMSIS/Include/cmsis_gcc.h **** } 443:Drivers/CMSIS/Include/cmsis_gcc.h **** 444:Drivers/CMSIS/Include/cmsis_gcc.h **** 445:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 446:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable FIQ 447:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables FIQ interrupts by setting the F-bit in the CPSR. 448:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. 449:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 450:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_fault_irq(void) 451:Drivers/CMSIS/Include/cmsis_gcc.h **** { 452:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid f" : : : "memory"); 453:Drivers/CMSIS/Include/cmsis_gcc.h **** } 454:Drivers/CMSIS/Include/cmsis_gcc.h **** 455:Drivers/CMSIS/Include/cmsis_gcc.h **** 456:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 457:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority 458:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Base Priority register. 459:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value 460:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 461:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void) 462:Drivers/CMSIS/Include/cmsis_gcc.h **** { 463:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 464:Drivers/CMSIS/Include/cmsis_gcc.h **** 465:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri" : "=r" (result) ); 466:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 467:Drivers/CMSIS/Include/cmsis_gcc.h **** } 468:Drivers/CMSIS/Include/cmsis_gcc.h **** 469:Drivers/CMSIS/Include/cmsis_gcc.h **** 470:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 471:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 472:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority (non-secure) 473:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Base Priority register when in secure state. 474:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value 475:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 476:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void) 477:Drivers/CMSIS/Include/cmsis_gcc.h **** { 478:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 479:Drivers/CMSIS/Include/cmsis_gcc.h **** 480:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) ); 481:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 482:Drivers/CMSIS/Include/cmsis_gcc.h **** } 483:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 484:Drivers/CMSIS/Include/cmsis_gcc.h **** 485:Drivers/CMSIS/Include/cmsis_gcc.h **** 486:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 487:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority 488:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register. 489:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set 490:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 491:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri) 492:Drivers/CMSIS/Include/cmsis_gcc.h **** { 493:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory"); 494:Drivers/CMSIS/Include/cmsis_gcc.h **** } 495:Drivers/CMSIS/Include/cmsis_gcc.h **** 496:Drivers/CMSIS/Include/cmsis_gcc.h **** 497:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 498:Drivers/CMSIS/Include/cmsis_gcc.h **** /** ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 28 499:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority (non-secure) 500:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Base Priority register when in secure state. 501:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set 502:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 503:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri) 504:Drivers/CMSIS/Include/cmsis_gcc.h **** { 505:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory"); 506:Drivers/CMSIS/Include/cmsis_gcc.h **** } 507:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 508:Drivers/CMSIS/Include/cmsis_gcc.h **** 509:Drivers/CMSIS/Include/cmsis_gcc.h **** 510:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 511:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority with condition 512:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register only if BASEPRI masking is disable 513:Drivers/CMSIS/Include/cmsis_gcc.h **** or the new value increases the BASEPRI priority level. 514:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set 515:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 516:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri) 517:Drivers/CMSIS/Include/cmsis_gcc.h **** { 518:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory"); 519:Drivers/CMSIS/Include/cmsis_gcc.h **** } 520:Drivers/CMSIS/Include/cmsis_gcc.h **** 521:Drivers/CMSIS/Include/cmsis_gcc.h **** 522:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 523:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask 524:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Fault Mask register. 525:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value 526:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 527:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void) 528:Drivers/CMSIS/Include/cmsis_gcc.h **** { 529:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 530:Drivers/CMSIS/Include/cmsis_gcc.h **** 531:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); 532:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 533:Drivers/CMSIS/Include/cmsis_gcc.h **** } 534:Drivers/CMSIS/Include/cmsis_gcc.h **** 535:Drivers/CMSIS/Include/cmsis_gcc.h **** 536:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 537:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 538:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask (non-secure) 539:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Fault Mask register when in secure state. 540:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value 541:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 542:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void) 543:Drivers/CMSIS/Include/cmsis_gcc.h **** { 544:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 545:Drivers/CMSIS/Include/cmsis_gcc.h **** 546:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) ); 547:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 548:Drivers/CMSIS/Include/cmsis_gcc.h **** } 549:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 550:Drivers/CMSIS/Include/cmsis_gcc.h **** 551:Drivers/CMSIS/Include/cmsis_gcc.h **** 552:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 553:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask 554:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Fault Mask register. 555:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 29 556:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 557:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask) 558:Drivers/CMSIS/Include/cmsis_gcc.h **** { 559:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory"); 560:Drivers/CMSIS/Include/cmsis_gcc.h **** } 561:Drivers/CMSIS/Include/cmsis_gcc.h **** 562:Drivers/CMSIS/Include/cmsis_gcc.h **** 563:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 564:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 565:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask (non-secure) 566:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Fault Mask register when in secure state. 567:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set 568:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 569:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask) 570:Drivers/CMSIS/Include/cmsis_gcc.h **** { 571:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory"); 572:Drivers/CMSIS/Include/cmsis_gcc.h **** } 573:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 574:Drivers/CMSIS/Include/cmsis_gcc.h **** 575:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 576:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 577:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ 578:Drivers/CMSIS/Include/cmsis_gcc.h **** 579:Drivers/CMSIS/Include/cmsis_gcc.h **** 580:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ 581:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) 582:Drivers/CMSIS/Include/cmsis_gcc.h **** 583:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 584:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit 585:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 586:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure 587:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 588:Drivers/CMSIS/Include/cmsis_gcc.h **** 589:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer Limit (PSPLIM). 590:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value 591:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 592:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void) 593:Drivers/CMSIS/Include/cmsis_gcc.h **** { 594:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 595:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) 596:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 597:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 598:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 599:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 600:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim" : "=r" (result) ); 601:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 602:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 603:Drivers/CMSIS/Include/cmsis_gcc.h **** } 604:Drivers/CMSIS/Include/cmsis_gcc.h **** 605:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)) 606:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 607:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit (non-secure) 608:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 609:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. 610:Drivers/CMSIS/Include/cmsis_gcc.h **** 611:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in 612:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 30 613:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 614:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void) 615:Drivers/CMSIS/Include/cmsis_gcc.h **** { 616:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 617:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 618:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 619:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 620:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 621:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) ); 622:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 623:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 624:Drivers/CMSIS/Include/cmsis_gcc.h **** } 625:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 626:Drivers/CMSIS/Include/cmsis_gcc.h **** 627:Drivers/CMSIS/Include/cmsis_gcc.h **** 628:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 629:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer Limit 630:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 631:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure 632:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 633:Drivers/CMSIS/Include/cmsis_gcc.h **** 634:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM). 635:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set 636:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 637:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit) 638:Drivers/CMSIS/Include/cmsis_gcc.h **** { 639:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 640:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) 641:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 642:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; 643:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 644:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit)); 645:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 646:Drivers/CMSIS/Include/cmsis_gcc.h **** } 647:Drivers/CMSIS/Include/cmsis_gcc.h **** 648:Drivers/CMSIS/Include/cmsis_gcc.h **** 649:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 650:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 651:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) 652:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 653:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. 654:Drivers/CMSIS/Include/cmsis_gcc.h **** 655:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in s 656:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set 657:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 658:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit) 659:Drivers/CMSIS/Include/cmsis_gcc.h **** { 660:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 661:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI 662:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; 663:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 664:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit)); 665:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 666:Drivers/CMSIS/Include/cmsis_gcc.h **** } 667:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 668:Drivers/CMSIS/Include/cmsis_gcc.h **** 669:Drivers/CMSIS/Include/cmsis_gcc.h **** ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 31 670:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 671:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit 672:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 673:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure 674:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 675:Drivers/CMSIS/Include/cmsis_gcc.h **** 676:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer Limit (MSPLIM). 677:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value 678:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 679:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void) 680:Drivers/CMSIS/Include/cmsis_gcc.h **** { 681:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 682:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) 683:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 684:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 685:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 686:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 687:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim" : "=r" (result) ); 688:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 689:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 690:Drivers/CMSIS/Include/cmsis_gcc.h **** } 691:Drivers/CMSIS/Include/cmsis_gcc.h **** 692:Drivers/CMSIS/Include/cmsis_gcc.h **** 693:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 694:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 695:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit (non-secure) 696:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 697:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. 698:Drivers/CMSIS/Include/cmsis_gcc.h **** 699:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in sec 700:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value 701:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 702:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void) 703:Drivers/CMSIS/Include/cmsis_gcc.h **** { 704:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 705:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 706:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; 707:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 708:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 709:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) ); 710:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 711:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 712:Drivers/CMSIS/Include/cmsis_gcc.h **** } 713:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 714:Drivers/CMSIS/Include/cmsis_gcc.h **** 715:Drivers/CMSIS/Include/cmsis_gcc.h **** 716:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 717:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit 718:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 719:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure 720:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. 721:Drivers/CMSIS/Include/cmsis_gcc.h **** 722:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM). 723:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set 724:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 725:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit) 726:Drivers/CMSIS/Include/cmsis_gcc.h **** { ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 32 727:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 728:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) 729:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 730:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; 731:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 732:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit)); 733:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 734:Drivers/CMSIS/Include/cmsis_gcc.h **** } 735:Drivers/CMSIS/Include/cmsis_gcc.h **** 736:Drivers/CMSIS/Include/cmsis_gcc.h **** 737:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 738:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 739:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit (non-secure) 740:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 741:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. 742:Drivers/CMSIS/Include/cmsis_gcc.h **** 743:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secu 744:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer value to set 745:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 746:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit) 747:Drivers/CMSIS/Include/cmsis_gcc.h **** { 748:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) 749:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 750:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; 751:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 752:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit)); 753:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 754:Drivers/CMSIS/Include/cmsis_gcc.h **** } 755:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 756:Drivers/CMSIS/Include/cmsis_gcc.h **** 757:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ 758:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */ 759:Drivers/CMSIS/Include/cmsis_gcc.h **** 760:Drivers/CMSIS/Include/cmsis_gcc.h **** 761:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 762:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get FPSCR 763:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Floating Point Status/Control register. 764:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Floating Point Status/Control register value 765:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 766:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FPSCR(void) 767:Drivers/CMSIS/Include/cmsis_gcc.h **** { 768:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ 769:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) 770:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_get_fpscr) 771:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed 772:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) 773:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ 774:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_arm_get_fpscr(); 775:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 776:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 777:Drivers/CMSIS/Include/cmsis_gcc.h **** 778:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMRS %0, fpscr" : "=r" (result) ); 779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 780:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 781:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 782:Drivers/CMSIS/Include/cmsis_gcc.h **** return(0U); 783:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 33 784:Drivers/CMSIS/Include/cmsis_gcc.h **** } 785:Drivers/CMSIS/Include/cmsis_gcc.h **** 786:Drivers/CMSIS/Include/cmsis_gcc.h **** 787:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 788:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set FPSCR 789:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Floating Point Status/Control register. 790:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] fpscr Floating Point Status/Control value to set 791:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 792:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr) 793:Drivers/CMSIS/Include/cmsis_gcc.h **** { 794:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ 795:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) 796:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_set_fpscr) 797:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed 798:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) 799:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ 800:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_arm_set_fpscr(fpscr); 801:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 802:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory"); 803:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 804:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 805:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)fpscr; 806:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 807:Drivers/CMSIS/Include/cmsis_gcc.h **** } 808:Drivers/CMSIS/Include/cmsis_gcc.h **** 809:Drivers/CMSIS/Include/cmsis_gcc.h **** 810:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@} end of CMSIS_Core_RegAccFunctions */ 811:Drivers/CMSIS/Include/cmsis_gcc.h **** 812:Drivers/CMSIS/Include/cmsis_gcc.h **** 813:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################## Core Instruction Access ######################### */ 814:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface 815:Drivers/CMSIS/Include/cmsis_gcc.h **** Access to dedicated instructions 816:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ 817:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 818:Drivers/CMSIS/Include/cmsis_gcc.h **** 819:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Define macros for porting to both thumb1 and thumb2. 820:Drivers/CMSIS/Include/cmsis_gcc.h **** * For thumb1, use low register (r0-r7), specified by constraint "l" 821:Drivers/CMSIS/Include/cmsis_gcc.h **** * Otherwise, use general registers, specified by constraint "r" */ 822:Drivers/CMSIS/Include/cmsis_gcc.h **** #if defined (__thumb__) && !defined (__thumb2__) 823:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=l" (r) 824:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+l" (r) 825:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "l" (r) 826:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 827:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=r" (r) 828:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+r" (r) 829:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "r" (r) 830:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 831:Drivers/CMSIS/Include/cmsis_gcc.h **** 832:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 833:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief No Operation 834:Drivers/CMSIS/Include/cmsis_gcc.h **** \details No Operation does nothing. This instruction can be used for code alignment purposes. 835:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 836:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NOP() __ASM volatile ("nop") 837:Drivers/CMSIS/Include/cmsis_gcc.h **** 838:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 839:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Interrupt 840:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Interrupt is a hint instruction that suspends execution until one of a number o ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 34 841:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 842:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFI() __ASM volatile ("wfi") 843:Drivers/CMSIS/Include/cmsis_gcc.h **** 844:Drivers/CMSIS/Include/cmsis_gcc.h **** 845:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 846:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Event 847:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Event is a hint instruction that permits the processor to enter 848:Drivers/CMSIS/Include/cmsis_gcc.h **** a low-power state until one of a number of events occurs. 849:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 850:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFE() __ASM volatile ("wfe") 851:Drivers/CMSIS/Include/cmsis_gcc.h **** 852:Drivers/CMSIS/Include/cmsis_gcc.h **** 853:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 854:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Send Event 855:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Send Event is a hint instruction. It causes an event to be signaled to the CPU. 856:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 857:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SEV() __ASM volatile ("sev") 858:Drivers/CMSIS/Include/cmsis_gcc.h **** 859:Drivers/CMSIS/Include/cmsis_gcc.h **** 860:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 861:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Instruction Synchronization Barrier 862:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Instruction Synchronization Barrier flushes the pipeline in the processor, 863:Drivers/CMSIS/Include/cmsis_gcc.h **** so that all instructions following the ISB are fetched from cache or memory, 864:Drivers/CMSIS/Include/cmsis_gcc.h **** after the instruction has been completed. 865:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 866:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __ISB(void) 867:Drivers/CMSIS/Include/cmsis_gcc.h **** { 868:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("isb 0xF":::"memory"); 869:Drivers/CMSIS/Include/cmsis_gcc.h **** } 870:Drivers/CMSIS/Include/cmsis_gcc.h **** 871:Drivers/CMSIS/Include/cmsis_gcc.h **** 872:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 873:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Synchronization Barrier 874:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Acts as a special kind of Data Memory Barrier. 875:Drivers/CMSIS/Include/cmsis_gcc.h **** It completes when all explicit memory accesses before this instruction complete. 876:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 877:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DSB(void) 878:Drivers/CMSIS/Include/cmsis_gcc.h **** { 879:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dsb 0xF":::"memory"); 880:Drivers/CMSIS/Include/cmsis_gcc.h **** } 881:Drivers/CMSIS/Include/cmsis_gcc.h **** 882:Drivers/CMSIS/Include/cmsis_gcc.h **** 883:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 884:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Memory Barrier 885:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Ensures the apparent order of the explicit memory operations before 886:Drivers/CMSIS/Include/cmsis_gcc.h **** and after the instruction, without ensuring their completion. 887:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 888:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DMB(void) 889:Drivers/CMSIS/Include/cmsis_gcc.h **** { 890:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dmb 0xF":::"memory"); 891:Drivers/CMSIS/Include/cmsis_gcc.h **** } 892:Drivers/CMSIS/Include/cmsis_gcc.h **** 893:Drivers/CMSIS/Include/cmsis_gcc.h **** 894:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 895:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (32 bit) 896:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x785 897:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 35 898:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 899:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 900:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV(uint32_t value) 901:Drivers/CMSIS/Include/cmsis_gcc.h **** { 902:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5) 903:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_bswap32(value); 904:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 905:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 906:Drivers/CMSIS/Include/cmsis_gcc.h **** 907:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); 908:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 909:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 910:Drivers/CMSIS/Include/cmsis_gcc.h **** } 911:Drivers/CMSIS/Include/cmsis_gcc.h **** 912:Drivers/CMSIS/Include/cmsis_gcc.h **** 913:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 914:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit) 915:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 916:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 917:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 918:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 919:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV16(uint32_t value) 920:Drivers/CMSIS/Include/cmsis_gcc.h **** { 921:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 922:Drivers/CMSIS/Include/cmsis_gcc.h **** 923:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); 924:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 925:Drivers/CMSIS/Include/cmsis_gcc.h **** } 926:Drivers/CMSIS/Include/cmsis_gcc.h **** 927:Drivers/CMSIS/Include/cmsis_gcc.h **** 928:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 929:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit) 930:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For exam 931:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 932:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 933:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 934:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE int16_t __REVSH(int16_t value) 935:Drivers/CMSIS/Include/cmsis_gcc.h **** { 936:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) 937:Drivers/CMSIS/Include/cmsis_gcc.h **** return (int16_t)__builtin_bswap16(value); 938:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 939:Drivers/CMSIS/Include/cmsis_gcc.h **** int16_t result; 940:Drivers/CMSIS/Include/cmsis_gcc.h **** 941:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) ); 942:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 943:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 944:Drivers/CMSIS/Include/cmsis_gcc.h **** } 945:Drivers/CMSIS/Include/cmsis_gcc.h **** 946:Drivers/CMSIS/Include/cmsis_gcc.h **** 947:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 948:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Rotate Right in unsigned value (32 bit) 949:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Rotate Right (immediate) provides the value of the contents of a register rotated by a v 950:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op1 Value to rotate 951:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op2 Number of Bits to rotate 952:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Rotated value 953:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 954:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 36 955:Drivers/CMSIS/Include/cmsis_gcc.h **** { 956:Drivers/CMSIS/Include/cmsis_gcc.h **** op2 %= 32U; 957:Drivers/CMSIS/Include/cmsis_gcc.h **** if (op2 == 0U) 958:Drivers/CMSIS/Include/cmsis_gcc.h **** { 959:Drivers/CMSIS/Include/cmsis_gcc.h **** return op1; 960:Drivers/CMSIS/Include/cmsis_gcc.h **** } 961:Drivers/CMSIS/Include/cmsis_gcc.h **** return (op1 >> op2) | (op1 << (32U - op2)); 962:Drivers/CMSIS/Include/cmsis_gcc.h **** } 963:Drivers/CMSIS/Include/cmsis_gcc.h **** 964:Drivers/CMSIS/Include/cmsis_gcc.h **** 965:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 966:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Breakpoint 967:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Causes the processor to enter Debug state. 968:Drivers/CMSIS/Include/cmsis_gcc.h **** Debug tools can use this to investigate system state when the instruction at a particula 969:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value is ignored by the processor. 970:Drivers/CMSIS/Include/cmsis_gcc.h **** If required, a debugger can use it to store additional information about the break 971:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 972:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __BKPT(value) __ASM volatile ("bkpt "#value) 973:Drivers/CMSIS/Include/cmsis_gcc.h **** 974:Drivers/CMSIS/Include/cmsis_gcc.h **** 975:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 976:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse bit order of value 977:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the bit order of the given value. 978:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse 979:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value 980:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 981:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value) 982:Drivers/CMSIS/Include/cmsis_gcc.h **** { 983:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 984:Drivers/CMSIS/Include/cmsis_gcc.h **** 985:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 986:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 987:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) 988:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) ); 989:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 990:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */ 991:Drivers/CMSIS/Include/cmsis_gcc.h **** 992:Drivers/CMSIS/Include/cmsis_gcc.h **** result = value; /* r will be reversed bits of v; first get LSB of v */ 993:Drivers/CMSIS/Include/cmsis_gcc.h **** for (value >>= 1U; value != 0U; value >>= 1U) 994:Drivers/CMSIS/Include/cmsis_gcc.h **** { 995:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= 1U; 996:Drivers/CMSIS/Include/cmsis_gcc.h **** result |= value & 1U; 997:Drivers/CMSIS/Include/cmsis_gcc.h **** s--; 998:Drivers/CMSIS/Include/cmsis_gcc.h **** } 999:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= s; /* shift when v's highest bits are zero */ 1000:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 1001:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 1002:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1003:Drivers/CMSIS/Include/cmsis_gcc.h **** 1004:Drivers/CMSIS/Include/cmsis_gcc.h **** 1005:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1006:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Count leading zeros 1007:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Counts the number of leading zeros of a data value. 1008:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to count the leading zeros 1009:Drivers/CMSIS/Include/cmsis_gcc.h **** \return number of leading zeros in value 1010:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1011:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CLZ (uint8_t)__builtin_clz ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 37 1012:Drivers/CMSIS/Include/cmsis_gcc.h **** 1013:Drivers/CMSIS/Include/cmsis_gcc.h **** 1014:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ 1015:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ 1016:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ 1017:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) 1018:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1019:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDR Exclusive (8 bit) 1020:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive LDR instruction for 8 bit value. 1021:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 1022:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint8_t at (*ptr) 1023:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1024:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __LDREXB(volatile uint8_t *addr) 1025:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1026:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1027:Drivers/CMSIS/Include/cmsis_gcc.h **** 1028:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) 1029:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) ); 1030:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1031:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not 1032:Drivers/CMSIS/Include/cmsis_gcc.h **** accepted by assembler. So has to use following less efficient pattern. 1033:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1034:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" ); 1035:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 1036:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint8_t) result); /* Add explicit type cast here */ 1037:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1038:Drivers/CMSIS/Include/cmsis_gcc.h **** 1039:Drivers/CMSIS/Include/cmsis_gcc.h **** 1040:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1041:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDR Exclusive (16 bit) 1042:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive LDR instruction for 16 bit values. 1043:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 1044:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint16_t at (*ptr) 1045:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1046:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint16_t __LDREXH(volatile uint16_t *addr) 1047:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1048:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1049:Drivers/CMSIS/Include/cmsis_gcc.h **** 1050:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) 1051:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) ); 1052:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 1053:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not 1054:Drivers/CMSIS/Include/cmsis_gcc.h **** accepted by assembler. So has to use following less efficient pattern. 1055:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1056:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" ); 1057:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 1058:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint16_t) result); /* Add explicit type cast here */ 1059:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1060:Drivers/CMSIS/Include/cmsis_gcc.h **** 1061:Drivers/CMSIS/Include/cmsis_gcc.h **** 1062:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1063:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDR Exclusive (32 bit) 1064:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive LDR instruction for 32 bit values. 1065:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data 1066:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint32_t at (*ptr) 1067:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr) ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 38 1069:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1070:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1071:Drivers/CMSIS/Include/cmsis_gcc.h **** 1072:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 613 .loc 2 1072 4 discriminator 1 614 0024 FB68 ldr r3, [r7, #12] 615 .syntax unified 616 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 617 0026 53E8003F ldrex r3, [r3] 618 @ 0 "" 2 619 .thumb 620 .syntax unified 621 002a BB60 str r3, [r7, #8] 1073:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 622 .loc 2 1073 10 discriminator 1 623 002c BB68 ldr r3, [r7, #8] 624 .LBE24: 625 .LBE23: 626 .loc 1 433 3 discriminator 1 627 002e 43F00203 orr r3, r3, #2 628 0032 FB61 str r3, [r7, #28] 629 0034 7B68 ldr r3, [r7, #4] 630 0036 1B68 ldr r3, [r3] 631 0038 1A46 mov r2, r3 632 003a FB69 ldr r3, [r7, #28] 633 003c BB61 str r3, [r7, #24] 634 003e 7A61 str r2, [r7, #20] 635 .LBB25: 636 .LBB26: 1074:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1075:Drivers/CMSIS/Include/cmsis_gcc.h **** 1076:Drivers/CMSIS/Include/cmsis_gcc.h **** 1077:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1078:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STR Exclusive (8 bit) 1079:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive STR instruction for 8 bit values. 1080:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1081:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location 1082:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded 1083:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed 1084:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1085:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr) 1086:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1087:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1088:Drivers/CMSIS/Include/cmsis_gcc.h **** 1089:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) ); 1090:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1091:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1092:Drivers/CMSIS/Include/cmsis_gcc.h **** 1093:Drivers/CMSIS/Include/cmsis_gcc.h **** 1094:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1095:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STR Exclusive (16 bit) 1096:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive STR instruction for 16 bit values. 1097:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1098:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location 1099:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded 1100:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed 1101:Drivers/CMSIS/Include/cmsis_gcc.h **** */ ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 39 1102:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr) 1103:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1104:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1105:Drivers/CMSIS/Include/cmsis_gcc.h **** 1106:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) ); 1107:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1108:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1109:Drivers/CMSIS/Include/cmsis_gcc.h **** 1110:Drivers/CMSIS/Include/cmsis_gcc.h **** 1111:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 1112:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STR Exclusive (32 bit) 1113:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive STR instruction for 32 bit values. 1114:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1115:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location 1116:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded 1117:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed 1118:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1119:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr) 1120:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1121:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 1122:Drivers/CMSIS/Include/cmsis_gcc.h **** 1123:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 637 .loc 2 1123 4 discriminator 1 638 0040 7969 ldr r1, [r7, #20] 639 0042 BA69 ldr r2, [r7, #24] 640 .syntax unified 641 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 642 0044 41E80023 strex r3, r2, [r1] 643 @ 0 "" 2 644 .thumb 645 .syntax unified 646 0048 3B61 str r3, [r7, #16] 1124:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 647 .loc 2 1124 10 discriminator 1 648 004a 3B69 ldr r3, [r7, #16] 649 .LBE26: 650 .LBE25: 651 .loc 1 433 3 discriminator 1 652 004c 002B cmp r3, #0 653 004e E6D1 bne .L35 654 .LBE22: 434:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 435:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Process Unlocked */ 436:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** __HAL_UNLOCK(huart); 655 .loc 1 436 3 656 0050 7B68 ldr r3, [r7, #4] 657 0052 0022 movs r2, #0 658 0054 83F87820 strb r2, [r3, #120] 437:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 438:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return HAL_OK; 659 .loc 1 438 10 660 0058 0023 movs r3, #0 661 .L32: 439:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } 662 .loc 1 439 1 663 005a 1846 mov r0, r3 664 005c 2437 adds r7, r7, #36 ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 40 665 .LCFI24: 666 .cfi_def_cfa_offset 4 667 005e BD46 mov sp, r7 668 .LCFI25: 669 .cfi_def_cfa_register 13 670 @ sp needed 671 0060 5DF8047B ldr r7, [sp], #4 672 .LCFI26: 673 .cfi_restore 7 674 .cfi_def_cfa_offset 0 675 0064 7047 bx lr 676 .cfi_endproc 677 .LFE134: 679 .section .text.HAL_UARTEx_DisableStopMode,"ax",%progbits 680 .align 1 681 .global HAL_UARTEx_DisableStopMode 682 .syntax unified 683 .thumb 684 .thumb_func 686 HAL_UARTEx_DisableStopMode: 687 .LFB135: 440:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 441:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** 442:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @brief Disable UART Stop Mode. 443:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param huart UART handle. 444:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @retval HAL status 445:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */ 446:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** HAL_StatusTypeDef HAL_UARTEx_DisableStopMode(UART_HandleTypeDef *huart) 447:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { 688 .loc 1 447 1 689 .cfi_startproc 690 @ args = 0, pretend = 0, frame = 32 691 @ frame_needed = 1, uses_anonymous_args = 0 692 @ link register save eliminated. 693 0000 80B4 push {r7} 694 .LCFI27: 695 .cfi_def_cfa_offset 4 696 .cfi_offset 7, -4 697 0002 89B0 sub sp, sp, #36 698 .LCFI28: 699 .cfi_def_cfa_offset 40 700 0004 00AF add r7, sp, #0 701 .LCFI29: 702 .cfi_def_cfa_register 7 703 0006 7860 str r0, [r7, #4] 448:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Process Locked */ 449:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** __HAL_LOCK(huart); 704 .loc 1 449 3 705 0008 7B68 ldr r3, [r7, #4] 706 000a 93F87830 ldrb r3, [r3, #120] @ zero_extendqisi2 707 000e 012B cmp r3, #1 708 0010 01D1 bne .L37 709 .loc 1 449 3 is_stmt 0 discriminator 1 710 0012 0223 movs r3, #2 711 0014 21E0 b .L38 712 .L37: 713 .loc 1 449 3 discriminator 2 ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 41 714 0016 7B68 ldr r3, [r7, #4] 715 0018 0122 movs r2, #1 716 001a 83F87820 strb r2, [r3, #120] 717 .L41: 718 .LBB27: 450:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 451:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Clear UESM bit */ 452:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_UESM); 719 .loc 1 452 3 is_stmt 1 discriminator 1 720 001e 7B68 ldr r3, [r7, #4] 721 0020 1B68 ldr r3, [r3] 722 0022 FB60 str r3, [r7, #12] 723 .LBB28: 724 .LBB29: 1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 725 .loc 2 1072 4 discriminator 1 726 0024 FB68 ldr r3, [r7, #12] 727 .syntax unified 728 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 729 0026 53E8003F ldrex r3, [r3] 730 @ 0 "" 2 731 .thumb 732 .syntax unified 733 002a BB60 str r3, [r7, #8] 1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } 734 .loc 2 1073 10 discriminator 1 735 002c BB68 ldr r3, [r7, #8] 736 .LBE29: 737 .LBE28: 738 .loc 1 452 3 discriminator 1 739 002e 23F00203 bic r3, r3, #2 740 0032 FB61 str r3, [r7, #28] 741 0034 7B68 ldr r3, [r7, #4] 742 0036 1B68 ldr r3, [r3] 743 0038 1A46 mov r2, r3 744 003a FB69 ldr r3, [r7, #28] 745 003c BB61 str r3, [r7, #24] 746 003e 7A61 str r2, [r7, #20] 747 .LBB30: 748 .LBB31: 1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 749 .loc 2 1123 4 discriminator 1 750 0040 7969 ldr r1, [r7, #20] 751 0042 BA69 ldr r2, [r7, #24] 752 .syntax unified 753 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 754 0044 41E80023 strex r3, r2, [r1] 755 @ 0 "" 2 756 .thumb 757 .syntax unified 758 0048 3B61 str r3, [r7, #16] 759 .loc 2 1124 10 discriminator 1 760 004a 3B69 ldr r3, [r7, #16] 761 .LBE31: 762 .LBE30: 763 .loc 1 452 3 discriminator 1 764 004c 002B cmp r3, #0 ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 42 765 004e E6D1 bne .L41 766 .LBE27: 453:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 454:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Process Unlocked */ 455:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** __HAL_UNLOCK(huart); 767 .loc 1 455 3 768 0050 7B68 ldr r3, [r7, #4] 769 0052 0022 movs r2, #0 770 0054 83F87820 strb r2, [r3, #120] 456:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 457:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return HAL_OK; 771 .loc 1 457 10 772 0058 0023 movs r3, #0 773 .L38: 458:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } 774 .loc 1 458 1 775 005a 1846 mov r0, r3 776 005c 2437 adds r7, r7, #36 777 .LCFI30: 778 .cfi_def_cfa_offset 4 779 005e BD46 mov sp, r7 780 .LCFI31: 781 .cfi_def_cfa_register 13 782 @ sp needed 783 0060 5DF8047B ldr r7, [sp], #4 784 .LCFI32: 785 .cfi_restore 7 786 .cfi_def_cfa_offset 0 787 0064 7047 bx lr 788 .cfi_endproc 789 .LFE135: 791 .section .text.HAL_UARTEx_ReceiveToIdle,"ax",%progbits 792 .align 1 793 .global HAL_UARTEx_ReceiveToIdle 794 .syntax unified 795 .thumb 796 .thumb_func 798 HAL_UARTEx_ReceiveToIdle: 799 .LFB136: 459:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 460:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** 461:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @brief Receive an amount of data in blocking mode till either the expected number of data 462:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * is received or an IDLE event occurs. 463:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @note HAL_OK is returned if reception is completed (expected number of data has been received) 464:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * or if reception is stopped after IDLE event (less than the expected number of data has b 465:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * In this case, RxLen output parameter indicates number of data available in reception buf 466:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M 467:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * the received data is handled as a set of uint16_t. In this case, Size must indicate the 468:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * of uint16_t available through pData. 469:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param huart UART handle. 470:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param pData Pointer to data buffer (uint8_t or uint16_t data elements). 471:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param Size Amount of data elements (uint8_t or uint16_t) to be received. 472:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param RxLen Number of data elements finally received 473:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * (could be lower than Size, in case reception ends on IDLE event) 474:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param Timeout Timeout duration expressed in ms (covers the whole reception sequence). 475:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @retval HAL status 476:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */ ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 43 477:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size 478:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uint32_t Timeout) 479:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { 800 .loc 1 479 1 801 .cfi_startproc 802 @ args = 4, pretend = 0, frame = 32 803 @ frame_needed = 1, uses_anonymous_args = 0 804 0000 80B5 push {r7, lr} 805 .LCFI33: 806 .cfi_def_cfa_offset 8 807 .cfi_offset 7, -8 808 .cfi_offset 14, -4 809 0002 88B0 sub sp, sp, #32 810 .LCFI34: 811 .cfi_def_cfa_offset 40 812 0004 00AF add r7, sp, #0 813 .LCFI35: 814 .cfi_def_cfa_register 7 815 0006 F860 str r0, [r7, #12] 816 0008 B960 str r1, [r7, #8] 817 000a 3B60 str r3, [r7] 818 000c 1346 mov r3, r2 @ movhi 819 000e FB80 strh r3, [r7, #6] @ movhi 480:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uint8_t *pdata8bits; 481:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uint16_t *pdata16bits; 482:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uint16_t uhMask; 483:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uint32_t tickstart; 484:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 485:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Check that a Rx process is not already ongoing */ 486:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (huart->RxState == HAL_UART_STATE_READY) 820 .loc 1 486 12 821 0010 FB68 ldr r3, [r7, #12] 822 0012 D3F88030 ldr r3, [r3, #128] 823 .loc 1 486 6 824 0016 202B cmp r3, #32 825 0018 40F0DD80 bne .L43 487:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { 488:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if ((pData == NULL) || (Size == 0U)) 826 .loc 1 488 8 827 001c BB68 ldr r3, [r7, #8] 828 001e 002B cmp r3, #0 829 0020 02D0 beq .L44 830 .loc 1 488 25 discriminator 1 831 0022 FB88 ldrh r3, [r7, #6] 832 0024 002B cmp r3, #0 833 0026 01D1 bne .L45 834 .L44: 489:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { 490:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return HAL_ERROR; 835 .loc 1 490 15 836 0028 0123 movs r3, #1 837 002a D5E0 b .L46 838 .L45: 491:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } 492:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 493:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->ErrorCode = HAL_UART_ERROR_NONE; 839 .loc 1 493 22 ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 44 840 002c FB68 ldr r3, [r7, #12] 841 002e 0022 movs r2, #0 842 0030 C3F88420 str r2, [r3, #132] 494:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxState = HAL_UART_STATE_BUSY_RX; 843 .loc 1 494 20 844 0034 FB68 ldr r3, [r7, #12] 845 0036 2222 movs r2, #34 846 0038 C3F88020 str r2, [r3, #128] 495:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->ReceptionType = HAL_UART_RECEPTION_TOIDLE; 847 .loc 1 495 26 848 003c FB68 ldr r3, [r7, #12] 849 003e 0122 movs r2, #1 850 0040 1A66 str r2, [r3, #96] 496:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxEventType = HAL_UART_RXEVENT_TC; 851 .loc 1 496 24 852 0042 FB68 ldr r3, [r7, #12] 853 0044 0022 movs r2, #0 854 0046 5A66 str r2, [r3, #100] 497:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 498:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Init tickstart for timeout management */ 499:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** tickstart = HAL_GetTick(); 855 .loc 1 499 17 856 0048 FFF7FEFF bl HAL_GetTick 857 004c 7861 str r0, [r7, #20] 500:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 501:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxXferSize = Size; 858 .loc 1 501 24 859 004e FB68 ldr r3, [r7, #12] 860 0050 FA88 ldrh r2, [r7, #6] @ movhi 861 0052 A3F85820 strh r2, [r3, #88] @ movhi 502:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxXferCount = Size; 862 .loc 1 502 24 863 0056 FB68 ldr r3, [r7, #12] 864 0058 FA88 ldrh r2, [r7, #6] @ movhi 865 005a A3F85A20 strh r2, [r3, #90] @ movhi 503:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 504:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Computation of UART mask to apply to RDR register */ 505:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** UART_MASK_COMPUTATION(huart); 866 .loc 1 505 5 867 005e FB68 ldr r3, [r7, #12] 868 0060 9B68 ldr r3, [r3, #8] 869 0062 B3F5805F cmp r3, #4096 870 0066 0ED1 bne .L47 871 .loc 1 505 5 is_stmt 0 discriminator 1 872 0068 FB68 ldr r3, [r7, #12] 873 006a 1B69 ldr r3, [r3, #16] 874 006c 002B cmp r3, #0 875 006e 05D1 bne .L48 876 .loc 1 505 5 discriminator 3 877 0070 FB68 ldr r3, [r7, #12] 878 0072 40F2FF12 movw r2, #511 879 0076 A3F85C20 strh r2, [r3, #92] @ movhi 880 007a 1AE0 b .L49 881 .L48: 882 .loc 1 505 5 discriminator 4 883 007c FB68 ldr r3, [r7, #12] 884 007e FF22 movs r2, #255 ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 45 885 0080 A3F85C20 strh r2, [r3, #92] @ movhi 886 0084 15E0 b .L49 887 .L47: 888 .loc 1 505 5 discriminator 2 889 0086 FB68 ldr r3, [r7, #12] 890 0088 9B68 ldr r3, [r3, #8] 891 008a 002B cmp r3, #0 892 008c 0DD1 bne .L50 893 .loc 1 505 5 discriminator 5 894 008e FB68 ldr r3, [r7, #12] 895 0090 1B69 ldr r3, [r3, #16] 896 0092 002B cmp r3, #0 897 0094 04D1 bne .L51 898 .loc 1 505 5 discriminator 7 899 0096 FB68 ldr r3, [r7, #12] 900 0098 FF22 movs r2, #255 901 009a A3F85C20 strh r2, [r3, #92] @ movhi 902 009e 08E0 b .L49 903 .L51: 904 .loc 1 505 5 discriminator 8 905 00a0 FB68 ldr r3, [r7, #12] 906 00a2 7F22 movs r2, #127 907 00a4 A3F85C20 strh r2, [r3, #92] @ movhi 908 00a8 03E0 b .L49 909 .L50: 910 .loc 1 505 5 discriminator 6 911 00aa FB68 ldr r3, [r7, #12] 912 00ac 0022 movs r2, #0 913 00ae A3F85C20 strh r2, [r3, #92] @ movhi 914 .L49: 506:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** uhMask = huart->Mask; 915 .loc 1 506 12 is_stmt 1 916 00b2 FB68 ldr r3, [r7, #12] 917 00b4 B3F85C30 ldrh r3, [r3, #92] @ movhi 918 00b8 7B82 strh r3, [r7, #18] @ movhi 507:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 508:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* In case of 9bits/No Parity transfer, pRxData needs to be handled as a uint16_t pointer */ 509:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) 919 .loc 1 509 21 920 00ba FB68 ldr r3, [r7, #12] 921 00bc 9B68 ldr r3, [r3, #8] 922 .loc 1 509 8 923 00be B3F5805F cmp r3, #4096 924 00c2 08D1 bne .L52 925 .loc 1 509 71 discriminator 1 926 00c4 FB68 ldr r3, [r7, #12] 927 00c6 1B69 ldr r3, [r3, #16] 928 .loc 1 509 56 discriminator 1 929 00c8 002B cmp r3, #0 930 00ca 04D1 bne .L52 510:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { 511:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** pdata8bits = NULL; 931 .loc 1 511 19 932 00cc 0023 movs r3, #0 933 00ce FB61 str r3, [r7, #28] 512:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** pdata16bits = (uint16_t *) pData; 934 .loc 1 512 19 ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 46 935 00d0 BB68 ldr r3, [r7, #8] 936 00d2 BB61 str r3, [r7, #24] 937 00d4 03E0 b .L53 938 .L52: 513:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } 514:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** else 515:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { 516:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** pdata8bits = pData; 939 .loc 1 516 19 940 00d6 BB68 ldr r3, [r7, #8] 941 00d8 FB61 str r3, [r7, #28] 517:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** pdata16bits = NULL; 942 .loc 1 517 19 943 00da 0023 movs r3, #0 944 00dc BB61 str r3, [r7, #24] 945 .L53: 518:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } 519:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 520:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Initialize output number of received elements */ 521:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** *RxLen = 0U; 946 .loc 1 521 12 947 00de 3B68 ldr r3, [r7] 948 00e0 0022 movs r2, #0 949 00e2 1A80 strh r2, [r3] @ movhi 522:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 523:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* as long as data have to be received */ 524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** while (huart->RxXferCount > 0U) 950 .loc 1 524 11 951 00e4 60E0 b .L54 952 .L60: 525:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { 526:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Check if IDLE flag is set */ 527:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE)) 953 .loc 1 527 11 954 00e6 FB68 ldr r3, [r7, #12] 955 00e8 1B68 ldr r3, [r3] 956 00ea DB69 ldr r3, [r3, #28] 957 00ec 03F01003 and r3, r3, #16 958 .loc 1 527 10 959 00f0 102B cmp r3, #16 960 00f2 10D1 bne .L55 528:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { 529:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Clear IDLE flag in ISR */ 530:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF); 961 .loc 1 530 9 962 00f4 FB68 ldr r3, [r7, #12] 963 00f6 1B68 ldr r3, [r3] 964 00f8 1022 movs r2, #16 965 00fa 1A62 str r2, [r3, #32] 531:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 532:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* If Set, but no data ever received, clear flag without exiting loop */ 533:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* If Set, and data has already been received, this means Idle Event is valid : End recepti 534:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (*RxLen > 0U) 966 .loc 1 534 13 967 00fc 3B68 ldr r3, [r7] 968 00fe 1B88 ldrh r3, [r3] 969 .loc 1 534 12 ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 47 970 0100 002B cmp r3, #0 971 0102 08D0 beq .L55 535:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { 536:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxEventType = HAL_UART_RXEVENT_IDLE; 972 .loc 1 536 30 973 0104 FB68 ldr r3, [r7, #12] 974 0106 0222 movs r2, #2 975 0108 5A66 str r2, [r3, #100] 537:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxState = HAL_UART_STATE_READY; 976 .loc 1 537 26 977 010a FB68 ldr r3, [r7, #12] 978 010c 2022 movs r2, #32 979 010e C3F88020 str r2, [r3, #128] 538:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 539:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return HAL_OK; 980 .loc 1 539 18 981 0112 0023 movs r3, #0 982 0114 60E0 b .L46 983 .L55: 540:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } 541:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } 542:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 543:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Check if RXNE flag is set */ 544:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RXNE)) 984 .loc 1 544 11 985 0116 FB68 ldr r3, [r7, #12] 986 0118 1B68 ldr r3, [r3] 987 011a DB69 ldr r3, [r3, #28] 988 011c 03F02003 and r3, r3, #32 989 .loc 1 544 10 990 0120 202B cmp r3, #32 991 0122 2CD1 bne .L56 545:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { 546:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (pdata8bits == NULL) 992 .loc 1 546 12 993 0124 FB69 ldr r3, [r7, #28] 994 0126 002B cmp r3, #0 995 0128 0CD1 bne .L57 547:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { 548:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** *pdata16bits = (uint16_t)(huart->Instance->RDR & uhMask); 996 .loc 1 548 42 997 012a FB68 ldr r3, [r7, #12] 998 012c 1B68 ldr r3, [r3] 999 .loc 1 548 52 1000 012e 9B8C ldrh r3, [r3, #36] @ movhi 1001 0130 9AB2 uxth r2, r3 1002 .loc 1 548 26 1003 0132 7B8A ldrh r3, [r7, #18] @ movhi 1004 0134 1340 ands r3, r3, r2 1005 0136 9AB2 uxth r2, r3 1006 .loc 1 548 24 1007 0138 BB69 ldr r3, [r7, #24] 1008 013a 1A80 strh r2, [r3] @ movhi 549:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** pdata16bits++; 1009 .loc 1 549 22 1010 013c BB69 ldr r3, [r7, #24] 1011 013e 0233 adds r3, r3, #2 ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 48 1012 0140 BB61 str r3, [r7, #24] 1013 0142 0DE0 b .L58 1014 .L57: 550:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } 551:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** else 552:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { 553:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** *pdata8bits = (uint8_t)(huart->Instance->RDR & (uint8_t)uhMask); 1015 .loc 1 553 40 1016 0144 FB68 ldr r3, [r7, #12] 1017 0146 1B68 ldr r3, [r3] 1018 .loc 1 553 50 1019 0148 9B8C ldrh r3, [r3, #36] @ movhi 1020 014a 9BB2 uxth r3, r3 1021 .loc 1 553 25 1022 014c DAB2 uxtb r2, r3 1023 .loc 1 553 58 1024 014e 7B8A ldrh r3, [r7, #18] @ movhi 1025 0150 DBB2 uxtb r3, r3 1026 .loc 1 553 25 1027 0152 1340 ands r3, r3, r2 1028 0154 DAB2 uxtb r2, r3 1029 .loc 1 553 23 1030 0156 FB69 ldr r3, [r7, #28] 1031 0158 1A70 strb r2, [r3] 554:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** pdata8bits++; 1032 .loc 1 554 21 1033 015a FB69 ldr r3, [r7, #28] 1034 015c 0133 adds r3, r3, #1 1035 015e FB61 str r3, [r7, #28] 1036 .L58: 555:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } 556:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Increment number of received elements */ 557:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** *RxLen += 1U; 1037 .loc 1 557 16 1038 0160 3B68 ldr r3, [r7] 1039 0162 1B88 ldrh r3, [r3] 1040 0164 0133 adds r3, r3, #1 1041 0166 9AB2 uxth r2, r3 1042 0168 3B68 ldr r3, [r7] 1043 016a 1A80 strh r2, [r3] @ movhi 558:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxXferCount--; 1044 .loc 1 558 14 1045 016c FB68 ldr r3, [r7, #12] 1046 016e B3F85A30 ldrh r3, [r3, #90] @ movhi 1047 0172 9BB2 uxth r3, r3 1048 .loc 1 558 27 1049 0174 013B subs r3, r3, #1 1050 0176 9AB2 uxth r2, r3 1051 0178 FB68 ldr r3, [r7, #12] 1052 017a A3F85A20 strh r2, [r3, #90] @ movhi 1053 .L56: 559:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } 560:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 561:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Check for the Timeout */ 562:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (Timeout != HAL_MAX_DELAY) 1054 .loc 1 562 10 1055 017e BB6A ldr r3, [r7, #40] ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 49 1056 0180 B3F1FF3F cmp r3, #-1 1057 0184 10D0 beq .L54 563:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { 564:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U)) 1058 .loc 1 564 15 1059 0186 FFF7FEFF bl HAL_GetTick 1060 018a 0246 mov r2, r0 1061 .loc 1 564 29 1062 018c 7B69 ldr r3, [r7, #20] 1063 018e D31A subs r3, r2, r3 1064 .loc 1 564 12 1065 0190 BA6A ldr r2, [r7, #40] 1066 0192 9A42 cmp r2, r3 1067 0194 02D3 bcc .L59 1068 .loc 1 564 53 discriminator 1 1069 0196 BB6A ldr r3, [r7, #40] 1070 0198 002B cmp r3, #0 1071 019a 05D1 bne .L54 1072 .L59: 565:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { 566:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxState = HAL_UART_STATE_READY; 1073 .loc 1 566 26 1074 019c FB68 ldr r3, [r7, #12] 1075 019e 2022 movs r2, #32 1076 01a0 C3F88020 str r2, [r3, #128] 567:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 568:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return HAL_TIMEOUT; 1077 .loc 1 568 18 1078 01a4 0323 movs r3, #3 1079 01a6 17E0 b .L46 1080 .L54: 524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { 1081 .loc 1 524 17 1082 01a8 FB68 ldr r3, [r7, #12] 1083 01aa B3F85A30 ldrh r3, [r3, #90] @ movhi 1084 01ae 9BB2 uxth r3, r3 524:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { 1085 .loc 1 524 11 1086 01b0 002B cmp r3, #0 1087 01b2 98D1 bne .L60 569:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } 570:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } 571:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } 572:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 573:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Set number of received elements in output parameter : RxLen */ 574:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** *RxLen = huart->RxXferSize - huart->RxXferCount; 1088 .loc 1 574 19 1089 01b4 FB68 ldr r3, [r7, #12] 1090 01b6 B3F85820 ldrh r2, [r3, #88] 1091 .loc 1 574 39 1092 01ba FB68 ldr r3, [r7, #12] 1093 01bc B3F85A30 ldrh r3, [r3, #90] @ movhi 1094 01c0 9BB2 uxth r3, r3 1095 .loc 1 574 32 1096 01c2 D31A subs r3, r2, r3 1097 01c4 9AB2 uxth r2, r3 1098 .loc 1 574 12 ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 50 1099 01c6 3B68 ldr r3, [r7] 1100 01c8 1A80 strh r2, [r3] @ movhi 575:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* At end of Rx process, restore huart->RxState to Ready */ 576:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxState = HAL_UART_STATE_READY; 1101 .loc 1 576 20 1102 01ca FB68 ldr r3, [r7, #12] 1103 01cc 2022 movs r2, #32 1104 01ce C3F88020 str r2, [r3, #128] 577:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 578:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return HAL_OK; 1105 .loc 1 578 12 1106 01d2 0023 movs r3, #0 1107 01d4 00E0 b .L46 1108 .L43: 579:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } 580:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** else 581:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { 582:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return HAL_BUSY; 1109 .loc 1 582 12 1110 01d6 0223 movs r3, #2 1111 .L46: 583:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } 584:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } 1112 .loc 1 584 1 1113 01d8 1846 mov r0, r3 1114 01da 2037 adds r7, r7, #32 1115 .LCFI36: 1116 .cfi_def_cfa_offset 8 1117 01dc BD46 mov sp, r7 1118 .LCFI37: 1119 .cfi_def_cfa_register 13 1120 @ sp needed 1121 01de 80BD pop {r7, pc} 1122 .cfi_endproc 1123 .LFE136: 1125 .section .text.HAL_UARTEx_ReceiveToIdle_IT,"ax",%progbits 1126 .align 1 1127 .global HAL_UARTEx_ReceiveToIdle_IT 1128 .syntax unified 1129 .thumb 1130 .thumb_func 1132 HAL_UARTEx_ReceiveToIdle_IT: 1133 .LFB137: 585:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 586:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** 587:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @brief Receive an amount of data in interrupt mode till either the expected number of data 588:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * is received or an IDLE event occurs. 589:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @note Reception is initiated by this function call. Further progress of reception is achieved 590:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * to UART interrupts raised by RXNE and IDLE events. Callback is called at end of receptio 591:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * number of received data elements. 592:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M 593:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * the received data is handled as a set of uint16_t. In this case, Size must indicate the 594:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * of uint16_t available through pData. 595:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param huart UART handle. 596:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param pData Pointer to data buffer (uint8_t or uint16_t data elements). 597:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param Size Amount of data elements (uint8_t or uint16_t) to be received. 598:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @retval HAL status ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 51 599:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */ 600:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t S 601:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { 1134 .loc 1 601 1 1135 .cfi_startproc 1136 @ args = 0, pretend = 0, frame = 48 1137 @ frame_needed = 1, uses_anonymous_args = 0 1138 0000 80B5 push {r7, lr} 1139 .LCFI38: 1140 .cfi_def_cfa_offset 8 1141 .cfi_offset 7, -8 1142 .cfi_offset 14, -4 1143 0002 8CB0 sub sp, sp, #48 1144 .LCFI39: 1145 .cfi_def_cfa_offset 56 1146 0004 00AF add r7, sp, #0 1147 .LCFI40: 1148 .cfi_def_cfa_register 7 1149 0006 F860 str r0, [r7, #12] 1150 0008 B960 str r1, [r7, #8] 1151 000a 1346 mov r3, r2 1152 000c FB80 strh r3, [r7, #6] @ movhi 602:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** HAL_StatusTypeDef status = HAL_OK; 1153 .loc 1 602 21 1154 000e 0023 movs r3, #0 1155 0010 87F82F30 strb r3, [r7, #47] 603:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 604:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Check that a Rx process is not already ongoing */ 605:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (huart->RxState == HAL_UART_STATE_READY) 1156 .loc 1 605 12 1157 0014 FB68 ldr r3, [r7, #12] 1158 0016 D3F88030 ldr r3, [r3, #128] 1159 .loc 1 605 6 1160 001a 202B cmp r3, #32 1161 001c 3BD1 bne .L62 606:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { 607:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if ((pData == NULL) || (Size == 0U)) 1162 .loc 1 607 8 1163 001e BB68 ldr r3, [r7, #8] 1164 0020 002B cmp r3, #0 1165 0022 02D0 beq .L63 1166 .loc 1 607 25 discriminator 1 1167 0024 FB88 ldrh r3, [r7, #6] 1168 0026 002B cmp r3, #0 1169 0028 01D1 bne .L64 1170 .L63: 608:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { 609:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return HAL_ERROR; 1171 .loc 1 609 14 1172 002a 0123 movs r3, #1 1173 002c 34E0 b .L65 1174 .L64: 610:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } 611:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 612:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Set Reception type to reception till IDLE Event*/ 613:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->ReceptionType = HAL_UART_RECEPTION_TOIDLE; 1175 .loc 1 613 26 ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 52 1176 002e FB68 ldr r3, [r7, #12] 1177 0030 0122 movs r2, #1 1178 0032 1A66 str r2, [r3, #96] 614:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxEventType = HAL_UART_RXEVENT_TC; 1179 .loc 1 614 24 1180 0034 FB68 ldr r3, [r7, #12] 1181 0036 0022 movs r2, #0 1182 0038 5A66 str r2, [r3, #100] 615:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 616:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (void)UART_Start_Receive_IT(huart, pData, Size); 1183 .loc 1 616 11 1184 003a FB88 ldrh r3, [r7, #6] 1185 003c 1A46 mov r2, r3 1186 003e B968 ldr r1, [r7, #8] 1187 0040 F868 ldr r0, [r7, #12] 1188 0042 FFF7FEFF bl UART_Start_Receive_IT 617:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 618:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) 1189 .loc 1 618 14 1190 0046 FB68 ldr r3, [r7, #12] 1191 0048 1B6E ldr r3, [r3, #96] 1192 .loc 1 618 8 1193 004a 012B cmp r3, #1 1194 004c 1DD1 bne .L66 619:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { 620:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF); 1195 .loc 1 620 7 1196 004e FB68 ldr r3, [r7, #12] 1197 0050 1B68 ldr r3, [r3] 1198 0052 1022 movs r2, #16 1199 0054 1A62 str r2, [r3, #32] 1200 .L69: 1201 .LBB32: 621:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); 1202 .loc 1 621 7 discriminator 1 1203 0056 FB68 ldr r3, [r7, #12] 1204 0058 1B68 ldr r3, [r3] 1205 005a BB61 str r3, [r7, #24] 1206 .LBB33: 1207 .LBB34: 1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1208 .loc 2 1072 4 discriminator 1 1209 005c BB69 ldr r3, [r7, #24] 1210 .syntax unified 1211 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1212 005e 53E8003F ldrex r3, [r3] 1213 @ 0 "" 2 1214 .thumb 1215 .syntax unified 1216 0062 7B61 str r3, [r7, #20] 1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1217 .loc 2 1073 10 discriminator 1 1218 0064 7B69 ldr r3, [r7, #20] 1219 .LBE34: 1220 .LBE33: 1221 .loc 1 621 7 discriminator 1 1222 0066 43F01003 orr r3, r3, #16 ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 53 1223 006a BB62 str r3, [r7, #40] 1224 006c FB68 ldr r3, [r7, #12] 1225 006e 1B68 ldr r3, [r3] 1226 0070 1A46 mov r2, r3 1227 0072 BB6A ldr r3, [r7, #40] 1228 0074 7B62 str r3, [r7, #36] 1229 0076 3A62 str r2, [r7, #32] 1230 .LBB35: 1231 .LBB36: 1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1232 .loc 2 1123 4 discriminator 1 1233 0078 396A ldr r1, [r7, #32] 1234 007a 7A6A ldr r2, [r7, #36] 1235 .syntax unified 1236 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1237 007c 41E80023 strex r3, r2, [r1] 1238 @ 0 "" 2 1239 .thumb 1240 .syntax unified 1241 0080 FB61 str r3, [r7, #28] 1242 .loc 2 1124 10 discriminator 1 1243 0082 FB69 ldr r3, [r7, #28] 1244 .LBE36: 1245 .LBE35: 1246 .loc 1 621 7 discriminator 1 1247 0084 002B cmp r3, #0 1248 0086 E6D1 bne .L69 1249 0088 02E0 b .L70 1250 .L66: 1251 .LBE32: 622:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } 623:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** else 624:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { 625:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* In case of errors already pending when reception is started, 626:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** Interrupts may have already been raised and lead to reception abortion. 627:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (Overrun error for instance). 628:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** In such case Reception Type has been reset to HAL_UART_RECEPTION_STANDARD. */ 629:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** status = HAL_ERROR; 1252 .loc 1 629 14 1253 008a 0123 movs r3, #1 1254 008c 87F82F30 strb r3, [r7, #47] 1255 .L70: 630:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } 631:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 632:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return status; 1256 .loc 1 632 12 1257 0090 97F82F30 ldrb r3, [r7, #47] @ zero_extendqisi2 1258 0094 00E0 b .L65 1259 .L62: 633:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } 634:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** else 635:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { 636:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return HAL_BUSY; 1260 .loc 1 636 12 1261 0096 0223 movs r3, #2 1262 .L65: 637:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 54 638:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } 1263 .loc 1 638 1 1264 0098 1846 mov r0, r3 1265 009a 3037 adds r7, r7, #48 1266 .LCFI41: 1267 .cfi_def_cfa_offset 8 1268 009c BD46 mov sp, r7 1269 .LCFI42: 1270 .cfi_def_cfa_register 13 1271 @ sp needed 1272 009e 80BD pop {r7, pc} 1273 .cfi_endproc 1274 .LFE137: 1276 .section .text.HAL_UARTEx_ReceiveToIdle_DMA,"ax",%progbits 1277 .align 1 1278 .global HAL_UARTEx_ReceiveToIdle_DMA 1279 .syntax unified 1280 .thumb 1281 .thumb_func 1283 HAL_UARTEx_ReceiveToIdle_DMA: 1284 .LFB138: 639:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 640:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** 641:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @brief Receive an amount of data in DMA mode till either the expected number 642:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * of data is received or an IDLE event occurs. 643:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @note Reception is initiated by this function call. Further progress of reception is achieved 644:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * to DMA services, transferring automatically received data elements in user reception buf 645:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * calling registered callbacks at half/end of reception. UART IDLE events are also used to 646:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * reception phase as ended. In all cases, callback execution will indicate number of recei 647:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @note When the UART parity is enabled (PCE = 1), the received data contain 648:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * the parity bit (MSB position). 649:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M 650:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * the received data is handled as a set of uint16_t. In this case, Size must indicate the 651:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * of uint16_t available through pData. 652:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param huart UART handle. 653:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param pData Pointer to data buffer (uint8_t or uint16_t data elements). 654:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param Size Amount of data elements (uint8_t or uint16_t) to be received. 655:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @retval HAL status 656:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */ 657:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t 658:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { 1285 .loc 1 658 1 1286 .cfi_startproc 1287 @ args = 0, pretend = 0, frame = 48 1288 @ frame_needed = 1, uses_anonymous_args = 0 1289 0000 80B5 push {r7, lr} 1290 .LCFI43: 1291 .cfi_def_cfa_offset 8 1292 .cfi_offset 7, -8 1293 .cfi_offset 14, -4 1294 0002 8CB0 sub sp, sp, #48 1295 .LCFI44: 1296 .cfi_def_cfa_offset 56 1297 0004 00AF add r7, sp, #0 1298 .LCFI45: 1299 .cfi_def_cfa_register 7 1300 0006 F860 str r0, [r7, #12] ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 55 1301 0008 B960 str r1, [r7, #8] 1302 000a 1346 mov r3, r2 1303 000c FB80 strh r3, [r7, #6] @ movhi 659:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** HAL_StatusTypeDef status; 660:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 661:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Check that a Rx process is not already ongoing */ 662:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (huart->RxState == HAL_UART_STATE_READY) 1304 .loc 1 662 12 1305 000e FB68 ldr r3, [r7, #12] 1306 0010 D3F88030 ldr r3, [r3, #128] 1307 .loc 1 662 6 1308 0014 202B cmp r3, #32 1309 0016 42D1 bne .L72 663:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { 664:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if ((pData == NULL) || (Size == 0U)) 1310 .loc 1 664 8 1311 0018 BB68 ldr r3, [r7, #8] 1312 001a 002B cmp r3, #0 1313 001c 02D0 beq .L73 1314 .loc 1 664 25 discriminator 1 1315 001e FB88 ldrh r3, [r7, #6] 1316 0020 002B cmp r3, #0 1317 0022 01D1 bne .L74 1318 .L73: 665:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { 666:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return HAL_ERROR; 1319 .loc 1 666 14 1320 0024 0123 movs r3, #1 1321 0026 3BE0 b .L75 1322 .L74: 667:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } 668:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 669:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Set Reception type to reception till IDLE Event*/ 670:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->ReceptionType = HAL_UART_RECEPTION_TOIDLE; 1323 .loc 1 670 26 1324 0028 FB68 ldr r3, [r7, #12] 1325 002a 0122 movs r2, #1 1326 002c 1A66 str r2, [r3, #96] 671:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** huart->RxEventType = HAL_UART_RXEVENT_TC; 1327 .loc 1 671 24 1328 002e FB68 ldr r3, [r7, #12] 1329 0030 0022 movs r2, #0 1330 0032 5A66 str r2, [r3, #100] 672:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 673:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** status = UART_Start_Receive_DMA(huart, pData, Size); 1331 .loc 1 673 15 1332 0034 FB88 ldrh r3, [r7, #6] 1333 0036 1A46 mov r2, r3 1334 0038 B968 ldr r1, [r7, #8] 1335 003a F868 ldr r0, [r7, #12] 1336 003c FFF7FEFF bl UART_Start_Receive_DMA 1337 0040 0346 mov r3, r0 1338 0042 87F82F30 strb r3, [r7, #47] 674:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 675:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Check Rx process has been successfully started */ 676:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (status == HAL_OK) 1339 .loc 1 676 8 ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 56 1340 0046 97F82F30 ldrb r3, [r7, #47] @ zero_extendqisi2 1341 004a 002B cmp r3, #0 1342 004c 24D1 bne .L76 677:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { 678:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) 1343 .loc 1 678 16 1344 004e FB68 ldr r3, [r7, #12] 1345 0050 1B6E ldr r3, [r3, #96] 1346 .loc 1 678 10 1347 0052 012B cmp r3, #1 1348 0054 1DD1 bne .L77 679:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { 680:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF); 1349 .loc 1 680 9 1350 0056 FB68 ldr r3, [r7, #12] 1351 0058 1B68 ldr r3, [r3] 1352 005a 1022 movs r2, #16 1353 005c 1A62 str r2, [r3, #32] 1354 .L80: 1355 .LBB37: 681:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); 1356 .loc 1 681 9 discriminator 1 1357 005e FB68 ldr r3, [r7, #12] 1358 0060 1B68 ldr r3, [r3] 1359 0062 BB61 str r3, [r7, #24] 1360 .LBB38: 1361 .LBB39: 1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1362 .loc 2 1072 4 discriminator 1 1363 0064 BB69 ldr r3, [r7, #24] 1364 .syntax unified 1365 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1366 0066 53E8003F ldrex r3, [r3] 1367 @ 0 "" 2 1368 .thumb 1369 .syntax unified 1370 006a 7B61 str r3, [r7, #20] 1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } 1371 .loc 2 1073 10 discriminator 1 1372 006c 7B69 ldr r3, [r7, #20] 1373 .LBE39: 1374 .LBE38: 1375 .loc 1 681 9 discriminator 1 1376 006e 43F01003 orr r3, r3, #16 1377 0072 BB62 str r3, [r7, #40] 1378 0074 FB68 ldr r3, [r7, #12] 1379 0076 1B68 ldr r3, [r3] 1380 0078 1A46 mov r2, r3 1381 007a BB6A ldr r3, [r7, #40] 1382 007c 7B62 str r3, [r7, #36] 1383 007e 3A62 str r2, [r7, #32] 1384 .LBB40: 1385 .LBB41: 1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 1386 .loc 2 1123 4 discriminator 1 1387 0080 396A ldr r1, [r7, #32] 1388 0082 7A6A ldr r2, [r7, #36] ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 57 1389 .syntax unified 1390 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 1391 0084 41E80023 strex r3, r2, [r1] 1392 @ 0 "" 2 1393 .thumb 1394 .syntax unified 1395 0088 FB61 str r3, [r7, #28] 1396 .loc 2 1124 10 discriminator 1 1397 008a FB69 ldr r3, [r7, #28] 1398 .LBE41: 1399 .LBE40: 1400 .loc 1 681 9 discriminator 1 1401 008c 002B cmp r3, #0 1402 008e E6D1 bne .L80 1403 0090 02E0 b .L76 1404 .L77: 1405 .LBE37: 682:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } 683:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** else 684:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { 685:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* In case of errors already pending when reception is started, 686:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** Interrupts may have already been raised and lead to reception abortion. 687:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** (Overrun error for instance). 688:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** In such case Reception Type has been reset to HAL_UART_RECEPTION_STANDARD. */ 689:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** status = HAL_ERROR; 1406 .loc 1 689 16 1407 0092 0123 movs r3, #1 1408 0094 87F82F30 strb r3, [r7, #47] 1409 .L76: 690:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } 691:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } 692:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 693:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return status; 1410 .loc 1 693 12 1411 0098 97F82F30 ldrb r3, [r7, #47] @ zero_extendqisi2 1412 009c 00E0 b .L75 1413 .L72: 694:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } 695:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** else 696:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { 697:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return HAL_BUSY; 1414 .loc 1 697 12 1415 009e 0223 movs r3, #2 1416 .L75: 698:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } 699:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } 1417 .loc 1 699 1 1418 00a0 1846 mov r0, r3 1419 00a2 3037 adds r7, r7, #48 1420 .LCFI46: 1421 .cfi_def_cfa_offset 8 1422 00a4 BD46 mov sp, r7 1423 .LCFI47: 1424 .cfi_def_cfa_register 13 1425 @ sp needed 1426 00a6 80BD pop {r7, pc} 1427 .cfi_endproc ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 58 1428 .LFE138: 1430 .section .text.HAL_UARTEx_GetRxEventType,"ax",%progbits 1431 .align 1 1432 .global HAL_UARTEx_GetRxEventType 1433 .syntax unified 1434 .thumb 1435 .thumb_func 1437 HAL_UARTEx_GetRxEventType: 1438 .LFB139: 700:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 701:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** 702:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @brief Provide Rx Event type that has lead to RxEvent callback execution. 703:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @note When HAL_UARTEx_ReceiveToIdle_IT() or HAL_UARTEx_ReceiveToIdle_DMA() API are called, pro 704:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * of reception process is provided to application through calls of Rx Event callback (eith 705:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * HAL_UARTEx_RxEventCallback() or user registered one). As several types of events could o 706:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * Half Transfer, or Transfer Complete), this function allows to retrieve the Rx Event type 707:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * to Rx Event callback execution. 708:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @note This function is expected to be called within the user implementation of Rx Event Callba 709:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * in order to provide the accurate value : 710:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * In Interrupt Mode : 711:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * - HAL_UART_RXEVENT_TC : when Reception has been completed (expected nb of data has be 712:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * - HAL_UART_RXEVENT_IDLE : when Idle event occurred prior reception has been completed 713:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * received data is lower than expected one) 714:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * In DMA Mode : 715:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * - HAL_UART_RXEVENT_TC : when Reception has been completed (expected nb of data has be 716:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * - HAL_UART_RXEVENT_HT : when half of expected nb of data has been received 717:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * - HAL_UART_RXEVENT_IDLE : when Idle event occurred prior reception has been completed 718:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * received data is lower than expected one). 719:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * In DMA mode, RxEvent callback could be called several times; 720:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * When DMA is configured in Normal Mode, HT event does not stop Reception process; 721:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * When DMA is configured in Circular Mode, HT, TC or IDLE events don't stop Reception proc 722:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param huart UART handle. 723:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @retval Rx Event Type (return vale will be a value of @ref UART_RxEvent_Type_Values) 724:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */ 725:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** HAL_UART_RxEventTypeTypeDef HAL_UARTEx_GetRxEventType(const UART_HandleTypeDef *huart) 726:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { 1439 .loc 1 726 1 1440 .cfi_startproc 1441 @ args = 0, pretend = 0, frame = 8 1442 @ frame_needed = 1, uses_anonymous_args = 0 1443 @ link register save eliminated. 1444 0000 80B4 push {r7} 1445 .LCFI48: 1446 .cfi_def_cfa_offset 4 1447 .cfi_offset 7, -4 1448 0002 83B0 sub sp, sp, #12 1449 .LCFI49: 1450 .cfi_def_cfa_offset 16 1451 0004 00AF add r7, sp, #0 1452 .LCFI50: 1453 .cfi_def_cfa_register 7 1454 0006 7860 str r0, [r7, #4] 727:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Return Rx Event type value, as stored in UART handle */ 728:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** return (huart->RxEventType); 1455 .loc 1 728 16 1456 0008 7B68 ldr r3, [r7, #4] 1457 000a 5B6E ldr r3, [r3, #100] ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 59 729:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } 1458 .loc 1 729 1 1459 000c 1846 mov r0, r3 1460 000e 0C37 adds r7, r7, #12 1461 .LCFI51: 1462 .cfi_def_cfa_offset 4 1463 0010 BD46 mov sp, r7 1464 .LCFI52: 1465 .cfi_def_cfa_register 13 1466 @ sp needed 1467 0012 5DF8047B ldr r7, [sp], #4 1468 .LCFI53: 1469 .cfi_restore 7 1470 .cfi_def_cfa_offset 0 1471 0016 7047 bx lr 1472 .cfi_endproc 1473 .LFE139: 1475 .section .text.UARTEx_Wakeup_AddressConfig,"ax",%progbits 1476 .align 1 1477 .syntax unified 1478 .thumb 1479 .thumb_func 1481 UARTEx_Wakeup_AddressConfig: 1482 .LFB140: 730:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 731:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** 732:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @} 733:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */ 734:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 735:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** 736:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @} 737:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */ 738:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 739:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** @addtogroup UARTEx_Private_Functions 740:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @{ 741:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */ 742:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 743:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /** 744:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @brief Initialize the UART wake-up from stop mode parameters when triggered by address detectio 745:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param huart UART handle. 746:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @param WakeUpSelection UART wake up from stop mode parameters. 747:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** * @retval None 748:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** */ 749:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** static void UARTEx_Wakeup_AddressConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelecti 750:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** { 1483 .loc 1 750 1 1484 .cfi_startproc 1485 @ args = 0, pretend = 0, frame = 16 1486 @ frame_needed = 1, uses_anonymous_args = 0 1487 0000 80B5 push {r7, lr} 1488 .LCFI54: 1489 .cfi_def_cfa_offset 8 1490 .cfi_offset 7, -8 1491 .cfi_offset 14, -4 1492 0002 84B0 sub sp, sp, #16 1493 .LCFI55: 1494 .cfi_def_cfa_offset 24 ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 60 1495 0004 00AF add r7, sp, #0 1496 .LCFI56: 1497 .cfi_def_cfa_register 7 1498 0006 F860 str r0, [r7, #12] 1499 0008 3B1D adds r3, r7, #4 1500 000a 83E80600 stm r3, {r1, r2} 751:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** assert_param(IS_UART_ADDRESSLENGTH_DETECT(WakeUpSelection.AddressLength)); 1501 .loc 1 751 3 1502 000e 3B89 ldrh r3, [r7, #8] 1503 0010 002B cmp r3, #0 1504 0012 07D0 beq .L84 1505 .loc 1 751 3 is_stmt 0 discriminator 1 1506 0014 3B89 ldrh r3, [r7, #8] 1507 0016 102B cmp r3, #16 1508 0018 04D0 beq .L84 1509 .loc 1 751 3 discriminator 2 1510 001a 40F2EF21 movw r1, #751 1511 001e 0E48 ldr r0, .L85 1512 0020 FFF7FEFF bl assert_failed 1513 .L84: 752:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 753:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Set the USART address length */ 754:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** MODIFY_REG(huart->Instance->CR2, USART_CR2_ADDM7, WakeUpSelection.AddressLength); 1514 .loc 1 754 3 is_stmt 1 1515 0024 FB68 ldr r3, [r7, #12] 1516 0026 1B68 ldr r3, [r3] 1517 0028 5B68 ldr r3, [r3, #4] 1518 002a 23F01002 bic r2, r3, #16 1519 002e 3B89 ldrh r3, [r7, #8] 1520 0030 1946 mov r1, r3 1521 0032 FB68 ldr r3, [r7, #12] 1522 0034 1B68 ldr r3, [r3] 1523 0036 0A43 orrs r2, r2, r1 1524 0038 5A60 str r2, [r3, #4] 755:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** 756:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** /* Set the USART address node */ 757:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** MODIFY_REG(huart->Instance->CR2, USART_CR2_ADD, ((uint32_t)WakeUpSelection.Address << UART_CR2_AD 1525 .loc 1 757 3 1526 003a FB68 ldr r3, [r7, #12] 1527 003c 1B68 ldr r3, [r3] 1528 003e 5B68 ldr r3, [r3, #4] 1529 0040 23F07F41 bic r1, r3, #-16777216 1530 0044 BB7A ldrb r3, [r7, #10] @ zero_extendqisi2 1531 0046 1A06 lsls r2, r3, #24 1532 0048 FB68 ldr r3, [r7, #12] 1533 004a 1B68 ldr r3, [r3] 1534 004c 0A43 orrs r2, r2, r1 1535 004e 5A60 str r2, [r3, #4] 758:Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_uart_ex.c **** } 1536 .loc 1 758 1 1537 0050 00BF nop 1538 0052 1037 adds r7, r7, #16 1539 .LCFI57: 1540 .cfi_def_cfa_offset 8 1541 0054 BD46 mov sp, r7 1542 .LCFI58: 1543 .cfi_def_cfa_register 13 ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 61 1544 @ sp needed 1545 0056 80BD pop {r7, pc} 1546 .L86: 1547 .align 2 1548 .L85: 1549 0058 00000000 .word .LC0 1550 .cfi_endproc 1551 .LFE140: 1553 .text 1554 .Letext0: 1555 .file 3 "d:\\arm-gcc\\arm-none-eabi\\include\\machine\\_default_types.h" 1556 .file 4 "d:\\arm-gcc\\arm-none-eabi\\include\\sys\\_stdint.h" 1557 .file 5 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h" 1558 .file 6 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f3xx.h" 1559 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h" 1560 .file 8 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h" 1561 .file 9 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart.h" 1562 .file 10 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_uart_ex.h" ARM GAS C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s page 62 DEFINED SYMBOLS *ABS*:00000000 stm32f3xx_hal_uart_ex.c C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s:20 .rodata:00000000 $d C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s:25 .text.HAL_RS485Ex_Init:00000000 $t C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s:31 .text.HAL_RS485Ex_Init:00000000 HAL_RS485Ex_Init C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s:228 .text.HAL_RS485Ex_Init:00000128 $d C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s:236 .text.HAL_UARTEx_WakeupCallback:00000000 $t C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s:242 .text.HAL_UARTEx_WakeupCallback:00000000 HAL_UARTEx_WakeupCallback C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s:278 .text.HAL_MultiProcessorEx_AddressLength_Set:00000000 $t C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s:284 .text.HAL_MultiProcessorEx_AddressLength_Set:00000000 HAL_MultiProcessorEx_AddressLength_Set C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s:372 .text.HAL_MultiProcessorEx_AddressLength_Set:00000074 $d C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s:377 .text.HAL_UARTEx_StopModeWakeUpSourceConfig:00000000 $t C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s:383 .text.HAL_UARTEx_StopModeWakeUpSourceConfig:00000000 HAL_UARTEx_StopModeWakeUpSourceConfig C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s:1481 .text.UARTEx_Wakeup_AddressConfig:00000000 UARTEx_Wakeup_AddressConfig C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s:557 .text.HAL_UARTEx_StopModeWakeUpSourceConfig:00000110 $d C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s:567 .text.HAL_UARTEx_EnableStopMode:00000000 $t C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s:573 .text.HAL_UARTEx_EnableStopMode:00000000 HAL_UARTEx_EnableStopMode C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s:680 .text.HAL_UARTEx_DisableStopMode:00000000 $t C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s:686 .text.HAL_UARTEx_DisableStopMode:00000000 HAL_UARTEx_DisableStopMode C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s:792 .text.HAL_UARTEx_ReceiveToIdle:00000000 $t C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s:798 .text.HAL_UARTEx_ReceiveToIdle:00000000 HAL_UARTEx_ReceiveToIdle C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s:1126 .text.HAL_UARTEx_ReceiveToIdle_IT:00000000 $t C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s:1132 .text.HAL_UARTEx_ReceiveToIdle_IT:00000000 HAL_UARTEx_ReceiveToIdle_IT C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s:1277 .text.HAL_UARTEx_ReceiveToIdle_DMA:00000000 $t C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s:1283 .text.HAL_UARTEx_ReceiveToIdle_DMA:00000000 HAL_UARTEx_ReceiveToIdle_DMA C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s:1431 .text.HAL_UARTEx_GetRxEventType:00000000 $t C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s:1437 .text.HAL_UARTEx_GetRxEventType:00000000 HAL_UARTEx_GetRxEventType C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s:1476 .text.UARTEx_Wakeup_AddressConfig:00000000 $t C:\Users\zl835\AppData\Local\Temp\cceOQAs2.s:1549 .text.UARTEx_Wakeup_AddressConfig:00000058 $d UNDEFINED SYMBOLS assert_failed HAL_UART_MspInit UART_AdvFeatureConfig UART_SetConfig UART_CheckIdleState HAL_GetTick UART_WaitOnFlagUntilTimeout UART_Start_Receive_IT UART_Start_Receive_DMA