ARM GAS C:\Users\zl835\AppData\Local\Temp\ccQbGAXn.s page 1 1 .cpu cortex-m4 2 .arch armv7e-m 3 .fpu fpv4-sp-d16 4 .eabi_attribute 27, 1 5 .eabi_attribute 28, 1 6 .eabi_attribute 20, 1 7 .eabi_attribute 21, 1 8 .eabi_attribute 23, 3 9 .eabi_attribute 24, 1 10 .eabi_attribute 25, 1 11 .eabi_attribute 26, 1 12 .eabi_attribute 30, 6 13 .eabi_attribute 34, 1 14 .eabi_attribute 18, 4 15 .file "stm32f3xx_hal_timebase_tim.c" 16 .text 17 .Ltext0: 18 .cfi_sections .debug_frame 19 .global htim1 20 .section .bss.htim1,"aw",%nobits 21 .align 2 24 htim1: 25 0000 00000000 .space 76 25 00000000 25 00000000 25 00000000 25 00000000 26 .section .text.HAL_InitTick,"ax",%progbits 27 .align 1 28 .global HAL_InitTick 29 .syntax unified 30 .thumb 31 .thumb_func 33 HAL_InitTick: 34 .LFB130: 35 .file 1 "Core/Src/stm32f3xx_hal_timebase_tim.c" 1:Core/Src/stm32f3xx_hal_timebase_tim.c **** /* USER CODE BEGIN Header */ 2:Core/Src/stm32f3xx_hal_timebase_tim.c **** /** 3:Core/Src/stm32f3xx_hal_timebase_tim.c **** ****************************************************************************** 4:Core/Src/stm32f3xx_hal_timebase_tim.c **** * @file stm32f3xx_hal_timebase_tim.c 5:Core/Src/stm32f3xx_hal_timebase_tim.c **** * @brief HAL time base based on the hardware TIM. 6:Core/Src/stm32f3xx_hal_timebase_tim.c **** ****************************************************************************** 7:Core/Src/stm32f3xx_hal_timebase_tim.c **** * @attention 8:Core/Src/stm32f3xx_hal_timebase_tim.c **** * 9:Core/Src/stm32f3xx_hal_timebase_tim.c **** * Copyright (c) 2025 STMicroelectronics. 10:Core/Src/stm32f3xx_hal_timebase_tim.c **** * All rights reserved. 11:Core/Src/stm32f3xx_hal_timebase_tim.c **** * 12:Core/Src/stm32f3xx_hal_timebase_tim.c **** * This software is licensed under terms that can be found in the LICENSE file 13:Core/Src/stm32f3xx_hal_timebase_tim.c **** * in the root directory of this software component. 14:Core/Src/stm32f3xx_hal_timebase_tim.c **** * If no LICENSE file comes with this software, it is provided AS-IS. 15:Core/Src/stm32f3xx_hal_timebase_tim.c **** * 16:Core/Src/stm32f3xx_hal_timebase_tim.c **** ****************************************************************************** 17:Core/Src/stm32f3xx_hal_timebase_tim.c **** */ 18:Core/Src/stm32f3xx_hal_timebase_tim.c **** /* USER CODE END Header */ 19:Core/Src/stm32f3xx_hal_timebase_tim.c **** 20:Core/Src/stm32f3xx_hal_timebase_tim.c **** /* Includes ------------------------------------------------------------------*/ 21:Core/Src/stm32f3xx_hal_timebase_tim.c **** #include "stm32f3xx_hal.h" ARM GAS C:\Users\zl835\AppData\Local\Temp\ccQbGAXn.s page 2 22:Core/Src/stm32f3xx_hal_timebase_tim.c **** #include "stm32f3xx_hal_tim.h" 23:Core/Src/stm32f3xx_hal_timebase_tim.c **** 24:Core/Src/stm32f3xx_hal_timebase_tim.c **** /* Private typedef -----------------------------------------------------------*/ 25:Core/Src/stm32f3xx_hal_timebase_tim.c **** /* Private define ------------------------------------------------------------*/ 26:Core/Src/stm32f3xx_hal_timebase_tim.c **** /* Private macro -------------------------------------------------------------*/ 27:Core/Src/stm32f3xx_hal_timebase_tim.c **** /* Private variables ---------------------------------------------------------*/ 28:Core/Src/stm32f3xx_hal_timebase_tim.c **** TIM_HandleTypeDef htim1; 29:Core/Src/stm32f3xx_hal_timebase_tim.c **** /* Private function prototypes -----------------------------------------------*/ 30:Core/Src/stm32f3xx_hal_timebase_tim.c **** /* Private functions ---------------------------------------------------------*/ 31:Core/Src/stm32f3xx_hal_timebase_tim.c **** 32:Core/Src/stm32f3xx_hal_timebase_tim.c **** /** 33:Core/Src/stm32f3xx_hal_timebase_tim.c **** * @brief This function configures the TIM1 as a time base source. 34:Core/Src/stm32f3xx_hal_timebase_tim.c **** * The time source is configured to have 1ms time base with a dedicated 35:Core/Src/stm32f3xx_hal_timebase_tim.c **** * Tick interrupt priority. 36:Core/Src/stm32f3xx_hal_timebase_tim.c **** * @note This function is called automatically at the beginning of program after 37:Core/Src/stm32f3xx_hal_timebase_tim.c **** * reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig(). 38:Core/Src/stm32f3xx_hal_timebase_tim.c **** * @param TickPriority: Tick interrupt priority. 39:Core/Src/stm32f3xx_hal_timebase_tim.c **** * @retval HAL status 40:Core/Src/stm32f3xx_hal_timebase_tim.c **** */ 41:Core/Src/stm32f3xx_hal_timebase_tim.c **** HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) 42:Core/Src/stm32f3xx_hal_timebase_tim.c **** { 36 .loc 1 42 1 37 .cfi_startproc 38 @ args = 0, pretend = 0, frame = 48 39 @ frame_needed = 1, uses_anonymous_args = 0 40 0000 80B5 push {r7, lr} 41 .LCFI0: 42 .cfi_def_cfa_offset 8 43 .cfi_offset 7, -8 44 .cfi_offset 14, -4 45 0002 8CB0 sub sp, sp, #48 46 .LCFI1: 47 .cfi_def_cfa_offset 56 48 0004 00AF add r7, sp, #0 49 .LCFI2: 50 .cfi_def_cfa_register 7 51 0006 7860 str r0, [r7, #4] 43:Core/Src/stm32f3xx_hal_timebase_tim.c **** RCC_ClkInitTypeDef clkconfig; 44:Core/Src/stm32f3xx_hal_timebase_tim.c **** uint32_t uwTimclock = 0U; 52 .loc 1 44 25 53 0008 0023 movs r3, #0 54 000a BB62 str r3, [r7, #40] 45:Core/Src/stm32f3xx_hal_timebase_tim.c **** 46:Core/Src/stm32f3xx_hal_timebase_tim.c **** uint32_t uwPrescalerValue = 0U; 55 .loc 1 46 25 56 000c 0023 movs r3, #0 57 000e 7B62 str r3, [r7, #36] 58 .LBB2: 47:Core/Src/stm32f3xx_hal_timebase_tim.c **** uint32_t pFLatency; 48:Core/Src/stm32f3xx_hal_timebase_tim.c **** 49:Core/Src/stm32f3xx_hal_timebase_tim.c **** HAL_StatusTypeDef status; 50:Core/Src/stm32f3xx_hal_timebase_tim.c **** 51:Core/Src/stm32f3xx_hal_timebase_tim.c **** /* Enable TIM1 clock */ 52:Core/Src/stm32f3xx_hal_timebase_tim.c **** __HAL_RCC_TIM1_CLK_ENABLE(); 59 .loc 1 52 3 60 0010 2E4B ldr r3, .L5 61 0012 9B69 ldr r3, [r3, #24] ARM GAS C:\Users\zl835\AppData\Local\Temp\ccQbGAXn.s page 3 62 0014 2D4A ldr r2, .L5 63 0016 43F40063 orr r3, r3, #2048 64 001a 9361 str r3, [r2, #24] 65 001c 2B4B ldr r3, .L5 66 001e 9B69 ldr r3, [r3, #24] 67 0020 03F40063 and r3, r3, #2048 68 0024 BB60 str r3, [r7, #8] 69 0026 BB68 ldr r3, [r7, #8] 70 .LBE2: 53:Core/Src/stm32f3xx_hal_timebase_tim.c **** 54:Core/Src/stm32f3xx_hal_timebase_tim.c **** /* Get clock configuration */ 55:Core/Src/stm32f3xx_hal_timebase_tim.c **** HAL_RCC_GetClockConfig(&clkconfig, &pFLatency); 71 .loc 1 55 3 72 0028 07F10C02 add r2, r7, #12 73 002c 07F11003 add r3, r7, #16 74 0030 1146 mov r1, r2 75 0032 1846 mov r0, r3 76 0034 FFF7FEFF bl HAL_RCC_GetClockConfig 56:Core/Src/stm32f3xx_hal_timebase_tim.c **** 57:Core/Src/stm32f3xx_hal_timebase_tim.c **** /* Compute TIM1 clock */ 58:Core/Src/stm32f3xx_hal_timebase_tim.c **** uwTimclock = HAL_RCC_GetPCLK2Freq(); 77 .loc 1 58 20 78 0038 FFF7FEFF bl HAL_RCC_GetPCLK2Freq 79 003c B862 str r0, [r7, #40] 59:Core/Src/stm32f3xx_hal_timebase_tim.c **** 60:Core/Src/stm32f3xx_hal_timebase_tim.c **** /* Compute the prescaler value to have TIM1 counter clock equal to 1MHz */ 61:Core/Src/stm32f3xx_hal_timebase_tim.c **** uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000U) - 1U); 80 .loc 1 61 46 81 003e BB6A ldr r3, [r7, #40] 82 0040 234A ldr r2, .L5+4 83 0042 A2FB0323 umull r2, r3, r2, r3 84 0046 9B0C lsrs r3, r3, #18 85 .loc 1 61 20 86 0048 013B subs r3, r3, #1 87 004a 7B62 str r3, [r7, #36] 62:Core/Src/stm32f3xx_hal_timebase_tim.c **** 63:Core/Src/stm32f3xx_hal_timebase_tim.c **** /* Initialize TIM1 */ 64:Core/Src/stm32f3xx_hal_timebase_tim.c **** htim1.Instance = TIM1; 88 .loc 1 64 18 89 004c 214B ldr r3, .L5+8 90 004e 224A ldr r2, .L5+12 91 0050 1A60 str r2, [r3] 65:Core/Src/stm32f3xx_hal_timebase_tim.c **** 66:Core/Src/stm32f3xx_hal_timebase_tim.c **** /* Initialize TIMx peripheral as follow: 67:Core/Src/stm32f3xx_hal_timebase_tim.c **** * Period = [(TIM1CLK/1000) - 1]. to have a (1/1000) s time base. 68:Core/Src/stm32f3xx_hal_timebase_tim.c **** * Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock. 69:Core/Src/stm32f3xx_hal_timebase_tim.c **** * ClockDivision = 0 70:Core/Src/stm32f3xx_hal_timebase_tim.c **** * Counter direction = Up 71:Core/Src/stm32f3xx_hal_timebase_tim.c **** */ 72:Core/Src/stm32f3xx_hal_timebase_tim.c **** htim1.Init.Period = (1000000U / 1000U) - 1U; 92 .loc 1 72 21 93 0052 204B ldr r3, .L5+8 94 0054 40F2E732 movw r2, #999 95 0058 DA60 str r2, [r3, #12] 73:Core/Src/stm32f3xx_hal_timebase_tim.c **** htim1.Init.Prescaler = uwPrescalerValue; 96 .loc 1 73 24 97 005a 1E4A ldr r2, .L5+8 ARM GAS C:\Users\zl835\AppData\Local\Temp\ccQbGAXn.s page 4 98 005c 7B6A ldr r3, [r7, #36] 99 005e 5360 str r3, [r2, #4] 74:Core/Src/stm32f3xx_hal_timebase_tim.c **** htim1.Init.ClockDivision = 0; 100 .loc 1 74 28 101 0060 1C4B ldr r3, .L5+8 102 0062 0022 movs r2, #0 103 0064 1A61 str r2, [r3, #16] 75:Core/Src/stm32f3xx_hal_timebase_tim.c **** htim1.Init.CounterMode = TIM_COUNTERMODE_UP; 104 .loc 1 75 26 105 0066 1B4B ldr r3, .L5+8 106 0068 0022 movs r2, #0 107 006a 9A60 str r2, [r3, #8] 76:Core/Src/stm32f3xx_hal_timebase_tim.c **** htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 108 .loc 1 76 32 109 006c 194B ldr r3, .L5+8 110 006e 0022 movs r2, #0 111 0070 9A61 str r2, [r3, #24] 77:Core/Src/stm32f3xx_hal_timebase_tim.c **** 78:Core/Src/stm32f3xx_hal_timebase_tim.c **** status = HAL_TIM_Base_Init(&htim1); 112 .loc 1 78 12 113 0072 1848 ldr r0, .L5+8 114 0074 FFF7FEFF bl HAL_TIM_Base_Init 115 0078 0346 mov r3, r0 116 007a 87F82F30 strb r3, [r7, #47] 79:Core/Src/stm32f3xx_hal_timebase_tim.c **** if (status == HAL_OK) 117 .loc 1 79 6 118 007e 97F82F30 ldrb r3, [r7, #47] @ zero_extendqisi2 119 0082 002B cmp r3, #0 120 0084 1BD1 bne .L2 80:Core/Src/stm32f3xx_hal_timebase_tim.c **** { 81:Core/Src/stm32f3xx_hal_timebase_tim.c **** /* Start the TIM time Base generation in interrupt mode */ 82:Core/Src/stm32f3xx_hal_timebase_tim.c **** status = HAL_TIM_Base_Start_IT(&htim1); 121 .loc 1 82 14 122 0086 1348 ldr r0, .L5+8 123 0088 FFF7FEFF bl HAL_TIM_Base_Start_IT 124 008c 0346 mov r3, r0 125 008e 87F82F30 strb r3, [r7, #47] 83:Core/Src/stm32f3xx_hal_timebase_tim.c **** if (status == HAL_OK) 126 .loc 1 83 8 127 0092 97F82F30 ldrb r3, [r7, #47] @ zero_extendqisi2 128 0096 002B cmp r3, #0 129 0098 11D1 bne .L2 84:Core/Src/stm32f3xx_hal_timebase_tim.c **** { 85:Core/Src/stm32f3xx_hal_timebase_tim.c **** /* Enable the TIM1 global Interrupt */ 86:Core/Src/stm32f3xx_hal_timebase_tim.c **** HAL_NVIC_EnableIRQ(TIM1_UP_TIM16_IRQn); 130 .loc 1 86 9 131 009a 1920 movs r0, #25 132 009c FFF7FEFF bl HAL_NVIC_EnableIRQ 87:Core/Src/stm32f3xx_hal_timebase_tim.c **** /* Configure the SysTick IRQ priority */ 88:Core/Src/stm32f3xx_hal_timebase_tim.c **** if (TickPriority < (1UL << __NVIC_PRIO_BITS)) 133 .loc 1 88 10 134 00a0 7B68 ldr r3, [r7, #4] 135 00a2 0F2B cmp r3, #15 136 00a4 08D8 bhi .L3 89:Core/Src/stm32f3xx_hal_timebase_tim.c **** { 90:Core/Src/stm32f3xx_hal_timebase_tim.c **** /* Configure the TIM IRQ priority */ 91:Core/Src/stm32f3xx_hal_timebase_tim.c **** HAL_NVIC_SetPriority(TIM1_UP_TIM16_IRQn, TickPriority, 0U); ARM GAS C:\Users\zl835\AppData\Local\Temp\ccQbGAXn.s page 5 137 .loc 1 91 9 138 00a6 0022 movs r2, #0 139 00a8 7968 ldr r1, [r7, #4] 140 00aa 1920 movs r0, #25 141 00ac FFF7FEFF bl HAL_NVIC_SetPriority 92:Core/Src/stm32f3xx_hal_timebase_tim.c **** uwTickPrio = TickPriority; 142 .loc 1 92 20 143 00b0 0A4A ldr r2, .L5+16 144 00b2 7B68 ldr r3, [r7, #4] 145 00b4 1360 str r3, [r2] 146 00b6 02E0 b .L2 147 .L3: 93:Core/Src/stm32f3xx_hal_timebase_tim.c **** } 94:Core/Src/stm32f3xx_hal_timebase_tim.c **** else 95:Core/Src/stm32f3xx_hal_timebase_tim.c **** { 96:Core/Src/stm32f3xx_hal_timebase_tim.c **** status = HAL_ERROR; 148 .loc 1 96 16 149 00b8 0123 movs r3, #1 150 00ba 87F82F30 strb r3, [r7, #47] 151 .L2: 97:Core/Src/stm32f3xx_hal_timebase_tim.c **** } 98:Core/Src/stm32f3xx_hal_timebase_tim.c **** } 99:Core/Src/stm32f3xx_hal_timebase_tim.c **** } 100:Core/Src/stm32f3xx_hal_timebase_tim.c **** 101:Core/Src/stm32f3xx_hal_timebase_tim.c **** /* Return function status */ 102:Core/Src/stm32f3xx_hal_timebase_tim.c **** return status; 152 .loc 1 102 10 153 00be 97F82F30 ldrb r3, [r7, #47] @ zero_extendqisi2 103:Core/Src/stm32f3xx_hal_timebase_tim.c **** } 154 .loc 1 103 1 155 00c2 1846 mov r0, r3 156 00c4 3037 adds r7, r7, #48 157 .LCFI3: 158 .cfi_def_cfa_offset 8 159 00c6 BD46 mov sp, r7 160 .LCFI4: 161 .cfi_def_cfa_register 13 162 @ sp needed 163 00c8 80BD pop {r7, pc} 164 .L6: 165 00ca 00BF .align 2 166 .L5: 167 00cc 00100240 .word 1073876992 168 00d0 83DE1B43 .word 1125899907 169 00d4 00000000 .word htim1 170 00d8 002C0140 .word 1073818624 171 00dc 00000000 .word uwTickPrio 172 .cfi_endproc 173 .LFE130: 175 .section .text.HAL_SuspendTick,"ax",%progbits 176 .align 1 177 .global HAL_SuspendTick 178 .syntax unified 179 .thumb 180 .thumb_func 182 HAL_SuspendTick: 183 .LFB131: ARM GAS C:\Users\zl835\AppData\Local\Temp\ccQbGAXn.s page 6 104:Core/Src/stm32f3xx_hal_timebase_tim.c **** 105:Core/Src/stm32f3xx_hal_timebase_tim.c **** /** 106:Core/Src/stm32f3xx_hal_timebase_tim.c **** * @brief Suspend Tick increment. 107:Core/Src/stm32f3xx_hal_timebase_tim.c **** * @note Disable the tick increment by disabling TIM1 update interrupt. 108:Core/Src/stm32f3xx_hal_timebase_tim.c **** * @param None 109:Core/Src/stm32f3xx_hal_timebase_tim.c **** * @retval None 110:Core/Src/stm32f3xx_hal_timebase_tim.c **** */ 111:Core/Src/stm32f3xx_hal_timebase_tim.c **** void HAL_SuspendTick(void) 112:Core/Src/stm32f3xx_hal_timebase_tim.c **** { 184 .loc 1 112 1 185 .cfi_startproc 186 @ args = 0, pretend = 0, frame = 0 187 @ frame_needed = 1, uses_anonymous_args = 0 188 @ link register save eliminated. 189 0000 80B4 push {r7} 190 .LCFI5: 191 .cfi_def_cfa_offset 4 192 .cfi_offset 7, -4 193 0002 00AF add r7, sp, #0 194 .LCFI6: 195 .cfi_def_cfa_register 7 113:Core/Src/stm32f3xx_hal_timebase_tim.c **** /* Disable TIM1 update Interrupt */ 114:Core/Src/stm32f3xx_hal_timebase_tim.c **** __HAL_TIM_DISABLE_IT(&htim1, TIM_IT_UPDATE); 196 .loc 1 114 3 197 0004 064B ldr r3, .L8 198 0006 1B68 ldr r3, [r3] 199 0008 DA68 ldr r2, [r3, #12] 200 000a 054B ldr r3, .L8 201 000c 1B68 ldr r3, [r3] 202 000e 22F00102 bic r2, r2, #1 203 0012 DA60 str r2, [r3, #12] 115:Core/Src/stm32f3xx_hal_timebase_tim.c **** } 204 .loc 1 115 1 205 0014 00BF nop 206 0016 BD46 mov sp, r7 207 .LCFI7: 208 .cfi_def_cfa_register 13 209 @ sp needed 210 0018 5DF8047B ldr r7, [sp], #4 211 .LCFI8: 212 .cfi_restore 7 213 .cfi_def_cfa_offset 0 214 001c 7047 bx lr 215 .L9: 216 001e 00BF .align 2 217 .L8: 218 0020 00000000 .word htim1 219 .cfi_endproc 220 .LFE131: 222 .section .text.HAL_ResumeTick,"ax",%progbits 223 .align 1 224 .global HAL_ResumeTick 225 .syntax unified 226 .thumb 227 .thumb_func 229 HAL_ResumeTick: 230 .LFB132: ARM GAS C:\Users\zl835\AppData\Local\Temp\ccQbGAXn.s page 7 116:Core/Src/stm32f3xx_hal_timebase_tim.c **** 117:Core/Src/stm32f3xx_hal_timebase_tim.c **** /** 118:Core/Src/stm32f3xx_hal_timebase_tim.c **** * @brief Resume Tick increment. 119:Core/Src/stm32f3xx_hal_timebase_tim.c **** * @note Enable the tick increment by Enabling TIM1 update interrupt. 120:Core/Src/stm32f3xx_hal_timebase_tim.c **** * @param None 121:Core/Src/stm32f3xx_hal_timebase_tim.c **** * @retval None 122:Core/Src/stm32f3xx_hal_timebase_tim.c **** */ 123:Core/Src/stm32f3xx_hal_timebase_tim.c **** void HAL_ResumeTick(void) 124:Core/Src/stm32f3xx_hal_timebase_tim.c **** { 231 .loc 1 124 1 232 .cfi_startproc 233 @ args = 0, pretend = 0, frame = 0 234 @ frame_needed = 1, uses_anonymous_args = 0 235 @ link register save eliminated. 236 0000 80B4 push {r7} 237 .LCFI9: 238 .cfi_def_cfa_offset 4 239 .cfi_offset 7, -4 240 0002 00AF add r7, sp, #0 241 .LCFI10: 242 .cfi_def_cfa_register 7 125:Core/Src/stm32f3xx_hal_timebase_tim.c **** /* Enable TIM1 Update interrupt */ 126:Core/Src/stm32f3xx_hal_timebase_tim.c **** __HAL_TIM_ENABLE_IT(&htim1, TIM_IT_UPDATE); 243 .loc 1 126 3 244 0004 064B ldr r3, .L11 245 0006 1B68 ldr r3, [r3] 246 0008 DA68 ldr r2, [r3, #12] 247 000a 054B ldr r3, .L11 248 000c 1B68 ldr r3, [r3] 249 000e 42F00102 orr r2, r2, #1 250 0012 DA60 str r2, [r3, #12] 127:Core/Src/stm32f3xx_hal_timebase_tim.c **** } 251 .loc 1 127 1 252 0014 00BF nop 253 0016 BD46 mov sp, r7 254 .LCFI11: 255 .cfi_def_cfa_register 13 256 @ sp needed 257 0018 5DF8047B ldr r7, [sp], #4 258 .LCFI12: 259 .cfi_restore 7 260 .cfi_def_cfa_offset 0 261 001c 7047 bx lr 262 .L12: 263 001e 00BF .align 2 264 .L11: 265 0020 00000000 .word htim1 266 .cfi_endproc 267 .LFE132: 269 .text 270 .Letext0: 271 .file 2 "d:\\arm-gcc\\arm-none-eabi\\include\\machine\\_default_types.h" 272 .file 3 "d:\\arm-gcc\\arm-none-eabi\\include\\sys\\_stdint.h" 273 .file 4 "Drivers/CMSIS/Device/ST/STM32F3xx/Include/stm32f302xc.h" 274 .file 5 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_def.h" 275 .file 6 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_rcc.h" 276 .file 7 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_dma.h" ARM GAS C:\Users\zl835\AppData\Local\Temp\ccQbGAXn.s page 8 277 .file 8 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_tim.h" 278 .file 9 "Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal.h" ARM GAS C:\Users\zl835\AppData\Local\Temp\ccQbGAXn.s page 9 DEFINED SYMBOLS *ABS*:00000000 stm32f3xx_hal_timebase_tim.c C:\Users\zl835\AppData\Local\Temp\ccQbGAXn.s:24 .bss.htim1:00000000 htim1 C:\Users\zl835\AppData\Local\Temp\ccQbGAXn.s:21 .bss.htim1:00000000 $d C:\Users\zl835\AppData\Local\Temp\ccQbGAXn.s:27 .text.HAL_InitTick:00000000 $t C:\Users\zl835\AppData\Local\Temp\ccQbGAXn.s:33 .text.HAL_InitTick:00000000 HAL_InitTick C:\Users\zl835\AppData\Local\Temp\ccQbGAXn.s:167 .text.HAL_InitTick:000000cc $d C:\Users\zl835\AppData\Local\Temp\ccQbGAXn.s:176 .text.HAL_SuspendTick:00000000 $t C:\Users\zl835\AppData\Local\Temp\ccQbGAXn.s:182 .text.HAL_SuspendTick:00000000 HAL_SuspendTick C:\Users\zl835\AppData\Local\Temp\ccQbGAXn.s:218 .text.HAL_SuspendTick:00000020 $d C:\Users\zl835\AppData\Local\Temp\ccQbGAXn.s:223 .text.HAL_ResumeTick:00000000 $t C:\Users\zl835\AppData\Local\Temp\ccQbGAXn.s:229 .text.HAL_ResumeTick:00000000 HAL_ResumeTick C:\Users\zl835\AppData\Local\Temp\ccQbGAXn.s:265 .text.HAL_ResumeTick:00000020 $d UNDEFINED SYMBOLS HAL_RCC_GetClockConfig HAL_RCC_GetPCLK2Freq HAL_TIM_Base_Init HAL_TIM_Base_Start_IT HAL_NVIC_EnableIRQ HAL_NVIC_SetPriority uwTickPrio